boot-architecture June 2013

boot-architecture@lists.linaro.org

10 participants
25 discussions

by Ryan Harkin

Hey all, After my chat with Leif chat on Thurs, one thing I thought about was bash completion for uefi-build.sh. Turns out it's quite easy! I just pushed this commit to uefi-tools.git [1]. It's quite dumb in that you can autocomplete "DEBUG" or "RELEASE" even without the "-b" parameter, but hey, it makes my life easier :-) Cheers, Ryan. commit dc3ba99d46ecb87c529a475d5ff6b840cd2f7c8d Author: Ryan Harkin <ryan.harkin(a)linaro.org> Date: Tue Jun 11 13:00:12 2013 +0100 uefi-build: add bash completion script Copy this script into the bash completion directory to easy entering parameters: $ sudo cp uefi-build.sh.bash_completion \ /etc/bash_completion.d/uefi-build.sh Signed-off-by: Ryan Harkin <ryan.harkin(a)linaro.org> diff --git a/uefi-build.sh.bash_completion b/uefi-build.sh.bash_completion new file mode 100644 index 0000000..f0a5305 --- /dev/null +++ b/uefi-build.sh.bash_completion @@ -0,0 +1,24 @@ +# bash completion for uefi-build.sh +# copy this file to /etc/bash_completion.d/uefi-build.s + +have uefi-build.sh && +_uefi-build.sh() +{ + local cur prev + + COMPREPLY=() + _get_comp_words_by_ref -n = cur + + _expand || return 0 + + COMPREPLY=( $( compgen -W '--help -b --build RELEASE DEBUG a5 a9 tc1 tc2 panda origen arndale rtsm_a9x4 rtsm_a15x1 rtsm_a15mpcore rtsm_aarch6 +} && +complete -F _uefi-build.sh uefi-build.sh + +# Local variables: +# mode: shell-script +# sh-basic-offset: 4 +# sh-indent-comment: t +# indent-tabs-mode: nil +# End: +# ex: ts=4 sw=4 et filetype=sh [1] http://git.linaro.org/gitweb?p=arm/uefi/uefi-tools.git;a=summary

13 years

[PATCH] This patch fixes the build breakage issue for Arndale BSP due to the patch "ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore()"

by Rony Nandy

--- .../ArndaleBoardLib/Exynos5250/BoardHelper.S | 25 ++++++++++++++++++++ .../ArndaleBoardPkg/arndale-Exynos5250.dsc | 16 ------------- .../ArndaleBoardPkg/arndale-Exynos5250.fdf | 15 ------------ .../Exynos5250/Drivers/Gic400Dxe/PL390GicSec.c | 3 ++- .../Drivers/Gic400Dxe/PL390GicSecLib.inf | 5 ++-- SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.c | 5 ++-- .../ExynosPkg/Exynos5250/Sec/Sec.inf | 3 --- .../ExynosPkg/Exynos5250/Sec/SecEntryPoint.S | 25 +++++++++++++------- 8 files changed, 49 insertions(+), 48 deletions(-) diff --git a/SamsungPlatformPkg/ArndaleBoardPkg/Library/ArndaleBoardLib/Exynos5250/BoardHelper.S b/SamsungPlatformPkg/ArndaleBoardPkg/Library/ArndaleBoardLib/Exynos5250/BoardHelper.S index 1975e65..7ee7821 100644 --- a/SamsungPlatformPkg/ArndaleBoardPkg/Library/ArndaleBoardLib/Exynos5250/BoardHelper.S +++ b/SamsungPlatformPkg/ArndaleBoardPkg/Library/ArndaleBoardLib/Exynos5250/BoardHelper.S @@ -14,6 +14,7 @@ #include <AsmMacroIoLib.h> #include <Base.h> #include <Library/PcdLib.h> +#include <Library/ArmLib.h> #include <AutoGen.h> #.include AsmMacroIoLib.inc @@ -23,6 +24,9 @@ .align 2 GCC_ASM_EXPORT(ArmGetCpuCountPerCluster) +GCC_ASM_EXPORT(ArmPlatformGetCorePosition) +GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) +GCC_ASM_EXPORT(ArmPlatformPeiBootAction) # IN None # OUT r0 = SCU Base Address @@ -68,4 +72,25 @@ _Return: ldmfd SP!, {r1-r2} bx lr +ASM_PFX(ArmPlatformIsPrimaryCore): + #last 2 bit of mpid register in 5250 is CPU ID + ldr r1, =0x3 + and r0, r0, r1 + #id for core0 should be 0 + ldr r1, =0x0 + cmp r0, r1 + moveq r0, #1 + movne r0, #0 + mov pc, lr + +ASM_PFX(ArmPlatformGetCorePosition): + and r1, r0, #0x03 //cpu core mask last 2 bits + and r0, r0, #(0x0f<<8) //cpu cluster mask bit 8-11 + add r0, r1, r0, LSR #7 + mov pc, lr + + +ASM_PFX(ArmPlatformPeiBootAction): + mov pc, lr + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.dsc b/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.dsc index 941c6e5..ade2997 100755 --- a/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.dsc +++ b/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.dsc @@ -56,7 +56,6 @@ [BuildOptions] RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A8 --fpu=softvfp -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Exynos5250/Include/Platform - #GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a8 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Exynos5250/Include/Platform GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Exynos5250/Include/Platform XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Exynos5250/Include/Platform @@ -242,7 +241,6 @@ SamsungPlatformPkg/ExynosPkg/Exynos5250/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf - #Nt32Pkg/BootModePei/BootModePei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { <LibraryClasses> @@ -268,22 +266,17 @@ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - #MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf - #MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - #MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf - #EmbeddedPkg/SerialDxe/SerialDxe.inf MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - #MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf SamsungPlatformPkg/ArndaleBoardPkg/FvbDxe/FvbDxe.inf SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/TimerDxe/TimerDxe.inf @@ -318,9 +311,6 @@ # # Application # - #SamsungPlatformPkg/Apps/TestApps/HashServicesTest/HashServicesTest.inf - #SamsungPlatformPkg/Apps/TestApps/RngServicesTest/RngServicesTest.inf - # # Bds # @@ -346,9 +336,7 @@ # usb host : ehci + bus + pci_emul + mass_storage # SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/PciEmulation/PciEmulation.inf - #SamsungPlatformPkg/ExynosPkg/Exynos5250/OhciDxe/OhciDxe.inf MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf - #MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf @@ -363,8 +351,6 @@ <LibraryClasses> LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf } - MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf - #MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf SamsungPlatformPkg/Apps/Tools/fwupdate/fwupdate_5250.inf @@ -372,9 +358,7 @@ # # Crypto for Exynos # - #SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/HashDxe/HashDxe.inf # # Rng for Exynos # - #SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/RngDxe/RngDxe.inf diff --git a/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.fdf b/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.fdf index 8b5a5a7..9bccd79 100755 --- a/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.fdf +++ b/SamsungPlatformPkg/ArndaleBoardPkg/arndale-Exynos5250.fdf @@ -120,7 +120,6 @@ READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE - #INF ArmPlatformPkg/Sec/Sec.inf INF SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.inf @@ -155,8 +154,6 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - #INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf - #INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf @@ -166,14 +163,10 @@ READ_LOCK_STATUS = TRUE # Multiple Console IO support # INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - #INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf - #INF EmbeddedPkg/SerialDxe/SerialDxe.inf - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - #INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf !ifdef $(EXYNOS5250_EVT1) INF SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicDxe.inf @@ -207,9 +200,7 @@ READ_LOCK_STATUS = TRUE # USB HOST STACK # INF SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/PciEmulation/PciEmulation.inf - #INF SamsungPlatformPkg/ExynosPkg/Exynos5250/OhciDxe/OhciDxe.inf INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf - #INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf @@ -223,20 +214,14 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf - INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf - #INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf # Crypto for Exynos # - #INF SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/HashDxe/HashDxe.inf - #INF SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/RngDxe/RngDxe.inf # # UEFI application (Shell Embedded Boot Loader) # INF ShellBinPkg/UefiShell/UefiShell.inf - #INF SamsungPlatformPkg/Apps/TestApps/HashServicesTest/HashServicesTest.inf - #INF SamsungPlatformPkg/Apps/TestApps/RngServicesTest/RngServicesTest.inf # # Bds diff --git a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSec.c b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSec.c index f7b6d7c..82ecfde 100644 --- a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSec.c +++ b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSec.c @@ -15,6 +15,7 @@ #include <Base.h> #include <Library/ArmLib.h> #include <Library/DebugLib.h> +#include <Library/ArmPlatformLib.h> #include <Library/IoLib.h> #include <Library/ArmGicLib.h> @@ -50,7 +51,7 @@ ArmGicSetupNonSecure ( } // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt). - if (IS_PRIMARY_CORE(MpId)) { + if (ArmPlatformIsPrimaryCore (MpId)) { // Ensure all GIC interrupts are Non-Secure for (Index = 0; Index < (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32); Index++) { MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff); diff --git a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSecLib.inf b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSecLib.inf index 9e1fd09..ab399b4 100644 --- a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSecLib.inf +++ b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Drivers/Gic400Dxe/PL390GicSecLib.inf @@ -25,7 +25,9 @@ [Packages] ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec [LibraryClasses] ArmLib @@ -33,6 +35,3 @@ IoLib PcdLib -[FixedPcd.common] - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore diff --git a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.c b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.c index 549171b..3c4f498 100644 --- a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.c +++ b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.c @@ -21,6 +21,7 @@ #include <Library/ArmGicLib.h> #include <Library/ArmCpuLib.h> #include <Library/IoLib.h> +#include <Library/ArmPlatformLib.h> #include "SecInternal.h" #include "Smc.h" @@ -94,7 +95,7 @@ CEntryPoint ( } // Primary CPU clears out the SCU tag RAMs, secondaries wait - if (IS_PRIMARY_CORE(MpId)) { + if (ArmPlatformIsPrimaryCore (MpId)) { if (ArmIsMpCore()) { // Is UEFI built as it is assumed that TZSW is running? // PcdTrustzoneSupport==1: YES. @@ -174,7 +175,7 @@ TrustedWorldInitialization ( ArmPlatformSecTrustzoneInit (MpId); // Setup the Trustzone Chipsets - if (IS_PRIMARY_CORE(MpId)) { + if (ArmPlatformIsPrimaryCore (MpId)) { if (ArmIsMpCore()) { // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT) ArmCallSEV (); diff --git a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.inf b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.inf index 854b269..1cda8c3 100644 --- a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.inf +++ b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/Sec.inf @@ -62,9 +62,6 @@ gArmTokenSpaceGuid.PcdArmNsacr gArmTokenSpaceGuid.PcdArmNonSecModeTransition - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore - gArmTokenSpaceGuid.PcdSecureFvBaseAddress gArmTokenSpaceGuid.PcdSecureFvSize diff --git a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/SecEntryPoint.S b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/SecEntryPoint.S index 08a893c..4dec90b 100644 --- a/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/SecEntryPoint.S +++ b/SamsungPlatformPkg/ExynosPkg/Exynos5250/Sec/SecEntryPoint.S @@ -14,12 +14,14 @@ #include <AutoGen.h> #include <AsmMacroIoLib.h> #include <Library/ArmPlatformLib.h> +#include <ArmPlatform.h> #include "SecInternal.h" .text .align 3 GCC_ASM_IMPORT(CEntryPoint) +GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore) GCC_ASM_IMPORT(CopyFirmwareFromEMMC) GCC_ASM_IMPORT(CopyFirmwareFromSDMMC) GCC_ASM_IMPORT(ArmPlatformClockInitialize) @@ -36,6 +38,16 @@ GCC_ASM_EXPORT(_ModuleEntryPoint) SecStartupAddr: .word ASM_PFX(_SecEntryFromTzsw) StartupAddr: .word ASM_PFX(CEntryPoint) +// Convert the (ClusterId,CoreId) into a Core Position +// 0x0F03 is the magic value for ARM_CORE_MASK | ARM_CLUSTER_MASK +//Core is 0-1 bits and cluster is 8-11 bits +#define GetCorePositionFromMpId(Pos, MpId, Tmp) \ + ldr Tmp, =0x0F03 ; \ + and MpId, Tmp ; \ + lsr Pos, MpId, #6 ; \ + and Tmp, MpId, #3 ; \ + add Pos, Pos, Tmp + // Reserve a region at the top of the IRAM Core stack // for Global variables for the XIP phase #define SetiRamStack(StackTop, GlobalSize, Tmp) \ @@ -85,13 +97,13 @@ ASM_PFX(_ModuleEntryPoint): _IdentifyCpu: // Identify CPU ID bl ASM_PFX(ArmReadMpidr) - // Get ID of this CPU in Multicore system - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1) - and r5, r0, r1 + // Keep a copy of the MpId register value + mov r5, r0 // Is it the Primary Core ? - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3) - cmp r5, r3 + bl ASM_PFX(ArmPlatformIsPrimaryCore) + cmp r0, #1 + // Only the primary core initialize the memory (SMC) beq _InitMem @@ -119,9 +131,6 @@ _InitMem: bl ASM_PFX(ArmPlatformSecBootMemoryInit) - // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack) - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5) - _SetupPrimaryCoreStack: // Get the top of the primary stacks (and the base of the secondary stacks) LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1) -- 1.7.9.5

13 years

[PATCH 0/1] How to fix your ARM UEFI BSP to work with the latest upstream Tianocore code

by Ryan Harkin

[PATCH 1/2] TC1: Fix TC1 build for latest upstream changes [PATCH 2/2] VEA5: Fix A5 build for latest upstream changes The two platforms are relatively simple to fix because they follow the TC2 and A9 BSPs very closely. Perhaps close enough to some more code to be moved to common areas ;-) These examples will show you the simple steps you will need to take to get your BSP working. However, your BSP may be using old functionality that my BSPs were not. The main change to watch out for is the deletion of the macro IS_PRIMARY_CORE() which has been replaced with a function that the BSP must provide. The change came about with this commit: -------------------------------------------------------------------------------- commit bebda7ceec3d3024c76b3c2ed0c9b4e502a13d61 Author: oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> Date: Fri May 10 12:41:27 2013 +0000 ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore() Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin(a)arm.com> Reviewed-by: Leif Lindholm <leif.lindholm(a)linaro.org> Acked-by: Ryan Harkin <ryan.harkin(a)linaro.org> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524 -------------------------------------------------------------------------------- My examples provide this function in a way that works for them, however, your platforms may use different mechanisms. I have no specific code that was using the IS_PRIMARY_CORE() macro, so these patches will not give an example of how you deal with those changes, but Olivier's original patch should help a lot there. Regards, Ryan. [1] https://git.linaro.org/gitweb?p=arm/uefi/uefi-next.git;a=summary

13 years

linaro-uefi-2013.06-rc1 is out

by Ryan Harkin

Hello UEFI folks, I spent the day with Leif going through maintainer stuff and together we produced the 2013.06 iteration of the Linaro UEFI tree [1]. Highlights include: - A5, TC1, Panda, Origen and Arndale no longer build (I will be fixing A5 and TC1 as part of -rc2, unless something else urgent comes in and needs an -rc2) - The -menu and -local-fdt topics have been merged into one -bds topic to simplify upstreaming, reviewing and merging - All topics are rebased to the latest Tianocore upstream code - Some of our patches have made it upstream - yay! - and thus have been removed from our topic branches - There are more patches that we think are ready to go upstream now. I'll start this after -rc2 Regards, Ryan. [1] https://git.linaro.org/gitweb?p=arm/uefi/uefi-next.git;a=summary

13 years

Re: Looking at Maintainer Tasks Today And Tomorrow

by Steven Kinney

Hi Ryan, Thanks for the patch system and I will follow the same methodology. BR, Steve On 4 June 2013 10:50, Ryan Harkin <ryan.harkin(a)linaro.org> wrote: > Hi Steve, > > Further to our phone call, I pushed out my patch system git repo: > > ssh:// > linaro-private.git.linaro.org/srv/linaro-private.git.linaro.org/uefi/patche… > > Hope it helps! > > Cheers, > Ryan. > > On 3 June 2013 16:23, Steven Kinney <steven.kinney(a)linaro.org> wrote: > > Hi Ryan, > > > > I am focusing on maintainer tasks today and tomorrow; > > before I start on 64-bit SCT integration. I talked to Grant on my > one-on-one > > Friday and he suggested applying the patches within a local repository, > > maybe within my git.linaro.org folder, and working with you regarding > > merging and other GIT tasks. Of course, if you have ant suggestions to > > start getting me up so that I can be more of use to you, please let me > know. > > Also, Grant wanted me to start giving suggestions regarding the coding, > and > > I see some areas that can be commented on, but I would like to make sure > we > > are in sync before I start yammering on commented out code blocks and > such. > > > > Anyway, I look forward to learning about this area and > > will ping you from time to time over the next few days to get some > specific > > advice. Thanks for you patience and help! > > > > BR, > > > > Steve >

13 years

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boot-architecture June 2013