CoreSight

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6 participants
2594 discussions

Re: [PATCH RFC 1/3] coresight: tmc: add the handle of the event to the path

by Carl Worth

Jie Gan <jie.gan(a)oss.qualcomm.com> writes: > From: Carl Worth <carl(a)os.amperecomputing.com> > > The handle is essential for retrieving the AUX_EVENT of each CPU and is > required in perf mode. It has been added to the coresight_path so that > dependent devices can access it from the path when needed. I'd still like to have the original command I used to trigger the bug in the commit message. I really like having reproduction steps captured in commit messages when I look back at commits in the future. So, that was: perf record -e cs_etm//k -C 0-9 dd if=/dev/zero of=/dev/null > /** > * struct coresight_path - data needed by enable/disable path > - * @path_list: path from source to sink. > - * @trace_id: trace_id of the whole path. > + * @path_list: path from source to sink. > + * @trace_id: trace_id of the whole path. > + * struct perf_output_handle: handle of the aux_event. > */ Fixing to "@handle" was mentioned in another comment already. Something about the above still feels a little off to me. It feels like we're throwing new data into a structure just because it happens to be conveniently at hand for the code paths we're needing, and not because it really _belongs_ there. Or, maybe it's the right place for it, and the cause of my concern is that "path" is an overly-narrow name in struct coresight_path? But if a renaming of this structure would improve the code, I'd also be fine with that happening in a subsequent commit, so I won't try to hold up the current series based on that. -Carl

3 months

Re: [PATCH RFC 0/3] coresight: replace the void pointer with coresight_path pointer

by Carl Worth

Jie Gan <jie.gan(a)oss.qualcomm.com> writes: > I think it's better to explain my ideas with codes, so I directly created the > patch series for sharing my solution. Please let me know if it's > offend you. Thanks, Jie! I'm not offended at all. My primary goal is the improvement of our shared code base, and this is helpful for that. And I agree with you that code can bring a lot of clarity to the discussion. I've tested the series and it works and fixes the bug. I'll comment specifically on each patch separately. -Carl

3 months

[GIT PULL] coresight: Updates for Linux v6.18

by Suzuki K Poulose

Hi Greg Please find the CoreSight tree updates for v6.18. Kindly pull, Suzuki The following changes since commit 1b237f190eb3d36f52dffe07a40b5eb210280e00: Linux 6.17-rc3 (2025-08-24 12:04:12 -0400) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-next-v6.18 for you to fetch changes up to 559d6c380ea0a27e71d0269410301303515e4179: coresight: Add label sysfs node support (2025-09-10 17:53:01 +0100) ---------------------------------------------------------------- coresight: Updates for Linux v6.18 CoreSight selfhosted tracing subsystem updates targeting Linux v6.18, includes: - Clean up and consolidate clocks handling - Support for exposing labels via sysfs for better device identification - Add Qualcomm Trace Network On Chip driver support - Miscellaneous fixes Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> ---------------------------------------------------------------- Dan Carpenter (1): coresight: Fix a NULL vs IS_ERR() bug in probe James Clark (2): coresight: trbe: Add ISB after TRBLIMITR write coresight: Fix missing include for FIELD_GET Jie Gan (1): coresight: tpda: fix the logic to setup the element size Leo Yan (13): coresight: stm: Remove redundant NULL checks coresight: perf: Use %px for printing pointers coresight: tmc: Support atclk coresight: catu: Support atclk coresight: etm4x: Support atclk coresight: Appropriately disable programming clocks coresight: Appropriately disable trace bus clocks coresight: Avoid enable programming clock duplicately coresight: Consolidate clock enabling coresight: Refactor driver data allocation coresight: Make clock sequence consistent coresight: Refactor runtime PM coresight: trbe: Return NULL pointer for allocation failures Lin Yujun (1): coresight: Fix incorrect handling for return value of devm_kzalloc Mao Jinlong (2): dt-bindings: arm: Add label in the coresight components coresight: Add label sysfs node support Rob Herring (Arm) (1): hwtracing: coresight: Use of_reserved_mem_region_to_resource() for "memory-region" Yeoreum Yun (1): coresight: fix indentation error in cscfg_remove_owned_csdev_configs() Yuanfang Zhang (5): coresight: Only register perf symlink for sinks with alloc_buffer dt-bindings: arm: Add device Trace Network On Chip definition coresight: add coresight Trace Network On Chip driver coresight-etm4x: Conditionally access register TRCEXTINSELR coresight: tnoc: add new AMBA ID to support Trace Noc V2 .../ABI/testing/sysfs-bus-coresight-devices-cti | 6 + .../sysfs-bus-coresight-devices-dummy-source | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etb10 | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etm3x | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 6 + .../ABI/testing/sysfs-bus-coresight-devices-funnel | 6 + .../ABI/testing/sysfs-bus-coresight-devices-stm | 6 + .../ABI/testing/sysfs-bus-coresight-devices-tmc | 6 + .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 6 + .../ABI/testing/sysfs-bus-coresight-devices-trbe | 6 + .../devicetree/bindings/arm/arm,coresight-cti.yaml | 4 + .../bindings/arm/arm,coresight-dummy-sink.yaml | 4 + .../bindings/arm/arm,coresight-dummy-source.yaml | 4 + .../bindings/arm/arm,coresight-dynamic-funnel.yaml | 4 + .../arm/arm,coresight-dynamic-replicator.yaml | 4 + .../bindings/arm/arm,coresight-etb10.yaml | 4 + .../devicetree/bindings/arm/arm,coresight-etm.yaml | 4 + .../bindings/arm/arm,coresight-static-funnel.yaml | 4 + .../arm/arm,coresight-static-replicator.yaml | 4 + .../devicetree/bindings/arm/arm,coresight-tmc.yaml | 4 + .../bindings/arm/arm,coresight-tpiu.yaml | 4 + .../bindings/arm/qcom,coresight-ctcu.yaml | 4 + .../bindings/arm/qcom,coresight-remote-etm.yaml | 4 + .../bindings/arm/qcom,coresight-tnoc.yaml | 113 ++++++++++ .../bindings/arm/qcom,coresight-tpda.yaml | 4 + .../bindings/arm/qcom,coresight-tpdm.yaml | 4 + drivers/hwtracing/coresight/Kconfig | 12 + drivers/hwtracing/coresight/Makefile | 1 + drivers/hwtracing/coresight/coresight-catu.c | 53 +++-- drivers/hwtracing/coresight/coresight-catu.h | 1 + drivers/hwtracing/coresight/coresight-core.c | 54 ++++- drivers/hwtracing/coresight/coresight-cpu-debug.c | 41 ++-- drivers/hwtracing/coresight/coresight-ctcu-core.c | 24 +- drivers/hwtracing/coresight/coresight-etb10.c | 18 +- drivers/hwtracing/coresight/coresight-etm-perf.c | 4 +- drivers/hwtracing/coresight/coresight-etm3x-core.c | 17 +- drivers/hwtracing/coresight/coresight-etm4x-core.c | 44 ++-- .../hwtracing/coresight/coresight-etm4x-sysfs.c | 1 + drivers/hwtracing/coresight/coresight-etm4x.h | 6 +- drivers/hwtracing/coresight/coresight-funnel.c | 66 ++---- drivers/hwtracing/coresight/coresight-replicator.c | 63 ++---- drivers/hwtracing/coresight/coresight-stm.c | 42 ++-- drivers/hwtracing/coresight/coresight-syscfg.c | 2 +- drivers/hwtracing/coresight/coresight-sysfs.c | 71 +++++- drivers/hwtracing/coresight/coresight-tmc-core.c | 70 +++--- drivers/hwtracing/coresight/coresight-tmc.h | 2 + drivers/hwtracing/coresight/coresight-tnoc.c | 246 +++++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpda.c | 3 + drivers/hwtracing/coresight/coresight-tpiu.c | 36 ++- drivers/hwtracing/coresight/coresight-trbe.c | 9 +- drivers/hwtracing/coresight/ultrasoc-smb.h | 1 + include/linux/coresight.h | 31 +-- 52 files changed, 827 insertions(+), 324 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml create mode 100644 drivers/hwtracing/coresight/coresight-tnoc.c

3 months

[GIT PULL] coresight: Updates for Linux v6.18

by Suzuki K Poulose

Hi Greg Please find the CoreSight tree updates for v6.18. Kindly pull, Suzuki The following changes since commit 1b237f190eb3d36f52dffe07a40b5eb210280e00: Linux 6.17-rc3 (2025-08-24 12:04:12 -0400) are available in the Git repository at: ssh://git@gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-next-v6.18 for you to fetch changes up to 559d6c380ea0a27e71d0269410301303515e4179: coresight: Add label sysfs node support (2025-09-10 17:53:01 +0100) ---------------------------------------------------------------- coresight: Updates for Linux v6.18 CoreSight selfhosted tracing subsystem updates targeting Linux v6.18, includes: - Clean up and consolidate clocks handling - Support for exposing labels via sysfs for better device identification - Add Qualcomm Trace Network On Chip driver support - Miscellaneous fixes Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> ---------------------------------------------------------------- Dan Carpenter (1): coresight: Fix a NULL vs IS_ERR() bug in probe James Clark (2): coresight: trbe: Add ISB after TRBLIMITR write coresight: Fix missing include for FIELD_GET Jie Gan (1): coresight: tpda: fix the logic to setup the element size Leo Yan (13): coresight: stm: Remove redundant NULL checks coresight: perf: Use %px for printing pointers coresight: tmc: Support atclk coresight: catu: Support atclk coresight: etm4x: Support atclk coresight: Appropriately disable programming clocks coresight: Appropriately disable trace bus clocks coresight: Avoid enable programming clock duplicately coresight: Consolidate clock enabling coresight: Refactor driver data allocation coresight: Make clock sequence consistent coresight: Refactor runtime PM coresight: trbe: Return NULL pointer for allocation failures Lin Yujun (1): coresight: Fix incorrect handling for return value of devm_kzalloc Mao Jinlong (2): dt-bindings: arm: Add label in the coresight components coresight: Add label sysfs node support Rob Herring (Arm) (1): hwtracing: coresight: Use of_reserved_mem_region_to_resource() for "memory-region" Yeoreum Yun (1): coresight: fix indentation error in cscfg_remove_owned_csdev_configs() Yuanfang Zhang (5): coresight: Only register perf symlink for sinks with alloc_buffer dt-bindings: arm: Add device Trace Network On Chip definition coresight: add coresight Trace Network On Chip driver coresight-etm4x: Conditionally access register TRCEXTINSELR coresight: tnoc: add new AMBA ID to support Trace Noc V2 .../ABI/testing/sysfs-bus-coresight-devices-cti | 6 + .../sysfs-bus-coresight-devices-dummy-source | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etb10 | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etm3x | 6 + .../ABI/testing/sysfs-bus-coresight-devices-etm4x | 6 + .../ABI/testing/sysfs-bus-coresight-devices-funnel | 6 + .../ABI/testing/sysfs-bus-coresight-devices-stm | 6 + .../ABI/testing/sysfs-bus-coresight-devices-tmc | 6 + .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 6 + .../ABI/testing/sysfs-bus-coresight-devices-trbe | 6 + .../devicetree/bindings/arm/arm,coresight-cti.yaml | 4 + .../bindings/arm/arm,coresight-dummy-sink.yaml | 4 + .../bindings/arm/arm,coresight-dummy-source.yaml | 4 + .../bindings/arm/arm,coresight-dynamic-funnel.yaml | 4 + .../arm/arm,coresight-dynamic-replicator.yaml | 4 + .../bindings/arm/arm,coresight-etb10.yaml | 4 + .../devicetree/bindings/arm/arm,coresight-etm.yaml | 4 + .../bindings/arm/arm,coresight-static-funnel.yaml | 4 + .../arm/arm,coresight-static-replicator.yaml | 4 + .../devicetree/bindings/arm/arm,coresight-tmc.yaml | 4 + .../bindings/arm/arm,coresight-tpiu.yaml | 4 + .../bindings/arm/qcom,coresight-ctcu.yaml | 4 + .../bindings/arm/qcom,coresight-remote-etm.yaml | 4 + .../bindings/arm/qcom,coresight-tnoc.yaml | 113 ++++++++++ .../bindings/arm/qcom,coresight-tpda.yaml | 4 + .../bindings/arm/qcom,coresight-tpdm.yaml | 4 + drivers/hwtracing/coresight/Kconfig | 12 + drivers/hwtracing/coresight/Makefile | 1 + drivers/hwtracing/coresight/coresight-catu.c | 53 +++-- drivers/hwtracing/coresight/coresight-catu.h | 1 + drivers/hwtracing/coresight/coresight-core.c | 54 ++++- drivers/hwtracing/coresight/coresight-cpu-debug.c | 41 ++-- drivers/hwtracing/coresight/coresight-ctcu-core.c | 24 +- drivers/hwtracing/coresight/coresight-etb10.c | 18 +- drivers/hwtracing/coresight/coresight-etm-perf.c | 4 +- drivers/hwtracing/coresight/coresight-etm3x-core.c | 17 +- drivers/hwtracing/coresight/coresight-etm4x-core.c | 44 ++-- .../hwtracing/coresight/coresight-etm4x-sysfs.c | 1 + drivers/hwtracing/coresight/coresight-etm4x.h | 6 +- drivers/hwtracing/coresight/coresight-funnel.c | 66 ++---- drivers/hwtracing/coresight/coresight-replicator.c | 63 ++---- drivers/hwtracing/coresight/coresight-stm.c | 42 ++-- drivers/hwtracing/coresight/coresight-syscfg.c | 2 +- drivers/hwtracing/coresight/coresight-sysfs.c | 71 +++++- drivers/hwtracing/coresight/coresight-tmc-core.c | 70 +++--- drivers/hwtracing/coresight/coresight-tmc.h | 2 + drivers/hwtracing/coresight/coresight-tnoc.c | 246 +++++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpda.c | 3 + drivers/hwtracing/coresight/coresight-tpiu.c | 36 ++- drivers/hwtracing/coresight/coresight-trbe.c | 9 +- drivers/hwtracing/coresight/ultrasoc-smb.h | 1 + include/linux/coresight.h | 31 +-- 52 files changed, 827 insertions(+), 324 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml create mode 100644 drivers/hwtracing/coresight/coresight-tnoc.c

3 months

Re: [PATCH v4 2/2] coresight: Fix possible deadlock in coresight_panic_cb

by Leo Yan

On Fri, Sep 19, 2025 at 12:06:53PM -0400, Sean Anderson wrote: [...] > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index 022c8384b98d..6dfb1198c16e 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -1046,8 +1046,11 @@ static void coresight_device_release(struct device *dev) > { > struct coresight_device *csdev = to_coresight_device(dev); > > - fwnode_handle_put(csdev->dev.fwnode); > + if (panic_ops(csdev)) > + atomic_notifier_chain_unregister(&panic_notifier_list, > + &csdev->panic_notifier); > free_percpu(csdev->perf_sink_id_map.cpu_map); > + fwnode_handle_put(csdev->dev.fwnode); The moving fwnode_handle_put() is irrelvant to panic notifier fix, should be moved out from this patch. > kfree(csdev); > } > > @@ -1315,6 +1318,16 @@ void coresight_release_platform_data(struct coresight_device *csdev, > coresight_remove_conns_sysfs_group(csdev); > } > > +static int coresight_panic_notifier(struct notifier_block *nb, > + unsigned long action, void *data) > +{ > + struct coresight_device *csdev = > + container_of(nb, struct coresight_device, panic_notifier); > + Need to check device mode: if (coresight_get_mode(csdev) == CS_MODE_DISABLED) return NOTIFY_DONE; The rest is fine for me. Thanks, Leo > + panic_ops(csdev)->sync(csdev); > + return NOTIFY_DONE; > +} > + > struct coresight_device *coresight_register(struct coresight_desc *desc) > { > int ret; > @@ -1357,6 +1370,17 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) > goto err_out; > } > } > + > + if (panic_ops(csdev)) { > + csdev->panic_notifier.notifier_call = coresight_panic_notifier; > + ret = atomic_notifier_chain_register(&panic_notifier_list, > + &csdev->panic_notifier); > + if (ret) { > + coresight_device_release(&csdev->dev); > + goto err_out; > + } > + } > + > /* > * Make sure the device registration and the connection fixup > * are synchronised, so that we don't see uninitialised devices > @@ -1563,36 +1587,6 @@ const struct bus_type coresight_bustype = { > .name = "coresight", > }; > > -static int coresight_panic_sync(struct device *dev, void *data) > -{ > - int mode; > - struct coresight_device *csdev; > - > - /* Run through panic sync handlers for all enabled devices */ > - csdev = container_of(dev, struct coresight_device, dev); > - mode = coresight_get_mode(csdev); > - > - if ((mode == CS_MODE_SYSFS) || (mode == CS_MODE_PERF)) { > - if (panic_ops(csdev)) > - panic_ops(csdev)->sync(csdev); > - } > - > - return 0; > -} > - > -static int coresight_panic_cb(struct notifier_block *self, > - unsigned long v, void *p) > -{ > - bus_for_each_dev(&coresight_bustype, NULL, NULL, > - coresight_panic_sync); > - > - return 0; > -} > - > -static struct notifier_block coresight_notifier = { > - .notifier_call = coresight_panic_cb, > -}; > - > static int __init coresight_init(void) > { > int ret; > @@ -1605,20 +1599,11 @@ static int __init coresight_init(void) > if (ret) > goto exit_bus_unregister; > > - /* Register function to be called for panic */ > - ret = atomic_notifier_chain_register(&panic_notifier_list, > - &coresight_notifier); > - if (ret) > - goto exit_perf; > - > /* initialise the coresight syscfg API */ > ret = cscfg_init(); > if (!ret) > return 0; > > - atomic_notifier_chain_unregister(&panic_notifier_list, > - &coresight_notifier); > -exit_perf: > etm_perf_exit(); > exit_bus_unregister: > bus_unregister(&coresight_bustype); > @@ -1628,8 +1613,6 @@ static int __init coresight_init(void) > static void __exit coresight_exit(void) > { > cscfg_exit(); > - atomic_notifier_chain_unregister(&panic_notifier_list, > - &coresight_notifier); > etm_perf_exit(); > bus_unregister(&coresight_bustype); > } > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 4ac65c68bbf4..a7aaf9d3d01d 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -280,6 +280,7 @@ struct coresight_trace_id_map { > * @config_csdev_list: List of system configurations added to the device. > * @cscfg_csdev_lock: Protect the lists of configurations and features. > * @active_cscfg_ctxt: Context information for current active system configuration. > + * @panic_notifier: Notifier block used to clean up during a panic > */ > struct coresight_device { > struct coresight_platform_data *pdata; > @@ -304,6 +305,7 @@ struct coresight_device { > struct list_head config_csdev_list; > raw_spinlock_t cscfg_csdev_lock; > void *active_cscfg_ctxt; > + struct notifier_block panic_notifier; > }; > > /* > -- > 2.35.1.1320.gc452695387.dirty >

3 months

Re: [PATCH v4 1/2] coresight: Fix fwnode leak in coresight_register error path

by Leo Yan

On Fri, Sep 19, 2025 at 12:06:52PM -0400, Sean Anderson wrote: > If registering the CPU map fails, we need to put the fwnode. free_percpu > works when called with a NULL pointer, so just use > coresight_device_release. > > Fixes: 5ad628a76176 ("coresight: Use per-sink trace ID maps for Perf sessions") > Signed-off-by: Sean Anderson <sean.anderson(a)linux.dev> I have a patch that fixes the same issue: https://lore.kernel.org/linux-arm-kernel/20250512154108.23920-2-leo.yan@arm… The difference in my patch is about the sequence: first it allocates the resource, then increases the fw node's reference count. During release, it first decreases the reference count, and then safely releases the resource. After comparing your patch, I still think the above reason is valid. That said, I agree we should put this fixing before the panic notifier fix. This would be friendly for backporting. Thanks, Leo > --- > > Changes in v4: > - New > > drivers/hwtracing/coresight/coresight-core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c > index fa758cc21827..022c8384b98d 100644 > --- a/drivers/hwtracing/coresight/coresight-core.c > +++ b/drivers/hwtracing/coresight/coresight-core.c > @@ -1352,7 +1352,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) > raw_spin_lock_init(&csdev->perf_sink_id_map.lock); > csdev->perf_sink_id_map.cpu_map = alloc_percpu(atomic_t); > if (!csdev->perf_sink_id_map.cpu_map) { > - kfree(csdev); > + coresight_device_release(&csdev->dev); > ret = -ENOMEM; > goto err_out; > } > -- > 2.35.1.1320.gc452695387.dirty >

3 months

Re: [PATCH RFC 3/3] coresight: change the sink_ops to accept coresight_path

by Leo Yan

On Mon, Sep 22, 2025 at 03:31:41PM +0800, Jie Gan wrote: > Update the sink_enable functions to accept coresight_path instead of > a generic void *data, as coresight_path encapsulates all the necessary > data required by devices along the path. > > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> Good refactoring for me, thanks! Reviewed-by: Leo Yan <leo.yan(a)arm.com>

3 months

Re: [PATCH RFC 2/3] coresight: change helper_ops to accept coresight_path

by Leo Yan

On Mon, Sep 22, 2025 at 03:31:40PM +0800, Jie Gan wrote: > Update the helper_enable and helper_disable functions to accept > coresight_path instead of a generic void *data, as coresight_path > encapsulates all the necessary data required by devices along the path. > > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

3 months

Re: [PATCH RFC 1/3] coresight: tmc: add the handle of the event to the path

by Leo Yan

On Mon, Sep 22, 2025 at 03:31:39PM +0800, Jie Gan wrote: > From: Carl Worth <carl(a)os.amperecomputing.com> > > The handle is essential for retrieving the AUX_EVENT of each CPU and is > required in perf mode. It has been added to the coresight_path so that > dependent devices can access it from the path when needed. > > Fixes: 080ee83cc361 ("Coresight: Change functions to accept the coresight_path") > Signed-off-by: Carl Worth <carl(a)os.amperecomputing.com> > Co-developed-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> > --- > drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + > drivers/hwtracing/coresight/coresight-tmc-etr.c | 3 ++- > include/linux/coresight.h | 10 ++++++---- > 3 files changed, 9 insertions(+), 5 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c > index f677c08233ba..5c256af6e54a 100644 > --- a/drivers/hwtracing/coresight/coresight-etm-perf.c > +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c > @@ -520,6 +520,7 @@ static void etm_event_start(struct perf_event *event, int flags) > goto out; > > path = etm_event_cpu_path(event_data, cpu); > + path->handle = handle; > /* We need a sink, no need to continue without one */ > sink = coresight_get_sink(path); > if (WARN_ON_ONCE(!sink)) > diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c > index b07fcdb3fe1a..1040f73f0537 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c > +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c > @@ -1327,7 +1327,8 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) > struct etr_buf *tmc_etr_get_buffer(struct coresight_device *csdev, > enum cs_mode mode, void *data) > { > - struct perf_output_handle *handle = data; > + struct coresight_path *path = data; > + struct perf_output_handle *handle = path->handle; > struct etr_perf_buffer *etr_perf; > > switch (mode) { > diff --git a/include/linux/coresight.h b/include/linux/coresight.h > index 6de59ce8ef8c..4591121ae1d4 100644 > --- a/include/linux/coresight.h > +++ b/include/linux/coresight.h > @@ -332,12 +332,14 @@ static struct coresight_dev_list (var) = { \ > > /** > * struct coresight_path - data needed by enable/disable path > - * @path_list: path from source to sink. > - * @trace_id: trace_id of the whole path. > + * @path_list: path from source to sink. > + * @trace_id: trace_id of the whole path. > + * struct perf_output_handle: handle of the aux_event. s/struct perf_output_handle/@handle/ Otherwise, LGTM: Reviewed-by: Leo Yan <leo.yan(a)arm.com> > */ > struct coresight_path { > - struct list_head path_list; > - u8 trace_id; > + struct list_head path_list; > + u8 trace_id; > + struct perf_output_handle *handle; > }; > > enum cs_mode { > > -- > 2.34.1 > >

3 months

Re: [PATCH] coresight: Fix data argument to coresight_enable_helpers

by Suzuki K Poulose

On 19/09/2025 02:20, Jie Gan wrote: > > > On 9/19/2025 6:18 AM, Carl Worth wrote: >> Jie Gan <jie.gan(a)oss.qualcomm.com> writes: >>> I dont think we can change back to sink_data since we introduced >>> coresight_path to wrap 'data' which is needed by the path. >>> >>> I suggest you to add the struct perf_output_handle to the >>> coresight_path, then retrieving it with data->perf_handle in >>> tmc_etr_get_buffer. >> ... >>> We can assign the perf_output_handle to the coresight_path after we >>> constructed the coresight_path in perf mode. >> >> Thanks. That much makes sense to me, and I'll put together a patch along >> those lines. >> >> But, further: with core coresight code assembling into the path all the >> data that is necessary, is there any reason to be using void* in these >> enable/disable functions? > > In my opinion, yes, we can change void * to coresight_path * for > helper's enable/disable functions since we have everything in path so > the cast is not necessary now. > >> >> Could we also change these functions to accept a coresight_path* and >> actually get some compiler help at finding mistakes like the one we're >> fixing here? > Yes, please. I was going to suggest that. May be we could do that as a separate patch after fixing the problem here first (so that it can be back ported). This was initially a perf_handle only used for the perf mode, and it didn't make sens to have a "perf" argument to "enable" which could be used for both sysfs and perf. Now that the path is a generic data structure, it makes sense to move everything to accept the path. Suzuki > That's the only benefit in my mind so far. > > Thanks, > Jie > >> >> -Carl >

3 months, 1 week

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