Reading TMC mode register without proper coresight power
management can lead to exceptions like the one in the call
trace below in tmc_read_unprepare_etb() when the trace data
is read after the sink is disabled. So fix this by having
a check for coresight sysfs mode before reading TMC mode
management register in tmc_read_unprepare_etb() similar to
tmc_read_prepare_etb().
SError Interrupt on CPU6, code 0xbe000411 -- SError
pstate: 80400089 (Nzcv daIf +PAN -UAO)
pc : tmc_read_unprepare_etb+0x74/0x108
lr : tmc_read_unprepare_etb+0x54/0x108
sp : ffffff80d9507c30
x29: ffffff80d9507c30 x28: ffffff80b3569a0c
x27: 0000000000000000 x26: 00000000000a0001
x25: ffffff80cbae9550 x24: 0000000000000010
x23: ffffffd07296b0f0 x22: ffffffd0109ee028
x21: 0000000000000000 x20: ffffff80d19e70e0
x19: ffffff80d19e7080 x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000000 x10: dfffffd000000001
x9 : 0000000000000000 x8 : 0000000000000002
x7 : ffffffd071d0fe78 x6 : 0000000000000000
x5 : 0000000000000080 x4 : 0000000000000001
x3 : ffffffd071d0fe98 x2 : 0000000000000000
x1 : 0000000000000004 x0 : 0000000000000001
Kernel panic - not syncing: Asynchronous SError Interrupt
Fixes: 4525412a5046 ("coresight: tmc: making prepare/unprepare functions generic")
Reported-by: Mike Leach <mike.leach(a)linaro.org>
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan(a)codeaurora.org>
---
drivers/hwtracing/coresight/coresight-tmc-etf.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
index 36cce2bfb744..6375504ba8b0 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
@@ -639,15 +639,14 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
spin_lock_irqsave(&drvdata->spinlock, flags);
- /* There is no point in reading a TMC in HW FIFO mode */
- mode = readl_relaxed(drvdata->base + TMC_MODE);
- if (mode != TMC_MODE_CIRCULAR_BUFFER) {
- spin_unlock_irqrestore(&drvdata->spinlock, flags);
- return -EINVAL;
- }
-
/* Re-enable the TMC if need be */
if (drvdata->mode == CS_MODE_SYSFS) {
+ /* There is no point in reading a TMC in HW FIFO mode */
+ mode = readl_relaxed(drvdata->base + TMC_MODE);
+ if (mode != TMC_MODE_CIRCULAR_BUFFER) {
+ spin_unlock_irqrestore(&drvdata->spinlock, flags);
+ return -EINVAL;
+ }
/*
* The trace run will continue with the same allocated trace
* buffer. As such zero-out the buffer so that we don't end
base-commit: 3d439a6c349778f129de19595db564a8366c3634
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
Hi all,
I am currently facing a problem about manually flushing traces.
The traced user application runs on a Linux distribution with an FPGA Board based on a Zynq-7000 SoC.
I am setting up coresight components for tracing only the user application PID and his address space, and I exclude tracing kernel.
All traces are exported to a monitor present in the FPGA. The flow of the traces:
————————————— ——————— —————————
| | | | | |
| ARM Cortex A9 (Core 0) | ==> | TPIU | ==> | FPGA Monitor |
| / PTM | | | | |
————————————— ——————— —————————
When there is a syscall on the user application, I have the traces below:
…
16274 (a waypoint update packet)
ffff0008 (the exception branch address)
16278
..
The relative addresses/assembly instructions extracted from the ELF file are :
16270: e89c0078 ldm ip, {r3, r4, r5, r6}
16274: ef000000 svc 0x00000000
16278: e8bd00f0 pop {r4, r5, r6, r7}
During the execution of the syscall (on the Kernel side), the kernel needs to receive a response from the FPGA Monitor and wait actively for it.
This response depends on calculations relative to all PTM traces before the syscall (SVC instruction at 16274).
That’s why I need to flush all traces during the syscall, I tried to flush traces by setting the FOnMan_W of the Formatter and Flush Control Register (FFCR) into coresight-tpiu.c but that’s not working.
Do you have an idea of how correctly flushing all traces to the FPGA Monitor on the kernel?
Best regards,
Mounir
Set consists of minor fixes discovered during other development work.
Fixes are stand-alone and not directly part of new work.
Mike Leach (3):
coresight: Fix comment in main header file.
coresight: etmv4: Counter values not saved on disable.
coresight: etmv4: Fix resource selector constant.
drivers/hwtracing/coresight/coresight-etm4x.c | 6 ++++++
drivers/hwtracing/coresight/coresight-etm4x.h | 4 ++--
include/linux/coresight.h | 3 ++-
3 files changed, 10 insertions(+), 3 deletions(-)
--
2.17.1
Adjust the handling of the session sink selection to allow no sink to
be selected on the command line. This then forwards the sink selection to
the CoreSight infrastructure which will attempt to select a sink based
on the default sink select priorities.
Signed-off-by: Mike Leach <mike.leach(a)linaro.org>
Tested-by: Leo Yan <leo.yan(a)linaro.org>
---
tools/perf/arch/arm/util/cs-etm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c
index cea5e33d61d2..cad7bf783413 100644
--- a/tools/perf/arch/arm/util/cs-etm.c
+++ b/tools/perf/arch/arm/util/cs-etm.c
@@ -243,10 +243,10 @@ static int cs_etm_set_sink_attr(struct perf_pmu *pmu,
}
/*
- * No sink was provided on the command line - for _now_ treat
- * this as an error.
+ * No sink was provided on the command line - allow the CoreSight
+ * system to look for a default
*/
- return ret;
+ return 0;
}
static int cs_etm_recording_options(struct auxtrace_record *itr,
--
2.17.1
Fixes reported issues #24 and #25 from github.
Removes globals from instruction decode lib to improve usability in
multi threaded environment.
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK