CoreSight

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Re: [PATCH 5/5] coresight: add default connections group in sysfs to components.

by Mathieu Poirier

On Thu, Oct 03, 2019 at 02:07:52PM -0600, Mathieu Poirier wrote: > From: Mike Leach <mike.leach(a)linaro.org> > > Add the default connections group in sysfs to etm4x, etm3x, stm, tmc, > funnel and replicator components. > > This group will be used to collate the sysfs links representing the trace > data path to and from the devices. When booting this set on my Juno R0, probing each CTI result in a bracktrace like the following: [ 5.708275] sysfs: cannot create duplicate filename '/devices/platform/22020000.cti/cti_cpu1/connections' [ 5.717760] CPU: 2 PID: 42 Comm: kworker/2:1 Not tainted 5.3.0-04961-gb632d2fadfdd #279 [ 5.725679] Hardware name: ARM Juno development board (r0) (DT) [ 5.731543] Workqueue: events amba_deferred_retry_func [ 5.736625] Call trace: [ 5.739044] dump_backtrace+0x0/0x150 [ 5.742664] show_stack+0x14/0x20 [ 5.745942] dump_stack+0xb0/0xf4 [ 5.749218] sysfs_warn_dup+0x5c/0x78 [ 5.752839] internal_create_group+0x394/0x3d8 [ 5.757232] sysfs_create_group+0x14/0x20 [ 5.761199] coresight_create_conns_sysfs_group+0x24/0x50 [ 5.766538] coresight_register+0x2d4/0x378 [ 5.770674] cti_probe+0x158/0x380 [ 5.774035] amba_probe+0xb0/0x158 [ 5.777399] really_probe+0xdc/0x358 [ 5.780933] driver_probe_device+0x58/0x100 [ 5.785069] __device_attach_driver+0x90/0xb0 [ 5.789377] bus_for_each_drv+0x64/0xc8 [ 5.793169] __device_attach+0xd8/0x138 [ 5.796960] device_initial_probe+0x10/0x18 [ 5.801096] bus_probe_device+0x90/0x98 [ 5.804887] device_add+0x3c4/0x620 [ 5.808335] amba_device_try_add+0x1c0/0x378 [ 5.812556] amba_deferred_retry_func+0x48/0xd0 [ 5.817036] process_one_work+0x1e0/0x350 [ 5.820999] worker_thread+0x40/0x480 [ 5.824619] kthread+0x124/0x128 [ 5.827809] ret_from_fork+0x10/0x18 I am done reviewing both your sets. Thanks and best, Mathieu > > Signed-off-by: Mike Leach <mike.leach(a)linaro.org> > --- > drivers/hwtracing/coresight/coresight-etm3x.c | 1 + > drivers/hwtracing/coresight/coresight-etm4x.c | 1 + > drivers/hwtracing/coresight/coresight-funnel.c | 1 + > drivers/hwtracing/coresight/coresight-replicator.c | 1 + > drivers/hwtracing/coresight/coresight-stm.c | 1 + > drivers/hwtracing/coresight/coresight-tmc.c | 1 + > 6 files changed, 6 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c > index e2cb6873c3f2..aa017ed1e2fe 100644 > --- a/drivers/hwtracing/coresight/coresight-etm3x.c > +++ b/drivers/hwtracing/coresight/coresight-etm3x.c > @@ -864,6 +864,7 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) > desc.pdata = pdata; > desc.dev = dev; > desc.groups = coresight_etm_groups; > + desc.add_conns_group = true; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > ret = PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c > index a128b5063f46..7d94096191c3 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x.c > @@ -1160,6 +1160,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) > desc.pdata = pdata; > desc.dev = dev; > desc.groups = coresight_etmv4_groups; > + desc.add_conns_group = true; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > ret = PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c > index 05f7896c3a01..9cdbfb75a246 100644 > --- a/drivers/hwtracing/coresight/coresight-funnel.c > +++ b/drivers/hwtracing/coresight/coresight-funnel.c > @@ -238,6 +238,7 @@ static int funnel_probe(struct device *dev, struct resource *res) > desc.ops = &funnel_cs_ops; > desc.pdata = pdata; > desc.dev = dev; > + desc.add_conns_group = true; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > ret = PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/hwtracing/coresight/coresight-replicator.c > index b29ba640eb25..eac2690c0fda 100644 > --- a/drivers/hwtracing/coresight/coresight-replicator.c > +++ b/drivers/hwtracing/coresight/coresight-replicator.c > @@ -230,6 +230,7 @@ static int replicator_probe(struct device *dev, struct resource *res) > desc.ops = &replicator_cs_ops; > desc.pdata = dev->platform_data; > desc.dev = dev; > + desc.add_conns_group = true; > > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c > index b908ca104645..5a7c7b43d48c 100644 > --- a/drivers/hwtracing/coresight/coresight-stm.c > +++ b/drivers/hwtracing/coresight/coresight-stm.c > @@ -933,6 +933,7 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id) > desc.pdata = pdata; > desc.dev = dev; > desc.groups = coresight_stm_groups; > + desc.add_conns_group = true; > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > ret = PTR_ERR(drvdata->csdev); > diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c > index 1cf82fa58289..b656c1b58735 100644 > --- a/drivers/hwtracing/coresight/coresight-tmc.c > +++ b/drivers/hwtracing/coresight/coresight-tmc.c > @@ -519,6 +519,7 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) > } > adev->dev.platform_data = pdata; > desc.pdata = pdata; > + desc.add_conns_group = true; > > drvdata->csdev = coresight_register(&desc); > if (IS_ERR(drvdata->csdev)) { > -- > 2.17.1 >

5 years, 7 months

[RFC PATCH v4 00/15] CoreSight CTI driver

by Mike Leach

CTIs are defined in the device tree and associated with other CoreSight devices. The core CoreSight code has been modified to enable the registration of the CTI devices on the same bus as the other CoreSight components, but as these are not actually trace generation / capture devices, they are not part of the Coresight path when generating trace. However, the definition of the standard CoreSight device has been extended to include a reference to an associated CTI device, and the enable / disable trace path operations will auto enable/disable any associated CTI devices at the same time. Programming is at present via sysfs - a full API is provided to utilise the hardware capabilities. As CTI devices are unprogrammed by default, the auto enable describe above will have no effect until explicit programming takes place. A set of device tree bindings specific to the CTI topology has been defined. The driver accesses these in a platform agnostic manner, so ACPI bindings can be added later, once they have been agreed and defined for the CTI device. Documentation has been updated to describe both the CTI hardware, its use and programming in sysfs, and the new dts bindings required. Tested on DB410 board, applies on coresight/next tree - 5.3-rc1 based. Changes since v3: * After discussion on CS mailing list, each CTI connection has a triggers<N> sysfs directory with name and trigger signals listed for the connection. * Initial code for creating sysfs links between CoreSight components is introduced and implementation for CTI provided. This allows exploration of the CoreSight topology within the sysfs infrastructure. Patches for links between other CoreSight components to follow. * Power management - CPU hotplug and idle omitted from this set as ongoing developments may define required direction. Additional patch set to follow. * Multiple fixes applied as requested by reviewers esp. Matthieu, Suzuki and Leo. Changes since v2: Updates to allow for new features on coresight/next and feedback from Mathieu and Leo. 1) Rebase and restructuring to apply on top of ACPI support patch set, currently on coresight/next. of_coresight_cti has been renamed to coresight-cti-platform and device tree bindings added to this but accessed in a platform agnostic manner using fwnode for later ACPI support to be added. 2) Split the sysfs patch info a series of functional patches. 3) Revised the refcount and enabling support. 4) Adopted the generic naming protocol - CTIs are either cti_cpuN or cti_sysM 5) Various minor presentation /checkpatch issues highlighted in feedback. 6) revised CPU hotplug to cover missing cases needed by ETM. Changes since v1: 1) Significant restructuring of the source code. Adds cti-sysfs file and cti device tree file. Patches add per feature rather than per source file. 2) CPU type power event handling for hotplug moved to CoreSight core, with generic registration interface provided for all CPU bound CS devices to use. 3) CTI signal interconnection details in sysfs now generated dynamically from connection lists in driver. This to fix issue with multi-line sysfs output in previous version. 4) Full device tree bindings for DB410 and Juno provided (to the extent that CTI information is available). 5) AMBA driver update for UCI IDs are now upstream so no longer included in this set. Mike Leach (15): coresight: cti: Initial CoreSight CTI Driver coresight: cti: Add sysfs coresight mgmt reg access. coresight: cti: Add sysfs access to program function regs coresight: cti: Add sysfs trigger / channel programming API dt-bindings: arm: Adds CoreSight CTI hardware definitions. coresight: cti: Add device tree support for v8 arch CTI coresight: cti: Add device tree support for custom CTI. coresight: cti: Enable CTI associated with devices. coresight: cti: Add connection information to sysfs coresight: Add generic sysfs link creation functions. coresight: cti: Add in sysfs links to other coresight devices. dt-bindings: qcom: Add CTI options for qcom msm8916 dt-bindings: arm: Juno platform - add CTI entries to device tree. docs: coresight: Update documentation for CoreSight to cover CTI. docs: sysfs: coresight: Add sysfs documentation for CTI .../testing/sysfs-bus-coresight-devices-cti | 231 ++++ .../bindings/arm/coresight-ect-cti.txt | 396 ++++++ .../devicetree/bindings/arm/coresight.txt | 7 + Documentation/trace/coresight-ect.txt | 164 +++ Documentation/trace/coresight.txt | 7 + MAINTAINERS | 3 + arch/arm64/boot/dts/arm/juno-base.dtsi | 149 +- arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 31 +- arch/arm64/boot/dts/arm/juno-r1.dts | 25 + arch/arm64/boot/dts/arm/juno-r2.dts | 25 + arch/arm64/boot/dts/arm/juno.dts | 25 + arch/arm64/boot/dts/qcom/msm8916.dtsi | 85 +- drivers/hwtracing/coresight/Kconfig | 12 + drivers/hwtracing/coresight/Makefile | 4 + .../coresight/coresight-cti-platform.c | 431 ++++++ .../hwtracing/coresight/coresight-cti-sysfs.c | 1199 +++++++++++++++++ drivers/hwtracing/coresight/coresight-cti.c | 763 +++++++++++ drivers/hwtracing/coresight/coresight-cti.h | 238 ++++ .../hwtracing/coresight/coresight-platform.c | 23 + drivers/hwtracing/coresight/coresight-priv.h | 10 + drivers/hwtracing/coresight/coresight.c | 133 +- include/dt-bindings/arm/coresight-cti-dt.h | 36 + include/linux/coresight.h | 46 + 23 files changed, 4029 insertions(+), 14 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-cti create mode 100644 Documentation/devicetree/bindings/arm/coresight-ect-cti.txt create mode 100644 Documentation/trace/coresight-ect.txt create mode 100644 drivers/hwtracing/coresight/coresight-cti-platform.c create mode 100644 drivers/hwtracing/coresight/coresight-cti-sysfs.c create mode 100644 drivers/hwtracing/coresight/coresight-cti.c create mode 100644 drivers/hwtracing/coresight/coresight-cti.h create mode 100644 include/dt-bindings/arm/coresight-cti-dt.h -- 2.17.1

5 years, 7 months

[PATCH] perf cs-etm: Fix definition of macro TO_CS_QUEUE_NR

by Leo Yan

Macro TO_CS_QUEUE_NR definition has a typo, which uses 'trace_id_chan' as its parameter, this doesn't match with its definition body which uses 'trace_chan_id'. So renames the parameter to 'trace_chan_id'. It's luck to have a local variable 'trace_chan_id' in the function cs_etm__setup_queue(), even we wrongly define the macro TO_CS_QUEUE_NR, the local variable 'trace_chan_id' is used rather than the macro's parameter 'trace_id_chan'; so the compiler doesn't complain for this before. After renaming the parameter, it leads to a compiling error due cs_etm__setup_queue() has no variable 'trace_id_chan'. This patch uses the variable 'trace_chan_id' for the macro so that fixes the compiling error. Signed-off-by: Leo Yan <leo.yan(a)linaro.org> --- tools/perf/util/cs-etm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 4ba0f871f086..f5f855fff412 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -110,7 +110,7 @@ static int cs_etm__decode_data_block(struct cs_etm_queue *etmq); * encode the etm queue number as the upper 16 bit and the channel as * the lower 16 bit. */ -#define TO_CS_QUEUE_NR(queue_nr, trace_id_chan) \ +#define TO_CS_QUEUE_NR(queue_nr, trace_chan_id) \ (queue_nr << 16 | trace_chan_id) #define TO_QUEUE_NR(cs_queue_nr) (cs_queue_nr >> 16) #define TO_TRACE_CHAN_ID(cs_queue_nr) (cs_queue_nr & 0x0000ffff) @@ -819,7 +819,7 @@ static int cs_etm__setup_queue(struct cs_etm_auxtrace *etm, * Note that packets decoded above are still in the traceID's packet * queue and will be processed in cs_etm__process_queues(). */ - cs_queue_nr = TO_CS_QUEUE_NR(queue_nr, trace_id_chan); + cs_queue_nr = TO_CS_QUEUE_NR(queue_nr, trace_chan_id); ret = auxtrace_heap__add(&etm->heap, cs_queue_nr, timestamp); out: return ret; -- 2.17.1

5 years, 7 months

[PATCH 08/63] perf cs-etm: Fix definition of macro TO_CS_QUEUE_NR

by Arnaldo Carvalho de Melo

From: Leo Yan <leo.yan(a)linaro.org> Macro TO_CS_QUEUE_NR definition has a typo, which uses 'trace_id_chan' as its parameter, this doesn't match with its definition body which uses 'trace_chan_id'. So renames the parameter to 'trace_chan_id'. It's luck to have a local variable 'trace_chan_id' in the function cs_etm__setup_queue(), even we wrongly define the macro TO_CS_QUEUE_NR, the local variable 'trace_chan_id' is used rather than the macro's parameter 'trace_id_chan'; so the compiler doesn't complain for this before. After renaming the parameter, it leads to a compiling error due cs_etm__setup_queue() has no variable 'trace_id_chan'. This patch uses the variable 'trace_chan_id' for the macro so that fixes the compiling error. Signed-off-by: Leo Yan <leo.yan(a)linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Alexander Shishkin <alexander.shishkin(a)linux.intel.com> Cc: Jiri Olsa <jolsa(a)redhat.com> Cc: Mark Rutland <mark.rutland(a)arm.com> Cc: Namhyung Kim <namhyung(a)kernel.org> Cc: Peter Zijlstra <peterz(a)infradead.org> Cc: Suzuki Poulouse <suzuki.poulose(a)arm.com> Cc: coresight ml <coresight(a)lists.linaro.org> Cc: linux-arm-kernel(a)lists.infradead.org Link: http://lore.kernel.org/lkml/20191021074808.25795-1-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme(a)redhat.com> --- tools/perf/util/cs-etm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 4ba0f871f086..f5f855fff412 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -110,7 +110,7 @@ static int cs_etm__decode_data_block(struct cs_etm_queue *etmq); * encode the etm queue number as the upper 16 bit and the channel as * the lower 16 bit. */ -#define TO_CS_QUEUE_NR(queue_nr, trace_id_chan) \ +#define TO_CS_QUEUE_NR(queue_nr, trace_chan_id) \ (queue_nr << 16 | trace_chan_id) #define TO_QUEUE_NR(cs_queue_nr) (cs_queue_nr >> 16) #define TO_TRACE_CHAN_ID(cs_queue_nr) (cs_queue_nr & 0x0000ffff) @@ -819,7 +819,7 @@ static int cs_etm__setup_queue(struct cs_etm_auxtrace *etm, * Note that packets decoded above are still in the traceID's packet * queue and will be processed in cs_etm__process_queues(). */ - cs_queue_nr = TO_CS_QUEUE_NR(queue_nr, trace_id_chan); + cs_queue_nr = TO_CS_QUEUE_NR(queue_nr, trace_chan_id); ret = auxtrace_heap__add(&etm->heap, cs_queue_nr, timestamp); out: return ret; -- 2.21.0

5 years, 7 months

perf: user-space trace decoding

by Bharat Bhushan

Hi All, Linux h/w trace decoding is working as expected but user-space trace decoding not showing sybmols (dump raw trace shows h/w trace info) of user-space application/libraries. Here is how I am using: 1) Kernel trace => perf record -C 1 -e cs_etm/@tmc_etr1/k taskset 0x2 uname => tar czf cs_example.tgz perf.data .debug Transfer cs_example.tgz on x86 machine, untar, copy .debug in ~/ (home) => perf report --vmlinux=./vmlinux # Samples: 937 of event 'branches:k' # Event count (approx.): 937 # # Children Self Command Shared Object Symbol # ........ ........ ....... ................. .............................................. # 15.58% 15.58% swapper [kernel.kallsyms] [k] __delay 8.54% 8.54% swapper [kernel.kallsyms] [k] arch_counter_get_cntpct 3.31% 3.31% swapper [kernel.kallsyms] [k] event_sched_in.isra.37 2.67% 2.67% swapper [kernel.kallsyms] [k] group_sched_in 2.56% 2.56% swapper [kernel.kallsyms] [k] do_idle 2.35% 2.35% swapper [kernel.kallsyms] [k] perf_event_update_userpage 2.24% 2.24% swapper [kernel.kallsyms] [k] clocks_calc_mult_shift 2) User-space trace => perf record -C 1 -e cs_etm/@tmc_etr1/u taskset 0x2 uname => tar czf cs_example.tgz perf.data .debug Transfer cs_example.tgz on x86 machine, untar, copy .debug in ~/ (home) => perf report Error: The perf.data data has no samples! # To display the perf.data header info, please use --header/--header-only options. # But if dump raw trace then I can see ISYNC/ATOM packets => perf report --dump . ... CoreSight ETM Trace data: size 25960 bytes Idx:24; ID:12; I_ASYNC : Alignment Synchronisation. Idx:36; ID:12; I_TRACE_INFO : Trace Info.; INFO=0x0 Idx:39; ID:12; I_TRACE_ON : Trace On. Idx:40; ID:12; I_CTXT : Context Packet.; Ctxt: AArch64,EL2, NS; CID=0x00000000; Idx:46; ID:12; I_TRACE_ON : Trace On. Idx:47; ID:12; I_CTXT : Context Packet.; Ctxt: AArch64,EL0, NS; CID=0x00000000; Idx:53; ID:12; I_ADDR_L_64IS0 : Address, Long, 64 bit, IS0.; Addr=0x0000FFFF801CCF7C; Idx:62; ID:12; I_ATOM_F1 : Atom format 1.; N Idx:63; ID:12; I_TIMESTAMP : Timestamp.; Updated val = 0xede4824ce5 . . . Any idea what I am missing. Thanks -Bharat

5 years, 7 months

Potential Business Contacts

by Nell Folsom

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5 years, 7 months

Re: Coresight: ocsdError error

by Mike Leach

Hi, >From the little information in this mail, this looks like an issue with how the version of perf you have is interacting with the OpenCSD library. An ocsdError will usually be generated if the library detects input errors in configuration or data being passed to it. ocsdErrors in general should provide a code + string - though output could be being suppressed by perf. I would follow Leo's suggestion to see if you can spot the library call from the backtrace that causes the issue. Regards Mike On Mon, 21 Oct 2019 at 06:39, Leo Yan <leo.yan(a)linaro.org> wrote: > > Hi Bharat, > > [ + Mike ] > > On Mon, Oct 21, 2019 at 05:28:54AM +0000, Bharat Bhushan wrote: > > Hi Leo, Mathieu, > > > > I found your email-id from linux git-log, Please ignore if you are not right person. > > > > I am using perf for hwtracing (coresight). > > > > > > $perf record -C 0 -e cs_etm/@tmc_etr0/u ./test > > Couldn't synthesize bpf events. > > [ perf record: Woken up 1 times to write data ] > > [ perf record: Captured and wrote 0.124 MB perf.data ] > > > > $ perf report > > terminate called after throwing an instance of 'ocsdError' > > terminate called recursively > > Aborted (core dumped) > > > > > > $ perf report -v > > build id event received for [kernel.kallsyms]: 473d5d96eceb209a58f19ec8f3e4f74891d49c9f > > build id event received for /usr/lib/systemd/systemd: 16460ffcbc368221e1e71c587c059a44497eb3de > > build id event received for /usr/lib/aarch64-linux-gnu/libudev.so.1.6.12: bf0152a1c65039afe462800eb834190830a5c8d2 > > . > > <snip> > > . > > build id event received for /usr/lib/aarch64-linux-gnu/libdw-0.176.so: ad9dc3a40b2f39629fcc70ad2bb931d75f89b748 > > build id event received for /usr/lib/aarch64-linux-gnu/libelf-0.176.so: 0b36ddcd158758dcb8356713eff8fe12c1326d21 > > build id event received for /usr/lib/libopencsd_c_api.so.0.12.0: 84a1cf9a8b6efb9670b902d87118f05c81856b53 > > Aborted (core dumped) > > terminate called after throwing an instance of 'ocsdError' > > terminate called recursively > > root@ubuntu:~# > > > > > > Also I added prints in "perf" source code before calling and opencsd library function (please find attached file) and no prints observed. > > I am not sure why we are getting "ocsdError". > > > > Can you please point what's wrong I am doing. > > I think the error is reported internally in OpenCSD rather than the > failure in perf tool. > > And you could see there have core dump file, suggest you could to > use the core dump file with gdb to dump the backtrace. Then this can > help us to find the flow for the failure. > > I loop Mike since this issue is more likely related with decoder. > > Thanks, > Leo Yan -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK

5 years, 7 months

[PATCH v2 0/4] perf cs-etm: Fix synthesizing instruction samples

by Leo Yan

This patch series is to address the issue for synthesizing instruction samples, especially when the instruction sample period is small enough, the current logic cannot synthesize multiple instruction samples within one instruction range packet. To fix this issue, patch 0001 avoids to reset the last branches for every instruction sample; if reset the last branches when every time generate instruction sample, then the later samples in the same range packet cannot use the last branches anymore. Patch 0002 is the main patch to fix the logic for synthesizing instruction samples; it allows to handle different instruction periods. Patch 0003 is an optimization for copying last branches; it only copies last branches once if the instruction samples share the same last branches. Patch 0004 is a minor fix for unsigned variable comparison to zero. To verify my changing for synthesizing instruction samples, I added some logs in the code, and reviewed the output log manually for instuctions samples. The below commands are tested on DB410c board: # perf script --itrace=i2 # perf script --itrace=i2il16 # perf inject --itrace=i2il16 -i perf.data -o perf.data.new # perf inject --itrace=i100il16 -i perf.data -o perf.data.new Changes from v1: * Rebased patch set on perf/core branch with latest commit 9fec3cd5fa4a ("perf map: Check if the map still has some refcounts on exit"). Leo Yan (4): perf cs-etm: Continuously record last branches perf cs-etm: Correct synthesizing instruction samples perf cs-etm: Optimize copying last branches perf cs-etm: Fix unsigned variable comparison to zero tools/perf/util/cs-etm.c | 137 ++++++++++++++++++++++++++++++++------- 1 file changed, 115 insertions(+), 22 deletions(-) -- 2.17.1

5 years, 8 months

[PATCH v1 0/4] perf cs-etm: Fix synthesizing instruction samples

by Leo Yan

This patch series is to address the issue for synthesizing instruction samples, especially when the instruction sample period is small enough, the current logic cannot synthesize multiple instruction samples within one instruction range packet. To fix this issue, patch 0001 avoids to reset the last branches for every instruction sample; if reset the last branches when every time generate instruction sample, then the later samples in the same range packet cannot use the last branches anymore. Patch 0002 is the main patch to fix the logic for synthesizing instruction samples; it allows to handle different instruction periods. Patch 0003 is an optimization for copying last branches; it only copies last branches once if the instruction samples share the same last branches. Patch 0004 is a minor fix for unsigned variable comparison to zero. To verify my changing for synthesizing instruction samples, I added some logs in the code, and reviewed the output log manually for instuctions samples. The below commands are tested on DB410c board: # perf script --itrace=i2 # perf script --itrace=i2li16 # perf inject --itrace=i2il16 -i perf.data -o perf.data.new # perf inject --itrace=i100il16 -i perf.data -o perf.data.new Leo Yan (4): perf cs-etm: Continuously record last branches perf cs-etm: Correct synthesizing instruction samples perf cs-etm: Optimize copying last branches perf cs-etm: Fix unsigned variable comparison to zero tools/perf/util/cs-etm.c | 137 ++++++++++++++++++++++++++++++++------- 1 file changed, 115 insertions(+), 22 deletions(-) -- 2.17.1

5 years, 8 months

[PATCH v2 00/11] coresight: etm4x: Fixes and updates for sysfs API

by Mike Leach

Review of ETMV4 sysfs code resulted in a number of minor issues being discovered. Patch set fixes these issues:- 1) Update for ETM v4.4 archtecture. 2) Add missing single shot comparator API. 3) Misc fixes and improvements to sysfs API 4) Updated programmers documentation and reference. Changes since v1 (from reviews by Mathieu and Leo):- Usability patch split into 2 separate functional patches. Docs patch split into 3 patches. Misc style and comment typo fixes. Mike Leach (11): coresight: etm4x: Fixes for ETM v4.4 architecture updates. coresight: etm4x: Fix input validation for sysfs. coresight: etm4x: Add missing API to set EL match on address filters coresight: etm4x: Fix issues with start-stop logic. coresight: etm4x: Improve usability of sysfs - include/exclude addr. coresight: etm4x: Improve usability of sysfs - CID and VMID masks. coresight: etm4x: Add view comparator settings API to sysfs. coresight: etm4x: Add missing single-shot control API to sysfs coresight: etm4x: docs: Update ABI doc for sysfs features added. coresight: docs: Create common sub-directory for coresight trace. coresight: etm4x: docs: Adds detailed document for programming etm4x. .../testing/sysfs-bus-coresight-devices-etm4x | 183 ++++--- .../{ => coresight}/coresight-cpu-debug.txt | 0 .../coresight/coresight-etm4x-reference.txt | 458 ++++++++++++++++++ .../trace/{ => coresight}/coresight.txt | 0 MAINTAINERS | 3 +- .../coresight/coresight-etm4x-sysfs.c | 312 +++++++++++- drivers/hwtracing/coresight/coresight-etm4x.c | 32 +- drivers/hwtracing/coresight/coresight-etm4x.h | 18 +- 8 files changed, 905 insertions(+), 101 deletions(-) rename Documentation/trace/{ => coresight}/coresight-cpu-debug.txt (100%) create mode 100644 Documentation/trace/coresight/coresight-etm4x-reference.txt rename Documentation/trace/{ => coresight}/coresight.txt (100%) -- 2.17.1

5 years, 8 months

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