linaro-toolchain

linaro-toolchain@lists.linaro.org

5654 discussions

by William Mills

Hello, We have been using Linaro GCC 5.x[1] and valgrind. When the optimizer is turned on valgrind complains about writes beyond the current stack pointer. With the optimizer off, the problem report goes away. I have my own conclusion about what is going on but I won't bias you with it. Here are the facts: All files and logs attached as 10K tar.gz if it survives this maillist. test.c: #include <stdio.h> int main(int argc,char** argv) { int i; for (i = 1; i < argc; i++) { printf("argument is %s\n", argv[i]); } return 0; } $ arm-linux-gnueabihf-gcc -march=armv7ve -marm -mfpu=neon \ -mfloat-abi=hard -mcpu=cortex-a15 -O2 -g \ -o test-fail test.c $ valgrind --leak-resolution=high --track-origins=yes \ --trace-children=yes --leak-check=full --error-limit=no \ ./test-fail arg1 arg2 arg3 ==20011== Memcheck, a memory error detector ==20011== Copyright (C) 2002-2015, and GNU GPL'd, by Julian Seward et al. ==20011== Using Valgrind-3.11.0 and LibVEX; rerun with -h for copyright info ==20011== Command: ./test-fail arg1 arg2 arg3 ==20011== ==20011== Invalid write of size 4 ==20011== at 0x10300: main (test.c:4) ==20011== Address 0xbdbfcb58 is on thread 1's stack ==20011== 24 bytes below stack pointer ==20011== 000102f8 <main>: 102f8: e3500001 cmp r0, #1 102fc: da000014 ble 10354 <main+0x5c> 10300: e16d41f8 strd r4, [sp, #-24]! ; 0xffffffe8 ^^^^^^^^ Complaint is here 10304: e1a05001 mov r5, r1 10308: e3a04001 mov r4, #1 1030c: e1cd60f8 strd r6, [sp, #8] 10310: e300748c movw r7, #1164 ; 0x48c 10314: e1a06000 mov r6, r0 10318: e3407001 movt r7, #1 1031c: e58d8010 str r8, [sp, #16] 10320: e58de014 str lr, [sp, #20] 10324: e2844001 add r4, r4, #1 10328: e5b51004 ldr r1, [r5, #4]! 1032c: e1a00007 mov r0, r7 10330: ebffffe4 bl 102c8 <printf@plt> 10334: e1560004 cmp r6, r4 10338: 1afffff9 bne 10324 <main+0x2c> 1033c: e1cd40d0 ldrd r4, [sp] 10340: e3a00000 mov r0, #0 10344: e1cd60d8 ldrd r6, [sp, #8] 10348: e59d8010 ldr r8, [sp, #16] 1034c: e28dd014 add sp, sp, #20 10350: e49df004 pop {pc} ; (ldr pc, [sp], #4) 10354: e3a00000 mov r0, #0 10358: e12fff1e bx lr Without the optimizer, the code looks different and valgrind does not issue any errors. 000103d8 <main>: 103d8: e52db008 str fp, [sp, #-8]! ^^^^^^^ Valgrind does not complain about this 103dc: e58de004 str lr, [sp, #4] 103e0: e28db004 add fp, sp, #4 103e4: e24dd010 sub sp, sp, #16 103e8: e50b0010 str r0, [fp, #-16] 103ec: e50b1014 str r1, [fp, #-20] ; 0xffffffec 103f0: e3a03001 mov r3, #1 103f4: e50b3008 str r3, [fp, #-8] 103f8: ea00000b b 1042c <main+0x54> 103fc: e51b3008 ldr r3, [fp, #-8] 10400: e1a03103 lsl r3, r3, #2 10404: e51b2014 ldr r2, [fp, #-20] ; 0xffffffec 10408: e0823003 add r3, r2, r3 1040c: e5933000 ldr r3, [r3] 10410: e1a01003 mov r1, r3 10414: e30004a4 movw r0, #1188 ; 0x4a4 10418: e3400001 movt r0, #1 1041c: ebffffa9 bl 102c8 <printf@plt> 10420: e51b3008 ldr r3, [fp, #-8] 10424: e2833001 add r3, r3, #1 10428: e50b3008 str r3, [fp, #-8] 1042c: e51b2008 ldr r2, [fp, #-8] 10430: e51b3010 ldr r3, [fp, #-16] 10434: e1520003 cmp r2, r3 10438: baffffef blt 103fc <main+0x24> 1043c: e3a03000 mov r3, #0 10440: e1a00003 mov r0, r3 10444: e24bd004 sub sp, fp, #4 10448: e59db000 ldr fp, [sp] 1044c: e28dd004 add sp, sp, #4 10450: e49df004 pop {pc} ; (ldr pc, [sp], #4) [1] 5.3-2016.02 for Yocto-project and cross-compile 5.2 on the ARM target "since Linaro hasn’t yet fixed building 5.3 from recipes yet." Both versions give the same results for this test program. ---------------- William A. Mills Chief Technologist, Open Solutions, SDO Texas Instruments, Inc. 20450 Century Blvd Germantown MD 20878 240-643-0836

9 years, 4 months

[ACTIVITY] 6-10 June 2016

by Diana Picus

== Progress == * Remove exit-on-error flag from CodeGen tests [TCWG-604] [4/10] - This is a follow-up of TCWG-592: when changing the diag handler, some of the tests started to fail, so we had to add an exit-on-error flag to preserve the old behaviour until we can fix the tests. - Patch fixing the MIR tests (PR27770) - committed upstream - Submitted a patch fixing one of the AMDGPU tests (PR27761) - in upstream review - Submitted a patch fixing the ARM test (PR27765) - in upstream review * Use git worktree in llvm helper scripts [TCWG-587] [1/10] - Minor fixes during the review, hopefully we can wrap it up soon * ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623] [3/10] - Investigated uses of isCortexA*, isSwift etc in the ARM backend - Started extracting subtarget features for the easy ones * LLVM ARM 3.8.1 [TCWG-642] [1/10] - Ran the ARM tests for the LLVM 3.8.1 release * Investigate clang-cmake-thumbv7-a15-full-sh failure [TCWG-635] [1/10] - Found patch that was causing problems, started discussion about it on the mailing list == Plan == * Remove exit-on-error flag from CodeGen tests [TCWG-604] - Address any code review comments - After committing the 2 remaining patches, we should be able to remove the flag and wrap this up * ARM: Do not test for CPUs, use SubtargetFeatures [TCWG-623] - Extract more subtarget features * OOO on Monday

9 years, 4 months

[ACTIVITY] 30 May - 3 June 2016

by Prathamesh Kulkarni

== This Week == * LTO (6/10) a) increase_alignment (2/10) - posted patch upstream to convert it to regular pass b) TCWG-548 (3/10) - Lava job #3424 failed with timeout (same as #3370) - Experimenting with partition sizes with and without the patch for different benchmarks, results consistently show a significant difference in last partition size. - Trying a new approach. c) TCWG-535 (1/10) - posted partial patch upstream: https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00143.html * TCWG-72 (2/10) - Further patch iterations - Approved by Richard * Misc (2/10) - Looked at function versioning. - Wrote patch to address missing diagnostic in C/C++ FE, fails on bootstrap. - Meetings == Next Week == - TCWG-548: Implement new approach and experiment with it. - ipa-vrp: Apply Kugan's prototype patch, and test it, sync on early vrp. - TCWG-72, TCWG-319, TCWG-535, increase_alignment: ping for reviews. - Travel to Mumbai on Monday for Schengen Visa appointment

9 years, 4 months

[ACTIVITY] Week 22

by Yvan Roux

== Progress == o Upstream GCC (4/10) - Continuing ARMv8.1 libatomic investigation (some infra issues now fixed) o Misc (6/10) * Various meetings and discussions. * patch reviews * Benchmarking notification investigation * Booked Hotel and flights for tcwg sprint == Plan == o Continue libatomic o GCC 5.4 branch merge o Benchmarking notification

9 years, 4 months

[ACTIVITY] 30 May - 3 June 2016

by kugan

== Progress == Fixed Bugs and posted patches for review - PR71281 and PR71408 PR66726 - Convert expr - Found way to handle this well and posted a patch. IPA VRP - Started with a simple implementation for intra-procedural early VRP by refactoring tree-vrp. - Still need to handle range dominance - Ran into a latent issue in tree-vrp. Looking into it. == Plan == - Follow upon remaining upstream patches - IPA VRP

9 years, 4 months

Re: [lld] r271569 - Start adding tlsdesc support for aarch64.

by Renato Golin

On 3 June 2016 at 17:10, Rafael Espíndola <rafael.espindola(a)gmail.com> wrote: > Do keep in mind you are comparing a 11 year old project and a 11 month > old one. There is a lot more churn on the 11 month old one. LLD is at least 5 years old. Every time you re-write it doesn't reset history. > Again, I am truly sorry we were unable to come up with a perfect > design the first time. For the record, I don't think it is perfect > yet. There will likely be more big changes to lld. That is the cost of > trying to build as good a linker as we can. This is not about what you do. It's about *how* you do it. We have developers trying to create a linker. They are working on LLD because Chris wanted a true LLVM linker. But it seems that you want a project that you can do whatever you want, whenever you want. This is *NOT* open source. Right now, LLD is *nothing more* than Rui's and Rafael's pet project. I cannot recommend Linaro to collaborate on those terms, and I sincerely recommend anyone that is listening to this thread to not do so either. > Being open source doesn't mean I get to implement what someone else > wants. You are more than welcome to send patches, but they have avoid > harming the rest of the linker. In particular, at this early stage > they cannot harm its development. Once we have a mature project we can > actually evaluate tradeoff. We're clearly not welcome to send patches. We did, and you re-wrote it and committed without asking the original author. So, the plan is to wait for you to finish the initial implementation alone? Again? What do we do in the interim? How many times are we going to go through this? I have waited 2 years before LLD was barely useful, then Adhemerval implemented the AArch64 back-end. Then you destroyed and now we have waited another year, but we're still unable to collaborate. If anything, now it's even harder than it was last year. Why can't we help with the design, too? We know about ARM and AArch64, that's what we do, and we can provide you with the expertise without having to go on your own doing everything. That is the whole point of collaborative development, and it seems that you're missing this point. > And just like we did, you are more than welcome to try to write > something better. Please let us know how it goes. Is this the position of every LLD developer? Rui, Nick, Chris? I'm seriously looking for others to chime in and let me know if that is the final stance on LLD, so that I can finally write it off and go work on another linker. If the official position is that LLD is a project that only Rui and Rafael can design and implement for another 2~3 years, I *cannot* recommend Linaro and its members to participate. cheers, --renato

9 years, 5 months

[ACTIVITY] 1st June - 3rd June 2016

by Peter Smith

== Progress == - Holiday Monday/Tuesday - Finished writing initial support for ARM in lld. Posted upstream as RFC, no comments so far. - Implemented, but not tested the static Thumb relocations present in the arm-linux-gnueabihf-gcc -- I'd forgotten how much I hated the Thumb 2 instruction encodings. == Plan == - Add tests for Thumb relocations - Start thinking about how interworking can be implemented in lld

9 years, 5 months

[ACTIVITY] 30 May-3 June 2016

by Yao Qi

* Monday off [2/10] # Progress # * TCWG-518, arm linux range stepping. [4/10] Finished V2, and send them out for review. More bugs in existing GDBserver are found, fixed them as well. 8 patches become 12 patches. * Upgrade linux kernel on chromebook to verify Russell King's ptrace fix. http://lists.infradead.org/pipermail/linux-arm-kernel/2016-May/431972.html [3/10] This may be the cause of unstable result of GDB floating point tests, and they are tracked by GNUTOOLS-4858. 4.6.1 is running on chromebook now, but haven't try the patch yet. * TCWG-547, "align software single step in other targets with arm's implementation". Patches are pending for review. Pinged Pedro to give a review. * Misc, [1/10] ** Commit fix to PR 19998, and review the follow-up patch. ** meeting and training, # Plan # * TCWG-518, TCWG-547, TCWG-333 -- Yao

9 years, 5 months

[ACTIVITY] 30 May-3 June 2016

by Diana Picus

9 years, 5 months

[ACTIVITY] 30 May-3 June 2016

by Christophe Lyon

== Progress == * Validation - trying to improve cleanup job such that they skip offline nodes - reviews * Backports - successful backport for our gcc-6 branch * GCC - regressions reports on trunk - preparing removal of neon-testgen.ml * Misc (conf-calls, meetings, emails, ....) == Next == * Validation - prepare switch to docker for buildfarm job - cleanup * Backports * GCC - trunk monitoring - more on AdvSIMD intrinsics

9 years, 5 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

linaro-toolchain