[TCWG-614] Range extension thunks
- LLD now uses synthetic sections for Thunks.
ARM Thunks now have symbols and mapping symbols.
As a side-effect we can now create local symbols in synthetic sections
so I've added them to the ARM PLT sections.
[Misc]
- Wrote 3 lines of lld 4.0 release notes for ARM
- Some upstream patch review in rtdyld and ilp32 support in the assembler
- Presented my personal Linaro objectives to the TCWG leads.
Plans for next week:
- Complete Fosdem presentation, will be leaving early Friday to catch
the Eurostar
- Respond to any post commit review comments on Thunks
- Start work on range extension thunks, the previous commits to use
synthetic sections were pre-requisites to range extension thunks, but
added little new user-visible functionality.
Planned absences:
- Fosdem 2017 will need to leave early on Friday 4th Feb
- Holiday 21st Feb to 1st March
- Linaro Connect 6th to 10th March Euro LLVM 27-28 March (Linaro's
request and cost-code)
== Progress ==
* National holiday on Tuesday [2/10]
* [AArch64] Investigate PR30225 [TCWG-1021] [2/10]
- This was a bug related to the code alignment factor for the debug frame
- Decided it was not a correctness issue and the size savings for
using a different factor are probably not noticeable in practice, so I
closed the bug
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] [1/10]
- Committed all 3 patches upstream, reworked the third one a bit
* [ARM GlobalISel] Add support for pointers [TCWG-1028] [1/10]
- Started working on a patch
* Misc [4/10]
- Mailing list, code reviews, meetings
- Buildbots: reverted 2 sets of patches, noticed an issue with some
buildbots (which Renato ended up investigating)
- FOSDEM slides
== Plan ==
* [ARM GlobalISel] Add support for pointers [TCWG-1028]
=== This Week ===
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [4/10]
-- Capture tests leaving behind runaway processes, found 3 so far.
-- Capture random failures and mark them flakey.
ARM/AArch64 hardware breakpoints [TCWG-717] [5/10]
-- Code review and prepared debug environment
-- Looked into Android Arm64 build failure with debug info.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Fix hardware breakpoints routines in LLDB AArch64 register context.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Keep and eye on tests marked flakey or any new random failures.
o Teaching activity (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 snapshot:
- completed snapshot process
- waiting for linaro bug #1118 status before
releasing or re-spinning the snapshot.
https://bugs.linaro.org/show_bug.cgi?id=1118
* Made an published GCC 5.4 RC2, preparing the release
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 snapshot and binaries
o GCC 5.4 release
== This Week ==
* TCWG-1005 (malloc attr propagation) (4/10)
- Extended for pointer comparisons
- Patch review from Kugan
- Removed some cruft from the patch
* TCWG-1010 (bitwise dce propagation) (4/10)
- Started working on prototype
* Misc (2/10)
- Looked at Wheader-guard
- Building chromium with gcc
- Meetings
== Next Week ==
- TCWG-1005, TCWG-1010
~ Progress ~
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly. [3/10]
It is a blocker to 7.12.1 release. Fixed it in 7.12 branch.
Address comments and manage reviewer's expectations on the
patches for mainline.
* Approved two Alan's SVE GDB preparatory patches. [1/10]
* Reviewed Dave Martin's SVE user space VL control API. [1/10]
Can't figure out a case that debugger or debugger user wants to change VL.
* Review DWARF patch in big endian on DW_OP_implicit_value. [2/10]
Played with the patch, and use part of it in existing gdb tests.
Found other GDB bugs, and fixed them. Some readings on DWARF 5.
Will post my patches next week and continue reviewing the DWARF patch.
* Booked Hungary visa appointment.
* Training. [3/10]
~ Plan ~
* TCWG-984, GDB aborts if there is an error in disassembly.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
Started process of upstreaming the conversion of Thunks to SyntheticSections.
- Patch 1 of 3 committed, move Thunk Creation later in the link step.
- Patch 2 of 3 add support for local symbol creation in upstream review
- Patch 3 of 3 waiting for patch 2
Made a patch to output mapping symbols in PLT to test local symbol
creation. Not recommending this for inclusion in lld yet, but have
included as a way of testing 2.
Responded to comment on implementation and overall Thunks proposal.
Plans for next week:
Yet more range extension work, hope to get patches 2 and 3 above committed.
== Progress ==
* Out of office Mon-Wed [6/10]
* [ARM] Use AddDefaultPred everywhere [TCWG-987]
- Committed upstream
* LLVM AArch64 4.0.0 [ TCWG-1008] [1/10]
- Ran the tests for rc1, everything went smoothly
* [AArch64] Investigate PR30225 [TCWG-1021] [1/10]
- Someone noticed that llvm-mc is using a different code/data
alignment factor for the call frame information than gas, trying to
figure out if that would actually confuse a debugger
* Misc [2/10]
- Mailing lists, code reviews, meetings etc
