CoreSight

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6 participants
2351 discussions

About the new ACPI HID for supporting ARM CoreSight ETE

by hejunhao

Hi Suzuki & Anshuman. I have some questions about the new ACPI HID for ARM CoreSight ETE and need to get you help to confirm. a）Has ARM distributed a new ACPI HID for ETE, or is it plans to do so? If possible, can the new HID be provided in advance? b) Or Is it possible to add an new ACPI HID (HISI0461) for HiSilicon ETE. Best regards, Junhao.

1 year, 11 months

Re: [PATCH v2] perf arm: Fix include path

by Arnaldo Carvalho de Melo

Em Mon, May 15, 2023 at 09:50:39AM -0700, Ian Rogers escreveu: > Change "../cs-etm.h" to just "../../../util/cs-etm.h" as ../cs-etm.h > doesn't exist. Thanks, applied. - Arnaldo > Suggested-by: Leo Yan <leo.yan(a)linaro.org> > Signed-off-by: Ian Rogers <irogers(a)google.com> > Reviewed-by: Leo Yan <leo.yan(a)linaro.org> > --- > tools/perf/arch/arm/util/pmu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c > index 860a8b42b4b5..a9623b128ece 100644 > --- a/tools/perf/arch/arm/util/pmu.c > +++ b/tools/perf/arch/arm/util/pmu.c > @@ -12,7 +12,7 @@ > #include "arm-spe.h" > #include "hisi-ptt.h" > #include "../../../util/pmu.h" > -#include "../cs-etm.h" > +#include "../../../util/cs-etm.h" > > struct perf_event_attr > *perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused) > -- > 2.40.1.606.ga4b1b128d6-goog > -- - Arnaldo

1 year, 11 months

[PATCH] perf cs-etm: Copy kernel coresight-pmu.h header

by James Clark

Copy the kernel version of the header to fix the header diff build warning. Some new definitions were only added to the tools side header, but these are only used in Perf so move them to a different header. Signed-off-by: James Clark <james.clark(a)arm.com> --- tools/include/linux/coresight-pmu.h | 13 ------------- tools/perf/util/cs-etm.h | 13 +++++++++++++ 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index cef3b1c25335..51ac441a37c3 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h @@ -21,19 +21,6 @@ */ #define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2)) -/* CoreSight trace ID is currently the bottom 7 bits of the value */ -#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) - -/* - * perf record will set the legacy meta data values as unused initially. - * This allows perf report to manage the decoders created when dynamic - * allocation in operation. - */ -#define CORESIGHT_TRACE_ID_UNUSED_FLAG BIT(31) - -/* Value to set for unused trace ID values */ -#define CORESIGHT_TRACE_ID_UNUSED_VAL 0x7F - /* * Below are the definition of bit offsets for perf option, and works as * arbitrary values for all ETM versions. diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h index 70cac0375b34..ecca40787ac9 100644 --- a/tools/perf/util/cs-etm.h +++ b/tools/perf/util/cs-etm.h @@ -227,6 +227,19 @@ struct cs_etm_packet_queue { #define INFO_HEADER_SIZE (sizeof(((struct perf_record_auxtrace_info *)0)->type) + \ sizeof(((struct perf_record_auxtrace_info *)0)->reserved__)) +/* CoreSight trace ID is currently the bottom 7 bits of the value */ +#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) + +/* + * perf record will set the legacy meta data values as unused initially. + * This allows perf report to manage the decoders created when dynamic + * allocation in operation. + */ +#define CORESIGHT_TRACE_ID_UNUSED_FLAG BIT(31) + +/* Value to set for unused trace ID values */ +#define CORESIGHT_TRACE_ID_UNUSED_VAL 0x7F + int cs_etm__process_auxtrace_info(union perf_event *event, struct perf_session *session); struct perf_event_attr *cs_etm_get_default_config(struct perf_pmu *pmu); -- 2.34.1

1 year, 11 months

[PATCH v6 0/6] coresight: syscfg: Add config table load via configfs

by Mike Leach

This set extends the configuration management support to allow loading and unloading of configurations as structured tables. The existing coresight configuration configfs API is additionally extended to use this table functionality to load and unload configuration tables as binary files. This allows coresight configurations to be loaded at runtime, and independently of kernel version, without the requirement to re-compile as built in kernel modules. Additional attributes - load and unload are provided to in the /config/cs-syscfg subsytem base group to implement the load functionality. The load attribute is a configfs binary attribute, loading the configuration table in a similar way as the ACPI table binary attribute for that sub-system. The configfs binary attribute mechanism supplies a strictly size limited kernel buffer, providing better safety than other mechnisms, and also has the advantage of being accessible directly from the command line, and being part of the existing upstream coresight configuration mechanism in configfs Configurations loaded in this way are validated and loaded across the entire system of components atomically. If any part fails to load then the whole configuration load will be cancelled. Routines to generate binary configuration table files are supplied in ./tools/coresight. Example generator and reader applications are provided. Tools may be cross compiled or built for use on host system. Documentation is updated to describe feature usage. Changes since v5: 1) Possible memory leak removed. Reported-by: kernel test robot <lkp(a)intel.com> Reported-by: Dan Carpenter <error27(a)gmail.com> 2) Reuse mechanism for reader code revised. (Christoph) 3) Unload mechnism now by name in standard attribute, rather than entire file 4) Mechanism to check last loaded configuration can be unloaded. 5) Documentation updates. Changes since v4: 1) Update coresight/next - 6.1-rc3 2) Update to lockdep fixes to avoid read lock race in configfs. Changes since v3: 1) Rebase & tested on coresight/next - 5.19-rc3 - which includes the fix patch for earlier configfs works. 2) Lockdep investigations resulted in re-design of some of the code accessing configfs. 3) moved load and unload attributes to root of cs-syscfg. (Mathieu) 4) Additional minor fixes suggested by Mathieu. 5) Memory for configfs loaded and unloaded configurations is now explicitly freed. 6) LOCKDEP nesting fix for configfs base code (fs/configfs/dir.c) Changes since v2: 1) Rebased & tested on coresight/next - 5.18-rc2 2) Moved coresight config generator and reader programs from samples to tools/coresight. Docs updated to match. (suggested by Mathieu) 3) userspace builds now use userspace headers from tools/... 4) Other minor fixes from Mathieu's review. Changes since v1: 1) Rebased to coresight/next - 5.16-rc1 with previous coresight config set applied. 2) Makefile.host fixed to default to all target. Mike Leach (6): coresight: config: add config table runtime load functionality coresight: configfs: Update memory allocation / free for configfs elements coresight: configfs: Add attributes to load config tables at runtime coresight: config: extract shared structures to common header file coresight: tools: Add config table file write and reader tools Documentation: coresight: docs for config load via configfs .../trace/coresight/coresight-config.rst | 265 ++++++++- MAINTAINERS | 1 + drivers/hwtracing/coresight/Makefile | 3 +- .../coresight/coresight-config-desc.h | 105 ++++ .../coresight/coresight-config-table.c | 431 +++++++++++++++ .../coresight/coresight-config-table.h | 151 ++++++ .../hwtracing/coresight/coresight-config.h | 98 +--- .../coresight/coresight-syscfg-configfs.c | 513 ++++++++++++++++-- .../coresight/coresight-syscfg-configfs.h | 5 + .../hwtracing/coresight/coresight-syscfg.c | 101 +++- .../hwtracing/coresight/coresight-syscfg.h | 6 +- tools/coresight/Makefile | 56 ++ tools/coresight/coresight-cfg-bufw.c | 309 +++++++++++ tools/coresight/coresight-cfg-bufw.h | 26 + tools/coresight/coresight-cfg-example1.c | 62 +++ tools/coresight/coresight-cfg-example2.c | 95 ++++ tools/coresight/coresight-cfg-examples.h | 25 + tools/coresight/coresight-cfg-file-gen.c | 61 +++ tools/coresight/coresight-cfg-file-read.c | 227 ++++++++ tools/coresight/coresight-config-uapi.h | 105 ++++ 20 files changed, 2503 insertions(+), 142 deletions(-) create mode 100644 drivers/hwtracing/coresight/coresight-config-desc.h create mode 100644 drivers/hwtracing/coresight/coresight-config-table.c create mode 100644 drivers/hwtracing/coresight/coresight-config-table.h create mode 100644 tools/coresight/Makefile create mode 100644 tools/coresight/coresight-cfg-bufw.c create mode 100644 tools/coresight/coresight-cfg-bufw.h create mode 100644 tools/coresight/coresight-cfg-example1.c create mode 100644 tools/coresight/coresight-cfg-example2.c create mode 100644 tools/coresight/coresight-cfg-examples.h create mode 100644 tools/coresight/coresight-cfg-file-gen.c create mode 100644 tools/coresight/coresight-cfg-file-read.c create mode 100644 tools/coresight/coresight-config-uapi.h -- 2.17.1

1 year, 11 months

[PATCH V3 0/6] coresight: etm4x: Migrate ACPI AMBA devices to platform driver

by Anshuman Khandual

CoreSight ETM4x devices could be accessed either via MMIO (handled via amba_driver) or CPU system instructions (handled via platform driver). But this has the following issues : - Each new CPU comes up with its own PID and thus we need to keep on adding the "known" PIDs to get it working with AMBA driver. While the ETM4 architecture (and CoreSight architecture) defines way to identify a device as ETM4. Thus older kernels won't be able to "discover" a newer CPU, unless we add the PIDs. - With ACPI, the ETM4x devices have the same HID to identify the device irrespective of the mode of access. This creates a problem where two different drivers (both AMBA based driver and platform driver) would hook into the "HID" and could conflict. e.g., if AMBA driver gets hold of a non-MMIO device, the probe fails. If we have single driver hooked into the given "HID", we could handle them seamlessly, irrespective of the mode of access. - CoreSight is heavily dependent on the runtime power management. With ACPI, amba_driver doesn't get us anywhere with handling the power and thus one need to always turn the power ON to use them. Moving to platform driver gives us the power management for free. Due to all of the above, we are moving ACPI MMIO based etm4x devices to be supported via tha platform driver. The series makes the existing platform driver generic to handle both type of the access modes. Although existing AMBA driver would still continue to support DT based etm4x MMIO devices. Although some problems still remain, such as manually adding PIDs for all new AMBA DT based devices. The series applies on 6.4-rc2. Changes in V3: - Returned from etm4_check_arch_features() for non iomem devices - Renamed ETM_DEVTYPE_ETMv4x_ARCH as CS_DEVTYPE_PE_TRACE - Renamed is_etm4x_devtype() as is_devtype_cpu_trace() - Added a patch to ignore the absence of graph connections Changes in V2: https://lore.kernel.org/all/20230327050537.30861-1-anshuman.khandual@arm.co… - Enables ACPI etm4x device support in the existing platform driver - Dropped last two patches from the series - Dropped redundant 'devarch' checking from is_etm4x_device() - Renamed updated is_etm4x_device() as is_etm4x_devtype() - Fixed arguments in fallback stub for etm4_check_arch_features() - Tagged etm4_dev_pm_ops with etm4_platform_driver - Updated the comment for coresight_get_enable_apb_pclk() helper - Updated the comment for new 'pclk' element in struct etm4_drvdata - Dropped the clock when devm_ioremap_resource() fails - Convert IS_ERR() into a direct pointer check in etm4_remove_platform_dev() - Dropped "arm,coresight-etm4x" compatible property from etm4_match[] Changes in V1: https://lore.kernel.org/all/20230317030501.1811905-1-anshuman.khandual@arm.… Cc: Ganapatrao Kulkarni <gankulkarni(a)os.amperecomputing.com> Cc: Steve Clevenger <scclevenger(a)os.amperecomputing.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Frank Rowand <frowand.list(a)gmail.com> Cc: Russell King (Oracle) <linux(a)armlinux.org.uk> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Len Brown <lenb(a)kernel.org> Cc: Sudeep Holla <sudeep.holla(a)arm.com> Cc: Lorenzo Pieralisi <lpieralisi(a)kernel.org> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Leo Yan <leo.yan(a)linaro.org> Cc: devicetree(a)vger.kernel.org Cc: linux-acpi(a)vger.kernel.org Cc: coresight(a)lists.linaro.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-kernel(a)vger.kernel.org Anshuman Khandual (4): coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier coresight: etm4x: Drop iomem 'base' argument from etm4_probe() coresight: etm4x: Drop pid argument from etm4_probe() coresight: etm4x: Change etm4_platform_driver driver for MMIO devices Suzuki K Poulose (2): coresight: etm4x: Add ACPI support in platform driver coresight: platform: acpi: Ignore the absence of graph drivers/acpi/acpi_amba.c | 1 - .../coresight/coresight-etm4x-core.c | 122 ++++++++++++++---- drivers/hwtracing/coresight/coresight-etm4x.h | 4 + .../hwtracing/coresight/coresight-platform.c | 6 +- include/linux/coresight.h | 59 +++++++++ 5 files changed, 166 insertions(+), 26 deletions(-) -- 2.25.1

1 year, 11 months

Re: [PATCH] coresight: etm4x: Make etm4_remove_dev() return void

by Anshuman Khandual

On 5/19/23 01:46, Uwe Kleine-König wrote: > etm4_remove_dev() returned zero unconditionally. Make it return void > instead, which makes it clear in the callers that there is no error to > handle. Simplify etm4_remove_platform_dev() accordingly. Agreed, as is the case in etm4_remove_amba(). > > Signed-off-by: Uwe Kleine-König <u.kleine-koenig(a)pengutronix.de> > --- > drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 +++------ > 1 file changed, 3 insertions(+), 6 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c > index 4c15fae534f3..3220c26f5dc2 100644 > --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c > +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c > @@ -2190,7 +2190,7 @@ static void clear_etmdrvdata(void *info) > per_cpu(delayed_probe, cpu) = NULL; > } > > -static int __exit etm4_remove_dev(struct etmv4_drvdata *drvdata) > +static void __exit etm4_remove_dev(struct etmv4_drvdata *drvdata) > { > bool had_delayed_probe; > /* > @@ -2217,8 +2217,6 @@ static int __exit etm4_remove_dev(struct etmv4_drvdata *drvdata) > cscfg_unregister_csdev(drvdata->csdev); > coresight_unregister(drvdata->csdev); > } > - > - return 0; > } > > static void __exit etm4_remove_amba(struct amba_device *adev) > @@ -2231,13 +2229,12 @@ static void __exit etm4_remove_amba(struct amba_device *adev) > > static int __exit etm4_remove_platform_dev(struct platform_device *pdev) > { > - int ret = 0; > struct etmv4_drvdata *drvdata = dev_get_drvdata(&pdev->dev); > > if (drvdata) > - ret = etm4_remove_dev(drvdata); > + etm4_remove_dev(drvdata); > pm_runtime_disable(&pdev->dev); > - return ret; > + return 0; > } Makes sense. Reviewed-by: Anshuman Khandual <anshuman.khandual(a)arm.com> > > static const struct amba_id etm4_ids[] = { > > base-commit: ac9a78681b921877518763ba0e89202254349d1b

1 year, 12 months

[PATCH V2 0/5] coresight: etm4x: Migrate ACPI AMBA devices to platform driver

by Anshuman Khandual

CoreSight ETM4x devices could be accessed either via MMIO (handled via amba_driver) or CPU system instructions (handled via platform driver). But this has the following issues : - Each new CPU comes up with its own PID and thus we need to keep on adding the "known" PIDs to get it working with AMBA driver. While the ETM4 architecture (and CoreSight architecture) defines way to identify a device as ETM4. Thus older kernels won't be able to "discover" a newer CPU, unless we add the PIDs. - With ACPI, the ETM4x devices have the same HID to identify the device irrespective of the mode of access. This creates a problem where two different drivers (both AMBA based driver and platform driver) would hook into the "HID" and could conflict. e.g., if AMBA driver gets hold of a non-MMIO device, the probe fails. If we have single driver hooked into the given "HID", we could handle them seamlessly, irrespective of the mode of access. - CoreSight is heavily dependent on the runtime power management. With ACPI, amba_driver doesn't get us anywhere with handling the power and thus one need to always turn the power ON to use them. Moving to platform driver gives us the power management for free. Due to all of the above, we are moving the MMIO based etm4x devices to be supported via platform driver. The series makes the existing platform driver generic to handle both type of the access modes. Although existing AMBA driver would still continue to support DT based etm4x MMIO devices. The series applies on 6.3-rc4. Changes in V2: - Enables ACPI etm4x device support in the existing platform driver - Dropped last two patches from the series - Dropped redundant 'devarch' checking from is_etm4x_device() - Renamed updated is_etm4x_device() as is_etm4x_devtype() - Fixed arguments in fallback stub for etm4_check_arch_features() - Tagged etm4_dev_pm_ops with etm4_platform_driver - Updated the comment for coresight_get_enable_apb_pclk() helper - Updated the comment for new 'pclk' element in struct etm4_drvdata - Dropped the clock when devm_ioremap_resource() fails - Convert IS_ERR() into a direct pointer check in etm4_remove_platform_dev() - Dropped "arm,coresight-etm4x" compatible property from etm4_match[] Changes in V1: https://lore.kernel.org/all/20230317030501.1811905-1-anshuman.khandual@arm.… Cc: Steve Clevenger <scclevenger(a)os.amperecomputing.com> Cc: Rob Herring <robh+dt(a)kernel.org> Cc: Frank Rowand <frowand.list(a)gmail.com> Cc: Russell King (Oracle) <linux(a)armlinux.org.uk> Cc: Greg Kroah-Hartman <gregkh(a)linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael(a)kernel.org> Cc: Len Brown <lenb(a)kernel.org> Cc: Sudeep Holla <sudeep.holla(a)arm.com> Cc: Lorenzo Pieralisi <lpieralisi(a)kernel.org> Cc: Mathieu Poirier <mathieu.poirier(a)linaro.org> Cc: Suzuki K Poulose <suzuki.poulose(a)arm.com> Cc: Mike Leach <mike.leach(a)linaro.org> Cc: Leo Yan <leo.yan(a)linaro.org> Cc: devicetree(a)vger.kernel.org Cc: linux-acpi(a)vger.kernel.org Cc: coresight(a)lists.linaro.org Cc: linux-arm-kernel(a)lists.infradead.org Cc: linux-kernel(a)vger.kernel.org Anshuman Khandual (4): coresight: etm4x: Allocate and device assign 'struct etmv4_drvdata' earlier coresight: etm4x: Drop iomem 'base' argument from etm4_probe() coresight: etm4x: Drop pid argument from etm4_probe() coresight: etm4x: Change etm4_platform_driver driver for MMIO devices Suzuki Poulose (1): coresight: etm4x: Add ACPI support in platform driver drivers/acpi/acpi_amba.c | 1 - .../coresight/coresight-etm4x-core.c | 114 ++++++++++++++---- drivers/hwtracing/coresight/coresight-etm4x.h | 4 + include/linux/coresight.h | 59 +++++++++ 4 files changed, 154 insertions(+), 24 deletions(-) -- 2.25.1

1 year, 12 months

[PATCH] coresight: etm4x: fix trctraceid sysfs always invisible

by Junhao He

The trctraceid sysfs interface is current in etm4x mgmt group. Each attr in the mgmt group will call the function is_visible() to check whether the register is implemented. However the trctraceid does not bound to any register. So the trctraceid sysfs will always be invisible. Move it to etmv4 group to fix that. Fixes: df4871204e5d ("coresight: etm4x: Update ETM4 driver to use Trace ID API") Signed-off-by: Junhao He <hejunhao3(a)huawei.com> --- .../coresight/coresight-etm4x-sysfs.c | 42 +++++++++---------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index 5e62aa40ecd0..0ea71de0f56b 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -2335,6 +2335,26 @@ static ssize_t ts_source_show(struct device *dev, } static DEVICE_ATTR_RO(ts_source); +/* + * Trace ID allocated dynamically on enable - but also allocate on read + * in case sysfs or perf read before enable to ensure consistent metadata + * information for trace decode + */ +static ssize_t trctraceid_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int trace_id; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + trace_id = etm4_read_alloc_trace_id(drvdata); + if (trace_id < 0) + return trace_id; + + return sysfs_emit(buf, "0x%x\n", trace_id); +} +static DEVICE_ATTR_RO(trctraceid); + static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_nr_pe_cmp.attr, &dev_attr_nr_addr_cmp.attr, @@ -2390,29 +2410,10 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_vmid_masks.attr, &dev_attr_cpu.attr, &dev_attr_ts_source.attr, + &dev_attr_trctraceid.attr, NULL, }; -/* - * Trace ID allocated dynamically on enable - but also allocate on read - * in case sysfs or perf read before enable to ensure consistent metadata - * information for trace decode - */ -static ssize_t trctraceid_show(struct device *dev, - struct device_attribute *attr, - char *buf) -{ - int trace_id; - struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); - - trace_id = etm4_read_alloc_trace_id(drvdata); - if (trace_id < 0) - return trace_id; - - return sysfs_emit(buf, "0x%x\n", trace_id); -} -static DEVICE_ATTR_RO(trctraceid); - struct etmv4_reg { struct coresight_device *csdev; u32 offset; @@ -2549,7 +2550,6 @@ static struct attribute *coresight_etmv4_mgmt_attrs[] = { coresight_etm4x_reg(trcpidr3, TRCPIDR3), coresight_etm4x_reg(trcoslsr, TRCOSLSR), coresight_etm4x_reg(trcconfig, TRCCONFIGR), - &dev_attr_trctraceid.attr, coresight_etm4x_reg(trcdevarch, TRCDEVARCH), NULL, }; -- 2.33.0

2 years

[GIT PULL] coresight: Fixes for v6.4

by Suzuki K Poulose

Hi Greg Please find a couple of fixes for v6.4 for the coresight self-hosted tracing subsystem. Kindly pull. Suzuki The following changes since commit ac9a78681b921877518763ba0e89202254349d1b: Linux 6.4-rc1 (2023-05-07 13:34:35 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-fixes-v6.4 for you to fetch changes up to 04ac7f98b92181179ea84439642493f3826d04a2: coresight: perf: Release Coresight path when alloc trace id failed (2023-05-11 11:18:21 +0100) ---------------------------------------------------------------- coresight: Fixes for v6.4 Couple of fixes for coresight self-hosted tracing subsystem for v6.4. These include : - Fix signedness bug in tmc_etr_buf_insert_barrier_packet() - Fix memory leak with failing to release the path if trace-id allocation fails Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> ---------------------------------------------------------------- Dan Carpenter (1): coresight: Fix signedness bug in tmc_etr_buf_insert_barrier_packet() Ruidong Tian (1): coresight: perf: Release Coresight path when alloc trace id failed drivers/hwtracing/coresight/coresight-etm-perf.c | 1 + drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)

2 years

[PATCH] perf cs-etm: Fix contextid validation

by James Clark

Pre 5.11 kernels don't support 'contextid1' and 'contextid2' so validation would be skipped. By adding an additional check for 'contextid', old kernels will still have validation done even though contextid would either be contextid1 or contextid2. Additionally now that it's possible to override options, an existing bug in the validation is revealed. 'val' is overwritten by the contextid1 validation, and re-used for contextid2 validation causing it to always fail. '!val || val != 0x4' is the same as 'val != 0x4' because 0 is also != 4, so that expression can be simplified and the temp variable not overwritten. Fixes: 35c51f83dd1e ("perf cs-etm: Validate options after applying them") Reviewed-by: Leo Yan <leo.yan(a)linaro.org> Link: https://lore.kernel.org/all/20230501073452.GA4660@leoy-yangtze.lan Signed-off-by: James Clark <james.clark(a)arm.com> --- tools/perf/arch/arm/util/cs-etm.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/tools/perf/arch/arm/util/cs-etm.c b/tools/perf/arch/arm/util/cs-etm.c index 77cb03e6ff87..9ca040bfb1aa 100644 --- a/tools/perf/arch/arm/util/cs-etm.c +++ b/tools/perf/arch/arm/util/cs-etm.c @@ -78,9 +78,9 @@ static int cs_etm_validate_context_id(struct auxtrace_record *itr, char path[PATH_MAX]; int err; u32 val; - u64 contextid = - evsel->core.attr.config & - (perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1") | + u64 contextid = evsel->core.attr.config & + (perf_pmu__format_bits(&cs_etm_pmu->format, "contextid") | + perf_pmu__format_bits(&cs_etm_pmu->format, "contextid1") | perf_pmu__format_bits(&cs_etm_pmu->format, "contextid2")); if (!contextid) @@ -114,8 +114,7 @@ static int cs_etm_validate_context_id(struct auxtrace_record *itr, * 0b00100 Maximum of 32-bit Context ID size. * All other values are reserved. */ - val = BMVAL(val, 5, 9); - if (!val || val != 0x4) { + if (BMVAL(val, 5, 9) != 0x4) { pr_err("%s: CONTEXTIDR_EL1 isn't supported, disable with %s/contextid1=0/\n", CORESIGHT_ETM_PMU_NAME, CORESIGHT_ETM_PMU_NAME); return -EINVAL; -- 2.34.1

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