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[PATCH V6 0/4] arm-cs-trace-disasm.py/perf must accommodate non-zero DSO text offset

by Steve Clevenger

Changes in V6: - In arm-cs-trace-disasm.py, zero map_pgoff for kernel files. Add map_pgoff to start/end address for dso not found message. - Added "Reviewed-by" trailer for patches 1-3 previously reviewed by Leo Yan in V4 and V5. Changes in V5: - In symbol-elf.c, branch to exit_close label if open file. - In trace_event_python.c, correct indentation. set_sym_in_dict call parameter "map_pgoff" renamed as "addr_map_pgoff" to match local naming. Changes in V4: - In trace-event-python.c, fixed perf-tools-next merge problem. Changes in V3: - Rebased to linux-perf-tools branch. - Squash symbol-elf.c and symbol.h into same commit. - In map.c, merge dso__is_pie() call into existing if statement. - In arm-cs-trace-disasm.py, remove debug artifacts. Changes in V2: - In dso__is_pie() (symbol-elf.c), Decrease indentation, add null pointer checks per Leo Yan review. - Updated mailing list distribution. Steve Clevenger (4): Add dso__is_pie call to identify ELF PIE Force MAPPING_TYPE__IDENTIY for PIE Add map pgoff to python dictionary based on MAPPING_TYPE Adjust objdump start/end range per map pgoff parameter .../scripts/python/arm-cs-trace-disasm.py | 12 ++-- tools/perf/util/map.c | 4 +- .../scripting-engines/trace-event-python.c | 13 +++- tools/perf/util/symbol-elf.c | 61 +++++++++++++++++++ tools/perf/util/symbol.h | 1 + 5 files changed, 82 insertions(+), 9 deletions(-) -- 2.44.0

1 year, 4 months

[PATCH 0/8] perf: cs-etm: Coresight decode and disassembly improvements

by James Clark

A set of changes that came out of the issues reported here [1]. * First 3 patches fix a decode bug in Perf and add support for new consistency checks in OpenCSD * The remaining ones make the disassembly script easier to test and use. This also involves adding a new Python binding to Perf to get a config value (perf_config_get()) [1]: https://lore.kernel.org/linux-arm-kernel/20240719092619.274730-1-gankulkarn… James Clark (8): perf cs-etm: Don't flush when packet_queue fills up perf cs-etm: Use new OpenCSD consistency checks perf cs-etm: Remove cs_etm__flush() perf scripting python: Add function to get a config value perf scripts python cs-etm: Update to use argparse perf scripts python cs-etm: Improve arguments perf scripts python cs-etm: Add start and stop arguments perf test: cs-etm: Test Coresight disassembly script .../perf/Documentation/perf-script-python.txt | 2 +- .../scripts/python/Perf-Trace-Util/Context.c | 11 ++ .../scripts/python/arm-cs-trace-disasm.py | 109 +++++++++++++----- .../tests/shell/test_arm_coresight_disasm.sh | 63 ++++++++++ tools/perf/util/config.c | 22 ++++ tools/perf/util/config.h | 1 + .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 7 +- tools/perf/util/cs-etm.c | 68 +---------- 8 files changed, 192 insertions(+), 91 deletions(-) create mode 100755 tools/perf/tests/shell/test_arm_coresight_disasm.sh -- 2.34.1

1 year, 4 months

[PATCH v6 00/17] coresight: Use per-sink trace ID maps for Perf sessions

by James Clark

This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs as long as there are fewer than that many ETMs connected to each sink. Each sink owns its own trace ID map, and any Perf session connecting to that sink will allocate from it, even if the sink is currently in use by other users. This is similar to the existing behavior where the dynamic trace IDs are constant as long as there is any concurrent Perf session active. It's not completely optimal because slightly more IDs will be used than necessary, but the optimal solution involves tracking the PIDs of each session and allocating ID maps based on the session owner. This is difficult to do with the combination of per-thread and per-cpu modes and some scheduling issues. The complexity of this isn't likely to worth it because even with multiple users they'd just see a difference in the ordering of ID allocations rather than hitting any limits (unless the hardware does have too many ETMs connected to one sink). Per-thread mode works but only until there are any overlapping IDs, at which point Perf will error out. Both per-thread mode and sysfs mode are left to future changes, but both can be added on top of this initial implementation and only sysfs mode requires further driver changes. The HW_ID version field hasn't been bumped in order to not break Perf which already has an error condition for other values of that field. Instead a new minor version has been added which signifies that there are new fields but the old fields are backwards compatible. Changes since v5: * Hide queue number printout behind -v option * Style change in cs_etm__process_aux_output_hw_id() * Move new format enum to an earlier commit to reduce churn Changes since v4: * Fix compilation failure when TRACE_ID_DEBUG is set * Expand comment about not freeing individual trace IDs in free_event_data() Changes since v3: * Fix issue where trace IDs were overwritten by possibly invalid ones by Perf in unformatted mode. Now the HW_IDs are also used for unformatted mode unless the kernel didn't emit any. * Add a commit to check the OpenCSD version. * Add a commit to not save invalid IDs in the Perf header. * Replace cs_etm_queue's formatted and formatted_set members with a single enum which is easier to use. * Drop CORESIGHT_TRACE_ID_UNUSED_FLAG as it's no longer needed. * Add a commit to print the queue number in the raw dump. * Don't assert on the number of unformatted decoders if decoders == 0. Changes since v2: * Rebase on coresight-next 6.10-rc2 (b9b25c8496). * Fix double free of csdev if device registration fails. * Fix leak of coresight_trace_id_perf_start() if trace ID allocation fails. * Don't resend HW_ID for sink changes in per-thread mode. The existing CPU field on AUX records can be used to track this instead. * Tidy function doc for coresight_trace_id_release_all() * Drop first two commits now that they are in coresight-next * Add a commit to make the trace ID spinlock local to the map Changes since V1: * Rename coresight_device.perf_id_map to perf_sink_id_map. * Instead of outputting a HW_ID for each reachable ETM, output the sink ID and continue to output only the HW_ID once for each mapping. * Keep the first two Perf patches so that it applies cleanly on coresight-next, although they have been applied on perf-tools-next * Add new *_map() functions to the trace ID public API instead of modifying existing ones. * Collapse "coresight: Pass trace ID map into source enable" into "coresight: Use per-sink trace ID maps for Perf sessions" because the first commit relied on the default map being accessible which is no longer necessary due to the previous bullet point. James Clark (17): perf: cs-etm: Create decoders after both AUX and HW_ID search passes perf: cs-etm: Allocate queues for all CPUs perf: cs-etm: Move traceid_list to each queue perf: cs-etm: Create decoders based on the trace ID mappings perf: cs-etm: Only save valid trace IDs into files perf: cs-etm: Support version 0.1 of HW_ID packets perf: cs-etm: Print queue number in raw trace dump perf: cs-etm: Add runtime version check for OpenCSD coresight: Remove unused ETM Perf stubs coresight: Clarify comments around the PID of the sink owner coresight: Move struct coresight_trace_id_map to common header coresight: Expose map arguments in trace ID API coresight: Make CPU id map a property of a trace ID map coresight: Use per-sink trace ID maps for Perf sessions coresight: Remove pending trace ID release mechanism coresight: Emit sink ID in the HW_ID packets coresight: Make trace ID map spinlock local to the map drivers/hwtracing/coresight/coresight-core.c | 37 +- drivers/hwtracing/coresight/coresight-dummy.c | 3 +- .../hwtracing/coresight/coresight-etm-perf.c | 43 +- .../hwtracing/coresight/coresight-etm-perf.h | 18 - .../coresight/coresight-etm3x-core.c | 9 +- .../coresight/coresight-etm4x-core.c | 9 +- drivers/hwtracing/coresight/coresight-priv.h | 1 + drivers/hwtracing/coresight/coresight-stm.c | 3 +- drivers/hwtracing/coresight/coresight-sysfs.c | 3 +- .../hwtracing/coresight/coresight-tmc-etr.c | 5 +- drivers/hwtracing/coresight/coresight-tmc.h | 5 +- drivers/hwtracing/coresight/coresight-tpdm.c | 3 +- .../hwtracing/coresight/coresight-trace-id.c | 138 ++-- .../hwtracing/coresight/coresight-trace-id.h | 70 +- include/linux/coresight-pmu.h | 17 +- include/linux/coresight.h | 21 +- tools/build/feature/test-libopencsd.c | 4 +- tools/include/linux/coresight-pmu.h | 17 +- tools/perf/Makefile.config | 2 +- tools/perf/arch/arm/util/cs-etm.c | 11 +- .../perf/util/cs-etm-decoder/cs-etm-decoder.c | 49 +- .../perf/util/cs-etm-decoder/cs-etm-decoder.h | 3 +- .../util/cs-etm-decoder/cs-etm-min-version.h | 13 + tools/perf/util/cs-etm.c | 629 +++++++++++------- tools/perf/util/cs-etm.h | 12 +- 25 files changed, 650 insertions(+), 475 deletions(-) create mode 100644 tools/perf/util/cs-etm-decoder/cs-etm-min-version.h -- 2.34.1

1 year, 4 months

Re: [GIT PULL] coresight: Updates for Linux v6.12

by Suzuki K Poulose

On 03/09/2024 11:41, Greg KH wrote: > On Tue, Sep 03, 2024 at 11:36:03AM +0100, Suzuki K Poulose wrote: >> Hi Greg, >> >> On 27/08/2024 20:26, Suzuki K Poulose wrote: >>> >>> Greg, >>> >>> Please find the updates for CoreSight/hwtracing subsystem for v6.12. >> >> Gentle ping, in case this was missed out. > > I just pulled this, right? Indeed you did, thanks ! Suzuki "beaten by Greg" ;-) > > thanks, > > greg "drowning in patches" k-h

1 year, 4 months

Re: [GIT PULL] coresight: Updates for Linux v6.12

by Suzuki K Poulose

On 03/09/2024 11:07, Greg KH wrote: > On Tue, Aug 27, 2024 at 08:26:44PM +0100, Suzuki K Poulose wrote: >> >> Greg, >> >> Please find the updates for CoreSight/hwtracing subsystem for v6.12. >> >> Kindly pull >> >> Suzuki >> >> >> >> The following changes since commit 47ac09b91befbb6a235ab620c32af719f8208399: >> >> Linux 6.11-rc4 (2024-08-18 13:17:27 -0700) >> >> are available in the Git repository at: >> >> git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-next-v6.12 >> > > Pulled and pushed out, thanks. > Thanks Greg ! Suzuki

1 year, 4 months

[GIT PULL] coresight: Updates for Linux v6.12

by Suzuki K Poulose

Greg, Please find the updates for CoreSight/hwtracing subsystem for v6.12. Kindly pull Suzuki The following changes since commit 47ac09b91befbb6a235ab620c32af719f8208399: Linux 6.11-rc4 (2024-08-18 13:17:27 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git tags/coresight-next-v6.12 for you to fetch changes up to 988d40a4d4e7d671305bea501562a5d1a1d479fa: coresight: Make trace ID map spinlock local to the map (2024-08-20 15:02:38 +0100) ---------------------------------------------------------------- coresight: updates for Linux v6.12 CoreSight/hwtracing subsystem updates targeting Linux v6.12: - Miscellaneous fixes and cleanups - TraceID allocation per sink, allowing system with > 110 cores for perf tracing. Signed-off-by: Suzuki K Poulose <suzuki.poulose(a)arm.com> ---------------------------------------------------------------- James Clark (9): coresight: Remove unused ETM Perf stubs coresight: Clarify comments around the PID of the sink owner coresight: Move struct coresight_trace_id_map to common header coresight: Expose map arguments in trace ID API coresight: Make CPU id map a property of a trace ID map coresight: Use per-sink trace ID maps for Perf sessions coresight: Remove pending trace ID release mechanism coresight: Emit sink ID in the HW_ID packets coresight: Make trace ID map spinlock local to the map Javier Carrasco (1): coresight: cti: use device_* to iterate over device child nodes Jie Gan (2): Coresight: Set correct cs_mode for TPDM to fix disable issue Coresight: Set correct cs_mode for dummy source to fix disable issue Suzuki K Poulose (1): coresight: tmc: sg: Do not leak sg_table drivers/hwtracing/coresight/coresight-core.c | 37 ++++-- .../hwtracing/coresight/coresight-cti-platform.c | 10 +- drivers/hwtracing/coresight/coresight-dummy.c | 7 +- drivers/hwtracing/coresight/coresight-etm-perf.c | 43 ++++--- drivers/hwtracing/coresight/coresight-etm-perf.h | 18 --- drivers/hwtracing/coresight/coresight-etm3x-core.c | 9 +- drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 +- drivers/hwtracing/coresight/coresight-priv.h | 1 + drivers/hwtracing/coresight/coresight-stm.c | 3 +- drivers/hwtracing/coresight/coresight-sysfs.c | 3 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 7 +- drivers/hwtracing/coresight/coresight-tmc.h | 5 +- drivers/hwtracing/coresight/coresight-tpdm.c | 9 +- drivers/hwtracing/coresight/coresight-trace-id.c | 138 +++++++++------------ drivers/hwtracing/coresight/coresight-trace-id.h | 70 +++++------ include/linux/coresight-pmu.h | 17 ++- include/linux/coresight.h | 21 +++- 17 files changed, 219 insertions(+), 188 deletions(-)

1 year, 4 months

RFC: Add Qualcomm extended CTI support

by Jinlong Mao

Hi Suzuki & Mike & James, We have new CTI HW component called Qcom Extended CTI. The main difference of extended CTI to the normal CTI is that the address mapping is changed and it supports a max of 128 trigger signals. For the changes to CTI driver, I want to define the address mapping like below. Could you please help to provide your comments how can we make the changes to the different address mappings of Qcom extended CTI ? /* CTI programming registers */ +#define CTIINTACK(drvdata, n) ((drvdata->is_extended ? 0x020 : 0x010) + (4 * n)) +#define CTIAPPSET(drvdata) (drvdata->is_extended ? 0x004 : 0x014) +#define CTIAPPCLEAR(drvdata) (drvdata->is_extended ? 0x008 : 0x018) +#define CTIAPPPULSE(drvdata) (drvdata->is_extended ? 0x00C : 0x01C) +#define CTIINEN(drvdata, n) ((drvdata->is_extended ? 0x400 : 0x020) + (4 * n)) +#define CTIOUTEN(drvdata, n) ((drvdata->is_extended ? 0x800 : 0x0A0) + (4 * n)) +#define CTITRIGINSTATUS(drvdata, n) ((drvdata->is_extended ? 0x040 : 0x130) + (4 * n)) +#define CTITRIGOUTSTATUS(drvdata, n) ((drvdata->is_extended ? 0x060 : 0x134) + (4 * n)) +#define CTICHINSTATUS(drvdata) (drvdata->is_extended ? 0x080 : 0x138) +#define CTICHOUTSTATUS(drvdata) (drvdata->is_extended ? 0x084 : 0x13C) +#define CTIGATE(drvdata) (drvdata->is_extended ? 0x088 : 0x140) +#define ASICCTL(drvdata) (drvdata->is_extended ? 0x08C : 0x144) /* Integration test registers */ +#define ITCHINACK(drvdata) (drvdata->is_extended ? 0xE70 : 0xEDC) /* WO CTI CSSoc 400 only*/ +#define ITTRIGINACK(drvdata, n) ((drvdata->is_extended ? 0xE80 : 0xEE0) + (4 * n)) /* WO CTI CSSoc 400 only*/ +#define ITCHOUT(drvdata) (drvdata->is_extended ? 0xE74 : 0xEE4) /* WO RW-600 */ +#define ITTRIGOUT(drvdata, n) ((drvdata->is_extended ? 0xEA : 0xEE8) + (4 * n)) /* WO RW-600 */ +#define ITCHOUTACK(drvdata) (drvdata->is_extended ? 0xE78 : 0xEEC) /* RO CTI CSSoc 400 only*/ +#define ITTRIGOUTACK(drvdata, n) ((drvdata->is_extended ? 0xEC0 : 0xEF0) + (4 * n))/* RO CTI CSSoc 400 only*/ +#define ITCHIN(drvdata) (drvdata->is_extended ? 0xE7C : 0xEF4) /* RO */ +#define ITTRIGIN(drvdata, n) ((drvdata->is_extended ? 0xEE0 : 0xEF8) + (4 * n))/* RO */ Thanks Jinlong Mao

1 year, 4 months

Re: [PATCH V5 0/4] arm-cs-trace-disasm.py/perf must accommodate non-zero DSO text offset

by Steve Clevenger

On 8/30/2024 12:20 AM, Leo Yan wrote: > On 8/29/24 18:39, Steve Clevenger wrote:> >> On 8/29/2024 12:55 AM, Leo Yan wrote: >>> On 8/29/2024 12:17 AM, Steve Clevenger wrote: >>>> >>>> Changes in V5: >>>> - In symbol-elf.c, branch to exit_close label if open file. >>>> - In trace_event_python.c, correct indentation. set_sym_in_dict >>>> call parameter "map_pgoff" renamed as "addr_map_pgoff" to >>>> match local naming. >>> >>> For the series: >>> >>> Reviewed-by: Leo Yan <leo.yan(a)arm.com> >>> >>> Hi Steve, >>> >>> Later when you respin a new version patches, it is better to amend >>> the review >>> and ACK tags you have received. (Just remind, b4 is your friend for >>> helping do >>> these things). >>> >>> Thanks, >>> Leo >> >> Got it. Thanks, Leo. By the way, I noticed when I rebased to >> perf-tools-next the kernel version was 6.11-rc3. Is there any chance >> this patch gets into 6.11? > > Linus' master branch now is 6.11-rc5, it is not far away from the 6.11. > > I think we still have much chance to get it done before it. Added > maintainers > in case any missing. > > Thanks, > Leo Hi Leo, That's great. Unfortuantely, I need to submit a V6 for patch 4/4, which is the arm-cs-trace-disasm.py script. Kernel instruction trace requires zeroing map_pgoff. perf makes most offset decisions, but this one is in the script. It's a one liner. I know you're a b4 fan, but I've never used it. If I'm able to make progress with it I'll use it to resubmit. Otherwise more of the same. Steve Steve

1 year, 4 months

Re: [PATCH] perf scripts python arm-cs-trace-disasm.py: Skip disasm if address continuity is broken

by James Clark

On 23/08/2024 10:57 am, Ganapatrao Kulkarni wrote: > > Hi James/Mike, > > On 23-08-2024 02:33 pm, James Clark wrote: >> >> >> On 19/08/2024 11:59 am, Mike Leach wrote: >>> Hi, >>> >>> A new branch of OpenCSD is available - ocsd-consistency-checks-1.5.4-rc1 >>> >>> Testing I managed to do confirms the N atom on unconditional branches >>> appear to work. I do not have a test case for the range >>> discontinuities. >>> >>> The checks are enabled using operation flags on decoder creation. See >>> the docs for details. >>> >>> Mike >>> >> >> Hi Mike, >> >> I tested the new OpenCSD and I don't see the error anymore in the >> disassembly script. I'm not sure if we need to go any further and add >> the backwards check, it looks like just a later symptom and the checks >> that you've added already prevent it. >> >> If you release a new version I can send the perf patch. I was going to >> use these flags if that looks right to you? As far as I know that's the >> set that can be always on and won't fail on bad hardware? >> >> I also assumed that ETM4_OPFLG_PKTDEC_AA64_OPCODE_CHK can be given even >> for etmv3 and it's just a nop? >> >> diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c >> b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c >> index e917985bbbe6..90967fd807e6 100644 >> --- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c >> +++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c >> @@ -685,9 +685,14 @@ cs_etm_decoder__create_etm_decoder(struct >> cs_etm_decoder_params *d_params, >> return 0; >> >> if (d_params->operation == CS_ETM_OPERATION_DECODE) { >> + int decode_flags = OCSD_CREATE_FLG_FULL_DECODER; >> +#ifdef OCSD_OPFLG_N_UNCOND_DIR_BR_CHK >> + decode_flags |= OCSD_OPFLG_N_UNCOND_DIR_BR_CHK | >> OCSD_OPFLG_CHK_RANGE_CONTINUE | >> + ETM4_OPFLG_PKTDEC_AA64_OPCODE_CHK; >> +#endif >> if (ocsd_dt_create_decoder(decoder->dcd_tree, >> decoder->decoder_name, >> - OCSD_CREATE_FLG_FULL_DECODER, >> + decode_flags, >> trace_config, &csid)) >> return -1; >> > > I tried Mike's branch with above James's patch and still the segfault is > happening to us. > Looks like the Perf bug is only on the timestamped decode path, you can force timeless as a workaround. Timestamps aren't used by the disassembly script anyway: --itrace=Zb Full command: perf script -i ./kcore -s python:tools/perf/scripts/python/arm-cs-\ trace-disasm.py --itrace=Zb -- -k ./kcore/kcore_dir/kcore You can also disable timestamps when recording then you don't need the itrace option. This will save you a lot of data anyway. But I'm still working on the proper fix.

1 year, 4 months

Re: [PATCH V5 0/4] arm-cs-trace-disasm.py/perf must accommodate non-zero DSO text offset

by Steve Clevenger

On 8/29/2024 12:55 AM, Leo Yan wrote: > On 8/29/2024 12:17 AM, Steve Clevenger wrote: >> >> Changes in V5: >> - In symbol-elf.c, branch to exit_close label if open file. >> - In trace_event_python.c, correct indentation. set_sym_in_dict >> call parameter "map_pgoff" renamed as "addr_map_pgoff" to >> match local naming. > > For the series: > > Reviewed-by: Leo Yan <leo.yan(a)arm.com> > > Hi Steve, > > Later when you respin a new version patches, it is better to amend the review > and ACK tags you have received. (Just remind, b4 is your friend for helping do > these things). > > Thanks, > Leo Got it. Thanks, Leo. By the way, I noticed when I rebased to perf-tools-next the kernel version was 6.11-rc3. Is there any chance this patch gets into 6.11? Steve

1 year, 4 months

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