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Re: [PATCH v10 1/5] coresight: cti: Convert trigger usage fields to dynamic

by Mike Leach

Reviewed-by: Mike Leach <mike.leach(a)arm.com> On 6/15/26 13:32, Yingchao Deng wrote: > Replace the fixed-size u32 fields in the cti_config and cti_trig_grp > structure with dynamically allocated bitmaps and arrays. This allows > memory to be allocated based on the actual number of triggers during probe > time, reducing memory footprint and improving scalability for platforms > with varying trigger counts. > > Also add a bounds check in cti_allocate_trig_con() to ensure the caller > does not pass in/out signal counts larger than nr_trig_max. > > Reviewed-by: Leo Yan <leo.yan(a)arm.com> > Signed-off-by: Yingchao Deng <yingchao.deng(a)oss.qualcomm.com> > --- > drivers/hwtracing/coresight/coresight-cti-core.c | 70 +++++++++++++++++----- > .../hwtracing/coresight/coresight-cti-platform.c | 26 +++++--- > drivers/hwtracing/coresight/coresight-cti-sysfs.c | 14 ++--- > drivers/hwtracing/coresight/coresight-cti.h | 12 ++-- > 4 files changed, 87 insertions(+), 35 deletions(-) > > diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c > index b2c9a4db13b4..572798ab504c 100644 > --- a/drivers/hwtracing/coresight/coresight-cti-core.c > +++ b/drivers/hwtracing/coresight/coresight-cti-core.c > @@ -161,8 +161,8 @@ void cti_write_intack(struct device *dev, u32 ackval) > /* DEVID[19:16] - number of CTM channels */ > #define CTI_DEVID_CTMCHANNELS(devid_val) ((int) BMVAL(devid_val, 16, 19)) > > -static void cti_set_default_config(struct device *dev, > - struct cti_drvdata *drvdata) > +static int cti_set_default_config(struct device *dev, > + struct cti_drvdata *drvdata) > { > struct cti_config *config = &drvdata->config; > u32 devid; > @@ -181,6 +181,31 @@ static void cti_set_default_config(struct device *dev, > config->nr_trig_max = CTIINOUTEN_MAX; > } > > + config->trig_in_use = devm_bitmap_zalloc(dev, config->nr_trig_max, > + GFP_KERNEL); > + if (!config->trig_in_use) > + return -ENOMEM; > + > + config->trig_out_use = devm_bitmap_zalloc(dev, config->nr_trig_max, > + GFP_KERNEL); > + if (!config->trig_out_use) > + return -ENOMEM; > + > + config->trig_out_filter = devm_bitmap_zalloc(dev, config->nr_trig_max, > + GFP_KERNEL); > + if (!config->trig_out_filter) > + return -ENOMEM; > + > + config->ctiinen = devm_kcalloc(dev, config->nr_trig_max, sizeof(u32), > + GFP_KERNEL); > + if (!config->ctiinen) > + return -ENOMEM; > + > + config->ctiouten = devm_kcalloc(dev, config->nr_trig_max, sizeof(u32), > + GFP_KERNEL); > + if (!config->ctiouten) > + return -ENOMEM; > + > config->nr_ctm_channels = CTI_DEVID_CTMCHANNELS(devid); > > /* Most regs default to 0 as zalloc'ed except...*/ > @@ -189,6 +214,7 @@ static void cti_set_default_config(struct device *dev, > config->enable_req_count = 0; > > config->asicctl_impl = !!FIELD_GET(GENMASK(4, 0), devid); > + return 0; > } > > /* > @@ -219,8 +245,10 @@ int cti_add_connection_entry(struct device *dev, struct cti_drvdata *drvdata, > cti_dev->nr_trig_con++; > > /* add connection usage bit info to overall info */ > - drvdata->config.trig_in_use |= tc->con_in->used_mask; > - drvdata->config.trig_out_use |= tc->con_out->used_mask; > + bitmap_or(drvdata->config.trig_in_use, drvdata->config.trig_in_use, > + tc->con_in->used_mask, drvdata->config.nr_trig_max); > + bitmap_or(drvdata->config.trig_out_use, drvdata->config.trig_out_use, > + tc->con_out->used_mask, drvdata->config.nr_trig_max); > > return 0; > } > @@ -231,6 +259,14 @@ struct cti_trig_con *cti_allocate_trig_con(struct device *dev, int in_sigs, > { > struct cti_trig_con *tc = NULL; > struct cti_trig_grp *in = NULL, *out = NULL; > + struct cti_drvdata *drvdata = dev_get_drvdata(dev); > + int n_trigs = drvdata->config.nr_trig_max; > + > + if (in_sigs > n_trigs || out_sigs > n_trigs) { > + dev_err(dev, "trigger signal is out of range: in=%d out=%d nr_max=%d\n", > + in_sigs, out_sigs, n_trigs); > + return NULL; > + } > > tc = devm_kzalloc(dev, sizeof(struct cti_trig_con), GFP_KERNEL); > if (!tc) > @@ -242,12 +278,20 @@ struct cti_trig_con *cti_allocate_trig_con(struct device *dev, int in_sigs, > if (!in) > return NULL; > > + in->used_mask = devm_bitmap_zalloc(dev, n_trigs, GFP_KERNEL); > + if (!in->used_mask) > + return NULL; > + > out = devm_kzalloc(dev, > offsetof(struct cti_trig_grp, sig_types[out_sigs]), > GFP_KERNEL); > if (!out) > return NULL; > > + out->used_mask = devm_bitmap_zalloc(dev, n_trigs, GFP_KERNEL); > + if (!out->used_mask) > + return NULL; > + > tc->con_in = in; > tc->con_out = out; > tc->con_in->nr_sigs = in_sigs; > @@ -263,7 +307,6 @@ int cti_add_default_connection(struct device *dev, struct cti_drvdata *drvdata) > { > int ret = 0; > int n_trigs = drvdata->config.nr_trig_max; > - u32 n_trig_mask = GENMASK(n_trigs - 1, 0); > struct cti_trig_con *tc = NULL; > > /* > @@ -274,8 +317,8 @@ int cti_add_default_connection(struct device *dev, struct cti_drvdata *drvdata) > if (!tc) > return -ENOMEM; > > - tc->con_in->used_mask = n_trig_mask; > - tc->con_out->used_mask = n_trig_mask; > + bitmap_fill(tc->con_in->used_mask, n_trigs); > + bitmap_fill(tc->con_out->used_mask, n_trigs); > ret = cti_add_connection_entry(dev, drvdata, tc, NULL, "default"); > return ret; > } > @@ -288,7 +331,6 @@ int cti_channel_trig_op(struct device *dev, enum cti_chan_op op, > { > struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); > struct cti_config *config = &drvdata->config; > - u32 trig_bitmask; > u32 chan_bitmask; > u32 reg_value; > int reg_offset; > @@ -298,18 +340,16 @@ int cti_channel_trig_op(struct device *dev, enum cti_chan_op op, > (trigger_idx >= config->nr_trig_max)) > return -EINVAL; > > - trig_bitmask = BIT(trigger_idx); > - > /* ensure registered triggers and not out filtered */ > if (direction == CTI_TRIG_IN) { > - if (!(trig_bitmask & config->trig_in_use)) > + if (!(test_bit(trigger_idx, config->trig_in_use))) > return -EINVAL; > } else { > - if (!(trig_bitmask & config->trig_out_use)) > + if (!(test_bit(trigger_idx, config->trig_out_use))) > return -EINVAL; > > if ((config->trig_filter_enable) && > - (config->trig_out_filter & trig_bitmask)) > + test_bit(trigger_idx, config->trig_out_filter)) > return -EINVAL; > } > > @@ -687,7 +727,9 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) > raw_spin_lock_init(&drvdata->spinlock); > > /* initialise CTI driver config values */ > - cti_set_default_config(dev, drvdata); > + ret = cti_set_default_config(dev, drvdata); > + if (ret) > + return ret; > > pdata = coresight_cti_get_platform_data(dev); > if (IS_ERR(pdata)) { > diff --git a/drivers/hwtracing/coresight/coresight-cti-platform.c b/drivers/hwtracing/coresight/coresight-cti-platform.c > index d6d5388705c3..ba5a7e4b6bff 100644 > --- a/drivers/hwtracing/coresight/coresight-cti-platform.c > +++ b/drivers/hwtracing/coresight/coresight-cti-platform.c > @@ -136,8 +136,8 @@ static int cti_plat_create_v8_etm_connection(struct device *dev, > goto create_v8_etm_out; > > /* build connection data */ > - tc->con_in->used_mask = 0xF0; /* sigs <4,5,6,7> */ > - tc->con_out->used_mask = 0xF0; /* sigs <4,5,6,7> */ > + bitmap_set(tc->con_in->used_mask, 4, 4); /* sigs <4,5,6,7> */ > + bitmap_set(tc->con_out->used_mask, 4, 4); /* sigs <4,5,6,7> */ > > /* > * The EXTOUT type signals from the ETM are connected to a set of input > @@ -194,10 +194,10 @@ static int cti_plat_create_v8_connections(struct device *dev, > goto of_create_v8_out; > > /* Set the v8 PE CTI connection data */ > - tc->con_in->used_mask = 0x3; /* sigs <0 1> */ > + bitmap_set(tc->con_in->used_mask, 0, 2); /* sigs <0 1> */ > tc->con_in->sig_types[0] = PE_DBGTRIGGER; > tc->con_in->sig_types[1] = PE_PMUIRQ; > - tc->con_out->used_mask = 0x7; /* sigs <0 1 2 > */ > + bitmap_set(tc->con_out->used_mask, 0, 3); /* sigs <0 1 2 > */ > tc->con_out->sig_types[0] = PE_EDBGREQ; > tc->con_out->sig_types[1] = PE_DBGRESTART; > tc->con_out->sig_types[2] = PE_CTIIRQ; > @@ -213,7 +213,7 @@ static int cti_plat_create_v8_connections(struct device *dev, > goto of_create_v8_out; > > /* filter pe_edbgreq - PE trigout sig <0> */ > - drvdata->config.trig_out_filter |= 0x1; > + set_bit(0, drvdata->config.trig_out_filter); > > of_create_v8_out: > return ret; > @@ -257,7 +257,7 @@ static int cti_plat_read_trig_group(struct cti_trig_grp *tgrp, > if (!err) { > /* set the signal usage mask */ > for (idx = 0; idx < tgrp->nr_sigs; idx++) > - tgrp->used_mask |= BIT(values[idx]); > + set_bit(values[idx], tgrp->used_mask); > } > > kfree(values); > @@ -316,24 +316,34 @@ static int cti_plat_process_filter_sigs(struct cti_drvdata *drvdata, > { > struct cti_trig_grp *tg = NULL; > int err = 0, nr_filter_sigs; > + int nr_trigs = drvdata->config.nr_trig_max; > > nr_filter_sigs = cti_plat_count_sig_elements(fwnode, > CTI_DT_FILTER_OUT_SIGS); > if (nr_filter_sigs == 0) > return 0; > > - if (nr_filter_sigs > drvdata->config.nr_trig_max) > + if (nr_filter_sigs > nr_trigs) > return -EINVAL; > > tg = kzalloc_obj(*tg); > if (!tg) > return -ENOMEM; > > + tg->used_mask = bitmap_zalloc(nr_trigs, GFP_KERNEL); > + if (!tg->used_mask) { > + kfree(tg); > + return -ENOMEM; > + } > + > tg->nr_sigs = nr_filter_sigs; > err = cti_plat_read_trig_group(tg, fwnode, CTI_DT_FILTER_OUT_SIGS); > if (!err) > - drvdata->config.trig_out_filter |= tg->used_mask; > + bitmap_or(drvdata->config.trig_out_filter, > + drvdata->config.trig_out_filter, > + tg->used_mask, nr_trigs); > > + bitmap_free(tg->used_mask); > kfree(tg); > return err; > } > diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hwtracing/coresight/coresight-cti-sysfs.c > index 3fe2c916d228..2bbfa405cb6b 100644 > --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c > +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c > @@ -719,12 +719,12 @@ static ssize_t trigout_filtered_show(struct device *dev, > struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); > struct cti_config *cfg = &drvdata->config; > int nr_trig_max = cfg->nr_trig_max; > - unsigned long mask = cfg->trig_out_filter; > + unsigned long *mask = cfg->trig_out_filter; > > - if (mask == 0) > + if (bitmap_empty(mask, nr_trig_max)) > return 0; > > - return sysfs_emit(buf, "%*pbl\n", nr_trig_max, &mask); > + return sysfs_emit(buf, "%*pbl\n", nr_trig_max, mask); > } > static DEVICE_ATTR_RO(trigout_filtered); > > @@ -931,9 +931,9 @@ static ssize_t trigin_sig_show(struct device *dev, > struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var; > struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); > struct cti_config *cfg = &drvdata->config; > - unsigned long mask = con->con_in->used_mask; > + unsigned long *mask = con->con_in->used_mask; > > - return sysfs_emit(buf, "%*pbl\n", cfg->nr_trig_max, &mask); > + return sysfs_emit(buf, "%*pbl\n", cfg->nr_trig_max, mask); > } > > static ssize_t trigout_sig_show(struct device *dev, > @@ -945,9 +945,9 @@ static ssize_t trigout_sig_show(struct device *dev, > struct cti_trig_con *con = (struct cti_trig_con *)ext_attr->var; > struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent); > struct cti_config *cfg = &drvdata->config; > - unsigned long mask = con->con_out->used_mask; > + unsigned long *mask = con->con_out->used_mask; > > - return sysfs_emit(buf, "%*pbl\n", cfg->nr_trig_max, &mask); > + return sysfs_emit(buf, "%*pbl\n", cfg->nr_trig_max, mask); > } > > /* convert a sig type id to a name */ > diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracing/coresight/coresight-cti.h > index c5f9e79fabc6..ef079fc18b72 100644 > --- a/drivers/hwtracing/coresight/coresight-cti.h > +++ b/drivers/hwtracing/coresight/coresight-cti.h > @@ -68,7 +68,7 @@ struct fwnode_handle; > */ > struct cti_trig_grp { > int nr_sigs; > - u32 used_mask; > + unsigned long *used_mask; > int sig_types[]; > }; > > @@ -145,17 +145,17 @@ struct cti_config { > int enable_req_count; > > /* registered triggers and filtering */ > - u32 trig_in_use; > - u32 trig_out_use; > - u32 trig_out_filter; > + unsigned long *trig_in_use; > + unsigned long *trig_out_use; > + unsigned long *trig_out_filter; > bool trig_filter_enable; > u8 xtrig_rchan_sel; > > /* cti cross trig programmable regs */ > u32 ctiappset; > u8 ctiinout_sel; > - u32 ctiinen[CTIINOUTEN_MAX]; > - u32 ctiouten[CTIINOUTEN_MAX]; > + u32 *ctiinen; > + u32 *ctiouten; > u32 ctigate; > u32 asicctl; > }; >

1 month

Re: [PATCH v10 5/5] coresight: cti: document banked and missing base CTI sysfs registers

by Mike Leach

Reviewed-by: Mike Leach <mike.leach(a)arm.com> On 6/15/26 13:32, Yingchao Deng wrote: > Document the new sysfs entries triginstatus[1-3], trigoutstatus[1-3], > ittrigin[1-3], ittrigout[1-3], ittrigoutack[1-3] and ittriginack[1-3] > in the coresight-cti ABI documentation. > > Also document the previously undocumented base integration test > registers itctrl, itchin, itchinack, ittrigin, ittriginack, itchout, > itchoutack, ittrigout and ittrigoutack, which were introduced in > kernel version 5.7. > > Signed-off-by: Yingchao Deng <yingchao.deng(a)oss.qualcomm.com> > --- > .../ABI/testing/sysfs-bus-coresight-devices-cti | 90 ++++++++++++++++++++++ > 1 file changed, 90 insertions(+) > > diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti > index a2aef7f5a6d7..9d7831ac455b 100644 > --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti > +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-cti > @@ -128,12 +128,102 @@ KernelVersion: 5.7 > Contact: Mike Leach or Mathieu Poirier > Description: (Read) read current status of input trigger signals > > +What: /sys/bus/coresight/devices/<cti-name>/regs/triginstatus[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (Read) read current status of QCOM extended input trigger signals. > + > What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus > Date: March 2020 > KernelVersion: 5.7 > Contact: Mike Leach or Mathieu Poirier > Description: (Read) read current status of output trigger signals. > > +What: /sys/bus/coresight/devices/<cti-name>/regs/trigoutstatus[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (Read) read current status of QCOM extended output trigger signals. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/itctrl > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (RW) Control integration mode. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/itchin > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Read) Read the values of the CTCHIN inputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/itchinack > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Write) Write the value of the CTCHINACK input. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigin > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Read) Read the values of the CTTRIGIN inputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigin[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (Read) Read the values of the QCOM extended CTTRIGIN inputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittriginack > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Write) Write the value of the CTTRIGINACK input. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittriginack[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (Write) Write the value of the QCOM extended CTTRIGINACK input. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/itchout > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (RW) Read or write the value of the CTCHOUT outputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/itchoutack > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Read) Read the value of the CTCHOUTACK input. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigout > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (RW) Read or write the value of the CTTRIGOUT outputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigout[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (RW) Read or write the value of the QCOM extended CTTRIGOUT outputs. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigoutack > +Date: March 2020 > +KernelVersion: 5.7 > +Contact: coresight(a)lists.linaro.org > +Description: (Read) Read the value of the CTTRIGOUTACK input. > + > +What: /sys/bus/coresight/devices/<cti-name>/regs/ittrigoutack[1-3] > +Date: June 2026 > +KernelVersion: 7.3 > +Contact: Jinlong Mao <jinlong.mao(a)oss.qualcomm.com> > +Description: (Read) Read the value of the QCOM extended CTTRIGOUTACK input. > + > What: /sys/bus/coresight/devices/<cti-name>/channels/trigin_attach > Date: March 2020 > KernelVersion: 5.7 >

1 month

[PATCH v4 0/1] coresight: fix issue with insufficient claim tags

by Mike Leach

All CoreSight compliant components have an implementation defined number of 0 to 8 claim tag bits in the claim tag registers. These are used to claim the CoreSight resources by system agents. ARM recommends implementions have 4 claim tag bits, though a valid implementation can have 0 claim tags bits. The CoreSight drivers implement a 2 claim tag bit protocol to allow self hosted and external debug agents to manage access to the hardware. However, if there are less than 2 claim tags available the protocol incorrectly returns an error on device claim, as no checks are made. If insufficient claim tags are present in a component then the protocol must return success on claim / disclaim to allow components to be used normally. Add initialisation to read the CLAIMSET bits to establish the number of available claim tag bits, and adjust the claim returns accordingly. Cache the claimtag protocol availablity in the coresight_device to reduce reads for the main claim/disclaim api. changes since v3: 1) removed unneeded bool casts (Leo) 2) rebased to kernel 7.2 on coresight/next changes since v2: 1) consolidated API to remove the API calls using just cs_access, which were used purely to clear down stale self claim tags, replace with a normal coresight_device API for initialisation, to match the claim/disclaim API. This does both the check on availability and the stale tag clearance. Updated all drivers to use the new init functionality 2) Added option for drivers to skip claim tag checking completely for devices with no-compliant hardware, that do not implement registers at the claim tag location, or do not operate correctly to indicate the correct number of claim tags for the device. changes since v1: 1) Added claim tag availability cache into coresight_device when using the main coresight_claim_device() / coresight_disclaim_device() API. Applies to coresight/next Mike Leach (1): coresight: fix issue where coresight component has no claimtags drivers/hwtracing/coresight/coresight-catu.c | 6 +- drivers/hwtracing/coresight/coresight-core.c | 139 ++++++++++++++++-- .../hwtracing/coresight/coresight-cti-core.c | 7 +- drivers/hwtracing/coresight/coresight-etb10.c | 9 +- .../coresight/coresight-etm3x-core.c | 8 +- .../coresight/coresight-etm4x-core.c | 8 +- .../hwtracing/coresight/coresight-funnel.c | 7 +- drivers/hwtracing/coresight/coresight-priv.h | 7 + .../coresight/coresight-replicator.c | 9 +- .../hwtracing/coresight/coresight-tmc-core.c | 7 +- include/linux/coresight.h | 23 ++- 11 files changed, 205 insertions(+), 25 deletions(-) -- 2.43.0

1 month

Re: [PATCH] coresight: syscfg: fix deadlock on device registration failure

by Leo Yan

On Wed, Sep 09, 2026 at 09:34:07AM +0800, yingchao deng wrote: [...] > I'll send v2 with your suggested change. Thanks a lot!

1 month

Re: [PATCH] coresight: Fix clock refcount imbalance on platform probe failure

by Leo Yan

Hi Jie, Thanks for fixing! It is shame that my single patch caused issues both in driver's probe and remove - I have to admit that I don't understand runtime PM's state machine. TBC, this patch only fixes probe. The driver's remove is fixed in: https://lore.kernel.org/linux-arm-kernel/20260710-fix-clock-refcount-unbala… The series above and this patch should be picked up together so can have complete fix. > The probe wrapper then unconditionally calls pm_runtime_put() > regardless of whether the inner probe succeeded, so on failure this > also fires runtime_suspend() and disables the same clocks a first > time. pm_runtime_put() can be used for success case, but for the failure case, we should disable the runtime PM but not release reference: https://docs.kernel.org/power/runtime_pm.html#runtime-pm-initialization-dev… > @@ -632,11 +632,14 @@ static int catu_platform_probe(struct platform_device *pdev) > pm_runtime_enable(&pdev->dev); > > ret = __catu_probe(&pdev->dev, res); > - pm_runtime_put(&pdev->dev); > - if (ret) > + if (ret) { > + pm_runtime_put_noidle(&pdev->dev); > pm_runtime_disable(&pdev->dev); Nitpick: please reverse the sequence between pm_runtime_put_noidle() and pm_runtime_disable(). As we need to first disable runtime PM for the device, then release usage reference. Since the driver core will reset device's active state, AI told me that calling pm_runtime_set_suspended() is redundant. It is still good to explicitly call it for bookkeeping. This can be aligned with the change in driver remove. Thus, please update the flow: pm_runtime_disable(&pdev->dev); pm_runtime_set_suspended(dev); pm_runtime_put_noidle(&pdev->dev); With the update: Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 month

Re: [PATCH] coresight: tpdm: initialize spinlock before exposing sysfs

by Leo Yan

On Tue, Aug 25, 2026 at 10:06:47AM +0800, yingchao wrote: > From: Yingchao Deng <dengyingchao(a)kylinsec.com.cn> > > tpdm_probe() initializes drvdata->spinlock after coresight_register(), but > the sysfs attributes registered by coresight_register() use the spinlock. > This exposes a window where a concurrent sysfs write can lock an > uninitialized spinlock. > > Initialize the spinlock before coresight_register(). > > Fixes: b3c71626a933 ("Coresight: Add coresight TPDM source driver") > Signed-off-by: Yingchao Deng <dengyingchao(a)kylinsec.com.cn> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 month

Re: [PATCH] coresight: syscfg: fix deadlock on device registration failure

by Leo Yan

On Tue, Aug 25, 2026 at 09:47:17AM +0800, yingchao wrote: > diff --git a/drivers/hwtracing/coresight/coresight-syscfg.c b/drivers/hwtracing/coresight/coresight-syscfg.c > index 2bfdd7b45e49..d0e7e4720e46 100644 > --- a/drivers/hwtracing/coresight/coresight-syscfg.c > +++ b/drivers/hwtracing/coresight/coresight-syscfg.c > @@ -1210,8 +1210,14 @@ static int cscfg_create_device(void) > dev->init_name = "cs_system_cfg"; > > err = device_register(dev); > - if (err) > + if (err) { > + /* put_device() triggers cscfg_dev_release() which takes > + * cscfg_mutex, so drop the lock first to avoid deadlocking. > + */ > + mutex_unlock(&cscfg_mutex); > put_device(dev); > + return err; > + } As module init and exit are serialized by the kernel, I don't think we need the mutex to protect the allocation and freeing of cscfg_mgr. The mutex should only be used for exclusively access cscfg_mgr. So how about the change below? ---8<--- diff --git a/drivers/hwtracing/coresight/coresight-syscfg.c b/drivers/hwtracing/coresight/coresight-syscfg.c index 2bfdd7b45e49..2dd0b29f44e4 100644 --- a/drivers/hwtracing/coresight/coresight-syscfg.c +++ b/drivers/hwtracing/coresight/coresight-syscfg.c @@ -1173,27 +1173,21 @@ struct device *cscfg_device(void) /* Must have a release function or the kernel will complain on module unload */ static void cscfg_dev_release(struct device *dev) { - mutex_lock(&cscfg_mutex); kfree(cscfg_mgr); cscfg_mgr = NULL; - mutex_unlock(&cscfg_mutex); } /* a device is needed to "own" some kernel elements such as sysfs entries. */ static int cscfg_create_device(void) { struct device *dev; - int err = -ENOMEM; - - mutex_lock(&cscfg_mutex); - if (cscfg_mgr) { - err = -EINVAL; - goto create_dev_exit_unlock; - } + int err; cscfg_mgr = kzalloc_obj(struct cscfg_manager); if (!cscfg_mgr) - goto create_dev_exit_unlock; + return -ENOMEM; + + mutex_lock(&cscfg_mutex); /* initialise the cscfg_mgr structure */ INIT_LIST_HEAD(&cscfg_mgr->csdev_desc_list); @@ -1204,6 +1198,8 @@ static int cscfg_create_device(void) cscfg_mgr->load_state = CSCFG_NONE; raw_spin_lock_init(&cscfg_mgr->sysfs_store_lock); + mutex_unlock(&cscfg_mutex); + /* setup the device */ dev = cscfg_device(); dev->release = cscfg_dev_release; @@ -1213,8 +1209,6 @@ static int cscfg_create_device(void) if (err) put_device(dev); -create_dev_exit_unlock: - mutex_unlock(&cscfg_mutex); return err; }

1 month

Re: [PATCH] coresight: fix typos in comments

by Leo Yan

On Fri, Sep 04, 2026 at 04:40:51PM +0530, Hemanth Selam wrote: > Fix typos in comments, reported by scripts/checkpatch.pl using the > misspelling list in scripts/spelling.txt. Only touches comments, no code > changes. > > Assisted-by: Cursor:claude-opus-5 > Signed-off-by: Hemanth Selam <hemanth.selam(a)gmail.com> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 month, 1 week

Re: [PATCH] docs: fix typos in Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x

by Leo Yan

On Fri, Sep 04, 2026 at 09:49:42AM +0530, tspamiitesh(a)gmail.com wrote: [...] > -Description: (RW) Enable/disable tracing on this specific trace entiry. > +Description: (RW) Enable/disable tracing on this specific trace entry. > Enabling a source implies the source has been configured > - properly and a sink has been identidifed for it. The path > + properly and a sink has been indentified for it. The path s/indentified/identified ?

1 month, 1 week

Re: [PATCH v2] coresight: tnoc: fix trace ID path assignment failure on non-AMBA tnoc

by Leo Yan

On Wed, Sep 02, 2026 at 05:41:43PM +0800, Jie Gan wrote: > For a tnoc device not on the AMBA bus, atid was set to -EOPNOTSUPP. > trace_noc_id() returns this value directly to > coresight_path_assign_trace_id(), which only treats a literal 0 > return as "this device has no ID, keep searching the path" - > any other value is checked against IS_VALID_CS_TRACE_ID() and > rejected. A negative atid therefore made path assignment fail with > -EINVAL instead of falling through to the next device in the path > that could supply a valid trace ID. > > Use 0, the same sentinel coresight_path_assign_trace_id() already > recognizes as "not allocated", instead of -EOPNOTSUPP. > > Fixes: 5799dee92dc2 ("coresight-tnoc: add platform driver to support Interconnect TNOC") > Signed-off-by: Jie Gan <jie.gan(a)oss.qualcomm.com> Reviewed-by: Leo Yan <leo.yan(a)arm.com>

1 month, 1 week

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