CoreSight

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[PATCH] coresight: Fix disabling of CoreSight TPIU

by Robert Walker

The CoreSight TPIU should be disabled when tracing to other sinks to allow them to operate at full bandwidth. This patch fixes tpiu_disable_hw() to correctly disable the TPIU by configuring the TPIU to stop on flush, initiating a manual flush, waiting for the flush to complete and then waits for the TPIU to indicate it has stopped. Signed-off-by: Robert Walker <robert.walker(a)arm.com> --- drivers/hwtracing/coresight/coresight-tpiu.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index bef49a3..4b46c49 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -46,8 +46,11 @@ #define TPIU_ITATBCTR0 0xef8 /** register definition **/ +/* FFSR - 0x300 */ +#define FFSR_FT_STOPPED BIT(1) /* FFCR - 0x304 */ #define FFCR_FON_MAN BIT(6) +#define FFCR_STOP_FI BIT(12) /** * @base: memory mapped base address for this component. @@ -85,10 +88,14 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) { CS_UNLOCK(drvdata->base); - /* Clear formatter controle reg. */ - writel_relaxed(0x0, drvdata->base + TPIU_FFCR); + /* Clear formatter and stop on flush */ + writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR); /* Generate manual flush */ - writel_relaxed(FFCR_FON_MAN, drvdata->base + TPIU_FFCR); + writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); + /* Wait for flush to complete */ + coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN, 0); + /* Wait for formatter to stop */ + coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED, 1); CS_LOCK(drvdata->base); } -- 1.9.1

7 years, 6 months

[PATCH v2 0/4] coresight: support panic dump functionality

by Leo Yan

### Introduction ### Embedded Trace Buffer (ETB) provides on-chip storage of trace data, usually has buffer size from 2KB to 8KB. These data has been used for profiling and this has been well implemented in coresight driver. This patch set is to explore ETB RAM data for postmortem debugging. We could consider ETB RAM data is quite useful for postmortem debugging, especially if the hardware design with local ETB buffer (ARM DDI 0461B) chapter 1.2.7. 'Local ETF', with this kind design every CPU has one dedicated ETB RAM. So it's quite handy that we can use alive CPU to help dump the hang CPU ETB RAM. Then we can quickly get to know what's the exact execution flow before its hang. Due ETB RAM buffer has small size, if all CPUs shared one ETB buffer then the trace data for causing error is easily to be overwritten by other PEs; but even so sometimes we still have chance to go through the trace data to assist debugging panic issues. ### Implementation ### Firstly we need provide a unified APIs for panic dump functionality, so it can be easily extended to enable panic dump for multiple drivers. This is finished by patch 0001, it registers panic notifier, and provide the general APIs {coresight_dump_add|coresight_dump_del} as helper functions so any coresight device can add into dump list or delete itself as needed. Generally coresight devices can add itself into panic dump when registration, if the coresight device wants to do dump it will set its 'panic_cb' in the ops structure. So patch 0002 is to add and delete panic dump node for devices. Patch 0003 and 0004 are to add panic callback functions for tmc and etm4x drivers; so tmc dirver can save specific trace data for ETB/ETF when panic happens, and etm4x driver can save metadata for offline analysis. ### Usage ### Below are the example for how to use panic dump functionality on 96boards Hikey, the brief flow is: when the panic happens the ETB panic callback function saves trace data into memory, then relies on kdump to use recovery kernel to save DDR content as kernel core dump file; after we transfer kernel core dump file from board to host PC, use 'crash' tool + extension program to extract trace data and generate 'perf' format compatible file. - Enable tracing on Hikey; in theory there have two methods to enable tracing: The first method is to use sysfs interface to enable coresight tracing: echo 1 > /sys/bus/coresight/devices/f6402000.etf/enable_sink echo 1 > /sys/bus/coresight/devices/f659c000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f659d000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f659e000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f659f000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f65dc000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f65dd000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f65de000.etm/enable_source echo 1 > /sys/bus/coresight/devices/f65df000.etm/enable_source The second method is to use tool 'perf' with snapshot method, this command is expected to enable tracing and wait for specific event happen and capture the snapshot trace data, this method also can be smoothly used for panic dump. This command currently is failure on Hikey due now coresight only support '--per-thread' method with perf tool: ./perf record --snapshot -S8196 -e cs_etm/(a)f6402000.etf/ -- sleep 1000 & - Load recovery kernel for kdump: ARM64's kdump supports to use the same kernel image both for main kernel and dump-capture kernel; so we can simply to load dump-capture kernel with below command: ./kexec -p vmlinux --dtb=hi6220-hikey.dtb --append="root=/dev/mmcblk0p9 rw maxcpus=1 reset_devices earlycon=pl011,0xf7113000 nohlt initcall_debug console=tty0 console=ttyAMA3,115200 clk_ignore_unused" - Download kernel dump file: After kernel panic happens, the kdump launches dump-capture kernel; so we need save kernel's dump file on target: cp /proc/vmcore ./vmcore Finally we can copy 'vmcore' file onto PC. - Use 'crash' tool + csdump.so extension to extract trace data: After we download vmcore file from Hikey board to host PC, we can use 'crash' tool + csdump.so to generate 'perf.data' file: ./crash vmcore vmlinux crash> extend csdump.so crash> csdump output_dir We can see in the 'output_dir' there will generate out three files: output_dir/ ├── cstrace.bin -> trace raw data ├── metadata.bin -> meta data └── perf.data -> 'perf' format compatible file The source code of 'csdump.so' will be sent to mailing list sepeartely. - User 'perf' tool for offline analysis: On Hikey board: ./perf script -v -F cpu,event,ip -i perf_2.data -k vmlinux [001] instructions: ffff000008559ad0 [001] instructions: ffff000008559230 [001] instructions: ffff00000855924c [001] instructions: ffff000008559ae0 [001] instructions: ffff000008559ad0 [001] instructions: ffff000008559230 [001] instructions: ffff00000855924c [001] instructions: ffff000008559ae0 [001] instructions: ffff000008559ad0 Changes from v1: * Add support to dump ETMv4 meta data. * Wrote 'crash' extension csdump.so so rely on it to generate 'perf' format compatible file. * Refactored panic dump driver to support pre & post panic dump. Changes from RFC: * Follow Mathieu's suggestion, use general framework to support dump functionality. * Changed to use perf to analyse trace data. Leo Yan (4): coresight: Support panic dump functionality coresight: Add and delete dump node for registration/unregistration coresight: tmc: Hook panic dump callback for ETB/ETF coresight: etm4x: Hook panic dump callback for etmv4 drivers/hwtracing/coresight/Kconfig | 9 + drivers/hwtracing/coresight/Makefile | 1 + drivers/hwtracing/coresight/coresight-etm4x.c | 22 +++ drivers/hwtracing/coresight/coresight-etm4x.h | 15 ++ drivers/hwtracing/coresight/coresight-panic-dump.c | 211 +++++++++++++++++++++ drivers/hwtracing/coresight/coresight-priv.h | 17 ++ drivers/hwtracing/coresight/coresight-tmc-etf.c | 29 +++ drivers/hwtracing/coresight/coresight.c | 7 + include/linux/coresight.h | 7 + 9 files changed, 318 insertions(+) create mode 100644 drivers/hwtracing/coresight/coresight-panic-dump.c -- 2.7.4

7 years, 7 months

[PATCH 0/2] perf inject branch stack fixes

by Robert Walker

These patches fix some issues with the branch stacks generated from CoreSight ETM trace. The main issues addressed are: - The branch stack should only contain taken branches. - The instruction samples are generated using the period specified by the --itrace option to perf inject. Currently, the period can only be specified as an instruction count - further work is required to specify the period as a cycle count or time interval. - The ordering of the branch stack should have newest branch first. - Some minor fixes to the address calculations. With these fixes, the branch stacks are more similar to the last branch records produced by 'perf record -b' and Intel-PT on x86. There are similar improvements in the autofdo profiles generated from these traces. The patches apply to the autoFDO branch of https://github.com/Linaro/perf-opencsd.git (d3fa0f7) Regards Robert Walker Robert Walker (2): Revert "perf inject: record branches in chronological order" perf: Fix branch stack records from CoreSight ETM decode tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 4 +- tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 2 +- tools/perf/util/cs-etm.c | 134 +++++++++++++----------- 3 files changed, 73 insertions(+), 67 deletions(-) -- 1.9.1

7 years, 7 months

[PATCH RFCv1] Crash: Extensions: Coresight panic dump

by Leo Yan

This commit is to add support Coresight panic dump, it uses coresight dump list head pointer to iterate coresight devices; if the device is etm device then use the dump as meta data and use etf device as trace data. It also generates 'perf' format compatible file so the trace data can be analyzed by 'perf' tool. This initial version has limitation: - It can only generate data for etm and etf; haven't verified for other coresight topology; - It can only support etm/etf for N:1 relationship, haven't verified for the device with multiple sink devices. The building and usage are simple, for building can place csdump.c file into 'extensions' folder, then use 'make extensions' to build code, we can get one file name csdump.so. Then we can use csdump.so in 'crash' tool to extract trace files: crash> extend csdump.so crash> csdump trace_out_dir Can use 'extend -u' command to unload the module: crash> extend -u csdump.so Signed-off-by: Leo Yan <leo.yan(a)linaro.org> --- extensions/csdump.c | 547 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 547 insertions(+) create mode 100644 extensions/csdump.c diff --git a/extensions/csdump.c b/extensions/csdump.c new file mode 100644 index 0000000..c657378 --- /dev/null +++ b/extensions/csdump.c @@ -0,0 +1,547 @@ +/* + * Extension module to dump log buffer of ARM Coresight Trace + * + * Copyright (C) 2017 Linaro Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define _GNU_SOURCE +#include <sys/file.h> + +#include "defs.h" + +static unsigned int perf_header[] = { + 0x46524550, 0x32454c49, /* Magic: PERFILE2 */ + 0x00000068, 0x00000000, /* header size */ + 0x00000080, 0x00000000, /* attr size */ + 0x00000078, 0x00000000, /* attrs offset */ + 0x00000100, 0x00000000, /* attrs size */ + 0x00000178, 0x00000000, /* data offset */ + 0x00002568, 0x00000000, /* data size */ + 0x00000000, 0x00000000, /* event offset */ + 0x00000000, 0x00000000, /* event size */ + 0x00040004, 0x00000000, /* feature bitmap */ + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000 +}; + +static unsigned int perf_event_id[] = { + 0x00000015, 0x00000000, + 0x00000016, 0x00000000, +}; + +static unsigned int perf_event_cs_etm[] = { + 0x00000006, 0x00000070, /* event type: 6, size: 0x70 */ + 0x00000000, 0x00000000, /* config: 0 */ + 0x00000001, 0x00000000, /* sample_period: 1 */ + 0x00010003, 0x00000000, /* sample_type: PERF_SAMPLE_IP | PERF_SAMPLE_TID | + PERF_SAMPLE_PERIOD */ + 0x00000004, 0x00000000, /* read_format: PERF_FORMAT_ID */ + 0x00141001, 0x00000000, /* disabled: 1, enable_on_exec: 1, + sample_id_all: 1, exclude_guest: 1 */ + 0x00000000, 0x00000000, /* wakeup_events: 0, bp_type: 0 */ + 0x00000000, 0x00000000, /* config1 : 0 */ + 0x00000000, 0x00000000, /* config1 : 0 */ + 0x00000000, 0x00000000, /* branch_sample_type: 0 */ + 0x00000000, 0x00000000, /* sample_regs_user: 0 */ + 0x00000000, 0x00000000, /* sample_stack_user: 0, clockid: 0 */ + 0x00000000, 0x00000000, /* sample_regs_intr: 0 */ + 0x00000000, 0x00000000, /* aux_watermark: 0, sample_max_stack: 0 */ + 0x00000068, 0x00000000, /* ids.offset: 0x68 */ + 0x00000008, 0x00000000, /* ids.size: 0x8 */ +}; + +static unsigned int perf_event_dummy[] = { + 0x00000001, 0x00000070, /* event type: 1, size: 0x70 */ + 0x00000009, 0x00000000, /* config: 9 */ + 0x00000001, 0x00000000, /* sample_period: 1 */ + 0x00010003, 0x00000000, /* sample_type: PERF_SAMPLE_IP | PERF_SAMPLE_TID | + PERF_SAMPLE_PERIOD */ + 0x00000004, 0x00000000, /* read_format: PERF_FORMAT_ID */ + 0x01843361, 0x00000000, /* disabled: 1, exclude_kernel: 1 + exclude_hv: 1, mmap: 1, + comm: 1, enable_on_exec: 1, + task: 1, sample_id_all: 1, + mmap2: 1, comm_exec: 1 */ + 0x00000000, 0x00000000, /* wakeup_events: 0, bp_type: 0 */ + 0x00000000, 0x00000000, /* config1 : 0 */ + 0x00000000, 0x00000000, /* config1 : 0 */ + 0x00000000, 0x00000000, /* branch_sample_type: 0 */ + 0x00000000, 0x00000000, /* sample_regs_user: 0 */ + 0x00000000, 0x00000000, /* sample_stack_user: 0, clockid: 0 */ + 0x00000000, 0x00000000, /* sample_regs_intr: 0 */ + 0x00000000, 0x00000000, /* aux_watermark: 0, sample_max_stack: 0 */ + 0x00000070, 0x00000000, /* ids.offset: 0x70 */ + 0x00000008, 0x00000000, /* ids.size: 0x8 */ +}; + +static unsigned int perf_auxtrace_info[] = { + 0x00000046, 0x02680000, /* type: PERF_RECORD_AUXTRACE_INFO, size: 0x268 */ + 0x00000003, 0x00000000, /* info->type: PERF_AUXTRACE_CS_ETM */ + 0x00000000, 0x00000000, /* version: 0 */ + 0x00000008, 0x00000006, /* cpus: 8, type: 6 */ + 0x00000000, 0x00000000 /* snapshot_mode: 0 */ +}; + +static unsigned int perf_kernel_mmap[] = { + 0x00000001, 0x00500001, /* type: PERF_RECORD_MMAP, size: 0x50, + misc: PERF_RECORD_MISC_KERNEL */ + 0xffffffff, 0x00000000, /* pid: 0xffffffff, tid: 0x0 */ + 0x08080000, 0xffff0000, /* start: 0xffff000008080000 */ + 0xf7f7ffff, 0x0000ffff, /* len: 0x0000fffff7f7ffff */ + 0x08080000, 0xffff0000, /* pgoff: 0xffff000008080000 */ + 0x72656b5b, 0x2e6c656e, /* filename: [kernel.kallsyms]_text */ + 0x6c6c616b, 0x736d7973, + 0x65745f5d, 0x00007478, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, +}; + +static unsigned int perf_threads[] = { + 0x00000003, 0x00280000, /* type: PERF_RECORD_COMM, size: 0x28 */ + 0x0000090c, 0x0000090c, /* pid: 0x90c, tid: 0x90c */ + 0x66726570, 0x00000000, /* comm: perf */ + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + + 0x00000003, 0x00282000, /* type: PERF_RECORD_COMM, size: 0x28 */ + 0x0000090c, 0x0000090c, /* pid: 0x90c, tid: 0x90c */ + 0x696e6170, 0x00000063, /* comm: panic */ + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, + + 0x0000000a, 0x00680002, /* type: PERF_RECORD_MMAP2, size: 0x68 */ + 0x0000090c, 0x0000090c, /* pid: 0x90c, tid: 0x90c */ + 0x00400000, 0x00000000, /* addr: 0x00400000 */ + 0x00006000, 0x00000000, /* len: 0x00006000 */ + 0x00000000, 0x00000000, /* pgoff: 0x0 */ + 0x000000b3, 0x00000009, /* maj: 0xb3, min: 0x9 */ + 0x00000085, 0x00000000, /* ino: 0x85 */ + 0x00000000, 0x00000000, /* ino_generation: 0x0 */ + 0x00000005, 0x00001802, /* prot: PROT_READ | PROT_EXEC, flag: 0x1802 */ + 0x6e69622f, 0x616e752f, /* comm: /bin/uname */ + 0x0000656d, 0x00000000, + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, + + 0x0000000a, 0x00800002, + 0x0000090c, 0x0000090c, + 0xb77c2000, 0x0000ffff, + 0x0002e000, 0x00000000, + 0x00000000, 0x00000000, + 0x000000b3, 0x00000009, + 0x00000752, 0x00000000, + 0x00000000, 0x00000000, + 0x00000005, 0x00001802, + 0x62696c2f, 0x7261612f, /* ld-2.19.so */ + 0x34366863, 0x6e696c2d, + 0x672d7875, 0x6c2f756e, + 0x2e322d64, 0x732e3931, + 0x0000006f, 0x00000000, + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, + + 0x0000000a, 0x00600002, + 0x0000090c, 0x0000090c, + 0xb77ec000, 0x0000ffff, + 0x00001000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000005, 0x00001002, + 0x7364765b, 0x00005d6f, /* [vdso] */ + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, + + 0x0000000a, 0x00800002, + 0x0000090c, 0x0000090c, + 0xb7675000, 0x0000ffff, + 0x0014d000, 0x00000000, + 0x00000000, 0x00000000, + 0x000000b3, 0x00000009, + 0x0000076a, 0x00000000, + 0x00000000, 0x00000000, + 0x00000005, 0x00001002, + 0x62696c2f, 0x7261612f, /* /lib/aarch64-linux-gnu/libc-2.19.so */ + 0x34366863, 0x6e696c2d, + 0x672d7875, 0x6c2f756e, + 0x2d636269, 0x39312e32, + 0x006f732e, 0x00000000, + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, + + 0x0000000b, 0x00300000, /* type: PERF_RECORD_AUX, size: 0x30 */ + 0x00000000, 0x00000000, /* aux_offset: 0x0 */ + 0x00002000, 0x00000000, /* aux_size: 0x2000 */ + 0x00000001, 0x00000000, /* flag: 0x1 */ + 0x0000090c, 0x0000090c, + 0x00000015, 0x00000000, + + 0x00000004, 0x00300000, /* type: PERF_RECORD_EXIT, size: 0x30 */ + 0x0000090c, 0x0000090c, /* pid, ppid: 0x90c */ + 0x0000090c, 0x0000090c, /* tid, ptid: 0x90c */ + 0xf89cbddc, 0x00000571, + 0x0000090c, 0x0000090c, + 0x00000016, 0x00000000, +}; + +static unsigned int perf_auxtrace_snapshot[] = { + 0x00000047, 0x00300000, /* type: PERF_RECORD_AUXTRACE, size: 0x30 */ + 0x00002000, 0x00000000, /* auxsize: 0x2000 */ + 0x00000000, 0x00000000, /* auxoffset: 0x0 */ + 0x74bc6ab4, 0x5a1c47b3, /* reference: rand() */ + 0x00000000, 0x0000090c, /* idx: 0x0, pid: 0x90c */ + 0xffffffff, 0x00000000, /* cpu: -1 */ +}; + +static unsigned int perf_record_finish[] = { + 0x00000044, 0x00080000, +}; + +static unsigned int perf_sections[] = { + 0x00002760, 0x00000000, /* buildid section: start addr */ + 0x00000064, 0x00000000, /* buildid section: len */ + 0x000027c4, 0x00000000, /* auxtrace section: start addr */ + 0x00000018, 0x00000000, /* auxtrace section: len */ + 0x000027dc, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, +}; + +static unsigned int perf_sections_feat[] = { + 0x00000000, 0x00640001, + 0xffffffff, 0xc9b5ee32, + 0xa6009dc9, 0xcb21093d, + 0x23c315d8, 0x1067c385, + 0x00000000, 0x72656b5b, + 0x2e6c656e, 0x6c6c616b, + 0x736d7973, 0x0000005d, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, 0x00000000, + 0x00000000, + + 0x00000001, 0x00000000, + 0x000006a8, 0x00000000, + 0x00000030, 0x00000000, +}; + +#define koffset(struct, member) struct##_##member##_offset + +/* at = ((struct *)ptr)->member */ +#define read_value(at, ptr, struct, member) \ + do { \ + readmem(ptr + koffset(struct, member), KVADDR, \ + &at, sizeof(at), #struct "'s " #member, \ + RETURN_ON_ERROR); \ + } while (0) + + +#define init_offset(struct, member) do { \ + koffset(struct, member) = MEMBER_OFFSET(#struct, #member);\ + if (koffset(struct, member) < 0) { \ + fprintf(fp, "failed to init the offset, struct:"\ + #struct ", member:" #member); \ + fprintf(fp, "\n"); \ + return -1; \ + } \ + } while (0) + +static int koffset(coresight_dump_node, cpu); +static int koffset(coresight_dump_node, list); +static int koffset(coresight_dump_node, buf); +static int koffset(coresight_dump_node, buf_size); +static int koffset(coresight_dump_node, name); +static int koffset(coresight_dump_node, csdev); + +static int koffset(coresight_device, dev); +static int koffset(device, kobj); +static int koffset(kobject, name); + +static struct list_data list_data; +static int instance_count; +static int csdump_metadata_len = 0; + +static int csdump_write_buf(FILE *out_fp, char *component, int cpu_idx) +{ + ulong instance_ptr; + ulong field; + ulong buf_addr; + ulong csdev_addr; + ulong dev_addr; + ulong kobj_addr; + ulong name_addr; + int cpu, buf_sz, i, ret; + char name[64]; + char *buf; + + /* We start i at 1 to skip over the list_head and continue to the last + * instance, which lies at index instance_count */ + for (i = 1; i <= instance_count; i++) { + instance_ptr = list_data.list_ptr[i]; + + field = instance_ptr - koffset(coresight_dump_node, list); + + read_value(cpu, field, coresight_dump_node, cpu); + read_value(buf_addr, field, coresight_dump_node, buf); + read_value(buf_sz, field, coresight_dump_node, buf_size); + + read_value(csdev_addr, field, coresight_dump_node, csdev); + dev_addr = csdev_addr + koffset(coresight_device, dev); + kobj_addr = dev_addr + koffset(device, kobj); + + read_value(name_addr, kobj_addr, kobject, name); + read_string(name_addr, name, 64); + + if (!buf_sz) + continue; + + if (strstr(name, component) && (cpu == cpu_idx)) + break; + } + + if (i > instance_count) + return -1; + + buf = malloc(buf_sz); + readmem(buf_addr, KVADDR, buf, buf_sz, "read dump log buf", + FAULT_ON_ERROR); + + ret = fwrite(buf, buf_sz, 1, out_fp); + if (!ret) { + fprintf(fp, "[%d] Cannot write file\n", cpu); + free(buf); + return -1; + } + + free(buf); + + return buf_sz; +} + +static int csdump_metadata(void) +{ + FILE *out_fp; + int online_cpus, i; + + if ((out_fp = fopen("./metadata.bin", "w")) == NULL) { + fprintf(fp, "Cannot open file\n"); + return -1; + } + + online_cpus = get_cpus_online(); + for (i = 0; i < online_cpus; i++) { + fprintf(fp, "cpu = %d\n", i); + csdump_metadata_len += csdump_write_buf(out_fp, "etm", i); + } + + fclose(out_fp); + + return 0; +} + +static int csdump_tracedata(void) +{ + FILE *out_fp; + + if ((out_fp = fopen("./cstrace.bin", "w")) == NULL) { + fprintf(fp, "Cannot open file\n"); + return -1; + } + + csdump_write_buf(out_fp, "etf", 0); + + fclose(out_fp); + + return 0; +} + +static int csdump_perfdata(void) +{ + FILE *out_fp; + int online_cpus, i; + int trace_len = 0; + int pos, diff; + + if ((out_fp = fopen("./perf.data", "w")) == NULL) { + fprintf(fp, "Cannot open file\n"); + return -1; + } + + fwrite(perf_header, sizeof(perf_header), 1, out_fp); + fwrite(perf_event_id, sizeof(perf_event_id), 1, out_fp); + fwrite(perf_event_cs_etm, sizeof(perf_event_cs_etm), 1, out_fp); + fwrite(perf_event_dummy, sizeof(perf_event_dummy), 1, out_fp); + + online_cpus = get_cpus_online(); + + /* Adjust auxtrace_info size */ + perf_auxtrace_info[1] = (perf_auxtrace_info[1] & 0xffff) | + ((sizeof(perf_auxtrace_info) + csdump_metadata_len) << 16); + /* Adjust CPU num */ + perf_auxtrace_info[6] = online_cpus; + + fwrite(perf_auxtrace_info, sizeof(perf_auxtrace_info), 1, out_fp); + trace_len += sizeof(perf_auxtrace_info); + + for (i = 0; i < online_cpus; i++) { + fprintf(fp, "cpu = %d\n", i); + trace_len += csdump_write_buf(out_fp, "etm", i); + } + + fwrite(perf_kernel_mmap, sizeof(perf_kernel_mmap), 1, out_fp); + trace_len += sizeof(perf_kernel_mmap); + + fwrite(perf_threads, sizeof(perf_threads), 1, out_fp); + trace_len += sizeof(perf_threads); + + fwrite(perf_auxtrace_snapshot, sizeof(perf_auxtrace_snapshot), 1, out_fp); + trace_len += sizeof(perf_auxtrace_snapshot); + + trace_len += csdump_write_buf(out_fp, "etf", 0); + + fwrite(perf_record_finish, sizeof(perf_record_finish), 1, out_fp); + trace_len += sizeof(perf_record_finish); + + pos = ftell(out_fp); + pos += sizeof(perf_sections); + + diff = perf_sections[0] - pos; + + for (i = 0; i < sizeof(perf_sections) / 4; i += 4) { + if (!perf_sections[i]) + continue; + + perf_sections[i] = perf_sections[i] - diff; + } + + fwrite(perf_sections, sizeof(perf_sections), 1, out_fp); + fwrite(perf_sections_feat, sizeof(perf_sections_feat), 1, out_fp); + + fseek(out_fp, 48L, SEEK_SET); + fwrite(&trace_len, sizeof(trace_len), 1, out_fp); + + fclose(out_fp); + + return 0; +} + +static int csdump_prepare(void) +{ + struct syment *sym_dump_list; + struct kernel_list_head *cs_dump_list_head; + + init_offset(coresight_dump_node, cpu); + init_offset(coresight_dump_node, list); + init_offset(coresight_dump_node, buf); + init_offset(coresight_dump_node, buf_size); + init_offset(coresight_dump_node, name); + init_offset(coresight_dump_node, csdev); + + init_offset(coresight_device, dev); + init_offset(device, kobj); + init_offset(kobject, name); + + /* Get pointer to dump list */ + sym_dump_list = symbol_search("coresight_dump_list"); + if (!sym_dump_list) { + fprintf(fp, "symbol coresight_dump_list is not found\n"); + return -1; + } + + cs_dump_list_head = (void *)sym_dump_list->value; + fprintf(fp, "cs_dump_list_head = 0x%p\n", cs_dump_list_head); + + BZERO(&list_data, sizeof(struct list_data)); + list_data.start = (ulong)cs_dump_list_head; + list_data.end = (ulong)cs_dump_list_head; + list_data.flags = LIST_ALLOCATE; + instance_count = do_list(&list_data); + + /* + * The do_list count includes the list_head, which is not + * a proper instance so minus 1. + */ + instance_count--; + if (instance_count <= 0) + return -1; + + return 0; +} + +static void csdump_unprepare(void) +{ + FREEBUF(list_data.list_ptr); +} + +void cmd_csdump(void) +{ + char* outdir; + mode_t mode = S_IRUSR | S_IWUSR | S_IXUSR | + S_IRGRP | S_IXGRP | + S_IROTH | S_IXOTH; /* 0755 */ + int ret; + + if (argcnt != 2) + cmd_usage(pc->curcmd, SYNOPSIS); + + outdir = args[1]; + if ((ret = mkdir(outdir, mode))) { + fprintf(fp, "Cannot create directory %s: %d\n", outdir, ret); + return; + } + + if ((ret = chdir(outdir))) { + fprintf(fp, "Cannot chdir %s: %d\n", outdir, ret); + return; + } + + if (csdump_prepare()) + goto out; + + csdump_metadata(); + csdump_tracedata(); + csdump_perfdata(); + +out: + csdump_unprepare(); + chdir(".."); + return; +} + +char *help_csdump[] = { + "csdump", + "Dump log buffer of Coresight Trace", + "<output-dir>", + "This command extracts coresight log buffer to the directory", + "specified by <output-dir>", + NULL +}; + +static struct command_table_entry command_table[] = { + { "csdump", cmd_csdump, help_csdump, 0}, + { NULL }, +}; + +void __attribute__((constructor)) +csdump_init(void) +{ + register_extension(command_table); +} + +void __attribute__((destructor)) +csdump_fini(void) { } -- 2.7.4

7 years, 7 months

[PATCH 00/17] coresight: perf: TMC ETR backend support

by Suzuki K Poulose

The TMC-ETR supports routing the Coresight trace data to the System memory. It supports two different modes in which the memory could be used. 1) Contiguous memory - The memory is assumed to be physically contiguous. 2) Scatter Gather list - The memory can be chunks of 4K pages, which are specified in a table of pointers which itself could be multiple 4K size pages. To avoid the complications of the managing the buffer, this series adds a layer for managing the ETR buffer, which makes the best possibly choice based on what is available. The allocation can be tuned by passing in flags, existing pages (e.g, perf ring buffer) etc. Towards supporting ETR Scatter Gather mode, we introduce a generic TMC scatter-gather table which can be used to manage the data and table pages. The table can be filled in the format expected by the Scatter-Gather mode. The TMC ETR-SG mechanism doesn't allow starting the trace at non-zero offset (required by perf). So we make some tricky changes to the table at run time to allow starting at any "Page aligned" offset and then wrap around to the beginning of the buffer with very less overhead. See patches for more description. The series also improves the way the ETR is controlled by different modes (sysfs vs. perf) by keeping mode specific data. This allows access to the trace data collected in sysfs mode, even when the ETR is operated in perf mode. Also with the transparent management of the buffer and scatter-gather mechanism, we can allow the user to request for larger trace buffers for sysfs mode. This is supported by providing a sysfs file, "buffer_size" which accepts a page aligned size, which will be used by the ETR when allocating a buffer. Finally, it cleans up the etm perf sink callbacks a little bit and then adds the support for ETR sink. For the ETR, we try our best to use the perf ring buffer as the target hardware buffer, provided : 1) The ETR is dma coherent (since the pages will be shared with userspace perf tool). 2) The perf is used in snapshot mode (The ETR cannot be stopped based on the size of the data written hence we could easily overwrite the buffer. We may be able to fix this in the future) 3) The ETR supports the Scatter-Gather mode. If we can't use the perf buffers directly, we fallback to using software buffering where we have to copy the trace data back to the perf ring buffer. Suzuki K Poulose (17): coresight etr: Disallow perf mode temporarily coresight tmc: Hide trace buffer handling for file read coresight: Add helper for inserting synchronization packets coresight: Add generic TMC sg table framework coresight: Add support for TMC ETR SG unit coresight: tmc: Make ETR SG table circular coresight: tmc etr: Add transparent buffer management coresight: tmc: Add configuration support for trace buffer size coresight: Convert driver messages to dev_dbg coresight: etr: Track if the device is coherent coresight etr: Handle driver mode specific ETR buffers coresight etr: Relax collection of trace from sysfs mode coresight etr: Do not clean ETR trace buffer coresight: etr: Add support for save restore buffers coresight: etr_buf: Add helper for padding an area of trace data coresight: perf: Remove reset_buffer call back for sinks coresight perf: Add ETR backend support for etm-perf .../ABI/testing/sysfs-bus-coresight-devices-tmc | 8 + .../coresight/coresight-dynamic-replicator.c | 4 +- drivers/hwtracing/coresight/coresight-etb10.c | 72 +- drivers/hwtracing/coresight/coresight-etm-perf.c | 9 +- drivers/hwtracing/coresight/coresight-etm3x.c | 4 +- drivers/hwtracing/coresight/coresight-etm4x.c | 4 +- drivers/hwtracing/coresight/coresight-funnel.c | 4 +- drivers/hwtracing/coresight/coresight-priv.h | 8 + drivers/hwtracing/coresight/coresight-replicator.c | 4 +- drivers/hwtracing/coresight/coresight-stm.c | 4 +- drivers/hwtracing/coresight/coresight-tmc-etf.c | 109 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 1665 ++++++++++++++++++-- drivers/hwtracing/coresight/coresight-tmc.c | 75 +- drivers/hwtracing/coresight/coresight-tmc.h | 128 +- drivers/hwtracing/coresight/coresight-tpiu.c | 4 +- include/linux/coresight.h | 5 +- 16 files changed, 1837 insertions(+), 270 deletions(-) -- 2.13.6

7 years, 7 months

CoreSight/perf support on ZedBoard/Zynq-7000?

by Volker Stolz

Hi, I’ve recently acquired a ZedBoard with the Zynq-7000 SoC and was interested in finding out if I could use `perf` as described on https://github.com/Linaro/OpenCSD/blob/master/HOWTO.md to grab trace data. Unfortunately, zynq-7000.dtsi on (recent) Linux kernels does not yet contain the necessary device definitions, and zynq-zed.dts wasn’t even syntactically correct (but it was just the syntax for the include-statement, so easy to fix). Based on Muhammad Wahab’s patch floating around the interwebs and studying the Zynq manual, I enabled support for some more of the devices (like the tpiu) in the devicetree. But most crucially (I guess), I can’t identify what “etr” in the HOWTO corresponds to on the Zynq. This means that the sample line from the HOWTO above $ ./tools/perf/perf record -e cs_etm/(a)20070000.etr/ --per-thread uname won’t work. Does anyone have experience in configuring the devicetree correctly for the Zynq? Should the perf-incantation on the Zynq also use .etr, or is there some other mechanism that perf can use on the Zynq? Sincerely, Volker Stolz

7 years, 8 months

[PATCH] opencsd: etmv4: Decoder memory leak bugfix

by Mike Leach

An issue with the P0 element stack resulted in objects not being destroyed. The P0 element stack has been refactored from a simple std::deque object to use an explicit class to handle all creation and destruction of objects. Resulting decoder code has been updated and simplified. Signed-off-by: Mike Leach <mike.leach(a)linaro.org> --- decoder/build/linux/ref_trace_decode_lib/makefile | 3 +- .../ref_trace_decode_lib.vcxproj | 3 +- .../ref_trace_decode_lib.vcxproj.filters | 9 +- decoder/include/etmv4/trc_etmv4_stack_elem.h | 338 +++++++++++++++++++++ decoder/include/etmv4/trc_pkt_decode_etmv4i.h | 7 +- decoder/source/etmv4/trc_etmv4_stack_elem.cpp | 110 +++++++ decoder/source/etmv4/trc_etmv4_stack_elem.h | 227 -------------- decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp | 144 +++------ 8 files changed, 503 insertions(+), 338 deletions(-) create mode 100644 decoder/include/etmv4/trc_etmv4_stack_elem.h create mode 100644 decoder/source/etmv4/trc_etmv4_stack_elem.cpp delete mode 100644 decoder/source/etmv4/trc_etmv4_stack_elem.h diff --git a/decoder/build/linux/ref_trace_decode_lib/makefile b/decoder/build/linux/ref_trace_decode_lib/makefile index ed947e7..e8fafc4 100644 --- a/decoder/build/linux/ref_trace_decode_lib/makefile +++ b/decoder/build/linux/ref_trace_decode_lib/makefile @@ -67,7 +67,8 @@ ETMV4OBJ= $(BUILD_DIR)/trc_cmp_cfg_etmv4.o \ $(BUILD_DIR)/trc_pkt_proc_etmv4i_impl.o \ $(BUILD_DIR)/trc_pkt_decode_etmv4i.o \ $(BUILD_DIR)/trc_pkt_elem_etmv4i.o \ - $(BUILD_DIR)/trc_pkt_elem_etmv4d.o + $(BUILD_DIR)/trc_pkt_elem_etmv4d.o \ + $(BUILD_DIR)/trc_etmv4_stack_elem.o PTMOBJ= $(BUILD_DIR)/trc_cmp_cfg_ptm.o \ $(BUILD_DIR)/trc_pkt_elem_ptm.o \ diff --git a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj index e9f231d..108371a 100644 --- a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj +++ b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj @@ -345,6 +345,7 @@ <ClInclude Include="..\..\..\include\etmv4\etmv4_decoder.h" /> <ClInclude Include="..\..\..\include\etmv4\trc_cmp_cfg_etmv4.h" /> <ClInclude Include="..\..\..\include\etmv4\trc_dcd_mngr_etmv4i.h" /> + <ClInclude Include="..\..\..\include\etmv4\trc_etmv4_stack_elem.h" /> <ClInclude Include="..\..\..\include\etmv4\trc_pkt_decode_etmv4i.h" /> <ClInclude Include="..\..\..\include\etmv4\trc_pkt_elem_etmv4d.h" /> <ClInclude Include="..\..\..\include\etmv4\trc_pkt_elem_etmv4i.h" /> @@ -396,7 +397,6 @@ <ClInclude Include="..\..\..\include\trc_gen_elem_types.h" /> <ClInclude Include="..\..\..\include\trc_pkt_types.h" /> <ClInclude Include="..\..\..\source\etmv3\trc_pkt_proc_etmv3_impl.h" /> - <ClInclude Include="..\..\..\source\etmv4\trc_etmv4_stack_elem.h" /> <ClInclude Include="..\..\..\source\etmv4\trc_pkt_proc_etmv4d_impl.h" /> <ClInclude Include="..\..\..\source\etmv4\trc_pkt_proc_etmv4i_impl.h" /> <ClInclude Include="..\..\..\source\trc_frame_deformatter_impl.h" /> @@ -408,6 +408,7 @@ <ClCompile Include="..\..\..\source\etmv3\trc_pkt_proc_etmv3.cpp" /> <ClCompile Include="..\..\..\source\etmv3\trc_pkt_proc_etmv3_impl.cpp" /> <ClCompile Include="..\..\..\source\etmv4\trc_cmp_cfg_etmv4.cpp" /> + <ClCompile Include="..\..\..\source\etmv4\trc_etmv4_stack_elem.cpp" /> <ClCompile Include="..\..\..\source\etmv4\trc_pkt_decode_etmv4i.cpp" /> <ClCompile Include="..\..\..\source\etmv4\trc_pkt_elem_etmv4d.cpp" /> <ClCompile Include="..\..\..\source\etmv4\trc_pkt_elem_etmv4i.cpp" /> diff --git a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters index a3f3558..fcfae51 100644 --- a/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters +++ b/decoder/build/win-vs2015/ref_trace_decode_lib/ref_trace_decode_lib.vcxproj.filters @@ -191,9 +191,6 @@ <ClInclude Include="..\..\..\include\etmv4\trc_pkt_decode_etmv4i.h"> <Filter>Header Files\etmv4</Filter> </ClInclude> - <ClInclude Include="..\..\..\source\etmv4\trc_etmv4_stack_elem.h"> - <Filter>Header Files\etmv4</Filter> - </ClInclude> <ClInclude Include="..\..\..\include\mem_acc\trc_mem_acc.h"> <Filter>Header Files\mem_acc</Filter> </ClInclude> @@ -356,6 +353,9 @@ <ClInclude Include="..\..\..\include\common\trc_ret_stack.h"> <Filter>Header Files\common</Filter> </ClInclude> + <ClInclude Include="..\..\..\include\etmv4\trc_etmv4_stack_elem.h"> + <Filter>Header Files\etmv4</Filter> + </ClInclude> </ItemGroup> <ItemGroup> <ClCompile Include="..\..\..\source\trc_component.cpp"> @@ -481,5 +481,8 @@ <ClCompile Include="..\..\..\source\trc_ret_stack.cpp"> <Filter>Source Files</Filter> </ClCompile> + <ClCompile Include="..\..\..\source\etmv4\trc_etmv4_stack_elem.cpp"> + <Filter>Source Files\etmv4</Filter> + </ClCompile> </ItemGroup> </Project> \ No newline at end of file diff --git a/decoder/include/etmv4/trc_etmv4_stack_elem.h b/decoder/include/etmv4/trc_etmv4_stack_elem.h new file mode 100644 index 0000000..be620b4 --- /dev/null +++ b/decoder/include/etmv4/trc_etmv4_stack_elem.h @@ -0,0 +1,338 @@ +/* + * \file trc_etmv4_stack_elem.h + * \brief OpenCSD : + * + * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. + */ +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors + * may be used to endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED +#define ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED + +#include "etmv4/trc_pkt_types_etmv4.h" + +#include <deque> +#include <vector> + +/* ETMv4 I trace stack elements + Speculation requires that we stack certain elements till they are committed or + cancelled. (P0 elements + other associated parts.) +*/ + +typedef enum _p0_elem_t +{ + P0_UNKNOWN, + P0_ATOM, + P0_ADDR, + P0_CTXT, + P0_TRC_ON, + P0_EXCEP, + P0_EXCEP_RET, + P0_EVENT, + P0_TS, + P0_CC, + P0_TS_CC, + P0_OVERFLOW +} p0_elem_t; + + +/************************************************************/ +/***Trace stack element base class - + record originating packet type and index in buffer*/ + +class TrcStackElem { +public: + TrcStackElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElem() {}; + + const p0_elem_t getP0Type() const { return m_P0_type; }; + const ocsd_etmv4_i_pkt_type getRootPkt() const { return m_root_pkt; }; + const ocsd_trc_index_t getRootIndex() const { return m_root_idx; }; + const bool isP0() const { return m_is_P0; }; + +private: + ocsd_etmv4_i_pkt_type m_root_pkt; + ocsd_trc_index_t m_root_idx; + p0_elem_t m_P0_type; + +protected: + bool m_is_P0; // true if genuine P0 - commit / cancellable, false otherwise + +}; + +inline TrcStackElem::TrcStackElem(p0_elem_t p0_type, const bool isP0, ocsd_etmv4_i_pkt_type root_pkt, ocsd_trc_index_t root_index) : + m_root_pkt(root_pkt), + m_root_idx(root_index), + m_P0_type(p0_type), + m_is_P0(isP0) +{ +} + +/************************************************************/ +/** Address element */ + +class TrcStackElemAddr : public TrcStackElem +{ +protected: + TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemAddr() {}; + + friend class EtmV4P0Stack; + +public: + void setAddr(const etmv4_addr_val_t &addr_val) { m_addr_val = addr_val; }; + const etmv4_addr_val_t &getAddr() const { return m_addr_val; }; + +private: + etmv4_addr_val_t m_addr_val; +}; + +inline TrcStackElemAddr::TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_ADDR, false, root_pkt,root_index) +{ + m_addr_val.val = 0; + m_addr_val.isa = 0; +} + +/************************************************************/ +/** Context element */ + +class TrcStackElemCtxt : public TrcStackElem +{ +protected: + TrcStackElemCtxt(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemCtxt() {}; + + friend class EtmV4P0Stack; + +public: + void setContext(const etmv4_context_t &ctxt) { m_context = ctxt; }; + const etmv4_context_t &getContext() const { return m_context; }; + +private: + etmv4_context_t m_context; +}; + +inline TrcStackElemCtxt::TrcStackElemCtxt(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_CTXT, false, root_pkt,root_index) +{ +} + +/************************************************************/ +/** Exception element */ + +class TrcStackElemExcept : public TrcStackElem +{ +protected: + TrcStackElemExcept(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemExcept() {}; + + friend class EtmV4P0Stack; + +public: + void setPrevSame(bool bSame) { m_prev_addr_same = bSame; }; + const bool getPrevSame() const { return m_prev_addr_same; }; + + void setExcepNum(const uint16_t num) { m_excep_num = num; }; + const uint16_t getExcepNum() const { return m_excep_num; }; + +private: + bool m_prev_addr_same; + uint16_t m_excep_num; +}; + +inline TrcStackElemExcept::TrcStackElemExcept(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_EXCEP, true, root_pkt,root_index), + m_prev_addr_same(false) +{ +} + +/************************************************************/ +/** Atom element */ + +class TrcStackElemAtom : public TrcStackElem +{ +protected: + TrcStackElemAtom(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemAtom() {}; + + friend class EtmV4P0Stack; + +public: + void setAtom(const ocsd_pkt_atom &atom) { m_atom = atom; }; + + const ocsd_atm_val commitOldest(); + int cancelNewest(const int nCancel); + const bool isEmpty() const { return (m_atom.num == 0); }; + +private: + ocsd_pkt_atom m_atom; +}; + +inline TrcStackElemAtom::TrcStackElemAtom(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(P0_ATOM, true, root_pkt,root_index) +{ + m_atom.num = 0; +} + +// commit oldest - get value and remove it from pattern +inline const ocsd_atm_val TrcStackElemAtom::commitOldest() +{ + ocsd_atm_val val = (m_atom.En_bits & 0x1) ? ATOM_E : ATOM_N; + m_atom.num--; + m_atom.En_bits >>= 1; + return val; +} + +// cancel newest - just reduce the atom count. +inline int TrcStackElemAtom::cancelNewest(const int nCancel) +{ + int nRemove = (nCancel <= m_atom.num) ? nCancel : m_atom.num; + m_atom.num -= nRemove; + return nRemove; +} + +/************************************************************/ +/** Generic param element */ + +class TrcStackElemParam : public TrcStackElem +{ +protected: + TrcStackElemParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + virtual ~TrcStackElemParam() {}; + + friend class EtmV4P0Stack; + +public: + void setParam(const uint32_t param, const int nParamNum) { m_param[(nParamNum & 0x3)] = param; }; + const uint32_t &getParam(const int nParamNum) const { return m_param[(nParamNum & 0x3)]; }; + +private: + uint32_t m_param[4]; +}; + +inline TrcStackElemParam::TrcStackElemParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : + TrcStackElem(p0_type, isP0, root_pkt,root_index) +{ +} + +/************************************************************/ +/* P0 element stack that allows push of elements, and deletion of elements when done. +*/ +class EtmV4P0Stack +{ +public: + EtmV4P0Stack() {}; + ~EtmV4P0Stack(); + + void push_front(TrcStackElem *pElem); + void pop_back(); + TrcStackElem *back(); + size_t size(); + + void delete_all(); + void delete_back(); + void delete_popped(); + + // creation functions - create and push if successful. + TrcStackElemParam *createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params); + TrcStackElemParam *createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); + TrcStackElemAtom *createAtomElem (const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const ocsd_pkt_atom &atom); + TrcStackElemExcept *createExceptElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool bSame, const uint16_t excepNum); + TrcStackElemCtxt *createContextElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_context_t &context); + TrcStackElemAddr *createAddrElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_addr_val_t &addr_val); + +private: + std::deque<TrcStackElem *> m_P0_stack; //!< P0 decode element stack + std::vector<TrcStackElem *> m_popped_elem; //!< save list of popped but not deleted elements. + +}; + +inline EtmV4P0Stack::~EtmV4P0Stack() +{ + delete_all(); + delete_popped(); +} + +// put an element on the front of the stack +inline void EtmV4P0Stack::push_front(TrcStackElem *pElem) +{ + m_P0_stack.push_front(pElem); +} + +// pop last element pointer off the stack and stash it for later deletion +inline void EtmV4P0Stack::pop_back() +{ + m_popped_elem.push_back(m_P0_stack.back()); + m_P0_stack.pop_back(); +} + +// pop last element pointer off the stack and delete immediately +inline void EtmV4P0Stack::delete_back() +{ + if (m_P0_stack.size() > 0) + { + TrcStackElem* pElem = m_P0_stack.back(); + delete pElem; + m_P0_stack.pop_back(); + } +} + +// get a pointer to the last element on the stack +inline TrcStackElem *EtmV4P0Stack::back() +{ + return m_P0_stack.back(); +} + +// remove and delete all the elements left on the stack +inline void EtmV4P0Stack::delete_all() +{ + while (m_P0_stack.size() > 0) + delete_back(); + m_P0_stack.clear(); +} + +// delete list of popped elements. +inline void EtmV4P0Stack::delete_popped() +{ + while (m_popped_elem.size() > 0) + { + delete m_popped_elem.back(); + m_popped_elem.pop_back(); + } + m_popped_elem.clear(); +} + +// get current number of elements on the stack +inline size_t EtmV4P0Stack::size() +{ + return m_P0_stack.size(); +} + +#endif // ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED + +/* End of File trc_etmv4_stack_elem.h */ diff --git a/decoder/include/etmv4/trc_pkt_decode_etmv4i.h b/decoder/include/etmv4/trc_pkt_decode_etmv4i.h index 3621405..6891ffb 100644 --- a/decoder/include/etmv4/trc_pkt_decode_etmv4i.h +++ b/decoder/include/etmv4/trc_pkt_decode_etmv4i.h @@ -40,8 +40,7 @@ #include "etmv4/trc_cmp_cfg_etmv4.h" #include "common/trc_gen_elem.h" #include "common/trc_ret_stack.h" - -#include <deque> +#include "etmv4/trc_etmv4_stack_elem.h" class TrcStackElem; class TrcStackElemParam; @@ -139,7 +138,7 @@ private: processor_state_t m_curr_state; //** P0 element stack - std::deque<TrcStackElem *> m_P0_stack; //!< P0 decode element stack + EtmV4P0Stack m_P0_stack; //!< P0 decode element stack int m_P0_commit; //!< number of elements to commit @@ -163,7 +162,7 @@ private: ocsd_instr_info m_instr_info; //!< instruction info for code follower - in address is the next to be decoded. bool m_mem_nacc_pending; //!< need to output a memory access failure packet - ocsd_vaddr_t m_nacc_addr; //!< + ocsd_vaddr_t m_nacc_addr; //!< record unaccessible address ocsd_pe_context m_pe_context; //!< current context information etmv4_trace_info_t m_trace_info; //!< trace info for this trace run. diff --git a/decoder/source/etmv4/trc_etmv4_stack_elem.cpp b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp new file mode 100644 index 0000000..1a9192c --- /dev/null +++ b/decoder/source/etmv4/trc_etmv4_stack_elem.cpp @@ -0,0 +1,110 @@ +/* +* \file trc_etmv4_stack_elem.cpp +* \brief OpenCSD : ETMv4 decoder +* +* \copyright Copyright (c) 2017, ARM Limited. All Rights Reserved. +*/ + + +/* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* +* 3. Neither the name of the copyright holder nor the names of its contributors +* may be used to endorse or promote products derived from this software without +* specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#include "etmv4/trc_etmv4_stack_elem.h" + +/* implementation of P0 element stack in ETM v4 trace*/ +TrcStackElemParam *EtmV4P0Stack::createParamElemNoParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) +{ + std::vector<uint32_t> params; + params.clear(); + return createParamElem(p0_type, isP0, root_pkt, root_index, params); +} + +TrcStackElemParam *EtmV4P0Stack::createParamElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const std::vector<uint32_t> &params) +{ + TrcStackElemParam *pElem = new (std::nothrow) TrcStackElemParam(p0_type, isP0, root_pkt, root_index); + if (pElem) + { + int param_idx = 0; + int params_to_fill = params.size(); + while ((param_idx < 4) && params_to_fill) + { + pElem->setParam(params[param_idx], param_idx); + param_idx++; + params_to_fill--; + } + push_front(pElem); + } + return pElem; +} + +TrcStackElemAtom *EtmV4P0Stack::createAtomElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const ocsd_pkt_atom &atom) +{ + TrcStackElemAtom *pElem = new (std::nothrow) TrcStackElemAtom(root_pkt, root_index); + if (pElem) + { + pElem->setAtom(atom); + push_front(pElem); + } + return pElem; +} + +TrcStackElemExcept *EtmV4P0Stack::createExceptElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const bool bSame, const uint16_t excepNum) +{ + TrcStackElemExcept *pElem = new (std::nothrow) TrcStackElemExcept(root_pkt, root_index); + if (pElem) + { + pElem->setExcepNum(excepNum); + pElem->setPrevSame(bSame); + push_front(pElem); + } + return pElem; +} + +TrcStackElemCtxt *EtmV4P0Stack::createContextElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_context_t &context) +{ + TrcStackElemCtxt *pElem = new (std::nothrow) TrcStackElemCtxt(root_pkt, root_index); + if (pElem) + { + pElem->setContext(context); + push_front(pElem); + } + return pElem; + +} + +TrcStackElemAddr *EtmV4P0Stack::createAddrElem(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index, const etmv4_addr_val_t &addr_val) +{ + TrcStackElemAddr *pElem = new (std::nothrow) TrcStackElemAddr(root_pkt, root_index); + if (pElem) + { + pElem->setAddr(addr_val); + push_front(pElem); + } + return pElem; +} + +/* End of file trc_etmv4_stack_elem.cpp */ diff --git a/decoder/source/etmv4/trc_etmv4_stack_elem.h b/decoder/source/etmv4/trc_etmv4_stack_elem.h deleted file mode 100644 index 5335ba8..0000000 --- a/decoder/source/etmv4/trc_etmv4_stack_elem.h +++ /dev/null @@ -1,227 +0,0 @@ -/* - * \file trc_etmv4_stack_elem.h - * \brief OpenCSD : - * - * \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved. - */ -/* - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors - * may be used to endorse or promote products derived from this software without - * specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#ifndef ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED -#define ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED - -#include "etmv4/trc_pkt_types_etmv4.h" - -/* ETMv4 I trace stack elements - Speculation requires that we stack certain elements till they are committed or - cancelled. (P0 elements + other associated parts.) -*/ - -typedef enum _p0_elem_t -{ - P0_UNKNOWN, - P0_ATOM, - P0_ADDR, - P0_CTXT, - P0_TRC_ON, - P0_EXCEP, - P0_EXCEP_RET, - P0_EVENT, - P0_TS, - P0_CC, - P0_TS_CC, - P0_OVERFLOW -} p0_elem_t; - - -/************************************************************/ -/***Trace stack element base class - - record originating packet type and index in buffer*/ - -class TrcStackElem { -public: - TrcStackElem(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElem() {}; - - const p0_elem_t getP0Type() const { return m_P0_type; }; - const ocsd_etmv4_i_pkt_type getRootPkt() const { return m_root_pkt; }; - const ocsd_trc_index_t getRootIndex() const { return m_root_idx; }; - const bool isP0() const { return m_is_P0; }; - -private: - ocsd_etmv4_i_pkt_type m_root_pkt; - ocsd_trc_index_t m_root_idx; - p0_elem_t m_P0_type; - -protected: - bool m_is_P0; // true if genuine P0 - commit / cancellable, false otherwise - -}; - -inline TrcStackElem::TrcStackElem(p0_elem_t p0_type, const bool isP0, ocsd_etmv4_i_pkt_type root_pkt, ocsd_trc_index_t root_index) : - m_root_pkt(root_pkt), - m_root_idx(root_index), - m_P0_type(p0_type), - m_is_P0(isP0) -{ -} - -/************************************************************/ -/** Address element */ - -class TrcStackElemAddr : public TrcStackElem -{ -public: - TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElemAddr() {}; - - void setAddr(const etmv4_addr_val_t addr_val) { m_addr_val = addr_val; }; - const etmv4_addr_val_t &getAddr() const { return m_addr_val; }; - -private: - etmv4_addr_val_t m_addr_val; -}; - -inline TrcStackElemAddr::TrcStackElemAddr(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : - TrcStackElem(P0_ADDR, false, root_pkt,root_index) -{ - m_addr_val.val = 0; - m_addr_val.isa = 0; -} - -/************************************************************/ -/** Context element */ - -class TrcStackElemCtxt : public TrcStackElem -{ -public: - TrcStackElemCtxt(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElemCtxt() {}; - - void setContext(const etmv4_context_t &ctxt) { m_context = ctxt; }; - const etmv4_context_t &getContext() const { return m_context; }; - -private: - etmv4_context_t m_context; -}; - -inline TrcStackElemCtxt::TrcStackElemCtxt(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : - TrcStackElem(P0_CTXT, false, root_pkt,root_index) -{ -} - -/************************************************************/ -/** Exception element */ - -class TrcStackElemExcept : public TrcStackElem -{ -public: - TrcStackElemExcept(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElemExcept() {}; - - void setPrevSame(bool bSame) { m_prev_addr_same = bSame; }; - const bool getPrevSame() const { return m_prev_addr_same; }; - - void setExcepNum(const uint16_t num) { m_excep_num = num; }; - const uint16_t getExcepNum() const { return m_excep_num; }; - -private: - bool m_prev_addr_same; - uint16_t m_excep_num; -}; - -inline TrcStackElemExcept::TrcStackElemExcept(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : - TrcStackElem(P0_EXCEP, true, root_pkt,root_index), - m_prev_addr_same(false) -{ -} - -/************************************************************/ -/** Atom element */ - -class TrcStackElemAtom : public TrcStackElem -{ -public: - TrcStackElemAtom(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElemAtom() {}; - - void setAtom(const ocsd_pkt_atom &atom) { m_atom = atom; }; - - const ocsd_atm_val commitOldest(); - int cancelNewest(const int nCancel); - const bool isEmpty() const { return (m_atom.num == 0); }; - -private: - ocsd_pkt_atom m_atom; -}; - -inline TrcStackElemAtom::TrcStackElemAtom(const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : - TrcStackElem(P0_ATOM, true, root_pkt,root_index) -{ - m_atom.num = 0; -} - -// commit oldest - get value and remove it from pattern -inline const ocsd_atm_val TrcStackElemAtom::commitOldest() -{ - ocsd_atm_val val = (m_atom.En_bits & 0x1) ? ATOM_E : ATOM_N; - m_atom.num--; - m_atom.En_bits >>= 1; - return val; -} - -// cancel newest - just reduce the atom count. -inline int TrcStackElemAtom::cancelNewest(const int nCancel) -{ - int nRemove = (nCancel <= m_atom.num) ? nCancel : m_atom.num; - m_atom.num -= nRemove; - return nRemove; -} - -/************************************************************/ -/** Generic param element */ - -class TrcStackElemParam : public TrcStackElem -{ -public: - TrcStackElemParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index); - virtual ~TrcStackElemParam() {}; - - void setParam(const uint32_t param, const int nParamNum) { m_param[(nParamNum & 0x3)] = param; }; - const uint32_t &getParam(const int nParamNum) const { return m_param[(nParamNum & 0x3)]; }; - -private: - uint32_t m_param[4]; -}; - -inline TrcStackElemParam::TrcStackElemParam(const p0_elem_t p0_type, const bool isP0, const ocsd_etmv4_i_pkt_type root_pkt, const ocsd_trc_index_t root_index) : - TrcStackElem(p0_type, isP0, root_pkt,root_index) -{ -} - -#endif // ARM_TRC_ETMV4_STACK_ELEM_H_INCLUDED - -/* End of File trc_etmv4_stack_elem.h */ diff --git a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp index 77a1173..8596b19 100644 --- a/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp +++ b/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp @@ -35,7 +35,6 @@ #include "etmv4/trc_pkt_decode_etmv4i.h" -#include "trc_etmv4_stack_elem.h" #include "common/trc_gen_elem.h" @@ -232,7 +231,7 @@ void TrcPktDecodeEtmV4I::resetDecoder() m_except_pending_addr = false; m_mem_nacc_pending = false; m_prev_overflow = false; - m_P0_stack.clear(); + m_P0_stack.delete_all(); m_output_elem.init(); m_excep_proc = EXCEP_POP; m_flush_EOT = false; @@ -260,22 +259,14 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_TRACE_ON: { - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam( P0_TRC_ON, false, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - m_P0_stack.push_front(pElem); - else + if (m_P0_stack.createParamElemNoParam(P0_TRC_ON, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0) bAllocErr = true; } break; case ETM4_PKT_I_OVERFLOW: { - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam( P0_OVERFLOW, false, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - m_P0_stack.push_front(pElem); - else + if (m_P0_stack.createParamElemNoParam(P0_OVERFLOW, false, m_curr_packet_in->getType(), m_index_curr_pkt) == 0) bAllocErr = true; } break; @@ -287,47 +278,29 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_ATOM_F5: case ETM4_PKT_I_ATOM_F6: { - TrcStackElemAtom *pElem = new (std::nothrow) TrcStackElemAtom(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - pElem->setAtom(m_curr_packet_in->getAtom()); - m_P0_stack.push_front(pElem); - m_curr_spec_depth += m_curr_packet_in->getAtom().num; - } - else + if (m_P0_stack.createAtomElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getAtom()) == 0) bAllocErr = true; + else + m_curr_spec_depth += m_curr_packet_in->getAtom().num; } break; case ETM4_PKT_I_CTXT: { - TrcStackElemCtxt *pElem = new (std::nothrow) TrcStackElemCtxt(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - pElem->setContext(m_curr_packet_in->getContext()); - m_P0_stack.push_front(pElem); - } - else - bAllocErr = true; + if (m_P0_stack.createContextElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getContext()) == 0) + bAllocErr = true; } break; case ETM4_PKT_I_ADDR_MATCH: { - TrcStackElemAddr *pElem = new (std::nothrow) TrcStackElemAddr(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { etmv4_addr_val_t addr; - // address match - just grab whatever the current value is... addr.val = m_curr_packet_in->getAddrVal(); addr.isa = m_curr_packet_in->getAddrIS(); - pElem->setAddr(addr); - m_P0_stack.push_front(pElem); - } - else - bAllocErr = true; - is_addr = true; + if (m_P0_stack.createAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0) + bAllocErr = true; + is_addr = true; } break; @@ -336,13 +309,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_ADDR_CTXT_L_32IS0: case ETM4_PKT_I_ADDR_CTXT_L_32IS1: { - TrcStackElemCtxt *pElem = new (std::nothrow) TrcStackElemCtxt(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - pElem->setContext(m_curr_packet_in->getContext()); - m_P0_stack.push_front(pElem); - } - else + if (m_P0_stack.createContextElem(m_curr_packet_in->getType(), m_index_curr_pkt, m_curr_packet_in->getContext()) == 0) bAllocErr = true; } case ETM4_PKT_I_ADDR_L_32IS0: @@ -352,17 +319,11 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_ADDR_S_IS0: case ETM4_PKT_I_ADDR_S_IS1: { - TrcStackElemAddr *pElem = new (std::nothrow) TrcStackElemAddr(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - etmv4_addr_val_t addr; + etmv4_addr_val_t addr; - addr.val = m_curr_packet_in->getAddrVal(); - addr.isa = m_curr_packet_in->getAddrIS(); - pElem->setAddr(addr); - m_P0_stack.push_front(pElem); - } - else + addr.val = m_curr_packet_in->getAddrVal(); + addr.isa = m_curr_packet_in->getAddrIS(); + if (m_P0_stack.createAddrElem(m_curr_packet_in->getType(), m_index_curr_pkt, addr) == 0) bAllocErr = true; is_addr = true; } @@ -371,45 +332,33 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) // Exceptions case ETM4_PKT_I_EXCEPT: { - TrcStackElemExcept *pElem = new (std::nothrow) TrcStackElemExcept(m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) + if (m_P0_stack.createExceptElem(m_curr_packet_in->getType(), m_index_curr_pkt, + (m_curr_packet_in->exception_info.addr_interp == 0x2), + m_curr_packet_in->exception_info.exceptionType) == 0) + bAllocErr = true; + else { - pElem->setPrevSame(m_curr_packet_in->exception_info.addr_interp == 0x2); - m_P0_stack.push_front(pElem); m_except_pending_addr = true; // wait for following packets before marking for commit. is_except = true; - pElem->setExcepNum(m_curr_packet_in->exception_info.exceptionType); } - else - bAllocErr = true; - } - break; + } + break; case ETM4_PKT_I_EXCEPT_RTN: { // P0 element if V7M profile. bool bV7MProfile = (m_config->archVersion() == ARCH_V7) && (m_config->coreProfile() == profile_CortexM); - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam(P0_EXCEP_RET, bV7MProfile, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - m_P0_stack.push_front(pElem); - else + if (m_P0_stack.createParamElemNoParam(P0_EXCEP_RET, bV7MProfile, m_curr_packet_in->getType(), m_index_curr_pkt) == 0) bAllocErr = true; - } break; // event trace case ETM4_PKT_I_EVENT: { - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam( P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - pElem->setParam(m_curr_packet_in->event_val,0); - m_P0_stack.push_front(pElem); - } - else + std::vector<uint32_t> params; + params[0] = (uint32_t)m_curr_packet_in->event_val; + if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0) bAllocErr = true; } @@ -420,14 +369,9 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_CCNT_F2: case ETM4_PKT_I_CCNT_F3: { - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam( P0_CC, false, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - pElem->setParam(m_curr_packet_in->getCC(),0); - m_P0_stack.push_front(pElem); - } - else + std::vector<uint32_t> params; + params[0] = m_curr_packet_in->getCC(); + if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0) bAllocErr = true; } @@ -437,18 +381,13 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::decodePacket(bool &Complete) case ETM4_PKT_I_TIMESTAMP: { bool bTSwithCC = m_config->enabledCCI(); - TrcStackElemParam *pElem = - new (std::nothrow) TrcStackElemParam( bTSwithCC ? P0_TS_CC : P0_TS, false, m_curr_packet_in->getType(), m_index_curr_pkt); - if(pElem) - { - uint64_t ts = m_curr_packet_in->getTS(); - pElem->setParam((uint32_t)(ts & 0xFFFFFFFF),0); - pElem->setParam((uint32_t)((ts>>32) & 0xFFFFFFFF),1); - if(bTSwithCC) - pElem->setParam(m_curr_packet_in->getCC(),2); - m_P0_stack.push_front(pElem); - } - else + uint64_t ts = m_curr_packet_in->getTS(); + std::vector<uint32_t> params; + params[0] = (uint32_t)(ts & 0xFFFFFFFF); + params[1] = (uint32_t)((ts >> 32) & 0xFFFFFFFF); + if (bTSwithCC) + params[2] = m_curr_packet_in->getCC(); + if (m_P0_stack.createParamElem(P0_EVENT, false, m_curr_packet_in->getType(), m_index_curr_pkt, params) == 0) bAllocErr = true; } @@ -687,7 +626,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::commitElements(bool &Complete) } if(bPopElem) - m_P0_stack.pop_back(); // remove element from stack; + m_P0_stack.delete_back(); // remove element from stack; // if response not continue, then break out of the loop. if(!OCSD_DATA_RESP_IS_CONT(resp)) @@ -751,7 +690,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::flushEOT() // scan for outstanding events, TS and CC, before any outstanding // P0 commit elements. pElem = m_P0_stack.back(); - m_P0_stack.pop_back(); + switch(pElem->getP0Type()) { // clear stack and stop @@ -761,7 +700,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::flushEOT() case P0_EXCEP: case P0_EXCEP_RET: case P0_OVERFLOW: - m_P0_stack.clear(); + m_P0_stack.delete_all(); break; //skip @@ -802,7 +741,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::flushEOT() } break; } - + m_P0_stack.delete_back(); } if(OCSD_DATA_RESP_IS_CONT(resp) && (m_P0_stack.size() == 0)) @@ -984,6 +923,7 @@ ocsd_datapath_resp_t TrcPktDecodeEtmV4I::processException() else m_excep_proc = EXCEP_RANGE; } + m_P0_stack.delete_popped(); } // output a range element -- 2.7.4

7 years, 8 months

Kernel branches on openCSD repository

by Mathieu Poirier

Good day all, The kernel branches on the openCSD repository[1] have been moved to their new living quarters [2] and the HOWTO.md on [1] modified to reflect that. All we need to do is remove the kernel branches from [1], something I'm planning to do by end of business on Monday. Please get back to me if you need more time so that we can sketch out a plan. Thanks, Mathieu [1]. https://github.com/Linaro/OpenCSD [2]. https://github.com/Linaro/perf-opencsd

7 years, 8 months

Question for openCSD - open soruce Coresight Trace Decode

by 임영재

7 years, 8 months

HiKey 960 / Hi3660

by Al Grant

Hi, Has anyone got CoreSight DTS support for the Hi3660 as used on the HiKey 960 board? Hopefully it would be similar to the Hi6220. Al

7 years, 8 months

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