CoreSight

coresight@lists.linaro.org

6 participants
2565 discussions

Start a nNew thread

Re: Greetings

by Adrian Cibotariu

4 years, 5 months

Re: Greetings

by Adrian Cibotariu

4 years, 5 months

Re: Re: follow up

by Jake

4 years, 5 months

專業獎盃 Professional Trophy

by giftcn

如閣下未能閱讀此郵件，請按此。 If you can’t see the image below, please click here 專業獎盃、獎牌、水晶、運動套裝適合企業、團體、學校各大小紀念禮品查詢電郵 / Email : giftcn(a)yeah.net 電話 Tele. | Whatsapp / Signal | Wechat : 68192528 / 61898347 本公司自設廠房,専業為學校、團體及活動策劃公司制作獎盃、獎牌、水晶、嘉賓紀念品及運動套裝等產品，備存有原設計產品或按客戶要求及預算費用而設計，配合主題，令活動在完美及不超出預算下進行。我們富經驗的設計和制作人員可以給你提供建議，讓你有更多的選擇。如果你正在為你的活動策劃而費神，請聯絡我們，讓未來活動變得更輕鬆. We have our own factory in China, Our services specializing in trophies、medals、crystal 、 guests souvenirs and Sportswear, we have orginal design or according to customer requirements and estimated costs and design, Coordinate with activity theme, everything carried out in perfect and within budget . Our experienced designers can give you advice for choice. As you are trouble in planning your event, please contact us to make everything easier in the future. 查詢更多資料及報價,請聯絡 / For more information, Please contact : 電郵 / Email : giftcn(a)yeah.net 電話 Tele. | whatsapp / Signal | Wechat : 6819 2528 / 6189 8347 (Andy Lau) 劉先生科銘實業有限公司 Coralart Industrial Company Limited 香港網站 / Website : www.coralartcn.simplesite.com 最新產品 / New Product : www.coralartcn.net/mobile 地址：香港九龍觀塘開源道49號創貿廣場2305室 Address：Unit 2305, Apec Plaza, 49 Hoi Yuen Road, Kwun Tong, Hong Kong. 如要取消訂閱，請到此處。 If you don’t wish to receive our Newsletter, please click here.

4 years, 5 months

Re: ThunderX2 and Coresight bring up

by Zhenghao Hu

Hi, We are a group of researchers from NYU trying to bring up Coresight ETM interfaces on ThunderX2. So we dug out this old thread ( https://lists.linaro.org/pipermail/coresight/2018-August/001626.html) and trying to get things spinning. We are current on Linux 5.12.9 kernel, but it seems some of the DTS entries are missing from the upstream. Just to be sure, would it be possible that you could share the DTS scripts? Thank you! Zhenghao

4 years, 5 months

from Altan Ibrahim

by globalfundings

4 years, 5 months

[PATCH v6 0/1] perf cs-etm: Split Coresight decode by aux records

by James Clark

Changes since v5: * Fixed typo in commit message * Indentation fix James Clark (1): perf cs-etm: Split Coresight decode by aux records tools/perf/util/cs-etm.c | 156 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 155 insertions(+), 1 deletion(-) -- 2.28.0

4 years, 5 months

[PATCH v5 0/1] perf cs-etm: Split Coresight decode by aux records

by James Clark

Changes since RFC v4: * Style and indentation fixes * Add a warning when the buffer isn't found (suggested by Leo) * Undo change to set 'etm->data_queued' * Replace 'matchesCpuPid' with early exit when CPU/TID doesn't match * Check more return value errors * Remove TODOs from commit message and code * Add motivation to commit message James Clark (1): perf cs-etm: Split Coresight decode by aux records tools/perf/util/cs-etm.c | 158 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 157 insertions(+), 1 deletion(-) -- 2.28.0

4 years, 6 months

ACCOUNT WARNING: Undelivered mails coresight@lists.linaro.org Kindly rectify

by Noreply＠lists.linaro.org

4 years, 6 months

[PATCHv2 0/4] perf/core: Add support to exclude kernel mode PMU tracing

by Sai Prakash Ranjan

Hardware assisted tracing families such as ARM Coresight, Intel PT provides rich tracing capabilities including instruction level tracing and accurate timestamps which are very useful for profiling and also pose a significant security risk. One such example of security risk is when kernel mode tracing is not excluded and these hardware assisted tracing can be used to analyze cryptographic code execution. In this case, even the root user must not be able to infer anything. To explain it more clearly in the words of a security team member (credits: Mattias Nissler), "Consider a system where disk contents are encrypted and the encryption key is set up by the user when mounting the file system. From that point on the encryption key resides in the kernel. It seems reasonable to expect that the disk encryption key be protected from exfiltration even if the system later suffers a root compromise (or even against insiders that have root access), at least as long as the attacker doesn't manage to compromise the kernel." Here the idea is to protect such important information from all users including root users since root privileges does not have to mean full control over the kernel [1] and root compromise does not have to be the end of the world. But "Peter said even the regular counters can be used for full branch trace, the information isn't as accurate as PT and friends and not easier but is good enough to infer plenty". This would mean that a global tunable config for all kernel mode pmu tracing is more appropriate than the one targeting the hardware assisted instruction tracing. Currently we can exclude kernel mode tracing via perf_event_paranoid sysctl but it has following limitations, * No option to restrict kernel mode instruction tracing by the root user. * Not possible to restrict kernel mode instruction tracing when the hardware assisted tracing IPs like ARM Coresight ETMs use an additional interface via sysfs for tracing in addition to perf interface. So introduce a new config CONFIG_EXCLUDE_KERNEL_PMU_TRACE to exclude kernel mode pmu tracing for all users including root which will be generic and applicable to all hardware tracing families and which can also be used with other interfaces like sysfs in case of ETMs. Patch 1 adds this new config and the support in perf core to exclude all kernel mode PMU tracing. Patch 2 adds the perf evsel warning message when the perf tool users attempt to perform a kernel mode trace with the config enabled to exclude the kernel mode tracing. Patch 3 and Patch 4 adds the support for excluding kernel mode for ARM Coresight ETM{4,3}XX sysfs mode using the newly introduced generic config. [1] https://lwn.net/Articles/796866/ Changes in v2: * Move from kernel mode instruction tracing to all kernel level PMU tracing (Peter) * Move the check and warning to the caller mode_store() (Doug) Sai Prakash Ranjan (4): perf/core: Add support to exclude kernel mode PMU tracing perf evsel: Print warning for excluding kernel mode instruction tracing coresight: etm4x: Add support to exclude kernel mode tracing coresight: etm3x: Add support to exclude kernel mode tracing drivers/hwtracing/coresight/coresight-etm3x-core.c | 3 +++ drivers/hwtracing/coresight/coresight-etm3x-sysfs.c | 6 ++++++ drivers/hwtracing/coresight/coresight-etm4x-core.c | 6 +++++- drivers/hwtracing/coresight/coresight-etm4x-sysfs.c | 6 ++++++ init/Kconfig | 11 +++++++++++ kernel/events/core.c | 3 +++ tools/perf/util/evsel.c | 3 ++- 7 files changed, 36 insertions(+), 2 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

4 years, 6 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

CoreSight