Tcwg-commits December 2020

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[gcc] branch devel/c++-coroutines updated (fc3048420c3 -> 4f1a9034a8c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/c++-coroutines in repository gcc. from fc3048420c3 Merge master r11-6319. adds 6b7d53a2593 c++: Fix constexpr array ICE [PR98332] adds 550880a3168 c++: Fix up floating point complex handling in build_zero_i [...] adds 0a541e746c7 c++: Improve testcase [PR98332] adds 3932785450f compiler: nil-checked pointers and index expressions can trap adds 612cf351c70 c++: Fix initializing empty base from prvalue [PR97597] adds 745f22096c3 c++: EOF location [PR 96045] adds 36c08a8f212 mark some tests in gcc.target/arm as requiring "fpic" support adds eb81c997d81 Account for VxWorks headers in libstdc++ test on names adds fdd8560cce9 PR c++/98413 - ICE on placement new and member pointer adds 0df311657dc PR middle-end/98160 - ICE in warn_dealloc_offset on member [...] adds 85d8ebcfc23 Daily bump. adds 085fd2a46e5 compiler: parenthesize channel type strings if necessary adds 168be2b3afd RISC-V: Fix python3 compatibility for multilib-generator adds 662b9c55cf0 C++ : Add the -stdlib= option. new 4f1a9034a8c Merge master r11-6333. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: c++tools/ChangeLog | 7 ++ gcc/ChangeLog | 24 ++++++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 6 ++ gcc/builtins.c | 7 +- gcc/c-family/c.opt | 14 ++++ gcc/config.in | 6 ++ gcc/config/riscv/multilib-generator | 2 +- gcc/configure | 57 ++++++++++++- gcc/configure.ac | 44 ++++++++++ gcc/cp/ChangeLog | 25 ++++++ gcc/cp/call.c | 4 + gcc/cp/class.c | 31 ++++++- gcc/cp/constexpr.c | 4 +- gcc/cp/cp-tree.h | 1 + gcc/cp/g++spec.c | 74 +++++++++++++++-- gcc/cp/init.c | 2 +- gcc/cp/parser.c | 10 +++ gcc/cppdefault.c | 5 ++ gcc/cppdefault.h | 7 +- gcc/d/ChangeLog | 7 ++ gcc/doc/invoke.texi | 10 +++ gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/expressions.cc | 10 +-- gcc/go/gofrontend/types.cc | 15 ++++ gcc/incpath.c | 6 +- gcc/testsuite/ChangeLog | 97 ++++++++++++++++++++++ gcc/testsuite/c-c++-common/goacc/pr79428-1.c | 4 +- gcc/testsuite/c-c++-common/gomp/pr79428-2.c | 3 +- gcc/testsuite/c-c++-common/raw-string-6.c | 3 +- gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C | 7 ++ gcc/testsuite/g++.dg/cpp0x/decltype63.C | 3 +- gcc/testsuite/g++.dg/cpp0x/gen-attrs-64.C | 1 - gcc/testsuite/g++.dg/cpp0x/pr68726.C | 1 - gcc/testsuite/g++.dg/cpp0x/pr78341.C | 1 - gcc/testsuite/g++.dg/cpp1y/pr65202.C | 3 +- gcc/testsuite/g++.dg/cpp1y/pr65340.C | 2 +- gcc/testsuite/g++.dg/cpp1y/pr68578.C | 2 +- gcc/testsuite/g++.dg/cpp1z/class-deduction44.C | 1 - gcc/testsuite/g++.dg/diagnostic/pr96045-1.C | 4 + gcc/testsuite/g++.dg/diagnostic/pr96045-2.C | 6 ++ gcc/testsuite/g++.dg/diagnostic/pr96045-3.C | 6 ++ .../g++.dg/diagnostic/unclosed-extern-c.C | 2 +- .../g++.dg/diagnostic/unclosed-function.C | 3 +- .../g++.dg/diagnostic/unclosed-namespace.C | 3 +- gcc/testsuite/g++.dg/diagnostic/unclosed-struct.C | 3 +- gcc/testsuite/g++.dg/ext/pr84598.C | 4 +- gcc/testsuite/g++.dg/init/empty3.C | 18 ++++ gcc/testsuite/g++.dg/other/switch4.C | 3 +- gcc/testsuite/g++.dg/parse/attr4.C | 1 - gcc/testsuite/g++.dg/parse/cond4.C | 3 +- gcc/testsuite/g++.dg/parse/crash10.C | 1 - gcc/testsuite/g++.dg/parse/crash18.C | 2 +- gcc/testsuite/g++.dg/parse/crash27.C | 2 +- gcc/testsuite/g++.dg/parse/crash34.C | 2 +- gcc/testsuite/g++.dg/parse/crash35.C | 2 +- gcc/testsuite/g++.dg/parse/crash52.C | 2 +- gcc/testsuite/g++.dg/parse/crash59.C | 2 +- gcc/testsuite/g++.dg/parse/crash61.C | 1 - gcc/testsuite/g++.dg/parse/crash67.C | 2 +- gcc/testsuite/g++.dg/parse/error14.C | 2 +- gcc/testsuite/g++.dg/parse/error56.C | 1 - gcc/testsuite/g++.dg/parse/invalid1.C | 2 +- .../g++.dg/parse/parameter-declaration-1.C | 4 +- gcc/testsuite/g++.dg/parse/parser-pr28152-2.C | 2 +- gcc/testsuite/g++.dg/parse/parser-pr28152.C | 2 +- gcc/testsuite/g++.dg/parse/pr68722.C | 1 - gcc/testsuite/g++.dg/parse/pr96258.C | 4 +- gcc/testsuite/g++.dg/pr46852.C | 1 - gcc/testsuite/g++.dg/pr46868.C | 1 - gcc/testsuite/g++.dg/template/crash115.C | 1 - gcc/testsuite/g++.dg/template/crash43.C | 1 - gcc/testsuite/g++.dg/template/crash90.C | 3 +- gcc/testsuite/g++.dg/template/error-recovery1.C | 1 - gcc/testsuite/g++.dg/template/error57.C | 2 +- gcc/testsuite/g++.dg/warn/pr98160.C | 30 +++++++ gcc/testsuite/g++.dg/warn/pr98413.C | 23 +++++ gcc/testsuite/g++.old-deja/g++.other/crash31.C | 3 +- gcc/testsuite/gcc.target/arm/data-rel-1.c | 1 + gcc/testsuite/gcc.target/arm/data-rel-2.c | 1 + gcc/testsuite/gcc.target/arm/data-rel-3.c | 1 + gcc/testsuite/gcc.target/arm/pr44788.c | 1 + gcc/testsuite/gcc.target/arm/pr52006.c | 1 + gcc/testsuite/gcc.target/arm/pr59858.c | 1 + .../gcc.target/arm/require-pic-register-loc.c | 17 ++-- gcc/testsuite/gcc.target/arm/tlscall.c | 1 + libcody/ChangeLog | 12 +++ libstdc++-v3/ChangeLog | 4 + libstdc++-v3/testsuite/17_intro/names.cc | 41 +++++++++ 89 files changed, 651 insertions(+), 96 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/pr96045-1.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/pr96045-2.C create mode 100644 gcc/testsuite/g++.dg/diagnostic/pr96045-3.C create mode 100644 gcc/testsuite/g++.dg/init/empty3.C create mode 100644 gcc/testsuite/g++.dg/warn/pr98160.C create mode 100644 gcc/testsuite/g++.dg/warn/pr98413.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (03e2d83f596 -> 0963fa93dcc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/gcc. from 03e2d83f596 Daily bump. adds 0bf0e0b86d3 i386: Fix __builtin_floor with FE_DOWNWARD rounding directi [...] adds 65fcf1c2d7f Daily bump. adds a5bcb9487dd i386: Fix __builtin_trunc with FE_DOWNWARD rounding directi [...] adds ec498ed3d0f rs6000: Update the processor defaults for FreeBSD adds 97014e4ada4 c++: Copy elision and [[no_unique_address]]. [PR93711] adds f5cea9c5c4f c++: Fix constexpr array ICE [PR98332] adds e73caa0fc12 Daily bump. adds 0963fa93dcc modulo-sched: Carefully process loop counter initialization [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 20 +++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386-expand.c | 52 +++++++++++------ gcc/config/rs6000/freebsd64.h | 5 +- gcc/cp/ChangeLog | 17 ++++++ gcc/cp/call.c | 45 +++++++++------ gcc/cp/constexpr.c | 4 +- gcc/cp/cp-tree.h | 1 + gcc/cp/init.c | 3 +- gcc/cp/typeck2.c | 12 +++- gcc/modulo-sched.c | 71 +++++++++++++----------- gcc/testsuite/ChangeLog | 23 ++++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C | 7 +++ gcc/testsuite/g++.dg/cpp1z/aggr-base10.C | 16 ++++++ gcc/testsuite/g++.dg/cpp2a/no_unique_address7.C | 13 +++++ gcc/testsuite/g++.dg/cpp2a/no_unique_address7a.C | 14 +++++ gcc/testsuite/gcc.c-torture/execute/pr97421-1.c | 23 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-2.c | 18 ++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-3.c | 22 ++++++++ gcc/testsuite/gcc.target/i386/pr96793-1.c | 28 ++++++++++ gcc/testsuite/gcc.target/i386/pr96793.c | 28 ++++++++++ 21 files changed, 350 insertions(+), 74 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/aggr-base10.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/no_unique_address7.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/no_unique_address7a.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-1.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-2.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96793-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96793.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 updated (0ce1c3837 -> a6cf0bfb6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 0ce1c3837 0: update: gcc-03e2d83f596a10a3861ce04cca84ff608da55c23: 1 new a6cf0bfb6 0: update: gcc-0963fa93dcc47d290d1597ff88ff162f5bdd1b13: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0ce1c3837) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-release-aarch64- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 432 +- 04-build_abe-bootstrap_O3/console.log | 71776 ++++++++++++++++--------------- 05-check_regression/console.log | 4 +- 06-update_baseline/console.log | 2 +- console.log | 72344 ++++++++++++++++---------------- jenkins/manifest.sh | 8 +- 7 files changed, 72316 insertions(+), 72380 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (47877c9079c -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/llvm-project. from 47877c9079c [clang-format] Add SpaceBeforeCaseColon option adds 45a4f34bd19 Revert "[IRSim] Adding support for isomorphic predicates" adds 74b3acefc7b [clangd] Fix case mismatch crash on in CDB on windows after [...] adds d97e9f1a3d8 [lldb] Simplify ObjectFile::FindPlugin (NFC) adds 7143923f86b Fix lldb test failure due to D93082. adds be89d7460b6 [lld][test] Relax test assertion of cmake defaults appearin [...] adds 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: .../clangd/GlobalCompilationDatabase.cpp | 11 +- clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/test/Misc/dev-fd-fs.c | 13 + lld/test/MachO/driver.test | 2 +- lldb/source/Symbol/ObjectFile.cpp | 228 +- lldb/test/Shell/Unwind/basic-block-sections.test | 14 +- llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 24 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 14 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 50 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 5 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 5 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1875 +++++----- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 16 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + mlir/docs/Passes.md | 4 + 211 files changed, 57371 insertions(+), 4532 deletions(-) create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/fold-vector-zero-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor [...] create mode 100644 llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/udiv-pow2-vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll copy llvm/test/Transforms/InstCombine/{vec_shuffle.ll => vec_shuffle-inseltpoison. [...] create mode 100644 llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-insel [...] create mode 100644 llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/InsertElement-insel [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevecto [...] create mode 100644 llvm/test/Transforms/InstSimplify/select-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/load-width-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopStrengthReduce/ARM/vctp-chains-inseltp [...] create mode 100644 llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-v [...] create mode 100644 llvm/test/Transforms/NewGVN/2016-08-30-MaskedScatterGather-xfai [...] create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_nest-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/vector-trunc-inseltpoison.ll create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/base-vector-inselt [...] create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/check_traversal_or [...] create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/live-vector-nospli [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-fu [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/insertelement-inselt [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/bswap-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/round-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/ARM/extract-insert-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/NVPTX/non-vectorizable-intri [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltp [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/external_user_jumbled_lo [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/extract-shuffle-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/hsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vec [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr31599-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sext-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sign-extend-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/value-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/zext-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/vectorizable-functions-insel [...] create mode 100644 llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/dbgloc-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/order-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-ops-insel [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/speculate-vector-ops-inseltpoison.ll create mode 100644 llvm/test/Transforms/SpeculativeExecution/spec-other-inseltpoison.ll create mode 100644 llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop-i [...] create mode 100644 llvm/test/Transforms/VectorCombine/AMDGPU/as-transition-inseltp [...] create mode 100644 llvm/test/Transforms/VectorCombine/Hexagon/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-consta [...] create mode 100644 llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/scalarize-cmp-inseltpoison.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig updated (9a51c5699 -> 384f518cf)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 9a51c5699 0: update: llvm-linux-qemu: boot new 384f518cf 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9a51c5699) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 226 +- 02-prepare_abe/console.log | 440 +- 03-build_llvm/console.log | 13752 +++++++++++------------ 04-build_linux/console.log | 770 +- 05-build_abe-qemu/console.log | 6487 +++++------ 06-boot_linux/console.log | 496 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 18 +- console.log | 22201 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 22206 insertions(+), 22204 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (ec498ed3d0f -> 0963fa93dcc)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/gcc. from ec498ed3d0f rs6000: Update the processor defaults for FreeBSD adds 97014e4ada4 c++: Copy elision and [[no_unique_address]]. [PR93711] adds f5cea9c5c4f c++: Fix constexpr array ICE [PR98332] adds e73caa0fc12 Daily bump. adds 0963fa93dcc modulo-sched: Carefully process loop counter initialization [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 13 +++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 17 ++++++ gcc/cp/call.c | 45 +++++++++------ gcc/cp/constexpr.c | 4 +- gcc/cp/cp-tree.h | 1 + gcc/cp/init.c | 3 +- gcc/cp/typeck2.c | 12 +++- gcc/modulo-sched.c | 71 +++++++++++++----------- gcc/testsuite/ChangeLog | 18 ++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C | 7 +++ gcc/testsuite/g++.dg/cpp1z/aggr-base10.C | 16 ++++++ gcc/testsuite/g++.dg/cpp2a/no_unique_address7.C | 13 +++++ gcc/testsuite/g++.dg/cpp2a/no_unique_address7a.C | 14 +++++ gcc/testsuite/gcc.c-torture/execute/pr97421-1.c | 23 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-2.c | 18 ++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-3.c | 22 ++++++++ 17 files changed, 246 insertions(+), 53 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-overflow3.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/aggr-base10.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/no_unique_address7.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/no_unique_address7a.C create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-1.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-2.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-3.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (8f9eec44b3 -> abd0dcd37f)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/binutils-gdb. from 8f9eec44b3 Automatic date update in version.in adds abd0dcd37f Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig updated (3781f2e8b -> bb245a085)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-next-defconfig in repository toolchain/ci/base-artifacts. discards 3781f2e8b 0: update: binutils-gcc-linux-qemu: boot new bb245a085 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (3781f2e8b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 410 +- 03-build_abe-binutils/console.log | 11896 +++++------ 04-build_abe-stage1/console.log | 13857 ++++++------- 05-build_linux/console.log | 566 +- 06-build_abe-qemu/console.log | 4347 ++-- 07-boot_linux/console.log | 484 +- 08-check_regression/console.log | 4 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 63 +- 09-update_baseline/results.regressions | 2 +- console.log | 31761 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 31711 insertions(+), 31821 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (b3e139444f4 -> bb7d3af1139)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/llvm-project. from b3e139444f4 [BDCE] Add tests for min/max intrinsincs (NFC) adds c5d6b2b7e57 [InstCombine] add test for assume in block with unreachable [...] adds 35c6d56c043 [InstCombine] rename tmp values to avoid scripted FileCheck [...] adds 35b35a373d0 [X86] Prevent shuffle combining from creating an identical [...] adds 69e5abb57b7 [libclang] Add CXRewriter to libclang API adds b07cbccf286 [gn build] Port 69e5abb57b7 adds 781a4384086 [InstSimplify] Add tests for min/max with dominating condit [...] adds 7cfc8f0c7c2 [libclang] Add missing dependency on clangRewrite lib adds 2bccd2b4350 [Driver] Allow -specs and -nostartfiles to be forwarded to GCC adds 89a4fe79d4d [Hexagon] Unindent everything in HexagonISelLowering.h, NFC adds 5e04b539c83 [compiler-rt] Try again to correct test after 3f1a9b7eca0 a [...] adds a5d6af421d6 [compiler-rt] Add .clang-tidy with customization to disable [...] adds 2d652949be4 [PowerPC] Provide vec_cmpne on pre-Power9 architectures in [...] adds 705271d9cd0 [PowerPC] Expand constrained ppc_fp128 to i32 conversion adds 3a6f3fc1603 Fix return status of SimplifyCFG adds 39caf9e9409 [SCCP] Add tests for intrinsic ranges (NFC) adds 714ceefad9b [SelectionDAG] Always intersect SDNode flags during getNode [...] adds d401e376e46 [InstCombine] Test abs with dominating condition (NFC) adds 1903a1afd94 [InstCombine] Add tests for cttz of abs intrinsic (NFC) adds 10cb23c6ca4 [InstCombine] Fold cttz of abs intrinsic adds 3ab13348ba4 [InstCombine] Add tests for mul of abs intrinsic (NFC) adds 58b28fa7a2f [InstCombine] Fold mul of abs intrinsic adds 8544defdcb0 Thread safety analysis: Document how try-acquire is handled adds 16975a638df Set InvalidDecl directly when deserializing a Decl adds 430b47a17d2 [MLIR] Remove unused arg from affine tiling validity check adds 94c71d6aa16 [InstCombine] Add tests for abs intrinsic eq zero (NFC) adds ada8a17d945 [InstCombine] Fold abs intrinsic eq zero adds 73104b0751a [InstSimplify] Fold min/max based on dominating condition adds 4892d3a1983 [InstCombine] Fold abs with dominating condition adds ac87480bd8b [SCEV] Recognize min/max intrinsics adds 9dcc82f34ea Thread safety analysis: Consider global variables in scope adds b2ce79ef661 Thread safety analysis: ValueDecl in Project is non-null adds 5ad6552a836 [InstCombine] Add tests for known negative abs intrinsic (NFC) adds d3a779fe215 Restore size of TemplateParameterList after D44352 adds da6b3aa4c6b Attempt to fix Sphinx build failure, NFC adds bef38e86b4e [ELF] Handle SHT_RISCV_ATTRIBUTES similarly to SHT_ARM_ATTRIBUTES adds 0c642828612 scan-build-py: fix multiprocessing error adds 1ddb3a369f7 [LangRef] Adjust guarantee for llvm.memcpy to also allow eq [...] adds 621b10ca187 [InstSimplify] Add tests for a peculiar abs of abs form (NFC) adds 1387f96ab33 [Hexagon] Handle widening of vector truncate adds 298c9fae937 [NFC][compiler-rt] Refine .clang-tidy checks adds 51597cc37a2 [NFC][Asan] Rename internal enum value. adds 398c44ba84e [NFC][Asan] Inline enum doc strings adds d5d09d93ee1 [NFC][Asan] Reformat some allocator code adds 8789f2bbde8 [Hexagon] Resize the mem operand when widening loads and stores adds 9518f032e49 [Hexagon] When widening truncate result, also widen operand [...] adds 62f89a89f31 [Hexagon] Add assertions about V6_pred_scalar2 adds aff94ec0f4d [AMDGPU] Remove the dead spill slots while spilling FP/BP t [...] adds 9128f5c8a71 [NFC][Asan] Move free_tid from ChunkHeader adds 289c08e4bc6 [NFC][Asan] Fix clang-tidy warning adds eb87e1dbcfd [Asan] Cleanup atomic usage in allocator adds d0abc757495 [GlobalISel] Disable the indexed loads combine completely u [...] adds b2e27a86c18 Revert "[Asan] Cleanup atomic usage in allocator" adds b11db3606ca [Asan] Cleanup atomic usage in allocator adds ff218cbc84f [InstSimplify] Fold degenerate abs of abs form adds 4d0312c8e05 Add proper move ctor/move assign to APValue. NFCI. adds d866dc37498 [ARM] Regenerate tests. NFC adds 667e800bb3a [ARM] Remove -O3 from mve intrinsic tests. NFC adds ecac5c28089 [X86][AVX] lowerShuffleWithPERMV - adjust binary shuffle ma [...] adds 8c386c94749 [SmallVector] Move error handling out of line adds cc6713a2c35 Thread safety analysis: Test and document release_generic_c [...] adds bbb3baf6205 Thread safety analysis: Improve documentation for scoped ca [...] adds 54d432aa6b8 [mlir] Add Shaped Type, Tensor Type and MemRef Type to pyth [...] adds 16bb71fd4f8 [DSE,MemorySSA] Add a few additional debug messages. adds 8542dab909f [compiler-rt] Implement __clear_cache() on OpenBSD/arm adds b536cbaac5f [ValueTracking] Avoid known bits fallback for non-zero get [...] adds ab68517e6b7 [asan_symbolize] Pass --demangle/--no-demangle instead of - [...] adds efa57f9a7ad [PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang adds caee15a0ed5 [WebAssembly] Fix incorrect assumption of simple value types adds d5c45041f14 [machinesink] add testcase for more sinking - NFC adds 69f2c79f2ad [ELF] Add a new e_machine value EM_CSKY and add some CSKY r [...] adds 9bee13f8908 Move targetHasSVE function to lldbtest.py adds 1fd7dc40748 When dumping results of StackLifetime, it will print the fo [...] adds 76953321666 Move NativeRegisterContextLinux/RegisterContextPOSIX*_arm t [...] adds 7403e3ee324 Extend PyConcreteType to support intermediate base classes. adds 70523ecfaca [Sparc] Select the UltraSPARC instruction set with the exte [...] adds b3205e2ace4 [scan-view] Explicitly use utf-8 in send_string adds 80186e4efc9 [CMake][TableGen] Simplify code by using list(TRANSFORM) adds 098130fa403 [CMake][Polly] Remove dead CMake code adds 21c0e74c9e7 [CMake][OpenMP] Remove old dead CMake code adds f4835b94f2c [CMake][TableGen] Remove dead CMake version checks adds 04ea680a8cc [cmake] Fix build of attribute plugin example on Windows adds 5350e1b5096 [KnownBits] Implement accurate unsigned and signed max and min adds a98b126696e Add BinaryFormat/ELFRelocs/CSKY.def to LLVM modulemap adds 40f4131fce7 [DWARFYAML] Make the debug_addr section optional. adds 0af4147804a [ARM][CostModel] CodeSize costs for i1 arith ops adds 713c2ad60c1 [GlobalISel] Extend not_cmp_fold to work on conditional exp [...] adds 65f78e73ad5 [SimplifyCFG] Consider cost of combining predicates. adds e7bd058c7e2 [clang-format] Allow configuring list of macros that map to [...] adds 8aa3b8da5db [clang-format] Handle typename macros inside cast expressions adds cd01eec14bc [clang-format] Check that */& after typename macros are poi [...] adds 56fa7d1dc6a [clang-format] Fix formatting of _Atomic() qualifier adds 9a22eba1509 [clang-format] Parse __underlying_type(T) as a type adds 05147d33091 [clang-format] Correctly parse function declarations with T [...] adds 7634c64b612 [OpenMP][AMDGPU] Use DS_Max_Warp_Number instead of WARPSIZE adds 8d64df9f139 [mlir][Vector] Revisit VectorToSCF. adds 81aa66f65f5 Extract infrastructure to ignore intermediate expressions i [...] adds 1a7a2cd7474 [Ignore Expressions][NFC] Refactor to better use `IgnoreExp [...] adds 0dbe2504af8 [X86] Use Register instead of unsigned. NFCI. adds 22fa6b20d92 [X86] Use Register instead of unsigned. NFCI. adds ee68b66d94b [NFC][PowerPC] Add tests for `mul` with big constants. adds 9ad261540da [X86] Use Register instead of unsigned. NFCI. adds aa3fcb96711 [X86][AVX] Add extra vperm2f128+vpermilvar combine coverage adds 71dfdbe2c73 [X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C) adds 7ba0f81934c [X86] Unbreak the build after 22fa6b20d92e adds 56d1f3138b5 [gn build] Port 81aa66f65f5 adds 0478720157f [clang] Prevent that Decl::dump on a CXXRecordDecl deserial [...] adds 9764eb9212c [gn build] Port 0478720157f adds 928c4b4b498 [SCEV] Refactor isHighCostExpansionHelper adds 136eb79a884 [MLIR][Standard] Add `dynamic_tensor_from_elements` operation adds 3097427f93d [obj2yaml] Add support for dumping the .debug_str section. adds 9b645ebfff1 [X86][AVX] Use lowerShuffleWithPERMV in shuffle combining t [...] adds 5bb27e735d3 X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode [...] adds 3a86eb03d54 [llvm-readobj/elf] - Introduce Relocation<ELFT> helper. adds e57cbcbdc18 LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI. adds 15acdd75439 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds 1c849ec40a5 [MLIR] Fix Win test due to partial order of CHECK directives adds 3ca8b9a560a [InstCombine] give a name to an intermediate value for easi [...] adds 28aa60aae25 [InstCombine] add test with more unreachable insts; NFC adds 79ea83e104e [SelectionDAG] memcpy expansion of const volatile struct ig [...] adds a8a91533dd6 [X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrin [...] adds 6670f5d1e66 MachineStableHash.h - remove MachineInstr.h include. NFC. adds dbb81881955 [llvm-readobj/elf] - Generalize the code for printing dynam [...] adds 973800dc7cb Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings." adds 23f700c785a Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl [...] adds bb73fcfd070 [gn build] Port 23f700c785a adds 2853ae3c1b8 [X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851) adds f6db681a789 [X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to sss [...] adds 6b954f1b796 [KillTheDoctor/CMake] Add missing keyword PRIVATE in target [...] adds 4368739941e [llvm-readobj] - Remove code duplication when printing dyna [...] adds a5046f7acec [NFC][PowerPC] Add tests in constants-i64.ll. adds 1e1a4a48198 [mlir] Take ValueRange instead of ArrayRef<Value> in Struct [...] adds 4b530f75199 [X86][SSE] Use llvm.abs.* vector intrinsics instead of old [...] adds 96e0f34be79 [X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intri [...] adds 288c582fc93 Follow up of rG5f1cad4d296a, slightly reduced test case. NFC. adds a70f2eb3e39 [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. adds b22910daab9 [InstCombine] erase instructions leading up to unreachable adds 60162626a5c [X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86 [...] adds 7993431dad0 [X86][SSE] Add test cases for PR47448 adds 9de0a3da6a7 [X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned comp [...] adds c4056f84282 [Sparc] Add reduced funnel shift test case for PR47303 adds 783d7116dc8 AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI. adds 2e1827271cb [flang] Fix link to old repo location in doxygen mainpage. NFC. adds d01280587d9 [analyzer][StdLibraryFunctionsChecker] Add POSIX pthread ha [...] adds 7e5dab5fca4 [flang] Spelling and format edits to README.txt. NFC. adds 8248c2af949 [analyzer][StdLibraryFunctionsChecker] Have proper weak dep [...] adds eb482afaf5b Reduce the number of memory allocations when displaying a w [...] adds 2480a31e5d6 [AMDGPU] SILowerControlFlow::optimizeEndCF should remove em [...] adds 11d8eedfa5b [InstCombine] move/add tests for icmp with mul operands; NFC adds 7a6d6f0f704 [InstCombine] improve folds for icmp with multiply operands [...] adds 1c34ac03a2d LeonPasses.h - remove orphan function declarations. NFCI. adds dfc333050b5 LeonPasses.h - remove unnecessary includes. NFCI. adds 95ca3aacf0f BTFDebug.h - reduce MachineInstr.h include to forward decla [...] adds 4e89a0ab021 MipsISelLowering.h - remove CCState/CCValAssign forward dec [...] adds 5ea9e655efd VPlan.h - remove unnecessary forward declarations. NFCI. adds e52e7ad54de [ms] [llvm-ml] Add support for bitwise named operators (AND [...] adds 2feb6e9b841 [ms] [llvm-ml] Fix STRUCT field alignment adds a3ec4a3158f [ms] [llvm-ml] Allow use of locally-defined variables in ex [...] adds 7a06b166b1a [DAGCombiner] allow more store merging for non-i8 truncated ops adds f3a6f6ccfdd [X86] Pre-commit new test case for D87214. NFC adds 01b3e167575 [X86] Use the same sequence for i128 ISD::ABS on 64-bit tar [...] adds 70207816e35 [InstCombine] add ptr difference tests; NFC adds 8b300679192 [InstCombine] improve fold of pointer differences adds da79b1eecc6 [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+ [...] adds 9fb46a452d4 [SCCP] Compute ranges for supported intrinsics adds ddab4cd83ea [KnownBits] Avoid some copies (NFC) adds bb7d3af1139 Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable commo [...] No new revisions were added by this update. Summary of changes: .../clang-tidy/modernize/UseAutoCheck.cpp | 2 +- .../readability/SimplifyBooleanExprCheck.cpp | 2 +- .../checks/bugprone-redundant-branch-condition.rst | 2 + clang/docs/ClangFormatStyleOptions.rst | 17 + clang/docs/ThreadSafetyAnalysis.rst | 114 ++- clang/examples/Attribute/CMakeLists.txt | 2 +- clang/include/clang-c/Rewrite.h | 63 ++ clang/include/clang/AST/APValue.h | 11 +- clang/include/clang/AST/DeclTemplate.h | 2 +- clang/include/clang/AST/Expr.h | 12 +- clang/include/clang/AST/IgnoreExpr.h | 61 ++ clang/include/clang/Basic/BuiltinsPPC.def | 7 + clang/include/clang/Driver/Options.td | 4 +- clang/include/clang/Format/Format.h | 19 + .../clang/StaticAnalyzer/Checkers/Checkers.td | 3 +- clang/lib/AST/APValue.cpp | 24 +- clang/lib/AST/CMakeLists.txt | 1 + clang/lib/AST/Expr.cpp | 233 ++---- clang/lib/AST/IgnoreExpr.cpp | 129 +++ clang/lib/Analysis/ThreadSafety.cpp | 18 +- clang/lib/Analysis/ThreadSafetyCommon.cpp | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 35 +- clang/lib/CodeGen/CGExprCXX.cpp | 2 +- clang/lib/Driver/ToolChains/Arch/Sparc.cpp | 9 +- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 7 +- clang/lib/Format/FormatTokenLexer.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 70 +- clang/lib/Headers/altivec.h | 131 ++- clang/lib/Sema/SemaExpr.cpp | 2 +- clang/lib/Serialization/ASTReaderDecl.cpp | 2 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 95 +++ clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 2 +- clang/test/Analysis/analyzer-enabled-checkers.c | 2 +- .../test/Analysis/std-c-library-functions-POSIX.c | 42 + ...std-c-library-functions-arg-enabled-checkers.c} | 15 +- .../std-c-library-functions-arg-weakdeps.c | 64 ++ clang/test/CodeGen/arm-mve-intrinsics/vmaxaq.c | 28 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vmaxq.c | 40 +- clang/test/CodeGen/arm-mve-intrinsics/vminaq.c | 28 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vminnmq.c | 24 +- clang/test/CodeGen/arm-mve-intrinsics/vminq.c | 40 +- clang/test/CodeGen/avx2-builtins.c | 12 +- clang/test/CodeGen/avx512bw-builtins.c | 32 +- clang/test/CodeGen/avx512f-builtins.c | 32 +- clang/test/CodeGen/avx512vl-builtins.c | 74 +- clang/test/CodeGen/avx512vlbw-builtins.c | 80 +- clang/test/CodeGen/builtins-ppc-altivec.c | 79 ++ clang/test/CodeGen/builtins-ppc-p10vector.c | 30 + clang/test/CodeGen/ssse3-builtins.c | 12 +- clang/test/Driver/freebsd.c | 2 +- clang/test/Driver/gcc_forward.c | 5 +- clang/test/Driver/linux-as.c | 4 +- clang/test/Driver/openbsd.c | 2 +- clang/test/PCH/cxx1z-decomposition.cpp | 10 +- clang/test/SemaCXX/thread-safety-annotations.h | 3 +- clang/test/SemaCXX/warn-thread-safety-analysis.cpp | 7 +- clang/test/SemaCXX/warn-thread-safety-negative.cpp | 29 + clang/tools/libclang/CMakeLists.txt | 2 + clang/tools/libclang/Rewrite.cpp | 63 ++ clang/tools/libclang/libclang.exports | 7 + clang/tools/scan-build-py/bin/analyze-build | 7 +- clang/tools/scan-build-py/bin/intercept-build | 7 +- clang/tools/scan-build-py/bin/scan-build | 7 +- clang/tools/scan-view/share/ScanView.py | 2 +- clang/unittests/Format/FormatTest.cpp | 191 ++++- clang/unittests/libclang/LibclangTest.cpp | 88 ++ compiler-rt/.clang-tidy | 2 + compiler-rt/lib/asan/asan_allocator.cpp | 178 ++-- compiler-rt/lib/asan/scripts/asan_symbolize.py | 2 +- compiler-rt/lib/builtins/clear_cache.c | 4 +- compiler-rt/lib/sanitizer_common/.clang-tidy | 16 - .../sanitizer_allocator_combined.h | 1 - .../sanitizer_allocator_primary64.h | 9 +- compiler-rt/test/.clang-tidy | 1 + .../test/asan/TestCases/Darwin/cstring_section.c | 2 +- flang/README.md | 11 +- flang/docs/doxygen-mainpage.dox | 2 +- lld/ELF/InputFiles.cpp | 53 +- lld/ELF/SyntheticSections.h | 2 +- lld/test/ELF/riscv-attributes.s | 33 + lldb/packages/Python/lldbsuite/test/lldbtest.py | 23 + .../Plugins/Process/FreeBSD/FreeBSDThread.cpp | 5 +- .../RegisterContextPOSIXProcessMonitor_arm.cpp | 6 +- .../RegisterContextPOSIXProcessMonitor_arm.h | 4 +- .../Linux/NativeRegisterContextLinux_arm.cpp | 94 +-- .../Process/Linux/NativeRegisterContextLinux_arm.h | 34 +- .../Process/Utility/RegisterContextPOSIX_arm.cpp | 131 +-- .../Process/Utility/RegisterContextPOSIX_arm.h | 51 +- .../Process/Utility/RegisterInfoPOSIX_arm.cpp | 104 ++- .../Process/Utility/RegisterInfoPOSIX_arm.h | 15 +- .../elf-core/RegisterContextPOSIXCore_arm.cpp | 4 +- .../elf-core/RegisterContextPOSIXCore_arm.h | 2 +- .../Plugins/Process/elf-core/ThreadElfCore.cpp | 14 +- .../rw_access_static_config/TestSVERegisters.py | 27 +- llvm/cmake/modules/TableGen.cmake | 20 +- llvm/docs/LangRef.rst | 10 +- llvm/include/llvm/ADT/SmallVector.h | 36 +- llvm/include/llvm/BinaryFormat/ELF.h | 7 + llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def | 74 ++ llvm/include/llvm/CodeGen/AntiDepBreaker.h | 1 - .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 4 +- llvm/include/llvm/CodeGen/MachineStableHash.h | 4 +- llvm/include/llvm/CodeGen/SelectionDAGNodes.h | 11 +- llvm/include/llvm/IR/IntrinsicsPowerPC.td | 12 + llvm/include/llvm/Object/ELFObjectFile.h | 4 + llvm/include/llvm/ObjectYAML/DWARFYAML.h | 2 +- llvm/include/llvm/Support/KnownBits.h | 16 + llvm/include/llvm/Target/GlobalISel/Combine.td | 2 +- llvm/include/llvm/Transforms/Utils/Local.h | 1 + .../Transforms/Utils/ScalarEvolutionExpander.h | 33 +- .../llvm/Transforms/Utils/SimplifyCFGOptions.h | 2 +- llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/BasicAliasAnalysis.cpp | 22 +- llvm/lib/Analysis/InstructionSimplify.cpp | 16 + llvm/lib/Analysis/ScalarEvolution.cpp | 19 + llvm/lib/Analysis/StackLifetime.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 73 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 35 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 100 ++- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 36 +- llvm/lib/CodeGen/MachineStableHash.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 18 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 28 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 - llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 30 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 2 + llvm/lib/IR/AutoUpgrade.cpp | 38 +- llvm/lib/MC/MCParser/MasmParser.cpp | 88 +- llvm/lib/Object/ELF.cpp | 9 + llvm/lib/ObjectYAML/DWARFEmitter.cpp | 2 +- llvm/lib/ObjectYAML/DWARFYAML.cpp | 2 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 4 + llvm/lib/Passes/PassBuilder.cpp | 13 +- llvm/lib/Support/KnownBits.cpp | 62 ++ llvm/lib/Support/SmallVector.cpp | 51 +- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 4 +- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 14 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 47 +- llvm/lib/Target/ARM/ARMTargetMachine.cpp | 3 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 17 +- llvm/lib/Target/BPF/BTFDebug.h | 8 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 902 +++++++++++---------- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 91 ++- llvm/lib/Target/Hexagon/HexagonPatternsHVX.td | 11 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 1 + llvm/lib/Target/Mips/MipsISelLowering.h | 2 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 94 ++- llvm/lib/Target/PowerPC/PPCISelLowering.h | 3 + llvm/lib/Target/PowerPC/PPCInstrInfo.td | 9 +- llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 15 +- llvm/lib/Target/Sparc/LeonPasses.cpp | 7 +- llvm/lib/Target/Sparc/LeonPasses.h | 9 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 2 +- .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 161 ++-- llvm/lib/Target/X86/X86InstrInfo.cpp | 10 +- llvm/lib/Transforms/IPO/PassManagerBuilder.cpp | 3 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 36 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 18 + .../Transforms/InstCombine/InstCombineCompares.cpp | 24 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstCombineMulDivRem.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 13 + .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 23 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 19 + llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 4 +- llvm/lib/Transforms/Utils/Local.cpp | 5 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 289 ++++--- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 28 +- llvm/lib/Transforms/Vectorize/VPlan.h | 2 - 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mlir/include/mlir/Conversion/Passes.td | 12 +- .../mlir/Conversion/ShapeToSCF/ShapeToSCF.h | 27 - mlir/include/mlir/Dialect/SCF/SCFOps.td | 8 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 49 ++ mlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h | 17 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 29 +- mlir/include/mlir/EDSC/Builders.h | 4 +- .../Dialect/Vector/CPU/test-transfer-to-loops.mlir | 81 ++ mlir/lib/Bindings/Python/IRModules.cpp | 296 ++++++- mlir/lib/CAPI/IR/StandardTypes.cpp | 36 + mlir/lib/Conversion/CMakeLists.txt | 1 - mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 3 +- .../lib/Conversion/SCFToStandard/SCFToStandard.cpp | 4 +- mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt | 19 - mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp | 337 -------- .../Conversion/ShapeToStandard/ShapeToStandard.cpp | 391 +++++++-- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 14 +- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 35 +- mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp | 5 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 7 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 2 +- mlir/lib/Dialect/Linalg/Transforms/Loops.cpp | 2 +- .../Dialect/Linalg/Transforms/Vectorization.cpp | 16 +- mlir/lib/Dialect/SCF/SCF.cpp | 8 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 2 +- .../Shape/Transforms/ShapeToShapeLowering.cpp | 2 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 62 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 24 + mlir/test/Bindings/Python/ir_types.py | 183 ++++- mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir | 132 --- .../ShapeToStandard/shape-to-standard.mlir | 211 ++++- .../StandardToLLVM/convert-static-memref-ops.mlir | 6 +- .../Conversion/VectorToSCF/vector-to-loops.mlir | 33 +- mlir/test/Dialect/Standard/invalid.mlir | 66 ++ mlir/test/Dialect/Standard/ops.mlir | 14 +- mlir/test/EDSC/builder-api-test.cpp | 2 +- openmp/cmake/OpenMPTesting.cmake | 9 +- openmp/libomptarget/deviceRTLs/common/omptarget.h | 2 +- .../deviceRTLs/common/src/data_sharing.cu | 2 +- openmp/runtime/cmake/LibompCheckFortranFlag.cmake | 47 +- polly/cmake/polly_macros.cmake | 15 - polly/lib/External/CMakeLists.txt | 3 +- 305 files changed, 8267 insertions(+), 3949 deletions(-) create mode 100644 clang/include/clang-c/Rewrite.h create mode 100644 clang/include/clang/AST/IgnoreExpr.h create mode 100644 clang/lib/AST/IgnoreExpr.cpp copy clang/test/Analysis/{analyzer-enabled-checkers.c => std-c-library-functions-a [...] create mode 100644 clang/test/Analysis/std-c-library-functions-arg-weakdeps.c create mode 100644 clang/tools/libclang/Rewrite.cpp create mode 100644 compiler-rt/.clang-tidy delete mode 100644 compiler-rt/lib/sanitizer_common/.clang-tidy create mode 100644 compiler-rt/test/.clang-tidy create mode 100644 lld/test/ELF/riscv-attributes.s create mode 100644 llvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def create mode 100644 llvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-memop.ll rename llvm/test/CodeGen/Hexagon/autohvx/{short-store-widen.ll => isel-widen-store [...] create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-op.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate.ll create mode 100644 llvm/test/CodeGen/PowerPC/mulli.ll create mode 100644 llvm/test/CodeGen/PowerPC/sink-down-more-instructions.ll create mode 100644 llvm/test/CodeGen/SPARC/fshl.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-mul-14.ll create mode 100644 llvm/test/CodeGen/SystemZ/int-cmp-60.ll create mode 100644 llvm/test/CodeGen/WebAssembly/pr47375.ll create mode 100644 llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll create mode 100644 llvm/test/Transforms/SCCP/intrinsics.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/merge-default.ll create mode 100644 llvm/test/tools/llvm-ml/named_bitwise_operators.test create mode 100644 llvm/test/tools/llvm-ml/variable.test create mode 100644 llvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml delete mode 100644 mlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h create mode 100644 mlir/integration_test/Dialect/Vector/CPU/test-transfer-to-loops.mlir delete mode 100644 mlir/lib/Conversion/ShapeToSCF/CMakeLists.txt delete mode 100644 mlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp delete mode 100644 mlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO updated (99e84448c -> 266beb607)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tx1/llvm-master-aarch64-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. from 99e84448c 2: update: llvm-b3e139444f41e5c281972b4002c09ee0500831f6: 1 new 266beb607 3: reset: llvm-bb7d3af1139c36270bc9948605e06f40e4c51541: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 19 +- 02-prepare_abe/console.log | 418 +- 03-build_abe-binutils/console.log | 10249 +-- 04-build_abe-stage1/console.log | 14611 ++-- 05-build_abe-linux/console.log | 313 +- 06-build_abe-glibc/console.log | 39149 ++++----- 07-build_abe-stage2/console.log | 37738 ++++----- 08-build_llvm-true/console.log | 13444 ++-- 10-benchmark--O3_LTO/benchmark-start.log | 2 +- 10-benchmark--O3_LTO/benchmark.log | 42 +- 10-benchmark--O3_LTO/console.log | 164 +- 11-check_regression/console.log | 833 +- 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/results-0.csv | 97 +- 11-check_regression/results-1.csv | 101 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 2 +- 11-check_regression/results-full.csv | 103 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2450 +- 11-check_regression/results.regressions | 1 + 11-check_regression/trigger-bisect | 4 + 12-update_baseline/console.log | 1188 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/results-0.csv | 101 +- 12-update_baseline/results-1.csv | 101 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-compare.csv | 13 +- 12-update_baseline/results-full.csv | 107 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2554 +- 12-update_baseline/results.regressions | 4 +- console.log | 118172 ++++++++++++++-------------- jenkins/manifest.sh | 12 +- reset-baseline | 0 results | 1 + results_id | 2 +- 37 files changed, 120809 insertions(+), 121362 deletions(-) create mode 100644 11-check_regression/results.regressions create mode 100644 11-check_regression/trigger-bisect create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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