Tcwg-commits December 2020

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (8f9eec44b3 -> abd0dcd37f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/binutils-gdb. from 8f9eec44b3 Automatic date update in version.in adds abd0dcd37f Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (c4aec13d6 -> 87420b987)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards c4aec13d6 0: update: binutils-gcc-linux-qemu: boot new 87420b987 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c4aec13d6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 235 +- 02-prepare_abe/console.log | 440 +- 03-build_abe-binutils/console.log | 11618 +++++------ 04-build_abe-stage1/console.log | 13260 ++++++------- 05-build_linux/console.log | 774 +- 06-build_abe-qemu/console.log | 4564 ++--- 07-boot_linux/console.log | 486 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 31429 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 31416 insertions(+), 31430 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (747f67e034a -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project. from 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/test/Misc/dev-fd-fs.c | 13 + llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 22 + llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 77 +- llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 24 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 14 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 50 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../IROutliner/outlining-isomorphic-predicates.ll | 170 + .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 5 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 5 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1875 +++++----- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 146 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + mlir/docs/Passes.md | 4 + 209 files changed, 57645 insertions(+), 4398 deletions(-) create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/fold-vector-zero-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor [...] create mode 100644 llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/udiv-pow2-vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll copy llvm/test/Transforms/InstCombine/{vec_shuffle.ll => vec_shuffle-inseltpoison. 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mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-consta [...] create mode 100644 llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/scalarize-cmp-inseltpoison.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (8300b9c55 -> e34e20a10)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 8300b9c55 0: update: llvm-linux-qemu: boot new e34e20a10 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (8300b9c55) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 23 +- 02-prepare_abe/console.log | 266 +- 03-build_llvm/console.log | 13180 +++++++++++------------ 04-build_linux/console.log | 798 +- 05-build_abe-qemu/console.log | 6666 ++++++------ 06-boot_linux/console.log | 492 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 2 +- console.log | 21429 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21424 insertions(+), 21442 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO updated (80ffeaec54d -> 2435878321b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO in repository toolchain/ci/gcc. from 80ffeaec54d Daily bump. adds ac03093140b Daily bump. adds a6a15fc45e2 Daily bump. adds 25b33ea27b1 Daily bump. adds 66d3e6b8911 Daily bump. adds c40b640ebce i386: Fix __builtin_floor with FE_DOWNWARD rounding directi [...] adds ea8d2c77e11 PR fortran/98307 - Dependency check fails when using "allocatable" adds 38e0d26587e Daily bump. new 2435878321b modulo-sched: Carefully process loop counter initialization [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 7 +++ gcc/DATESTAMP | 2 +- gcc/config/i386/i386.c | 25 +++++++-- gcc/fortran/ChangeLog | 9 ++++ gcc/fortran/trans-stmt.c | 5 +- gcc/modulo-sched.c | 71 ++++++++++++++----------- gcc/testsuite/ChangeLog | 13 +++++ gcc/testsuite/gcc.c-torture/execute/pr97421-1.c | 23 ++++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-2.c | 18 +++++++ gcc/testsuite/gcc.c-torture/execute/pr97421-3.c | 22 ++++++++ gcc/testsuite/gcc.target/i386/pr96793.c | 28 ++++++++++ gcc/testsuite/gfortran.dg/forall_19.f90 | 32 +++++++++++ 12 files changed, 216 insertions(+), 39 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-1.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-2.c create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr97421-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96793.c create mode 100644 gcc/testsuite/gfortran.dg/forall_19.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO updated (547beea12 -> 635e6e745)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. discards 547beea12 0: update: binutils-gcc-glibc-llvm: 1 new 635e6e745 0: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (547beea12) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 366 +- 03-build_abe-binutils/console.log | 10686 +- 04-build_abe-stage1/console.log | 18265 ++-- 05-build_abe-linux/console.log | 250 +- 06-build_abe-glibc/console.log | 38801 ++++--- 07-build_abe-stage2/console.log | 44130 ++++---- 08-build_llvm-true/console.log | 12746 +-- 10-benchmark--O3_LTO_marm/benchmark-start.log | 2 +- 10-benchmark--O3_LTO_marm/benchmark.log | 13 +- 10-benchmark--O3_LTO_marm/console.log | 159 +- 11-check_regression/console.log | 762 +- 11-check_regression/results-0.csv | 113 +- 11-check_regression/results-1.csv | 113 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-full.csv | 119 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2594 +- 12-update_baseline/console.log | 772 +- 12-update_baseline/results-0.csv | 113 +- 12-update_baseline/results-1.csv | 113 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-full.csv | 119 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2582 +- console.log | 127141 +++++++++++------------ jenkins/manifest.sh | 12 +- results_id | 2 +- 28 files changed, 130102 insertions(+), 130171 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (7143923f86b -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 7143923f86b Fix lldb test failure due to D93082. adds be89d7460b6 [lld][test] Relax test assertion of cmake defaults appearin [...] adds 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/test/Misc/dev-fd-fs.c | 13 + lld/test/MachO/driver.test | 2 +- llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 22 + llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 77 +- llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 24 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 14 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 50 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../IROutliner/outlining-isomorphic-predicates.ll | 170 + .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 5 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 5 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1875 +++++----- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 146 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + mlir/docs/Passes.md | 4 + 211 files changed, 57649 insertions(+), 4400 deletions(-) create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll 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mode 100644 llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/udiv-pow2-vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll copy llvm/test/Transforms/InstCombine/{vec_shuffle.ll => vec_shuffle-inseltpoison. [...] create mode 100644 llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-insel [...] create mode 100644 llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/InsertElement-insel [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevecto [...] create mode 100644 llvm/test/Transforms/InstSimplify/select-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/load-width-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopStrengthReduce/ARM/vctp-chains-inseltp [...] create mode 100644 llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-v [...] create mode 100644 llvm/test/Transforms/NewGVN/2016-08-30-MaskedScatterGather-xfai [...] create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_nest-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/vector-trunc-inseltpoison.ll create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/base-vector-inselt [...] create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/check_traversal_or [...] create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/live-vector-nospli [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-fu [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/insertelement-inselt [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/bswap-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/round-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/ARM/extract-insert-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/NVPTX/non-vectorizable-intri [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/cmp_commute-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltp [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/external_user_jumbled_lo [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/extract-shuffle-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/hsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vec [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr31599-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sext-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sign-extend-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/value-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/zext-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/vectorizable-functions-insel [...] create mode 100644 llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/dbgloc-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/order-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-ops-insel [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/speculate-vector-ops-inseltpoison.ll create mode 100644 llvm/test/Transforms/SpeculativeExecution/spec-other-inseltpoison.ll create mode 100644 llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop-i [...] create mode 100644 llvm/test/Transforms/VectorCombine/AMDGPU/as-transition-inseltp [...] create mode 100644 llvm/test/Transforms/VectorCombine/Hexagon/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-consta [...] create mode 100644 llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/scalarize-cmp-inseltpoison.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (0261e49f6 -> 43a6ee698)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 0261e49f6 0: update: llvm-linux-qemu: 19158 new 43a6ee698 0: update: llvm-linux-qemu: 19158 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0261e49f6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 446 +- 03-build_llvm/console.log | 13824 +++++++++++++-------------- 04-build_linux/console.log | 896 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 12 +- 08-update_baseline/results.regressions | 2 +- console.log | 15258 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 15264 insertions(+), 15264 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (74b3acefc7b -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from 74b3acefc7b [clangd] Fix case mismatch crash on in CDB on windows after [...] adds d97e9f1a3d8 [lldb] Simplify ObjectFile::FindPlugin (NFC) adds 7143923f86b Fix lldb test failure due to D93082. adds be89d7460b6 [lld][test] Relax test assertion of cmake defaults appearin [...] adds 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/test/Misc/dev-fd-fs.c | 13 + lld/test/MachO/driver.test | 2 +- lldb/source/Symbol/ObjectFile.cpp | 228 +- lldb/test/Shell/Unwind/basic-block-sections.test | 14 +- llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 22 + llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 77 +- llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 24 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../InstCombine/InstructionCombining.cpp | 14 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 50 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../IROutliner/outlining-isomorphic-predicates.ll | 170 + .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 6 +- .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 5 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 5 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1875 +++++----- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 146 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + mlir/docs/Passes.md | 4 + 213 files changed, 57760 insertions(+), 4531 deletions(-) create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/fold-vector-zero-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor [...] create mode 100644 llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/udiv-pow2-vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll copy llvm/test/Transforms/InstCombine/{vec_shuffle.ll => vec_shuffle-inseltpoison. [...] create mode 100644 llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-insel [...] create mode 100644 llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/InsertElement-insel [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevecto [...] create mode 100644 llvm/test/Transforms/InstSimplify/select-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects-inseltp [...] create mode 100644 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4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (bdd447ba0 -> 9a09018cb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards bdd447ba0 2: update: llvm-linux-qemu: 19388 new 9a09018cb 2: update: llvm-linux-qemu: 19388 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bdd447ba0) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 60 +- 02-prepare_abe/console.log | 410 +- 03-build_llvm/console.log | 13816 +++++++++++++-------------- 04-build_linux/console.log | 752 +- 07-check_regression/console.log | 2 +- 07-check_regression/results.regressions | 6 +- 08-update_baseline/console.log | 6 +- 08-update_baseline/results.regressions | 6 +- console.log | 15046 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 15054 insertions(+), 15058 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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