Tcwg-commits December 2020

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[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allmodconfig updated (614cb5894306 -> 58cf05f597b0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allmodconfig in repository toolchain/ci/linux. from 614cb5894306 Merge tag 'acpi-5.11-rc1-2' of git://git.kernel.org/pub/sc [...] adds 7f6f1dfb2dcb watchdog: armada_37xx: Add missing dependency on HAS_IOMEM adds 8ae2511112d2 watchdog: sirfsoc: Add missing dependency on HAS_IOMEM adds f61a59acb462 watchdog: sprd: remove watchdog disable from resume fail path adds 3e07d2409398 watchdog: sprd: check busy bit before new loading rather t [...] adds 2a6c9c65b2fe watchdog: sprd: change to use usleep_range() instead of busy loop adds 7c7164f935c8 watchdog: stm32_iwdg: don't print an error on probe deferral adds 4600736f050f watchdog: remove pnx83xx driver adds 8650d0f9e933 watchdog: qcom_wdt: set WDOG_HW_RUNNING bit when appropriate adds 8711071e9700 watchdog: rti-wdt: fix reference leak in rti_wdt_probe adds 9747f12b5be9 watchdog: geodewdt: remove unneeded break adds 347755d2a88e watchdog: sbc_fitpc2_wdt: add __user annotations adds 42e967f3c6cb wdt: sp805: add watchdog_stop on reboot adds acc195bd2cc4 watchdog/hpwdt: Disable NMI in Crash Kernel adds 5674b74e52c0 watchdog/hpwdt: Reflect changes adds 24f98562bb5b watchdog: wdat_wdt: Fix missing kerneldoc reported by W=1 adds 6f733cb2e7db watchdog: Fix potential dereferencing of null pointer adds 89c866f5a238 watchdog: iTCO_wdt: use module_platform_device() macro adds 7948fab26bcc watchdog: qcom: Avoid context switch in restart handler adds 8cbd82d62f45 dt-bindings: watchdog: sun4i: Add A100 compatible adds 36c47df85ee8 watchdog: coh901327: add COMMON_CLK dependency adds e629fffcc333 dt-binding: watchdog: add Rockchip compatibles to snps,dw- [...] adds c21172b3a73e watchdog: iTCO_wdt: use dev_*() instead of pr_*() for logging adds 0b9491b62119 watchdog: convert comma to semicolon adds 6755f4563144 Merge tag 'linux-watchdog-5.11-rc1' of git://www.linux-wat [...] adds 853c1a789f5f platform/chrome: Don't treat RTC events as wakeup sources adds 0498710be002 platform/chrome: cros_ec_typec: Relocate set_port_params_v [...] adds 7ab5a673f4ce platform/chrome: cros_ec_typec: Fix remove partner logic adds 514acf1cefd0 platform/chrome: cros_ec_typec: Clear partner identity on [...] adds cd2c40ff90b0 platform/chrome: cros_ec: Import Type C host commands adds 80f8cef60d79 platform/chrome: cros_ec_typec: Introduce TYPEC_STATUS adds f6f668118918 platform/chrome: cros_ec_typec: Parse partner PD ID VDOs adds de0f49487db3 platform/chrome: cros_ec_typec: Register partner altmodes adds 6ae9b5ffcaeb platform/chrome: cros_ec_typec: Tolerate unrecognized mux flags adds a0881596757f Merge tag 'tag-chrome-platform-for-v5.11' of git://git.ker [...] adds 34cdf405aa5d ALSA: hda/realtek: Remove dummy lineout on Acer TravelMate [...] adds 150927c3674d ALSA: hda/realtek - Supported Dell fixed type headset adds 74c64efa1557 ALSA: core: memalloc: add page alignment for iram adds 725124d10d00 ALSA: usb-audio: Add VID to support native DSD reproductio [...] adds f2283366c291 ALSA: pcm: Remove snd_pcm_lib_preallocate_dma_free() adds 9df28edce7c6 ALSA: usb-audio: Disable sample read check if firmware doe [...] adds 5c1733e33c88 ALSA: memalloc: Align buffer allocations in page size adds 618de0f4ef11 ALSA: pcm: Clear the full allocated memory at hw_params adds 11cb881bf075 ALSA: pcm: oss: Fix a few more UBSAN fixes adds 09926202e939 ALSA: hda/realtek: Add quirk for MSI-GP73 adds 8b7c764e0644 ALSA: core: Remove redundant comments adds 525d9c57d0ee ALSA: usb-audio: Add alias entry for ASUS PRIME TRX40 PRO-S adds 43877226829e ALSA: usb-audio: Add implicit feeback support for the BOSS GT-1 adds 6ca653e3f73a ALSA: hda/realtek: Apply jack fixup for Quanta NL3 adds 13be30f156fd ALSA/hda: apply jack fixup for the Acer Veriton N4640G/N66 [...] adds 58cf05f597b0 Merge tag 'sound-fix-5.11-rc1' of git://git.kernel.org/pub [...] No new revisions were added by this update. Summary of changes: .../bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 3 + .../devicetree/bindings/watchdog/snps,dw-wdt.yaml | 10 +- drivers/platform/chrome/cros_ec_proto.c | 14 +- drivers/platform/chrome/cros_ec_typec.c | 336 ++++++++++++++++----- drivers/watchdog/Kconfig | 14 +- drivers/watchdog/Makefile | 1 - drivers/watchdog/geodewdt.c | 2 - drivers/watchdog/hpwdt.c | 8 +- drivers/watchdog/iTCO_wdt.c | 34 +-- drivers/watchdog/mpc8xxx_wdt.c | 4 +- drivers/watchdog/pnx833x_wdt.c | 277 ----------------- drivers/watchdog/qcom-wdt.c | 20 +- drivers/watchdog/rti_wdt.c | 4 +- drivers/watchdog/sbc_fitpc2_wdt.c | 12 +- drivers/watchdog/sp805_wdt.c | 1 + drivers/watchdog/sprd_wdt.c | 43 ++- drivers/watchdog/stm32_iwdg.c | 13 +- drivers/watchdog/watchdog_core.c | 22 +- drivers/watchdog/wdat_wdt.c | 6 +- include/linux/platform_data/cros_ec_commands.h | 155 ++++++++++ sound/core/init.c | 2 - sound/core/memalloc.c | 4 +- sound/core/oss/pcm_oss.c | 22 +- sound/core/pcm_memory.c | 10 +- sound/core/pcm_native.c | 9 +- sound/pci/hda/patch_realtek.c | 33 ++ sound/usb/card.c | 3 + sound/usb/clock.c | 6 + sound/usb/implicit.c | 2 + sound/usb/quirks.c | 1 + 30 files changed, 601 insertions(+), 470 deletions(-) delete mode 100644 drivers/watchdog/pnx833x_wdt.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allmodconfig updated (4d736a59e -> 62aafe44f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 4d736a59e 2: update: llvm-linux-qemu: 21196 new 62aafe44f 2: update: llvm-linux-qemu: 21196 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4d736a59e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 226 +- 02-prepare_abe/console.log | 440 +- 03-build_llvm/console.log | 13072 +++++++++++++------------- 04-build_linux/console.log | 818 +- 07-check_regression/console.log | 18 +- 07-check_regression/results.regressions | 10 +- 08-update_baseline/console.log | 138 +- 08-update_baseline/results.regressions | 10 +- console.log | 14712 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 14726 insertions(+), 14726 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (af3f37319c -> a05f8ecd88)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/qemu. from af3f37319c Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds a9dc68d9b2 i386: move kvm accel files into kvm/ adds 1fc33bb9f0 i386: move whpx accel files into whpx/ adds 7fdef0d4f2 i386: move hax accel files into hax/ adds dbe59a1991 i386: hvf: remove stale MAINTAINERS entry for old hvf stubs adds 1b248f147e i386: move TCG accel files into tcg/ adds 0c36af8ce8 i386: move cpu dump out of helper.c into cpu-dump.c adds 088567713f i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() adds 735db465b0 i386: move hyperv_interface_id initialization to x86_cpu_rea [...] adds fb7e31aa4f i386: move hyperv_version_id initialization to x86_cpu_realizefn() adds 23eb5d032f i386: move hyperv_limits initialization to x86_cpu_realizefn() adds 40399ecb69 x86/cpu: Add AVX512_FP16 cpu feature adds ed69e8314d i386: move TCG cpu class initialization to tcg/ adds 69483f3115 i386: tcg: remove inline from cpu_load_eflags adds 035ba06c2e tcg: cpu_exec_{enter,exit} helpers adds 80c4750ba8 tcg: make CPUClass.cpu_exec_* optional adds 710384d042 tcg: Make CPUClass.debug_excp_handler optional adds 9fb75013d8 cpu: Remove unnecessary noop methods adds 75ee62ac60 Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-n [...] adds 10b43754cf hw/riscv: sifive_u: Add UART1 DT node in the generated DTB adds dfc973ecc1 hw/riscv: microchip_pfsoc: add QSPI NOR flash adds b3d2a4296f hw/core/register.c: Don't use '#' flag of printf format adds c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV adds 529577457c target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR adds 54a581c228 intc/ibex_plic: Clear interrupts that occur during claim process adds 617448a46b hw/riscv: Expand the is 32-bit check to support more CPUs adds c0a635f397 target/riscv: Add a TYPE_RISCV_CPU_BASE CPU adds dc4d4aaee3 riscv: spike: Remove target macro conditionals adds 09fe17125e riscv: virt: Remove target macro conditionals adds 7893677184 hw/riscv: boot: Remove compile time XLEN checks adds 9d01143063 hw/riscv: virt: Remove compile time XLEN checks adds bd62c13ea8 hw/riscv: spike: Remove compile time XLEN checks adds 2206ffa68f hw/riscv: sifive_u: Remove compile time XLEN checks adds 5b6c291b8d target/riscv: fpu_helper: Match function defs in HELPER macros adds 51ae0cabc6 target/riscv: Add a riscv_cpu_is_32bit() helper function adds 114baaca51 target/riscv: Specify the XLEN for CPUs adds 5c5a47f10c target/riscv: cpu: Remove compile time XLEN checks adds f08c7ff3dc target/riscv: cpu_helper: Remove compile time XLEN checks adds 8987cdc481 target/riscv: csr: Remove compile time XLEN checks adds 094b072c68 target/riscv: cpu: Set XLEN independently from target adds 3ed2b8ac2d hw/riscv: Use the CPU to determine if 32-bit adds d31e970a01 riscv/opentitan: Update the OpenTitan memory layout adds a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 11 +- accel/tcg/cpu-exec.c | 34 +- hw/core/cpu.c | 13 - hw/core/register.c | 16 +- hw/i386/fw_cfg.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/clock.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/x86.c | 2 +- hw/intc/ibex_plic.c | 13 +- hw/riscv/boot.c | 70 ++-- hw/riscv/microchip_pfsoc.c | 21 ++ hw/riscv/opentitan.c | 81 +++-- hw/riscv/sifive_u.c | 74 ++-- hw/riscv/spike.c | 52 +-- hw/riscv/virt.c | 39 ++- include/hw/riscv/boot.h | 14 +- include/hw/riscv/microchip_pfsoc.h | 3 + include/hw/riscv/opentitan.h | 23 +- include/hw/riscv/spike.h | 6 - include/hw/riscv/virt.h | 6 - meson.build | 1 + target/i386/cpu-dump.c | 537 ++++++++++++++++++++++++++++ target/i386/cpu.c | 75 ++-- target/i386/cpu.h | 97 +----- target/i386/{ => hax}/hax-all.c | 0 target/i386/{ => hax}/hax-cpus.c | 0 target/i386/{ => hax}/hax-cpus.h | 0 target/i386/{ => hax}/hax-i386.h | 6 +- target/i386/{ => hax}/hax-interface.h | 0 target/i386/{ => hax}/hax-mem.c | 0 target/i386/{ => hax}/hax-posix.c | 0 target/i386/{ => hax}/hax-posix.h | 0 target/i386/{ => hax}/hax-windows.c | 0 target/i386/{ => hax}/hax-windows.h | 0 target/i386/hax/meson.build | 7 + target/i386/helper.c | 539 +---------------------------- target/i386/{ => kvm}/hyperv-proto.h | 0 target/i386/{ => kvm}/hyperv-stub.c | 0 target/i386/{ => kvm}/hyperv.c | 0 target/i386/{ => kvm}/hyperv.h | 0 target/i386/{ => kvm}/kvm-stub.c | 0 target/i386/{ => kvm}/kvm.c | 70 ++-- target/i386/{ => kvm}/kvm_i386.h | 0 target/i386/kvm/meson.build | 3 + target/i386/kvm/trace-events | 7 + target/i386/kvm/trace.h | 1 + target/i386/machine.c | 4 +- target/i386/meson.build | 33 +- target/i386/{ => tcg}/bpt_helper.c | 1 + target/i386/{ => tcg}/cc_helper.c | 1 + target/i386/{ => tcg}/cc_helper_template.h | 0 target/i386/{ => tcg}/excp_helper.c | 1 + target/i386/{ => tcg}/fpu_helper.c | 39 ++- target/i386/tcg/helper-tcg.h | 95 +++++ target/i386/{ => tcg}/int_helper.c | 1 + target/i386/{ => tcg}/mem_helper.c | 1 + target/i386/tcg/meson.build | 14 + target/i386/{ => tcg}/misc_helper.c | 14 + target/i386/{ => tcg}/mpx_helper.c | 1 + target/i386/{ => tcg}/seg_helper.c | 1 + target/i386/{ => tcg}/smm_helper.c | 2 + target/i386/{ => tcg}/svm_helper.c | 1 + target/i386/tcg/tcg-cpu.c | 71 ++++ target/i386/tcg/tcg-cpu.h | 15 + target/i386/{ => tcg}/tcg-stub.c | 0 target/i386/{ => tcg}/translate.c | 1 + target/i386/trace-events | 6 - target/i386/whpx/meson.build | 5 + target/i386/{ => whpx}/whp-dispatch.h | 0 target/i386/{ => whpx}/whpx-all.c | 0 target/i386/{ => whpx}/whpx-apic.c | 0 target/i386/{ => whpx}/whpx-cpus.c | 0 target/i386/{ => whpx}/whpx-cpus.h | 0 target/riscv/cpu.c | 84 +++-- target/riscv/cpu.h | 8 + target/riscv/cpu_bits.h | 8 +- target/riscv/cpu_helper.c | 15 +- target/riscv/csr.c | 176 +++++----- target/riscv/fpu_helper.c | 8 - target/riscv/helper.h | 24 +- 83 files changed, 1390 insertions(+), 1073 deletions(-) create mode 100644 target/i386/cpu-dump.c rename target/i386/{ => hax}/hax-all.c (100%) rename target/i386/{ => hax}/hax-cpus.c (100%) rename target/i386/{ => hax}/hax-cpus.h (100%) rename target/i386/{ => hax}/hax-i386.h (95%) rename target/i386/{ => hax}/hax-interface.h (100%) rename target/i386/{ => hax}/hax-mem.c (100%) rename target/i386/{ => hax}/hax-posix.c (100%) rename target/i386/{ => hax}/hax-posix.h (100%) rename target/i386/{ => hax}/hax-windows.c (100%) rename target/i386/{ => hax}/hax-windows.h (100%) create mode 100644 target/i386/hax/meson.build rename target/i386/{ => kvm}/hyperv-proto.h (100%) rename target/i386/{ => kvm}/hyperv-stub.c (100%) rename target/i386/{ => kvm}/hyperv.c (100%) rename target/i386/{ => kvm}/hyperv.h (100%) rename target/i386/{ => kvm}/kvm-stub.c (100%) rename target/i386/{ => kvm}/kvm.c (98%) rename target/i386/{ => kvm}/kvm_i386.h (100%) create mode 100644 target/i386/kvm/meson.build create mode 100644 target/i386/kvm/trace-events create mode 100644 target/i386/kvm/trace.h rename target/i386/{ => tcg}/bpt_helper.c (99%) rename target/i386/{ => tcg}/cc_helper.c (99%) rename target/i386/{ => tcg}/cc_helper_template.h (100%) rename target/i386/{ => tcg}/excp_helper.c (99%) rename target/i386/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/i386/tcg/helper-tcg.h rename target/i386/{ => tcg}/int_helper.c (99%) rename target/i386/{ => tcg}/mem_helper.c (99%) create mode 100644 target/i386/tcg/meson.build rename target/i386/{ => tcg}/misc_helper.c (97%) rename target/i386/{ => tcg}/mpx_helper.c (99%) rename target/i386/{ => tcg}/seg_helper.c (99%) rename target/i386/{ => tcg}/smm_helper.c (99%) rename target/i386/{ => tcg}/svm_helper.c (99%) create mode 100644 target/i386/tcg/tcg-cpu.c create mode 100644 target/i386/tcg/tcg-cpu.h rename target/i386/{ => tcg}/tcg-stub.c (100%) rename target/i386/{ => tcg}/translate.c (99%) create mode 100644 target/i386/whpx/meson.build rename target/i386/{ => whpx}/whp-dispatch.h (100%) rename target/i386/{ => whpx}/whpx-all.c (100%) rename target/i386/{ => whpx}/whpx-apic.c (100%) rename target/i386/{ => whpx}/whpx-cpus.c (100%) rename target/i386/{ => whpx}/whpx-cpus.h (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (00bad763dcb -> 662b9c55cf0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/gcc. from 00bad763dcb rtl-ssa: Fix reg_raw_mode thinko [PR98347] adds 35b8d268746 arm: Add support for Cortex-A78C adds cd69e3d5cd6 Daily bump. adds 20f292863f6 c++: Diagnose unstable satisfaction adds 79f57d5cb07 c++: Diagnose self-recursive satisfaction adds 731a32b3fa7 c++: More precise tracking of potentially unstable satisfaction adds e3f0eaa2829 libstdc++: Import parts of the Ryu library adds 5033506993e libstdc++: Apply modifications to our local copy of Ryu adds 3c57e692357 libstdc++: Add floating-point std::to_chars implementation adds ddb9c661c2f libstdc++: Import MSVC floating-point std::to_chars testcases adds dc00689332f Go testsuite: handle +build lines correctly adds 11f07ef3778 c++: Fix PCH ICE with __builtin_source_location [PR98343] adds ce8dcc9105c As well as the PR this patch fixes problems in handling cla [...] adds 785b49434d2 c++: Fix windows binary files [PR 98362] adds bcac28716bb Arm: MVE: Add missing complex mul iterators adds 7ff5706fcd7 aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE adds 3af02d32cce openmp: Implicitly add 'declare target' directives for dyna [...] adds 266d7464756 libstdc++: Check FE_TONEAREST is defined before using it adds d7bab388b81 libstdc++: Fix build failure due to missing <langinfo.h> [PR98374] adds 22a7e82c200 libstdc++: Fix build failure on AArch64 ILP32 [PR98370] adds 60cecb2b83f libstdc++: Fix mistake in PR98374 change [PR98377] adds d44d47b4926 aarch64: SVE: ICE in expand_direct_optab_fn [PR98177] adds 5dc998933e7 libcc1: Fix up libcc1 configure [PR98330] adds bfb37fa4dd4 openmp: Fix g++.dg/gomp/declare-target-3.C testcase when of [...] adds 8b604594652 openmp: Don't optimize shared to firstprivate on task with [...] adds 0e9f2b2dc8d Re: [r11-6232 Regression] FAIL: gcc.dg/pr97750.c adds 5128f8d0d99 compiler: check for floating-point exponent overflow adds b1a2242e24f Daily bump. adds 9032d2b2414 bswap: Fix up a thinko with empty CONSTRUCTORs [PR98378] adds e9e4ddfc5ab d: Fix ICE in in force_decl_die, at dwarf2out.c with -gdwar [...] adds 69165332a91 expr: Fix up constant_byte_string bitfield handling [PR98366] adds eb460c5986b Daily bump. adds bebf930dd2b Correct coarray indices for test case. adds 8d76c007afe Set DECL_ARTIFICIAL on gfortran internal variables. adds 8b01af02b50 doc: Fix a typo [PR98400] adds 3621a7bb579 libstdc++: Fix indentation in <semaphore> adds 18e86fae2a1 gcc: xtensa: implement bswapsi2, bswapdi2 and helpers adds 108beb75da0 Daily bump. adds 9bac66390c0 libgo: adjust sysinfo scripts for changed -fdump-go-spec adds b6237343e78 openmp: Fix up handling of addressable temporaries in simd [...] adds d8aeee11af7 fold-const: Fix up a buffer overflow in native_encode_initi [...] adds 2ebe7526584 gcc-changelog: add Unicode test-case adds 1b021bbd85a gcc-changelog: new error for quoted utf8 filenames adds e4043c636ce c++tools: Fix exe suffix [PR 98409] adds 31705b068fa libcody: Add netinet.h adds 119d7478d1a libcody: to_string is not always available [PR 98412] adds 626b63d63a2 libcody: Add ranlib adds cf22f78ff6e libcody: Include <netinet/in.h> as needed adds 1467a5c5ab0 bootstrap: std:stoul non-portable [PR 98412] adds e798f081925 c++: Windows rename [PR 98412] adds 6a31d47e271 libstdc++: Disable floating-point std::to_chars on unsuppor [...] adds 0e1d4b3bfe2 Darwin : Update the kernel version to macOS version mapping. adds 71690493322 c++: Fix demangling of x.operator type adds 8cd42d3cc24 c++: Fix demangling of qualified-id after '.' adds a477f1445b3 gimplify: Gimplify value in gimplify_init_ctor_eval_range [ [...] adds 1a5e728a544 Daily bump. adds 03ea48ff27f Go frontend: ensure mpfr exponent range is large enough for Go adds 30b76d90596 -fdump-go-spec: don't crash if DECL_ORIGINAL_TYPE is NULL adds 93ac0c05ffc Fix Typo. adds 58fb912c151 c++: Fix demangling of <unresolved-name> adds 027935eec43 c++: Add some asserts in mangle.c adds 7e63d383b89 c++: Fix build with clang adds 337ed0eb490 i386: Fix __builtin_floor with FE_DOWNWARD rounding directi [...] adds ae27ce51e48 arm&aarch64: subdivide the type attribute "alu_shfit_imm" adds ffd454b92ba c++: Handle array members in build_comparison_op [PR93480] adds 1fa5fc7408d runtime: remove scase.releasetime field adds 48357ce4f22 runtime: omit nil-channel cases from selectgo's orders adds 3b2d8145a4c runtime: add "success" field to sudog adds 8be20b9e0d6 c++: Module ICE fix adds 6aff491f7b1 testsuite: C++ module tests adds 313890530c5 runtime: eliminate scase.kind field adds 7b899797476 compiler: initialize saw_send_stmt locals adds 077fefbfaec Daily bump. adds 544f4775360 c++tools: Fix PIE [PR 98324] adds c142ae5e17e i386: Fix __builtin_trunc with FE_DOWNWARD rounding directi [...] adds 16929214fd1 libcody: Remove testsuite [PR 98318] adds feb3c40c8ee d: Force TYPE_MODE of classes and non-POD structs as BLKmode adds f3f237f7ee0 compiler: remove references to slicecopy and slicestringcopy adds 96de87b99bf Darwin : Adjust handling of MACOSX_DEPLOYMENT_TARGET for macOS 11. adds 6b7d53a2593 c++: Fix constexpr array ICE [PR98332] adds 550880a3168 c++: Fix up floating point complex handling in build_zero_i [...] adds 0a541e746c7 c++: Improve testcase [PR98332] adds 3932785450f compiler: nil-checked pointers and index expressions can trap adds 612cf351c70 c++: Fix initializing empty base from prvalue [PR97597] adds 745f22096c3 c++: EOF location [PR 96045] adds 36c08a8f212 mark some tests in gcc.target/arm as requiring "fpic" support adds eb81c997d81 Account for VxWorks headers in libstdc++ test on names adds fdd8560cce9 PR c++/98413 - ICE on placement new and member pointer adds 0df311657dc PR middle-end/98160 - ICE in warn_dealloc_offset on member [...] adds 85d8ebcfc23 Daily bump. adds 085fd2a46e5 compiler: parenthesize channel type strings if necessary adds 168be2b3afd RISC-V: Fix python3 compatibility for multilib-generator adds 662b9c55cf0 C++ : Add the -stdlib= option. No new revisions were added by this update. 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| 5 + gcc/testsuite/g++.dg/modules/macro-5_b.H | 8 + gcc/testsuite/g++.dg/modules/macro-5_c.C | 8 + gcc/testsuite/g++.dg/modules/macro-6_a.H | 8 + gcc/testsuite/g++.dg/modules/macro-6_b.C | 11 + gcc/testsuite/g++.dg/modules/macro-6_c.C | 11 + gcc/testsuite/g++.dg/modules/macro-7_a.C | 13 + gcc/testsuite/g++.dg/modules/macro-7_b.C | 10 + gcc/testsuite/g++.dg/modules/macro-7_c.C | 7 + gcc/testsuite/g++.dg/modules/map-1.map | 2 + gcc/testsuite/g++.dg/modules/map-1_a.C | 13 + gcc/testsuite/g++.dg/modules/map-1_b.C | 13 + gcc/testsuite/g++.dg/modules/map-1_b.map | 3 + gcc/testsuite/g++.dg/modules/map-2.C | 11 + gcc/testsuite/g++.dg/modules/map-2.map | 1 + gcc/testsuite/g++.dg/modules/member-def-1_a.C | 8 + gcc/testsuite/g++.dg/modules/member-def-1_b.C | 14 + gcc/testsuite/g++.dg/modules/member-def-1_c.C | 16 + gcc/testsuite/g++.dg/modules/member-def-1_d.C | 11 + gcc/testsuite/g++.dg/modules/member-def-2_a.C | 10 + gcc/testsuite/g++.dg/modules/member-def-2_b.C | 16 + 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gcc/testsuite/g++.dg/modules/sym-subst-1.C | 13 + gcc/testsuite/g++.dg/modules/sym-subst-2_a.C | 15 + gcc/testsuite/g++.dg/modules/sym-subst-2_b.C | 18 + gcc/testsuite/g++.dg/modules/sym-subst-3_a.C | 9 + gcc/testsuite/g++.dg/modules/sym-subst-3_b.C | 7 + gcc/testsuite/g++.dg/modules/sym-subst-4.C | 14 + gcc/testsuite/g++.dg/modules/sym-subst-5.C | 14 + gcc/testsuite/g++.dg/modules/sym-subst-6.C | 14 + gcc/testsuite/g++.dg/modules/sys/alias-2_a.H | 9 + gcc/testsuite/g++.dg/modules/sys/inext-1.H | 2 + gcc/testsuite/g++.dg/modules/tdef-1_a.C | 9 + gcc/testsuite/g++.dg/modules/tdef-1_b.C | 8 + gcc/testsuite/g++.dg/modules/tdef-2_a.C | 8 + gcc/testsuite/g++.dg/modules/tdef-2_b.C | 6 + gcc/testsuite/g++.dg/modules/tdef-2_c.C | 14 + gcc/testsuite/g++.dg/modules/tdef-3_a.C | 7 + gcc/testsuite/g++.dg/modules/tdef-3_b.C | 9 + gcc/testsuite/g++.dg/modules/tdef-3_c.C | 11 + gcc/testsuite/g++.dg/modules/tdef-4_a.C | 16 + gcc/testsuite/g++.dg/modules/tdef-4_b.C | 8 + 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gcc/testsuite/g++.dg/modules/tpl-friend-2_a.C | 20 + gcc/testsuite/g++.dg/modules/tpl-friend-2_b.C | 9 + gcc/testsuite/g++.dg/modules/tpl-friend-3_a.C | 22 + gcc/testsuite/g++.dg/modules/tpl-friend-3_b.C | 14 + gcc/testsuite/g++.dg/modules/tpl-friend-4_a.C | 25 + gcc/testsuite/g++.dg/modules/tpl-friend-4_b.C | 21 + gcc/testsuite/g++.dg/modules/tpl-friend-5_a.C | 14 + gcc/testsuite/g++.dg/modules/tpl-friend-5_b.C | 23 + gcc/testsuite/g++.dg/modules/tpl-friend-6_a.C | 26 + gcc/testsuite/g++.dg/modules/tpl-friend-6_b.C | 13 + gcc/testsuite/g++.dg/modules/tpl-friend-7_a.C | 16 + gcc/testsuite/g++.dg/modules/tpl-friend-7_b.C | 5 + gcc/testsuite/g++.dg/modules/tpl-friend-merge-1.cc | 6 + gcc/testsuite/g++.dg/modules/tpl-friend-merge-1.h | 9 + .../g++.dg/modules/tpl-friend-merge-1_a.H | 6 + .../g++.dg/modules/tpl-friend-merge-1_b.H | 6 + .../g++.dg/modules/tpl-friend-merge-1_c.H | 5 + .../g++.dg/modules/tpl-friend-merge-1_d.C | 7 + .../g++.dg/modules/tpl-friend-merge-1_e.C | 7 + .../g++.dg/modules/tpl-friend-merge-1_f.C | 7 + gcc/testsuite/g++.dg/modules/tpl-spec-1_a.C | 22 + gcc/testsuite/g++.dg/modules/tpl-spec-1_b.C | 20 + gcc/testsuite/g++.dg/modules/tpl-spec-2_a.C | 11 + gcc/testsuite/g++.dg/modules/tpl-spec-2_b.C | 18 + gcc/testsuite/g++.dg/modules/tpl-spec-2_c.C | 19 + gcc/testsuite/g++.dg/modules/tpl-spec-2_d.C | 27 + gcc/testsuite/g++.dg/modules/tpl-spec-3_a.C | 27 + gcc/testsuite/g++.dg/modules/tpl-spec-3_b.C | 24 + gcc/testsuite/g++.dg/modules/tpl-spec-4_a.C | 19 + gcc/testsuite/g++.dg/modules/tpl-spec-4_b.C | 17 + gcc/testsuite/g++.dg/modules/tpl-spec-5_a.C | 19 + gcc/testsuite/g++.dg/modules/tpl-spec-5_b.C | 17 + gcc/testsuite/g++.dg/modules/tpl-spec-6_a.C | 22 + gcc/testsuite/g++.dg/modules/tpl-spec-6_b.C | 6 + gcc/testsuite/g++.dg/modules/tpl-spec-7.C | 38 + gcc/testsuite/g++.dg/modules/tpl-tpl-friend-1_a.C | 15 + gcc/testsuite/g++.dg/modules/tpl-tpl-friend-1_b.C | 9 + gcc/testsuite/g++.dg/modules/tpl-tpl-mem-1_a.C | 19 + gcc/testsuite/g++.dg/modules/tpl-tpl-mem-1_b.C | 6 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-1.h | 22 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-1_a.H | 4 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-1_b.C | 4 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-2.h | 65 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-2_a.H | 4 + gcc/testsuite/g++.dg/modules/tpl-tpl-merge-2_b.C | 4 + gcc/testsuite/g++.dg/modules/tpl-tpl-parm-1_a.H | 12 + gcc/testsuite/g++.dg/modules/tpl-tpl-parm-1_b.C | 18 + gcc/testsuite/g++.dg/modules/tpl-tpl-parm-2.h | 16 + gcc/testsuite/g++.dg/modules/tpl-tpl-parm-2_a.H | 4 + gcc/testsuite/g++.dg/modules/tpl-tpl-parm-2_b.C | 4 + gcc/testsuite/g++.dg/modules/tplmem-1_a.C | 32 + gcc/testsuite/g++.dg/modules/tplmem-1_b.C | 28 + gcc/testsuite/g++.dg/modules/tplmem-3_a.C | 17 + gcc/testsuite/g++.dg/modules/tplmem-3_b.C | 13 + gcc/testsuite/g++.dg/modules/ttp-1_a.C | 8 + gcc/testsuite/g++.dg/modules/ttp-1_b.C | 18 + gcc/testsuite/g++.dg/modules/ttp-2_a.C | 10 + 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4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (c541fa7c91 -> b7874836c3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/binutils-gdb. from c541fa7c91 [gdb/testsuite] Add save_target_board_info adds 0335338177 Automatic date update in version.in adds 904cb749cf gdb.texinfo: Document GMP as mandatory requirement to build GDB adds 98d837f0ef gdb, record: rephrase the 'not recording' error message adds 1a1c0afcee testsuite, gdb.btrace: make test names unique adds 493d2172ac testsuite, gdb.python: make py-record-*.exp test names unique adds 806e7575e2 testsuite, gdb.btrace: skip multi-inferior.exp on gdbserver targets adds 0fe69a94d4 testsuite, gdb.btrace: fix 32-bit PIE false positives adds ca01f1bf3d gdb/testsuite: use gdb_test in gdb.base/list.exp adds e1ff6226d8 Preserve gdb_std{out, err, log, targ, targerr} across interp [...] adds 6c078f0bfe Move enum noside earlier in expression.h adds 6bf6909bf4 Automatic date update in version.in adds b4e3cd0440 arc: Add support for signal handlers adds d4af727286 arc: Add support for signal frames for Linux targets adds 46023bbe81 arc: Take into account the REGNUM in supply/collect gdb hooks adds 04c9f85efc gdb: Add native support for ARC in GNU/Linux adds acf10cacc6 arc: Make variable name in comments uppercase adds e512699ac8 Remove trailing white spaces in gdb/frame.{c,h} adds 9423103f54 Automatic date update in version.in adds dca11eb872 hurd: Fix getting VM_MIN/MAX_ADDRESS adds 06f6f78f62 hurd: Add changelog for dca11eb872c9 adds 05ecfa4726 Add myself to gdb/MAINTAINERS adds 016382f8a4 gdb: delete unused function print_char_chars adds 2c75ccb24c gdb: avoid accessing global C++ language implementation functions adds c5ee319e6c gdb: rename c_printchar as language_defn::printchar adds 76ca72bc5b gdb: remove LA_EMIT_CHAR macro adds 82fc57fd6b gdb: move go_language class declaration into header file adds 46157d77c3 gdb: move pascal_language into p-lang.h adds ed5797ee2c gdb/objc: fix bug in objc_language::opcode_print_table adds 1c4852651c gdb: move rust_language into rust-lang.h adds 5cc0917c38 gdb: remove some uses of LA_PRINT_STRING adds 279d901e5a x86-64: Add Intel LAM property support adds f37059ea22 Clarify language for the '?' packet adds 62fa7b3c6a Automatic date update in version.in adds de34d42812 PR27100, final link failed: bad value adds dccc31dee3 asan: print_vms_time signed integer overflow adds 99d8bab0c1 SHF_GNU_RETAIN 7a and 7b tests adds f867677682 gdb/gdbtypes.h: Fix comparison of uninitialized values adds 5ba3b20ec2 gdb: include allocated/associated properties in 'maint print type' adds b7874836c3 gdb: avoid resolving dynamic properties for non-allocated arrays No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 12 + bfd/elf-linker-x86.h | 28 +- bfd/elfxx-x86.c | 97 ++++- bfd/version.h | 2 +- binutils/ChangeLog | 19 + binutils/NEWS | 2 + binutils/doc/binutils.texi | 3 +- binutils/elfedit.c | 8 +- binutils/readelf.c | 27 +- binutils/testsuite/binutils-all/x86-64/lam-u48.d | 12 + binutils/testsuite/binutils-all/x86-64/lam-u48.s | 27 ++ binutils/testsuite/binutils-all/x86-64/lam-u57.d | 12 + binutils/testsuite/binutils-all/x86-64/lam-u57.s | 27 ++ gdb/ChangeLog | 249 +++++++++++++ gdb/MAINTAINERS | 1 + gdb/Makefile.in | 1 + gdb/arc-linux-nat.c | 320 +++++++++++++++++ gdb/arc-linux-tdep.c | 224 +++++++++++- gdb/arc-tdep.c | 123 +++++++ gdb/arc-tdep.h | 13 + gdb/c-lang.c | 7 +- gdb/c-lang.h | 2 - gdb/configure.host | 3 + gdb/configure.nat | 4 + gdb/doc/ChangeLog | 8 + gdb/doc/gdb.texinfo | 16 +- gdb/dwarf2/read.c | 7 +- gdb/eval.c | 12 +- gdb/expprint.c | 19 +- gdb/expression.h | 44 +-- gdb/f-lang.c | 4 + gdb/f-lang.h | 2 +- gdb/f-valprint.c | 10 +- gdb/frame.c | 12 +- gdb/frame.h | 4 +- gdb/gdbtypes.c | 95 +++-- gdb/gnu-nat.c | 1 + gdb/go-exp.y | 4 +- gdb/go-lang.c | 164 +++------ gdb/go-lang.h | 94 ++++- gdb/go-typeprint.c | 6 +- gdb/go-valprint.c | 5 +- gdb/guile/scm-pretty-print.c | 4 +- gdb/interps.c | 8 + gdb/language.c | 9 - gdb/language.h | 2 - gdb/objc-lang.c | 2 +- gdb/p-exp.y | 11 +- gdb/p-lang.c | 384 +++++++------------- gdb/p-lang.h | 245 +++++++++++-- gdb/p-typeprint.c | 214 ++++------- gdb/p-valprint.c | 30 +- gdb/python/py-prettyprint.c | 4 +- gdb/record.c | 6 +- gdb/rust-exp.y | 2 +- gdb/rust-lang.c | 397 +++++++-------------- gdb/rust-lang.h | 198 +++++++++- gdb/symtab.c | 3 +- gdb/testsuite/ChangeLog | 52 +++ gdb/testsuite/gdb.base/list.exp | 181 ++-------- ...x-cache-load-twice.c => style-interp-exec-mi.c} | 0 gdb/testsuite/gdb.base/style-interp-exec-mi.exp | 46 +++ gdb/testsuite/gdb.btrace/data.exp | 24 +- gdb/testsuite/gdb.btrace/delta.exp | 30 +- gdb/testsuite/gdb.btrace/enable.exp | 12 +- gdb/testsuite/gdb.btrace/exception.exp | 5 +- gdb/testsuite/gdb.btrace/function_call_history.exp | 6 +- gdb/testsuite/gdb.btrace/multi-inferior.exp | 9 +- gdb/testsuite/gdb.btrace/nohist.exp | 8 +- gdb/testsuite/gdb.btrace/non-stop.exp | 76 ++-- gdb/testsuite/gdb.btrace/reconnect.exp | 2 +- gdb/testsuite/gdb.btrace/rn-dl-bind.exp | 14 +- gdb/testsuite/gdb.btrace/step.exp | 26 +- gdb/testsuite/gdb.btrace/stepi.exp | 146 +++++--- gdb/testsuite/gdb.btrace/tailcall.exp | 30 +- gdb/testsuite/gdb.btrace/unknown_functions.exp | 9 +- gdb/testsuite/gdb.dwarf2/dyn-type-unallocated.c | 40 +++ gdb/testsuite/gdb.dwarf2/dyn-type-unallocated.exp | 119 ++++++ gdb/testsuite/gdb.python/py-record-btrace.exp | 7 +- gdb/testsuite/gdb.python/py-record-full.exp | 7 +- gdb/valprint.c | 37 -- gdb/valprint.h | 3 - include/ChangeLog | 5 + include/elf/common.h | 2 + ld/ChangeLog | 45 +++ ld/NEWS | 13 + ld/emulparams/cet.sh | 14 +- ld/emulparams/elf_x86_64.sh | 1 + ld/emulparams/x86-64-lam.sh | 69 ++++ ld/ld.texi | 44 +++ ld/ldlang.c | 4 +- ld/ldlang.h | 3 + ld/testsuite/ld-elf/retain7a.d | 3 +- ld/testsuite/ld-elf/retain7b.d | 6 +- ld/testsuite/ld-scripts/data.d | 1 + ld/testsuite/ld-scripts/data.exp | 9 +- ld/testsuite/ld-scripts/fill.d | 1 + ld/testsuite/ld-scripts/fill16.d | 1 + ld/testsuite/ld-scripts/pr27100.d | 10 + ld/testsuite/ld-scripts/pr27100.s | 2 + ld/testsuite/ld-scripts/pr27100.t | 2 + ld/testsuite/ld-x86-64/property-x86-lam-u48-1a.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u48-1b.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u48-2.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u48-3a.d | 12 + ld/testsuite/ld-x86-64/property-x86-lam-u48-3b.d | 12 + ld/testsuite/ld-x86-64/property-x86-lam-u48-4.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u48-5.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u48.s | 27 ++ ld/testsuite/ld-x86-64/property-x86-lam-u57-1a.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u57-1b.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u57-2.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u57-3a.d | 12 + ld/testsuite/ld-x86-64/property-x86-lam-u57-3b.d | 12 + ld/testsuite/ld-x86-64/property-x86-lam-u57-4.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u57-5.d | 11 + ld/testsuite/ld-x86-64/property-x86-lam-u57.s | 27 ++ ld/testsuite/ld-x86-64/x86-64.exp | 14 + 118 files changed, 3223 insertions(+), 1376 deletions(-) create mode 100644 binutils/testsuite/binutils-all/x86-64/lam-u48.d create mode 100644 binutils/testsuite/binutils-all/x86-64/lam-u48.s create mode 100644 binutils/testsuite/binutils-all/x86-64/lam-u57.d create mode 100644 binutils/testsuite/binutils-all/x86-64/lam-u57.s create mode 100644 gdb/arc-linux-nat.c copy gdb/testsuite/gdb.base/{index-cache-load-twice.c => style-interp-exec-mi.c} (100%) create mode 100644 gdb/testsuite/gdb.base/style-interp-exec-mi.exp create mode 100644 gdb/testsuite/gdb.dwarf2/dyn-type-unallocated.c create mode 100644 gdb/testsuite/gdb.dwarf2/dyn-type-unallocated.exp create mode 100644 ld/emulparams/x86-64-lam.sh create mode 100644 ld/testsuite/ld-scripts/pr27100.d create mode 100644 ld/testsuite/ld-scripts/pr27100.s create mode 100644 ld/testsuite/ld-scripts/pr27100.t create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-1a.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-1b.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-2.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-3a.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-3b.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-4.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48-5.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u48.s create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-1a.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-1b.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-2.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-3a.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-3b.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-4.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57-5.d create mode 100644 ld/testsuite/ld-x86-64/property-x86-lam-u57.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (ffeb238d4 -> 4f0d55bae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards ffeb238d4 2: update: binutils-c541fa7c91ce9d73d6a997cedf2cdc65e35dc139: 21239 new 4f0d55bae 2: update: binutils-gcc-qemu: 21239 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ffeb238d4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 183 +- 02-prepare_abe/console.log | 240 +- 03-build_abe-binutils/console.log | 11334 ++++----- 04-build_abe-stage1/console.log | 20640 ++++++++-------- 05-build_linux/console.log | 5134 ++-- 08-check_regression/console.log | 14 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 80 +- 09-update_baseline/results.regressions | 20 +- console.log | 37625 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 11 files changed, 37922 insertions(+), 37384 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (ae895ac4b9f -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project. from ae895ac4b9f [mlir][spirv] De-template deserialization adds fc41777702a [mlir][spirv] De-template serialization adds de127d83d81 [InstCombine] Add tests for PR48577 (NFC) adds 899faa50f20 [InstCombine] Check inbounds in load/store of gep null tran [...] adds 1a7ac29a89f [RISCV] Add ISel support for RVV vector/scalar forms adds c7e825b910a [format][NFC] Use unsigned char as the base of all enums in [...] adds 87087a02ae4 [InstCombine] Add tests for gep of null (NFC) adds eb79fd3c928 [InstCombine] Fold gep inbounds of null to null adds 759b8c11c39 [InstCombine] Handle different pointer types when folding g [...] adds cce473e0c56 [IRSim] Adding commutativity matching to structure checking adds 05039266024 [IRSim] Adding support for isomorphic predicates adds f8079355c60 [InstCombine] canonicalizeAbsNabs(): don't propagate NSW fl [...] adds 374f1d81feb [clang-format] Fix handling of TextProto comments adds 47877c9079c [clang-format] Add SpaceBeforeCaseColon option adds 45a4f34bd19 Revert "[IRSim] Adding support for isomorphic predicates" adds 74b3acefc7b [clangd] Fix case mismatch crash on in CDB on windows after [...] adds d97e9f1a3d8 [lldb] Simplify ObjectFile::FindPlugin (NFC) adds 7143923f86b Fix lldb test failure due to D93082. adds be89d7460b6 [lld][test] Relax test assertion of cmake defaults appearin [...] adds 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: .../clangd/GlobalCompilationDatabase.cpp | 11 +- clang/docs/ClangFormatStyleOptions.rst | 10 + clang/docs/ReleaseNotes.rst | 3 + clang/docs/tools/dump_format_style.py | 2 +- clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/include/clang/Format/Format.h | 68 +- clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Format/BreakableToken.cpp | 9 +- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/test/Misc/dev-fd-fs.c | 13 + clang/unittests/Format/FormatTest.cpp | 121 + clang/unittests/Format/FormatTestTextProto.cpp | 16 +- lld/test/MachO/driver.test | 2 +- lldb/source/Symbol/ObjectFile.cpp | 228 +- lldb/test/Shell/Unwind/basic-block-sections.test | 14 +- llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 37 +- llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 226 +- llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 46 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 3 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 57 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 64 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 166 + .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 7 +- .../InstCombine/InstructionCombining.cpp | 7 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 50 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 822 +++++ llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll | 794 ++++ llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 1109 ++++++ llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 1081 ++++++ llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 845 +++++ llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll | 817 +++++ llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 266 ++ llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 845 +++++ llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll | 817 +++++ llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../IROutliner/outlining-commutative-fp.ll | 107 + .../Transforms/IROutliner/outlining-commutative.ll | 254 ++ .../IROutliner/outlining-isomorphic-predicates.ll | 170 + .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/abs-1.ll | 6 +- llvm/test/Transforms/InstCombine/abs_abs.ll | 148 +- llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 36 + .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 18 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ llvm/test/Transforms/InstCombine/select_meta.ll | 4 +- .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 25 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1875 +++++----- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 190 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + mlir/docs/Passes.md | 4 + mlir/lib/Target/SPIRV/Serialization.cpp | 62 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 28 +- 245 files changed, 66398 insertions(+), 4735 deletions(-) create mode 100644 llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-commutative-fp.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-commutative.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll create mode 100644 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llvm/test/Transforms/RewriteStatepointsForGC/check_traversal_or [...] create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/live-vector-nospli [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-fu [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/insertelement-inselt [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/bswap-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/AMDGPU/round-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/ARM/extract-insert-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/NVPTX/non-vectorizable-intri [...] create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll create mode 100644 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llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/zext-inseltpoison.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/vectorizable-functions-insel [...] create mode 100644 llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/dbgloc-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/Scalarizer/order-bug-inseltpoison.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-ops-insel [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/speculate-vector-ops-inseltpoison.ll create mode 100644 llvm/test/Transforms/SpeculativeExecution/spec-other-inseltpoison.ll create mode 100644 llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop-i [...] create mode 100644 llvm/test/Transforms/VectorCombine/AMDGPU/as-transition-inseltp [...] create mode 100644 llvm/test/Transforms/VectorCombine/Hexagon/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-consta [...] create mode 100644 llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/scalarize-cmp-inseltpoison.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig updated (62e48f118 -> b83767de3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 62e48f118 0: update: llvm-linux-qemu: boot new b83767de3 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (62e48f118) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 14 +- 02-prepare_abe/console.log | 326 +- 03-build_llvm/console.log | 13852 ++++++++++++------------ 04-build_linux/console.log | 796 +- 05-build_abe-qemu/console.log | 6738 ++++++------ 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 4 +- console.log | 21742 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 9 files changed, 21746 insertions(+), 21746 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (bbd758a7913 -> 25aebe2ccfb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project. from bbd758a7913 Revert "This is a test commit" adds 1876a2914fe Revert more changes that landed on top of 741978d727 adds 74186880ba9 [mlir][vector] Add more vector Ops canonicalization adds 4c37453a04f clang: Build and run FrontendTests with CLANG_ENABLE_STATIC [...] adds e1248447092 [LoopIdiom] Introduce 'left-shift until bittest' idiom adds cb2e5980bae [LoopIdiom] 'left-shift until bittest' idiom: support const [...] adds a0ddc61c5b9 [LoopIdiom] 'left-shift until bittest' idiom: support canon [...] adds 2b61e7c68cd [LoopIdiom] 'left-shift until bittest' idiom: support rewri [...] adds a16fbff17d3 [mlir][spirv] Create a pass for testing SCFToSPIRV patterns adds 34e70d722df Append ".__part." to every basic block section symbol. adds 930c74f12d7 [mlir][spirv] NFC: rename SPIR-V conversion files for consistency adds 897990e614c [IROutliner] Use isa instead of dyn_cast where the casted v [...] adds ae895ac4b9f [mlir][spirv] De-template deserialization adds fc41777702a [mlir][spirv] De-template serialization adds de127d83d81 [InstCombine] Add tests for PR48577 (NFC) adds 899faa50f20 [InstCombine] Check inbounds in load/store of gep null tran [...] adds 1a7ac29a89f [RISCV] Add ISel support for RVV vector/scalar forms adds c7e825b910a [format][NFC] Use unsigned char as the base of all enums in [...] adds 87087a02ae4 [InstCombine] Add tests for gep of null (NFC) adds eb79fd3c928 [InstCombine] Fold gep inbounds of null to null adds 759b8c11c39 [InstCombine] Handle different pointer types when folding g [...] adds cce473e0c56 [IRSim] Adding commutativity matching to structure checking adds 05039266024 [IRSim] Adding support for isomorphic predicates adds f8079355c60 [InstCombine] canonicalizeAbsNabs(): don't propagate NSW fl [...] adds 374f1d81feb [clang-format] Fix handling of TextProto comments adds 47877c9079c [clang-format] Add SpaceBeforeCaseColon option adds 45a4f34bd19 Revert "[IRSim] Adding support for isomorphic predicates" adds 74b3acefc7b [clangd] Fix case mismatch crash on in CDB on windows after [...] adds d97e9f1a3d8 [lldb] Simplify ObjectFile::FindPlugin (NFC) adds 7143923f86b Fix lldb test failure due to D93082. adds be89d7460b6 [lld][test] Relax test assertion of cmake defaults appearin [...] adds 747f67e034a [AMDGPU] Fix adjustWritemask subreg handling adds 245218bb355 Basic: Support named pipes natively in SourceManager and Fi [...] adds 3ee43adfb20 Basic: Add native support for stdin to SourceManager and Fi [...] adds ca1ab0c66d1 [mlir] Add tensor passes to passes.md adds d29f93bda51 [DAGCombiner] Don't create sexts of deleted xors when they [...] adds 69132d12dea [Clang] Reverse test to save on indentation. NFC. adds 48ad8194a56 [IRSim] Adding support for isomorphic predicates adds db7a2f347f1 Precommit transform tests that have poison as insertelement [...] adds 30365472489 Precommit analysis/etc tests for inselt poison placeholder adds 9939cf5a564 [ExecutionEngine, Linker] Use erase_if (NFC) adds 200b15af45a [Analysis] Remove spliceFunction (NFC) adds b8cb1802a8a [obj2yaml] - Dump the content of a broken GNU hash table properly. adds 90177912a4d Revert "[InstCombine] Fold gep inbounds of null to null" adds 61177943c9c [AMDGPU] Use MUBUF instructions for global address space access adds e0751234ef0 [CodeGen] Add "noreturn" attirbute to _Unwind_Resume adds ef2f843347b Revert "[InstCombine] Check inbounds in load/store of gep n [...] adds ce4413e4894 Moved dwarf_eh_resume.ll from Generic to X86 folder adds fb468953082 [Support] Explicitly state that KnownBits::getMinValue/getM [...] adds 6895581fd2c [Support] Add KnownBits::getSignedMinValue/getSignedMaxValu [...] adds 89abe1cf83a [InstCombine] foldICmpUsingKnownBits - use KnownBits signed [...] adds df812115e3c [CodeGen, Transforms] Use llvm::any_of (NFC) adds e457896a6ef [CodeGen] Remove unused function hasInlineAsmMemConstraint (NFC) adds ff3749fc793 [NFC] SimplifyCFGOpt::simplifyUnreachable(): pacify unused [...] adds b3021a72a6d [IR][InstCombine] Add m_ImmConstant(), that matches on non- [...] adds da4c7e15df3 [NFC][InstCombine] Autogenerate check lines in vec_shuffle.ll test adds 1fda23367d4 [NFC][InstCombine] Add test for `a & ~(a ^ b)` pattern adds 5b78303433c [InstCombine] Fold `a & ~(a ^ b)` to `x & y` adds 8001dcbd50c [NFC][InstCombine] Add test coverage for `(x ^ C) ^ y` pattern adds d9ebaeeb468 [InstCombine] Hoist xor-by-constant from xor-by-value adds 6e074a8324d [NFC][LoopIdiom] Improve test coverage for 'left-shift-unti [...] adds 25aebe2ccfb [LoopIdiom] 'left-shift-until-bittest': keep no-wrap flags [...] No new revisions were added by this update. Summary of changes: .../clangd/GlobalCompilationDatabase.cpp | 11 +- clang/docs/ClangFormatStyleOptions.rst | 10 + clang/docs/ReleaseNotes.rst | 3 + clang/docs/tools/dump_format_style.py | 2 +- clang/include/clang/Basic/FileEntry.h | 9 + clang/include/clang/Basic/FileManager.h | 11 + clang/include/clang/Driver/Options.td | 5 +- clang/include/clang/Format/Format.h | 68 +- clang/lib/Basic/FileEntry.cpp | 1 + clang/lib/Basic/FileManager.cpp | 25 +- clang/lib/Basic/SourceManager.cpp | 50 +- clang/lib/CodeGen/CodeGenAction.cpp | 126 +- clang/lib/Format/BreakableToken.cpp | 9 +- clang/lib/Format/Format.cpp | 2 + clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Frontend/CompilerInstance.cpp | 58 +- clang/lib/Frontend/CompilerInvocation.cpp | 96 +- clang/test/CodeGen/basic-block-sections.c | 10 +- clang/test/Misc/dev-fd-fs.c | 13 + clang/unittests/CMakeLists.txt | 2 +- clang/unittests/Format/FormatTest.cpp | 121 + clang/unittests/Format/FormatTestTextProto.cpp | 16 +- .../unittests/Frontend/CompilerInvocationTest.cpp | 84 +- lld/test/ELF/lto/basic-block-sections.ll | 8 +- lld/test/MachO/driver.test | 2 +- lldb/source/Symbol/ObjectFile.cpp | 228 +- lldb/test/Shell/Unwind/basic-block-sections.test | 14 +- llvm/docs/AMDGPUUsage.rst | 5 + llvm/include/llvm/Analysis/CallGraph.h | 7 - .../include/llvm/Analysis/IRSimilarityIdentifier.h | 37 +- llvm/include/llvm/CodeGen/Analysis.h | 5 - llvm/include/llvm/IR/PatternMatch.h | 43 +- llvm/include/llvm/Option/OptParser.td | 9 +- llvm/include/llvm/Support/KnownBits.h | 24 +- llvm/lib/Analysis/CallGraph.cpp | 14 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 226 +- llvm/lib/CodeGen/Analysis.cpp | 21 - llvm/lib/CodeGen/DwarfEHPrepare.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp | 9 +- llvm/lib/CodeGen/MachineBasicBlock.cpp | 5 +- llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 +- llvm/lib/ExecutionEngine/SectionMemoryManager.cpp | 8 +- llvm/lib/Linker/IRMover.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 34 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 23 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 46 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 3 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 57 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 64 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 166 + llvm/lib/Transforms/IPO/IROutliner.cpp | 4 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 4 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 15 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 51 +- .../Transforms/InstCombine/InstCombineNegator.cpp | 3 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 7 +- .../InstCombine/InstructionCombining.cpp | 7 +- .../Instrumentation/ControlHeightReduction.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 350 +- llvm/lib/Transforms/Utils/CodeMoverUtils.cpp | 45 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../CostModel/AArch64/kryo-inseltpoison.ll | 26 + .../PowerPC/insert_extract-inseltpoison.ll | 187 + .../CostModel/SystemZ/vectorinstrs-inseltpoison.ll | 56 + .../X86/insert-extract-at-zero-inseltpoison.ll | 40 + .../Analysis/CostModel/X86/loop_v2-inseltpoison.ll | 39 + .../X86/masked-intrinsic-cost-inseltpoison.ll | 1911 ++++++++++ .../CostModel/X86/uniformshift-inseltpoison.ll | 39 + .../CostModel/X86/vector-insert-inseltpoison.ll | 1270 +++++++ .../CostModel/X86/vector_gep-inseltpoison.ll | 17 + .../CostModel/X86/vshift-ashr-cost-inseltpoison.ll | 1843 ++++++++++ .../CostModel/X86/vshift-lshr-cost-inseltpoison.ll | 1867 ++++++++++ .../CostModel/X86/vshift-shl-cost-inseltpoison.ll | 2197 +++++++++++ .../Analysis/DemandedBits/vectors-inseltpoison.ll | 136 + .../irtranslator-invoke-probabilities.ll | 2 +- llvm/test/CodeGen/AMDGPU/lower-kernargs.ll | 5 +- llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll | 2 +- .../AMDGPU/memory-legalizer-global-agent.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-nontemporal.ll | 18 +- .../AMDGPU/memory-legalizer-global-singlethread.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-system.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-wavefront.ll | 838 ++--- .../AMDGPU/memory-legalizer-global-workgroup.ll | 838 ++--- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 402 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 38 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 402 +- .../AMDGPU/memory-legalizer-local-system.ll | 402 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 402 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 402 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 78 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 822 +++++ llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll | 794 ++++ llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 1109 ++++++ llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 1081 ++++++ llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 845 +++++ llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll | 817 +++++ llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 266 ++ llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 845 +++++ llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll | 817 +++++ llvm/test/CodeGen/SystemZ/sext-zext.ll | 19 + .../X86/basic-block-sections-blockaddress-taken.ll | 4 +- .../X86/basic-block-sections-clusters-branches.ll | 8 +- .../X86/basic-block-sections-clusters-eh.ll | 4 +- .../CodeGen/X86/basic-block-sections-clusters.ll | 8 +- .../X86/basic-block-sections-directjumps.ll | 14 +- llvm/test/CodeGen/X86/basic-block-sections-eh.ll | 4 +- llvm/test/CodeGen/X86/basic-block-sections-list.ll | 16 +- .../CodeGen/X86/basic-block-sections-listbb.ll | 4 +- .../CodeGen/X86/basic-block-sections-mir-parse.mir | 6 +- .../X86/basic-block-sections-unreachable.ll | 2 +- llvm/test/CodeGen/X86/basic-block-sections.ll | 12 +- llvm/test/CodeGen/X86/basic-block-sections_2.ll | 61 + .../test/CodeGen/X86/cfi-basic-block-sections-1.ll | 8 +- ...r-basic-block-sections-callee-save-registers.ll | 4 +- llvm/test/CodeGen/X86/dwarf_eh_resume.ll | 23 + .../CodeGen/X86/gcc_except_table_bb_sections.ll | 22 +- llvm/test/DebugInfo/X86/basic-block-sections_1.ll | 24 +- .../X86/stack-value-piece-inseltpoison.ll | 114 + llvm/test/Other/scalable-vectors-core-ir.ll | 12 +- .../Attributor/dereferenceable-2-inseltpoison.ll | 847 +++++ llvm/test/Transforms/BDCE/vectors-inseltpoison.ll | 102 + .../AArch64/gather-scatter-opt-inseltpoison.ll | 113 + .../bypass-slow-div-debug-info-inseltpoison.ll | 76 + .../ARM/sink-add-mul-shufflevector-inseltpoison.ll | 219 ++ .../CodeGenPrepare/ARM/sinkchain-inseltpoison.ll | 107 + .../X86/gather-scatter-opt-inseltpoison.ll | 113 + .../X86/sink-addrmode-inseltpoison.ll | 321 ++ .../CodeGenPrepare/X86/vec-shift-inseltpoison.ll | 406 +++ .../X86/x86-shuffle-sink-inseltpoison.ll | 257 ++ .../2016-08-30-MaskedScatterGather-inseltpoison.ll | 42 + ...xpr-vector-constainsundef-crash-inseltpoison.ll | 25 + .../GVN/non-integral-pointers-inseltpoison.ll | 456 +++ .../IROutliner/outlining-commutative-fp.ll | 107 + .../Transforms/IROutliner/outlining-commutative.ll | 254 ++ .../IROutliner/outlining-isomorphic-predicates.ll | 170 + .../AMDGPU/old-pass-regressions-inseltpoison.ll | 143 + .../dereferenceable-inseltpoison.ll | 357 ++ .../AArch64/sve-bitcast-inseltpoison.ll | 13 + .../amdgcn-demanded-vector-elts-inseltpoison.ll | 3828 ++++++++++++++++++++ .../InstCombine/X86/x86-addsub-inseltpoison.ll | 194 + .../InstCombine/X86/x86-avx512-inseltpoison.ll | 3407 +++++++++++++++++ .../InstCombine/X86/x86-pack-inseltpoison.ll | 635 ++++ .../InstCombine/X86/x86-sse-inseltpoison.ll | 694 ++++ .../InstCombine/X86/x86-sse2-inseltpoison.ll | 541 +++ .../InstCombine/X86/x86-sse41-inseltpoison.ll | 124 + .../X86/x86-vec_demanded_elts-inseltpoison.ll | 110 + .../X86/x86-vector-shifts-inseltpoison.ll | 3783 +++++++++++++++++++ .../InstCombine/X86/x86-xop-inseltpoison.ll | 305 ++ llvm/test/Transforms/InstCombine/abs-1.ll | 6 +- llvm/test/Transforms/InstCombine/abs_abs.ll | 148 +- llvm/test/Transforms/InstCombine/and-xor-or.ll | 43 + .../Transforms/InstCombine/bitcast-inseltpoison.ll | 573 +++ .../InstCombine/bitcast-vec-canon-inseltpoison.ll | 167 + .../InstCombine/broadcast-inseltpoison.ll | 179 + .../InstCombine/extractelement-inseltpoison.ll | 332 ++ .../InstCombine/fold-vector-zero-inseltpoison.ll | 35 + llvm/test/Transforms/InstCombine/getelementptr.ll | 36 + .../hoist-xor-by-constant-from-xor-by-value.ll | 75 + .../InstCombine/icmp-bc-vec-inseltpoison.ll | 127 + .../InstCombine/inselt-binop-inseltpoison.ll | 635 ++++ .../insert-extract-shuffle-inseltpoison.ll | 735 ++++ .../invert-variable-mask-in-masked-merge-scalar.ll | 5 +- .../invert-variable-mask-in-masked-merge-vector.ll | 5 +- llvm/test/Transforms/InstCombine/load.ll | 18 +- .../InstCombine/masked_intrinsics-inseltpoison.ll | 271 ++ llvm/test/Transforms/InstCombine/or-xor.ll | 68 +- .../Transforms/InstCombine/pr38984-inseltpoison.ll | 41 + .../InstCombine/scalarization-inseltpoison.ll | 335 ++ .../select-extractelement-inseltpoison.ll | 213 ++ llvm/test/Transforms/InstCombine/select_meta.ll | 4 +- .../InstCombine/shift-add-inseltpoison.ll | 122 + .../shufflevector-div-rem-inseltpoison.ll | 122 + llvm/test/Transforms/InstCombine/store.ll | 25 +- .../trunc-extractelement-inseltpoison.ll | 195 + .../InstCombine/udiv-pow2-vscale-inseltpoison.ll | 27 + .../unfold-masked-merge-with-const-mask-scalar.ll | 6 +- .../unfold-masked-merge-with-const-mask-vector.ll | 6 +- .../InstCombine/vec_demanded_elts-inseltpoison.ll | 850 +++++ .../vec_extract_var_elt-inseltpoison.ll | 26 + .../InstCombine/vec_gep_scalar_arg-inseltpoison.ll | 16 + .../InstCombine/vec_phi_extract-inseltpoison.ll | 107 + ...{vec_shuffle.ll => vec_shuffle-inseltpoison.ll} | 36 +- llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 +- .../InstCombine/vector-casts-inseltpoison.ll | 413 +++ .../InstCombine/vector_gep1-inseltpoison.ll | 74 + .../vector_insertelt_shuffle-inseltpoison.ll | 93 + .../vscale_extractelement-inseltpoison.ll | 185 + .../vscale_insertelement-inseltpoison.ll | 102 + llvm/test/Transforms/InstCombine/xor2.ll | 44 +- .../ConstProp/InsertElement-inseltpoison.ll | 52 + .../InstSimplify/ConstProp/vscale-inseltpoison.ll | 301 ++ .../ConstProp/vscale-shufflevector-inseltpoison.ll | 39 + .../Transforms/InstSimplify/select-inseltpoison.ll | 1007 +++++ .../Transforms/InstSimplify/vscale-inseltpoison.ll | 199 + .../AMDGPU/selects-inseltpoison.ll | 95 + .../X86/load-width-inseltpoison.ll | 40 + .../X86/vectorize-i8-nested-add-inseltpoison.ll | 165 + .../LoopIdiom/X86/left-shift-until-bittest.ll | 1784 ++++++--- .../ARM/vctp-chains-inseltpoison.ll | 257 ++ .../p8-unrolling-legalize-vectors-inseltpoison.ll | 256 ++ ...08-30-MaskedScatterGather-xfail-inseltpoison.ll | 43 + .../PGOProfile/counter_promo_nest-inseltpoison.ll | 165 + .../PhaseOrdering/X86/addsub-inseltpoison.ll | 101 + .../PhaseOrdering/X86/horiz-math-inseltpoison.ll | 153 + .../X86/scalarization-inseltpoison.ll | 71 + .../PhaseOrdering/vector-trunc-inseltpoison.ll | 23 + .../base-vector-inseltpoison.ll | 279 ++ .../check_traversal_order-inseltpoison.ll | 38 + .../live-vector-nosplit-inseltpoison.ll | 119 + .../accelerate-vector-functions-inseltpoison.ll | 1300 +++++++ .../AArch64/insertelement-inseltpoison.ll | 44 + .../AArch64/transpose-inseltpoison.ll | 294 ++ .../AMDGPU/add_sub_sat-inseltpoison.ll | 336 ++ .../SLPVectorizer/AMDGPU/bswap-inseltpoison.ll | 38 + .../SLPVectorizer/AMDGPU/round-inseltpoison.ll | 38 + .../ARM/extract-insert-inseltpoison.ll | 31 + .../non-vectorizable-intrinsic-inseltpoison.ll | 57 + .../SLPVectorizer/X86/PR35865-inseltpoison.ll | 29 + .../X86/alternate-calls-inseltpoison.ll | 65 + .../X86/alternate-cast-inseltpoison.ll | 466 +++ .../SLPVectorizer/X86/alternate-fp-inseltpoison.ll | 179 + .../X86/alternate-int-inseltpoison.ll | 497 +++ .../SLPVectorizer/X86/arith-fp-inseltpoison.ll | 1365 +++++++ .../X86/blending-shuffle-inseltpoison.ll | 200 + .../SLPVectorizer/X86/cmp_commute-inseltpoison.ll | 283 ++ .../X86/crash_scheduling-inseltpoison.ll | 81 + .../X86/external_user_jumbled_load-inseltpoison.ll | 43 + .../X86/extract-shuffle-inseltpoison.ll | 22 + .../SLPVectorizer/X86/fptosi-inseltpoison.ll | 534 +++ .../SLPVectorizer/X86/hadd-inseltpoison.ll | 433 +++ .../SLPVectorizer/X86/hsub-inseltpoison.ll | 433 +++ .../insert-element-build-vector-inseltpoison.ll | 540 +++ .../SLPVectorizer/X86/load-merge-inseltpoison.ll | 208 ++ .../SLPVectorizer/X86/pr31599-inseltpoison.ll | 30 + .../SLPVectorizer/X86/pr42022-inseltpoison.ll | 278 ++ .../SLPVectorizer/X86/pr44067-inseltpoison.ll | 118 + .../SLPVectorizer/X86/pr47629-inseltpoison.ll | 664 ++++ .../SLPVectorizer/X86/sext-inseltpoison.ll | 1039 ++++++ .../SLPVectorizer/X86/sign-extend-inseltpoison.ll | 62 + .../SLPVectorizer/X86/sitofp-inseltpoison.ll | 1331 +++++++ .../SLPVectorizer/X86/value-bug-inseltpoison.ll | 108 + .../X86/vec_list_bias-inseltpoison.ll | 105 + .../SLPVectorizer/X86/zext-inseltpoison.ll | 1123 ++++++ .../vectorizable-functions-inseltpoison.ll | 78 + .../Transforms/Scalarizer/basic-inseltpoison.ll | 561 +++ .../Scalarizer/dbgloc-bug-inseltpoison.ll | 44 + .../Scalarizer/order-bug-inseltpoison.ll | 24 + .../ARM/speculate-vector-ops-inseltpoison.ll | 112 + .../speculate-vector-ops-inseltpoison.ll | 60 + .../spec-other-inseltpoison.ll | 88 + .../rebuild-ssa-infinite-loop-inseltpoison.ll | 53 + .../AMDGPU/as-transition-inseltpoison.ll | 36 + .../VectorCombine/Hexagon/load-inseltpoison.ll | 17 + .../X86/extract-binop-inseltpoison.ll | 575 +++ .../VectorCombine/X86/insert-binop-inseltpoison.ll | 234 ++ .../X86/insert-binop-with-constant-inseltpoison.ll | 728 ++++ .../VectorCombine/X86/load-inseltpoison.ll | 649 ++++ .../X86/scalarize-cmp-inseltpoison.ll | 290 ++ llvm/test/tools/obj2yaml/ELF/gnu-hash-section.yaml | 21 +- llvm/tools/obj2yaml/elf2yaml.cpp | 4 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 190 +- llvm/unittests/Support/KnownBitsTest.cpp | 14 + llvm/utils/gn/secondary/clang/unittests/BUILD.gn | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/Passes.md | 4 + .../{ConvertGPUToSPIRV.h => GPUToSPIRV.h} | 10 +- .../{ConvertGPUToSPIRVPass.h => GPUToSPIRVPass.h} | 19 +- .../mlir/Conversion/LinalgToSPIRV/LinalgToSPIRV.h | 4 +- .../Conversion/LinalgToSPIRV/LinalgToSPIRVPass.h | 4 +- mlir/include/mlir/Conversion/Passes.h | 9 +- mlir/include/mlir/Conversion/Passes.td | 17 + .../mlir/Conversion/SCFToSPIRV/SCFToSPIRV.h | 4 +- .../SCFToSPIRVPass.h} | 14 +- .../{ConvertSPIRVToLLVM.h => SPIRVToLLVM.h} | 8 +- ...{ConvertSPIRVToLLVMPass.h => SPIRVToLLVMPass.h} | 10 +- ...{ConvertStandardToSPIRV.h => StandardToSPIRV.h} | 16 +- ...StandardToSPIRVPass.h => StandardToSPIRVPass.h} | 14 +- .../{ConvertVectorToSPIRV.h => VectorToSPIRV.h} | 10 +- ...vertVectorToSPIRVPass.h => VectorToSPIRVPass.h} | 12 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 1 + mlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt | 8 +- .../{ConvertGPUToSPIRV.cpp => GPUToSPIRV.cpp} | 7 +- ...onvertGPUToSPIRVPass.cpp => GPUToSPIRVPass.cpp} | 15 +- mlir/lib/Conversion/LinalgToSPIRV/CMakeLists.txt | 2 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 2 +- .../Conversion/LinalgToSPIRV/LinalgToSPIRVPass.cpp | 2 +- mlir/lib/Conversion/SCFToSPIRV/CMakeLists.txt | 5 +- mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp | 5 +- .../SCFToSPIRVPass.cpp} | 25 +- mlir/lib/Conversion/SPIRVToLLVM/CMakeLists.txt | 4 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- .../{ConvertSPIRVToLLVM.cpp => SPIRVToLLVM.cpp} | 6 +- ...vertSPIRVToLLVMPass.cpp => SPIRVToLLVMPass.cpp} | 6 +- mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 6 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 4 +- ...vertStandardToSPIRV.cpp => StandardToSPIRV.cpp} | 4 +- ...dardToSPIRVPass.cpp => StandardToSPIRVPass.cpp} | 9 +- mlir/lib/Conversion/VectorToSPIRV/CMakeLists.txt | 1 + .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 43 +- .../VectorToSPIRVPass.cpp} | 33 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 99 +- mlir/lib/Target/SPIRV/Deserialization.cpp | 106 + mlir/lib/Target/SPIRV/Serialization.cpp | 62 +- ...est_spirv_entry_point.mlir => entry-point.mlir} | 0 mlir/test/Conversion/GPUToSPIRV/if.mlir | 167 - mlir/test/Conversion/GPUToSPIRV/loop.mlir | 98 - mlir/test/Conversion/SCFToSPIRV/for.mlir | 86 + mlir/test/Conversion/SCFToSPIRV/if.mlir | 156 + mlir/test/Dialect/Vector/canonicalize.mlir | 47 + .../mlir-spirv-cpu-runner.cpp | 4 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 50 +- .../mlir-vulkan-runner/mlir-vulkan-runner.cpp | 4 +- 317 files changed, 67779 insertions(+), 5123 deletions(-) create mode 100644 llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td create mode 100644 llvm/test/Analysis/CostModel/AArch64/kryo-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/PowerPC/insert_extract-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/SystemZ/vectorinstrs-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/insert-extract-at-zero-inseltp [...] create mode 100644 llvm/test/Analysis/CostModel/X86/loop_v2-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/uniformshift-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector-insert-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vector_gep-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll create mode 100644 llvm/test/Analysis/DemandedBits/vectors-inseltpoison.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll create mode 100644 llvm/test/CodeGen/X86/basic-block-sections_2.ll create mode 100644 llvm/test/CodeGen/X86/dwarf_eh_resume.ll create mode 100644 llvm/test/DebugInfo/X86/stack-value-piece-inseltpoison.ll create mode 100644 llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll create mode 100644 llvm/test/Transforms/BDCE/vectors-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt- [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/AMDGPU/bypass-slow-div-debu [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevec [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inse [...] create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift-inseltpoison.ll create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/x86-shuffle-sink-inselt [...] create mode 100644 llvm/test/Transforms/GVN/2016-08-30-MaskedScatterGather-inseltp [...] create mode 100644 llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash- [...] create mode 100644 llvm/test/Transforms/GVN/non-integral-pointers-inseltpoison.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-commutative-fp.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-commutative.ll create mode 100644 llvm/test/Transforms/IROutliner/outlining-isomorphic-predicates.ll create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regress [...] create mode 100644 llvm/test/Transforms/InferFunctionAttrs/dereferenceable-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/AArch64/sve-bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector- [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-pack-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse2-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-sse41-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts-inse [...] create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-vector-shifts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/X86/x86-xop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/bitcast-vec-canon-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/broadcast-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/fold-vector-zero-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/hoist-xor-by-constant-from-xor [...] create mode 100644 llvm/test/Transforms/InstCombine/icmp-bc-vec-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/inselt-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/insert-extract-shuffle-inseltp [...] create mode 100644 llvm/test/Transforms/InstCombine/masked_intrinsics-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/pr38984-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/select-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-add-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/shufflevector-div-rem-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/udiv-pow2-vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vec_phi_extract-inseltpoison.ll copy llvm/test/Transforms/InstCombine/{vec_shuffle.ll => vec_shuffle-inseltpoison. [...] create mode 100644 llvm/test/Transforms/InstCombine/vector-casts-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_gep1-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vector_insertelt_shuffle-insel [...] create mode 100644 llvm/test/Transforms/InstCombine/vscale_extractelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstCombine/vscale_insertelement-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/InsertElement-insel [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/vscale-shufflevecto [...] create mode 100644 llvm/test/Transforms/InstSimplify/select-inseltpoison.ll create mode 100644 llvm/test/Transforms/InstSimplify/vscale-inseltpoison.ll create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/selects-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/load-width-inseltp [...] create mode 100644 llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-neste [...] create mode 100644 llvm/test/Transforms/LoopStrengthReduce/ARM/vctp-chains-inseltp [...] create mode 100644 llvm/test/Transforms/LoopUnroll/PowerPC/p8-unrolling-legalize-v [...] create mode 100644 llvm/test/Transforms/NewGVN/2016-08-30-MaskedScatterGather-xfai [...] create mode 100644 llvm/test/Transforms/PGOProfile/counter_promo_nest-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/scalarization-inseltpoison.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/vector-trunc-inseltpoison.ll create mode 100644 llvm/test/Transforms/RewriteStatepointsForGC/base-vector-inselt [...] create mode 100644 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mode 100644 llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/insert-binop-with-consta [...] create mode 100644 llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll create mode 100644 llvm/test/Transforms/VectorCombine/X86/scalarize-cmp-inseltpoison.ll rename mlir/include/mlir/Conversion/GPUToSPIRV/{ConvertGPUToSPIRV.h => GPUToSPIRV. [...] rename mlir/include/mlir/Conversion/GPUToSPIRV/{ConvertGPUToSPIRVPass.h => GPUToSP [...] copy mlir/include/mlir/Conversion/{LinalgToSPIRV/LinalgToSPIRVPass.h => SCFToSPIRV [...] rename mlir/include/mlir/Conversion/SPIRVToLLVM/{ConvertSPIRVToLLVM.h => SPIRVToLL [...] rename mlir/include/mlir/Conversion/SPIRVToLLVM/{ConvertSPIRVToLLVMPass.h => SPIRV [...] rename mlir/include/mlir/Conversion/StandardToSPIRV/{ConvertStandardToSPIRV.h => S [...] rename mlir/include/mlir/Conversion/StandardToSPIRV/{ConvertStandardToSPIRVPass.h [...] rename mlir/include/mlir/Conversion/VectorToSPIRV/{ConvertVectorToSPIRV.h => Vecto [...] rename mlir/include/mlir/Conversion/VectorToSPIRV/{ConvertVectorToSPIRVPass.h => V [...] rename mlir/lib/Conversion/GPUToSPIRV/{ConvertGPUToSPIRV.cpp => GPUToSPIRV.cpp} (98%) rename mlir/lib/Conversion/GPUToSPIRV/{ConvertGPUToSPIRVPass.cpp => GPUToSPIRVPass [...] copy mlir/lib/Conversion/{StandardToSPIRV/ConvertStandardToSPIRVPass.cpp => SCFToS [...] rename mlir/lib/Conversion/SPIRVToLLVM/{ConvertSPIRVToLLVM.cpp => SPIRVToLLVM.cpp} (99%) rename mlir/lib/Conversion/SPIRVToLLVM/{ConvertSPIRVToLLVMPass.cpp => SPIRVToLLVMP [...] rename mlir/lib/Conversion/StandardToSPIRV/{ConvertStandardToSPIRV.cpp => Standard [...] rename mlir/lib/Conversion/StandardToSPIRV/{ConvertStandardToSPIRVPass.cpp => Stan [...] copy mlir/lib/Conversion/{LinalgToSPIRV/LinalgToSPIRVPass.cpp => VectorToSPIRV/Vec [...] rename mlir/test/Conversion/GPUToSPIRV/{test_spirv_entry_point.mlir => entry-point [...] delete mode 100644 mlir/test/Conversion/GPUToSPIRV/if.mlir delete mode 100644 mlir/test/Conversion/GPUToSPIRV/loop.mlir create mode 100644 mlir/test/Conversion/SCFToSPIRV/for.mlir create mode 100644 mlir/test/Conversion/SCFToSPIRV/if.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig updated (55ca964cc -> 5ffb02a2a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 55ca964cc 0: update: llvm-linux-qemu: boot new 5ffb02a2a 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (55ca964cc) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 220 +- 02-prepare_abe/console.log | 262 +- 03-build_llvm/console.log | 13862 ++++++++++++------------ 04-build_linux/console.log | 798 +- 05-build_abe-qemu/console.log | 6756 ++++++------ 06-boot_linux/console.log | 8 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 18 +- console.log | 21936 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21934 insertions(+), 21946 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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