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[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 37 - Successful!

by ci_notify＠linaro.org

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_bmk_tx1/gnu-release-aarch64-spec2k6-O2 - Build # 15 - Successful!

by ci_notify＠linaro.org

Successfully identified regression in *gcc* in CI configuration tcwg_bmk_gnu_tx1/gnu-release-aarch64-spec2k6-O2. So far, this commit has regressed CI configurations: - tcwg_bmk_gnu_tx1/gnu-release-aarch64-spec2k6-O2 Culprit: <cut> commit a4dfaad2e5594d871fe00a1116005e28f95d644e Author: Richard Sandiford <richard.sandiford(a)arm.com> Date: Mon Sep 30 16:20:44 2019 +0000 Remove global call sets: gcse.c This is another case in which we can conservatively treat partial kills as full kills. Again this is in principle a bug fix for TARGET_HARD_REGNO_CALL_PART_CLOBBERED targets, but in practice it probably doesn't make a difference. 2019-09-30 Richard Sandiford <richard.sandiford(a)arm.com> gcc/ * gcse.c: Include function-abi.h. (compute_hash_table_work): Use insn_callee_abi to get the ABI of the call insn target. Invalidate partially call-clobbered registers as well as fully call-clobbered ones. From-SVN: r276323 </cut> Results regressed to (for first_bad == a4dfaad2e5594d871fe00a1116005e28f95d644e) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # true: 0 # benchmark -O2 -- artifacts/build-a4dfaad2e5594d871fe00a1116005e28f95d644e/results_id: 1 # 447.dealII,[.] _ZNK12SparseMatrixIdE5vmultI6VectorIdES3_EEvRT regressed by 112 from (for last_good == c1b582720a39c3cb944aaff0298f721cdd034e3f) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # true: 0 # benchmark -O2 -- artifacts/build-c1b582720a39c3cb944aaff0298f721cdd034e3f/results_id: 1 Artifacts of last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… Results ID of last_good: tx1_64/tcwg_bmk_gnu_tx1/bisect-gnu-release-aarch64-spec2k6-O2/1425 Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… Results ID of first_bad: tx1_64/tcwg_bmk_gnu_tx1/bisect-gnu-release-aarch64-spec2k6-O2/1421 Build top page/logs: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… Configuration details: Reproduce builds: <cut> mkdir investigate-gcc-a4dfaad2e5594d871fe00a1116005e28f95d644e cd investigate-gcc-a4dfaad2e5594d871fe00a1116005e28f95d644e git clone https://git.linaro.org/toolchain/jenkins-scripts mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh cd gcc # Reproduce first_bad build git checkout --detach a4dfaad2e5594d871fe00a1116005e28f95d644e ../artifacts/test.sh # Reproduce last_good build git checkout --detach c1b582720a39c3cb944aaff0298f721cdd034e3f ../artifacts/test.sh cd .. </cut> History of pending regressions and results: https://git.linaro.org/toolchain/ci/base-artifacts.git/log/?h=linaro-local/… Artifacts: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… Build log: https://ci.linaro.org/job/tcwg_bmk_ci_gnu-bisect-tcwg_bmk_tx1-gnu-release-a… Full commit (up to 1000 lines): <cut> commit a4dfaad2e5594d871fe00a1116005e28f95d644e Author: Richard Sandiford <richard.sandiford(a)arm.com> Date: Mon Sep 30 16:20:44 2019 +0000 Remove global call sets: gcse.c This is another case in which we can conservatively treat partial kills as full kills. Again this is in principle a bug fix for TARGET_HARD_REGNO_CALL_PART_CLOBBERED targets, but in practice it probably doesn't make a difference. 2019-09-30 Richard Sandiford <richard.sandiford(a)arm.com> gcc/ * gcse.c: Include function-abi.h. (compute_hash_table_work): Use insn_callee_abi to get the ABI of the call insn target. Invalidate partially call-clobbered registers as well as fully call-clobbered ones. From-SVN: r276323 --- gcc/ChangeLog | 7 +++++++ gcc/gcse.c | 10 ++++++++-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9d8b083d539..1b1c31cf009 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-09-30 Richard Sandiford <richard.sandiford(a)arm.com> + + * gcse.c: Include function-abi.h. + (compute_hash_table_work): Use insn_callee_abi to get the ABI of + the call insn target. Invalidate partially call-clobbered + registers as well as fully call-clobbered ones. + 2019-09-30 Richard Sandiford <richard.sandiford(a)arm.com> * function.c (aggregate_value_p): Work out which ABI the diff --git a/gcc/gcse.c b/gcc/gcse.c index 9bde8619b7b..aeb59c645e1 100644 --- a/gcc/gcse.c +++ b/gcc/gcse.c @@ -160,6 +160,7 @@ along with GCC; see the file COPYING3. If not see #include "dbgcnt.h" #include "gcse.h" #include "gcse-common.h" +#include "function-abi.h" /* We support GCSE via Partial Redundancy Elimination. PRE optimizations are a superset of those done by classic GCSE. @@ -1528,8 +1529,13 @@ compute_hash_table_work (struct gcse_hash_table_d *table) if (CALL_P (insn)) { hard_reg_set_iterator hrsi; - EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call, - 0, regno, hrsi) + + /* We don't track modes of hard registers, so we need + to be conservative and assume that partial kills + are full kills. */ + HARD_REG_SET callee_clobbers + = insn_callee_abi (insn).full_and_partial_reg_clobbers (); + EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers, 0, regno, hrsi) record_last_reg_set_info (insn, regno); if (! RTL_CONST_OR_PURE_CALL_P (insn) </cut>

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 35 - Successful!

by ci_notify＠linaro.org

Successfully identified regression in *glibc* in CI configuration tcwg_cross/gnu-master-aarch64-build_cross. So far, this commit has regressed CI configurations: - tcwg_cross/gnu-master-aarch64-build_cross Culprit: <cut> commit 6ec6c77867af4ddfec7323e0ac6ede89effca852 Author: liuhongt <hongtao.liu(a)intel.com> Date: Wed Jul 7 10:07:59 2021 +0800 soft-fp: Add __extendhfsf2/__extendhfdf2, __truncsfhf2/__truncdfhf2, __eqhf2/__nehf2 1. Add __extendhfdf2/__extendhfsf2 to return an IEEE half converted to IEEE double/single. 2. Add __truncdfhf2/__extendsfhf2 to truncate IEEE double/single into IEEE half. 3. Add __eqhf2/__nehf2 to return 0 if a == b and a,b are not NAN, otherwise return 1. These are needed by x86 _Float16: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-… support in GCC. </cut> Results regressed to (for first_bad == 6ec6c77867af4ddfec7323e0ac6ede89effca852) # reset_artifacts: -10 # true: 0 # build_abe binutils: 1 # build_abe stage1: 2 # build_abe linux: 3 # First few build errors in logs: # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/start.o] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:499: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/start.os] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/crtn.o] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/crti.o] Error 1 # 00:00:14 make[2]: *** [../o-iterator.mk:9: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/check_fds.o] Error 1 # 00:00:14 make[2]: *** [../o-iterator.mk:9: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/check_fds.os] Error 1 # 00:00:14 ../sysdeps/aarch64/nptl/tls.h:91:19: error: ‘__builtin_thread_pointer’ is not supported on this target # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:485: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/libc-tls.o] Error 1 # 00:00:14 ../sysdeps/unix/sysv/linux/aarch64/sysdep.h:190:17: error: invalid register name for ‘_x0’ # 00:00:14 ../sysdeps/unix/sysv/linux/aarch64/sysdep.h:174:22: error: invalid register name for ‘_x8’ from (for last_good == b46cfcef3f7dab8e90729c6616ac1420f2642245) # reset_artifacts: -10 # true: 0 # build_abe binutils: 1 # build_abe stage1: 2 # build_abe linux: 3 # build_abe glibc: 4 # build_abe stage2: 5 # build_abe qemu: 6 Artifacts of last_good build: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Build top page/logs: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Configuration details: Reproduce builds: <cut> mkdir investigate-glibc-6ec6c77867af4ddfec7323e0ac6ede89effca852 cd investigate-glibc-6ec6c77867af4ddfec7323e0ac6ede89effca852 git clone https://git.linaro.org/toolchain/jenkins-scripts mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_gnu-build.sh @@ artifacts/manifests/build-baseline.sh cd glibc # Reproduce first_bad build git checkout --detach 6ec6c77867af4ddfec7323e0ac6ede89effca852 ../artifacts/test.sh # Reproduce last_good build git checkout --detach b46cfcef3f7dab8e90729c6616ac1420f2642245 ../artifacts/test.sh cd .. </cut> History of pending regressions and results: https://git.linaro.org/toolchain/ci/base-artifacts.git/log/?h=linaro-local/… Artifacts: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Build log: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Full commit (up to 1000 lines): <cut> commit 6ec6c77867af4ddfec7323e0ac6ede89effca852 Author: liuhongt <hongtao.liu(a)intel.com> Date: Wed Jul 7 10:07:59 2021 +0800 soft-fp: Add __extendhfsf2/__extendhfdf2, __truncsfhf2/__truncdfhf2, __eqhf2/__nehf2 1. Add __extendhfdf2/__extendhfsf2 to return an IEEE half converted to IEEE double/single. 2. Add __truncdfhf2/__extendsfhf2 to truncate IEEE double/single into IEEE half. 3. Add __eqhf2/__nehf2 to return 0 if a == b and a,b are not NAN, otherwise return 1. These are needed by x86 _Float16: https://software.intel.com/content/www/us/en/develop/download/intel-avx512-… support in GCC. --- soft-fp/eqhf2.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++ soft-fp/extendhfdf2.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++++++ soft-fp/extendhfsf2.c | 49 +++++++++++++++++++++++++++++++++++++++++++++++ soft-fp/half.h | 2 ++ soft-fp/truncdfhf2.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++ soft-fp/truncsfhf2.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 253 insertions(+) diff --git a/soft-fp/eqhf2.c b/soft-fp/eqhf2.c new file mode 100644 index 0000000000..6d6634e5c5 --- /dev/null +++ b/soft-fp/eqhf2.c @@ -0,0 +1,49 @@ +/* Software floating-point emulation. + Return 0 iff a == b, 1 otherwise + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include "soft-fp.h" +#include "half.h" + +CMPtype +__eqhf2 (HFtype a, HFtype b) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_H (B); + CMPtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_UNPACK_RAW_H (B, b); + FP_CMP_EQ_H (r, A, B, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} + +strong_alias (__eqhf2, __nehf2); diff --git a/soft-fp/extendhfdf2.c b/soft-fp/extendhfdf2.c new file mode 100644 index 0000000000..337ba791d4 --- /dev/null +++ b/soft-fp/extendhfdf2.c @@ -0,0 +1,53 @@ +/* Software floating-point emulation. + Return an IEEE half converted to IEEE double + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#define FP_NO_EXACT_UNDERFLOW +#include "soft-fp.h" +#include "half.h" +#include "double.h" + +DFtype +__extendhfdf2 (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_D (R); + DFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); +#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D + FP_EXTEND (D, H, 2, 1, R, A); +#else + FP_EXTEND (D, H, 1, 1, R, A); +#endif + FP_PACK_RAW_D (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/soft-fp/extendhfsf2.c b/soft-fp/extendhfsf2.c new file mode 100644 index 0000000000..a02f46d9a9 --- /dev/null +++ b/soft-fp/extendhfsf2.c @@ -0,0 +1,49 @@ +/* Software floating-point emulation. + Return an IEEE half converted to IEEE single + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#define FP_NO_EXACT_UNDERFLOW +#include "soft-fp.h" +#include "half.h" +#include "single.h" + +SFtype +__extendhfsf2 (HFtype a) +{ + FP_DECL_EX; + FP_DECL_H (A); + FP_DECL_S (R); + SFtype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_H (A, a); + FP_EXTEND (S, H, 1, 1, R, A); + FP_PACK_RAW_S (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/soft-fp/half.h b/soft-fp/half.h index ca2c1fad03..70af2712fc 100644 --- a/soft-fp/half.h +++ b/soft-fp/half.h @@ -167,4 +167,6 @@ union _FP_UNION_H #define _FP_FRAC_HIGH_RAW_H(X) _FP_FRAC_HIGH_1 (X) #define _FP_FRAC_HIGH_DW_H(X) _FP_FRAC_HIGH_1 (X) +#define FP_CMP_EQ_H(r, X, Y, ex) _FP_CMP_EQ (H, 1, (r), X, Y, (ex)) + #endif /* !SOFT_FP_HALF_H */ diff --git a/soft-fp/truncdfhf2.c b/soft-fp/truncdfhf2.c new file mode 100644 index 0000000000..8bcb278769 --- /dev/null +++ b/soft-fp/truncdfhf2.c @@ -0,0 +1,52 @@ +/* Software floating-point emulation. + Truncate IEEE double into IEEE half. + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include "soft-fp.h" +#include "half.h" +#include "double.h" + +HFtype +__truncdfhf2 (DFtype a) +{ + FP_DECL_EX; + FP_DECL_D (A); + FP_DECL_H (R); + HFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_D (A, a); +#if _FP_W_TYPE_SIZE < _FP_FRACBITS_D + FP_TRUNC (H, D, 1, 2, R, A); +#else + FP_TRUNC (H, D, 1, 1, R, A); +#endif + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} diff --git a/soft-fp/truncsfhf2.c b/soft-fp/truncsfhf2.c new file mode 100644 index 0000000000..25bee29f7f --- /dev/null +++ b/soft-fp/truncsfhf2.c @@ -0,0 +1,48 @@ +/* Software floating-point emulation. + Truncate IEEE single into IEEE half. + Copyright (C) 2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <http://www.gnu.org/licenses/>. */ + +#include "soft-fp.h" +#include "half.h" +#include "single.h" + +HFtype +__truncsfhf2 (SFtype a) +{ + FP_DECL_EX; + FP_DECL_S (A); + FP_DECL_H (R); + HFtype r; + + FP_INIT_ROUNDMODE; + FP_UNPACK_SEMIRAW_S (A, a); + FP_TRUNC (H, S, 1, 1, R, A); + FP_PACK_SEMIRAW_H (r, R); + FP_HANDLE_EXCEPTIONS; + + return r; +} </cut>

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 21 - Successful!

by ci_notify＠linaro.org

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 38 - Successful!

by ci_notify＠linaro.org

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 36 - Successful!

by ci_notify＠linaro.org

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_bmk_tx1/llvm-release-aarch64-spec2k6-Os - Build # 6 - Successful!

by ci_notify＠linaro.org

Successfully identified regression in *llvm* in CI configuration tcwg_bmk_llvm_tx1/llvm-release-aarch64-spec2k6-Os. So far, this commit has regressed CI configurations: - tcwg_bmk_llvm_tx1/llvm-release-aarch64-spec2k6-Os Culprit: <cut> commit 87d7757bbe14fed420092071ded3430072053316 Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin(a)amd.com> Date: Tue Nov 24 10:42:43 2020 -0800 [SLP] Control maximum vectorization factor from TTI D82227 has added a proper check to limit PHI vectorization to the maximum vector register size. That unfortunately resulted in at least a couple of regressions on SystemZ and x86. This change reverts PHI handling from D82227 and replaces it with a more general check in SLPVectorizerPass::tryToVectorizeList(). Moved to tryToVectorizeList() it allows to restart vectorization if initial chunk fails. However, this function is more general and handles not only PHI but everything which SLP handles. If vectorization factor would be limited to maximum vector register size it would limit much more vectorization than before leading to further regressions. Therefore a new TTI callback getMaximumVF() is added with the default 0 to preserve current behavior and limit nothing. Then targets can decide what is better for them. The callback gets ElementSize just like a similar getMinimumVF() function and the main opcode of the chain. The latter is to avoid regressions at least on the AMDGPU. We can have loads and stores up to 128 bit wide, and <2 x 16> bit vector math on some subtargets, where the rest shall not be vectorized. I.e. we need to differentiate based on the element size and operation itself. Differential Revision: https://reviews.llvm.org/D92059 </cut> Results regressed to (for first_bad == 87d7757bbe14fed420092071ded3430072053316) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # build_llvm true: -3 # true: 0 # benchmark -Os -- artifacts/build-87d7757bbe14fed420092071ded3430072053316/results_id: 1 # 444.namd,namd_base.default regressed by 102 from (for last_good == c21df2a79c268d1e0f467ec25a1ec7cb4aff5dfb) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--disable-libsanitizer: -5 # build_llvm true: -3 # true: 0 # benchmark -Os -- artifacts/build-c21df2a79c268d1e0f467ec25a1ec7cb4aff5dfb/results_id: 1 Artifacts of last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… Results ID of last_good: tx1_64/tcwg_bmk_llvm_tx1/bisect-llvm-release-aarch64-spec2k6-Os/1415 Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… Results ID of first_bad: tx1_64/tcwg_bmk_llvm_tx1/bisect-llvm-release-aarch64-spec2k6-Os/1413 Build top page/logs: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… Configuration details: Reproduce builds: <cut> mkdir investigate-llvm-87d7757bbe14fed420092071ded3430072053316 cd investigate-llvm-87d7757bbe14fed420092071ded3430072053316 git clone https://git.linaro.org/toolchain/jenkins-scripts mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh cd llvm # Reproduce first_bad build git checkout --detach 87d7757bbe14fed420092071ded3430072053316 ../artifacts/test.sh # Reproduce last_good build git checkout --detach c21df2a79c268d1e0f467ec25a1ec7cb4aff5dfb ../artifacts/test.sh cd .. </cut> History of pending regressions and results: https://git.linaro.org/toolchain/ci/base-artifacts.git/log/?h=linaro-local/… Artifacts: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… Build log: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tx1-llvm-release… Full commit (up to 1000 lines): <cut> commit 87d7757bbe14fed420092071ded3430072053316 Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin(a)amd.com> Date: Tue Nov 24 10:42:43 2020 -0800 [SLP] Control maximum vectorization factor from TTI D82227 has added a proper check to limit PHI vectorization to the maximum vector register size. That unfortunately resulted in at least a couple of regressions on SystemZ and x86. This change reverts PHI handling from D82227 and replaces it with a more general check in SLPVectorizerPass::tryToVectorizeList(). Moved to tryToVectorizeList() it allows to restart vectorization if initial chunk fails. However, this function is more general and handles not only PHI but everything which SLP handles. If vectorization factor would be limited to maximum vector register size it would limit much more vectorization than before leading to further regressions. Therefore a new TTI callback getMaximumVF() is added with the default 0 to preserve current behavior and limit nothing. Then targets can decide what is better for them. The callback gets ElementSize just like a similar getMinimumVF() function and the main opcode of the chain. The latter is to avoid regressions at least on the AMDGPU. We can have loads and stores up to 128 bit wide, and <2 x 16> bit vector math on some subtargets, where the rest shall not be vectorized. I.e. we need to differentiate based on the element size and operation itself. Differential Revision: https://reviews.llvm.org/D92059 --- llvm/include/llvm/Analysis/TargetTransformInfo.h | 9 ++++ .../llvm/Analysis/TargetTransformInfoImpl.h | 2 + llvm/lib/Analysis/TargetTransformInfo.cpp | 5 ++ .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 6 +++ llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 1 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 33 +++++-------- .../Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll | 55 +++++++++++++++++----- llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll | 4 +- .../Transforms/SLPVectorizer/slp-max-phi-size.ll | 17 +++++-- 9 files changed, 95 insertions(+), 37 deletions(-) diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h index 3ba77c9a8dc9..b9b9df35cdb0 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -941,6 +941,11 @@ public: /// applies when shouldMaximizeVectorBandwidth returns true. unsigned getMinimumVF(unsigned ElemWidth) const; + /// \return The maximum vectorization factor for types of given element + /// bit width and opcode, or 0 if there is no maximum VF. + /// Currently only used by the SLP vectorizer. + unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const; + /// \return True if it should be considered for address type promotion. /// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is /// profitable without finding other extensions fed by the same input. @@ -1498,6 +1503,7 @@ public: virtual unsigned getMinVectorRegisterBitWidth() = 0; virtual bool shouldMaximizeVectorBandwidth(bool OptSize) const = 0; virtual unsigned getMinimumVF(unsigned ElemWidth) const = 0; + virtual unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const = 0; virtual bool shouldConsiderAddressTypePromotion( const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0; virtual unsigned getCacheLineSize() const = 0; @@ -1917,6 +1923,9 @@ public: unsigned getMinimumVF(unsigned ElemWidth) const override { return Impl.getMinimumVF(ElemWidth); } + unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const override { + return Impl.getMaximumVF(ElemWidth, Opcode); + } bool shouldConsiderAddressTypePromotion( const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override { return Impl.shouldConsiderAddressTypePromotion( diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h index b4847844cd0e..2c206094ac4a 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -356,6 +356,8 @@ public: unsigned getMinimumVF(unsigned ElemWidth) const { return 0; } + unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { return 0; } + bool shouldConsiderAddressTypePromotion(const Instruction &I, bool &AllowPromotionWithoutCommonHeader) { diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index f327d0cad426..086a212ee65b 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -635,6 +635,11 @@ unsigned TargetTransformInfo::getMinimumVF(unsigned ElemWidth) const { return TTIImpl->getMinimumVF(ElemWidth); } +unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, + unsigned Opcode) const { + return TTIImpl->getMaximumVF(ElemWidth, Opcode); +} + bool TargetTransformInfo::shouldConsiderAddressTypePromotion( const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { return TTIImpl->shouldConsiderAddressTypePromotion( diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index ab83419183ee..2cfb0299eea9 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -288,6 +288,12 @@ unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const { return 32; } +unsigned GCNTTIImpl::getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { + if (Opcode == Instruction::Load || Opcode == Instruction::Store) + return 32 * 4 / ElemWidth; + return (ElemWidth == 16 && ST->has16BitInsts()) ? 2 : 1; +} + unsigned GCNTTIImpl::getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h index 05a054ac30ff..1785a2df2eba 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -170,6 +170,7 @@ public: unsigned getNumberOfRegisters(unsigned RCID) const; unsigned getRegisterBitWidth(bool Vector) const; unsigned getMinVectorRegisterBitWidth() const; + unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const; unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, VectorType *VecTy) const; diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index e1c1c6edf08c..cda43521e9ba 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -126,6 +126,10 @@ static cl::opt<int> MaxVectorRegSizeOption("slp-max-reg-size", cl::init(128), cl::Hidden, cl::desc("Attempt to vectorize for this register size in bits")); +static cl::opt<unsigned> +MaxVFOption("slp-max-vf", cl::init(0), cl::Hidden, + cl::desc("Maximum SLP vectorization factor (0=unlimited)")); + static cl::opt<int> MaxStoreLookup("slp-max-store-lookup", cl::init(32), cl::Hidden, cl::desc("Maximum depth of the lookup for consecutive stores.")); @@ -741,6 +745,12 @@ public: return MinVecRegSize; } + unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { + unsigned MaxVF = MaxVFOption.getNumOccurrences() ? + MaxVFOption : TTI->getMaximumVF(ElemWidth, Opcode); + return MaxVF ? MaxVF : UINT_MAX; + } + /// Check if homogeneous aggregate is isomorphic to some VectorType. /// Accepts homogeneous multidimensional aggregate of scalars/vectors like /// {[4 x i16], [4 x i16]}, { <2 x float>, <2 x float> }, @@ -6191,6 +6201,7 @@ bool SLPVectorizerPass::tryToVectorizeList(ArrayRef<Value *> VL, BoUpSLP &R, unsigned Sz = R.getVectorElementSize(I0); unsigned MinVF = std::max(2U, R.getMinVecRegSize() / Sz); unsigned MaxVF = std::max<unsigned>(PowerOf2Floor(VL.size()), MinVF); + MaxVF = std::min(R.getMaximumVF(Sz, S.getOpcode()), MaxVF); if (MaxVF < 2) { R.getORE()->emit([&]() { return OptimizationRemarkMissed(SV_NAME, "SmallVF", I0) @@ -7633,7 +7644,6 @@ bool SLPVectorizerPass::vectorizeChainsInBlock(BasicBlock *BB, BoUpSLP &R) { bool Changed = false; SmallVector<Value *, 4> Incoming; SmallPtrSet<Value *, 16> VisitedInstrs; - unsigned MaxVecRegSize = R.getMaxVecRegSize(); bool HaveVectorizedPhiNodes = true; while (HaveVectorizedPhiNodes) { @@ -7660,27 +7670,8 @@ bool SLPVectorizerPass::vectorizeChainsInBlock(BasicBlock *BB, BoUpSLP &R) { // Look for the next elements with the same type. SmallVector<Value *, 4>::iterator SameTypeIt = IncIt; - Type *EltTy = (*IncIt)->getType(); - - assert(EltTy->isSized() && - "Instructions should all be sized at this point"); - TypeSize EltTS = DL->getTypeSizeInBits(EltTy); - if (EltTS.isScalable()) { - // For now, just ignore vectorizing scalable types. - ++IncIt; - continue; - } - - unsigned EltSize = EltTS.getFixedSize(); - unsigned MaxNumElts = MaxVecRegSize / EltSize; - if (MaxNumElts < 2) { - ++IncIt; - continue; - } - while (SameTypeIt != E && - (*SameTypeIt)->getType() == EltTy && - static_cast<unsigned>(SameTypeIt - IncIt) < MaxNumElts) { + (*SameTypeIt)->getType() == (*IncIt)->getType()) { VisitedInstrs.insert(*SameTypeIt); ++SameTypeIt; } diff --git a/llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll b/llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll index 514cf0749086..c7985b90f012 100644 --- a/llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll +++ b/llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll @@ -123,12 +123,18 @@ bb: ret <2 x i16> %ins.1 } -; FIXME: Should not vectorize define <2 x i32> @uadd_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) { ; GCN-LABEL: @uadd_sat_v2i32( ; GCN-NEXT: bb: -; GCN-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.uadd.sat.v2i32(<2 x i32> [[ARG0:%.*]], <2 x i32> [[ARG1:%.*]]) -; GCN-NEXT: ret <2 x i32> [[TMP0]] +; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0 +; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1 +; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0 +; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1 +; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]]) +; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]]) +; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0 +; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1 +; GCN-NEXT: ret <2 x i32> [[INS_1]] ; bb: %arg0.0 = extractelement <2 x i32> %arg0, i64 0 @@ -145,8 +151,15 @@ bb: define <2 x i32> @usub_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) { ; GCN-LABEL: @usub_sat_v2i32( ; GCN-NEXT: bb: -; GCN-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.usub.sat.v2i32(<2 x i32> [[ARG0:%.*]], <2 x i32> [[ARG1:%.*]]) -; GCN-NEXT: ret <2 x i32> [[TMP0]] +; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0 +; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1 +; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0 +; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1 +; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]]) +; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]]) +; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0 +; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1 +; GCN-NEXT: ret <2 x i32> [[INS_1]] ; bb: %arg0.0 = extractelement <2 x i32> %arg0, i64 0 @@ -163,8 +176,15 @@ bb: define <2 x i32> @sadd_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) { ; GCN-LABEL: @sadd_sat_v2i32( ; GCN-NEXT: bb: -; GCN-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.sadd.sat.v2i32(<2 x i32> [[ARG0:%.*]], <2 x i32> [[ARG1:%.*]]) -; GCN-NEXT: ret <2 x i32> [[TMP0]] +; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0 +; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1 +; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0 +; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1 +; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]]) +; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]]) +; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0 +; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1 +; GCN-NEXT: ret <2 x i32> [[INS_1]] ; bb: %arg0.0 = extractelement <2 x i32> %arg0, i64 0 @@ -181,8 +201,15 @@ bb: define <2 x i32> @ssub_sat_v2i32(<2 x i32> %arg0, <2 x i32> %arg1) { ; GCN-LABEL: @ssub_sat_v2i32( ; GCN-NEXT: bb: -; GCN-NEXT: [[TMP0:%.*]] = call <2 x i32> @llvm.ssub.sat.v2i32(<2 x i32> [[ARG0:%.*]], <2 x i32> [[ARG1:%.*]]) -; GCN-NEXT: ret <2 x i32> [[TMP0]] +; GCN-NEXT: [[ARG0_0:%.*]] = extractelement <2 x i32> [[ARG0:%.*]], i64 0 +; GCN-NEXT: [[ARG0_1:%.*]] = extractelement <2 x i32> [[ARG0]], i64 1 +; GCN-NEXT: [[ARG1_0:%.*]] = extractelement <2 x i32> [[ARG1:%.*]], i64 0 +; GCN-NEXT: [[ARG1_1:%.*]] = extractelement <2 x i32> [[ARG1]], i64 1 +; GCN-NEXT: [[ADD_0:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[ARG0_0]], i32 [[ARG1_0]]) +; GCN-NEXT: [[ADD_1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[ARG0_1]], i32 [[ARG1_1]]) +; GCN-NEXT: [[INS_0:%.*]] = insertelement <2 x i32> undef, i32 [[ADD_0]], i64 0 +; GCN-NEXT: [[INS_1:%.*]] = insertelement <2 x i32> [[INS_0]], i32 [[ADD_1]], i64 1 +; GCN-NEXT: ret <2 x i32> [[INS_1]] ; bb: %arg0.0 = extractelement <2 x i32> %arg0, i64 0 @@ -267,8 +294,14 @@ define <4 x i16> @uadd_sat_v4i16(<4 x i16> %arg0, <4 x i16> %arg1) { ; ; GFX8-LABEL: @uadd_sat_v4i16( ; GFX8-NEXT: bb: -; GFX8-NEXT: [[TMP0:%.*]] = call <4 x i16> @llvm.uadd.sat.v4i16(<4 x i16> [[ARG0:%.*]], <4 x i16> [[ARG1:%.*]]) -; GFX8-NEXT: ret <4 x i16> [[TMP0]] +; GFX8-NEXT: [[TMP0:%.*]] = shufflevector <4 x i16> [[ARG0:%.*]], <4 x i16> undef, <2 x i32> <i32 0, i32 1> +; GFX8-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[ARG1:%.*]], <4 x i16> undef, <2 x i32> <i32 0, i32 1> +; GFX8-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]]) +; GFX8-NEXT: [[TMP3:%.*]] = shufflevector <4 x i16> [[ARG0]], <4 x i16> undef, <2 x i32> <i32 2, i32 3> +; GFX8-NEXT: [[TMP4:%.*]] = shufflevector <4 x i16> [[ARG1]], <4 x i16> undef, <2 x i32> <i32 2, i32 3> +; GFX8-NEXT: [[TMP5:%.*]] = call <2 x i16> @llvm.uadd.sat.v2i16(<2 x i16> [[TMP3]], <2 x i16> [[TMP4]]) +; GFX8-NEXT: [[INS_3:%.*]] = shufflevector <2 x i16> [[TMP2]], <2 x i16> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 3> +; GFX8-NEXT: ret <4 x i16> [[INS_3]] ; bb: %arg0.0 = extractelement <4 x i16> %arg0, i64 0 diff --git a/llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll b/llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll index 84d25fe79a27..7a8e08de4138 100644 --- a/llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll +++ b/llvm/test/Transforms/SLPVectorizer/AMDGPU/round.ll @@ -18,9 +18,9 @@ bb: ret <2 x half> %tmp5 } -; TODO: Should probably not really be vectorizing this ; GCN-LABEL: @round_v2f32( -; GCN: call <2 x float> @llvm.round.v2f32 +; GCN: call float @llvm.round.f32( +; GCN: call float @llvm.round.f32( define <2 x float> @round_v2f32(<2 x float> %arg) { bb: %tmp = extractelement <2 x float> %arg, i64 0 diff --git a/llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll b/llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll index 466e83d0260a..ce33efc951fc 100644 --- a/llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll +++ b/llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll @@ -1,7 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -slp-vectorizer -S -slp-max-reg-size=32 < %s | FileCheck -check-prefix=MAX32 %s -; RUN: opt -slp-vectorizer -S -slp-max-reg-size=256 < %s | FileCheck -check-prefix=MAX256 %s -; RUN: opt -slp-vectorizer -S -slp-max-reg-size=1024 < %s | FileCheck -check-prefix=MAX1024 %s +; RUN: opt -slp-vectorizer -S -slp-max-vf=1 < %s | FileCheck -check-prefix=MAX32 %s +; RUN: opt -slp-vectorizer -S -slp-max-vf=8 < %s | FileCheck -check-prefix=MAX256 %s +; RUN: opt -slp-vectorizer -S -slp-max-vf=32 < %s | FileCheck -check-prefix=MAX1024 %s +; RUN: opt -slp-vectorizer -S < %s | FileCheck -check-prefix=MAX1024 %s + +; Make sure we do not vectorize to create PHI wider than requested. +; On AMDGPU target wider vectorization will result in a higher register pressure, +; spilling, or even inability to allocate registers. define void @phi_float32(half %hval, float %fval) { ; MAX32-LABEL: @phi_float32( @@ -120,6 +125,7 @@ define void @phi_float32(half %hval, float %fval) { ; MAX32-NEXT: [[PHI30:%.*]] = phi float [ [[I63]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ] ; MAX32-NEXT: [[PHI31:%.*]] = phi float [ [[I65]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I65]], [[BB5]] ], [ [[I65]], [[BB1]] ] ; MAX32-NEXT: [[PHI32:%.*]] = phi float [ [[I67]], [[BB3]] ], [ [[I67]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I67]], [[BB1]] ] +; MAX32-NEXT: store float [[PHI31]], float* undef, align 4 ; MAX32-NEXT: ret void ; ; MAX256-LABEL: @phi_float32( @@ -296,6 +302,8 @@ define void @phi_float32(half %hval, float %fval) { ; MAX256-NEXT: [[TMP154:%.*]] = phi <8 x float> [ [[TMP28]], [[BB3]] ], [ [[TMP93]], [[BB4]] ], [ [[TMP132]], [[BB5]] ], [ [[TMP54]], [[BB1]] ] ; MAX256-NEXT: [[TMP155:%.*]] = phi <8 x float> [ [[TMP30]], [[BB3]] ], [ [[TMP103]], [[BB4]] ], [ [[TMP142]], [[BB5]] ], [ [[TMP64]], [[BB1]] ] ; MAX256-NEXT: [[TMP156:%.*]] = phi <8 x float> [ [[TMP32]], [[BB3]] ], [ [[TMP113]], [[BB4]] ], [ [[TMP152]], [[BB5]] ], [ [[TMP74]], [[BB1]] ] +; MAX256-NEXT: [[TMP157:%.*]] = extractelement <8 x float> [[TMP156]], i32 6 +; MAX256-NEXT: store float [[TMP157]], float* undef, align 4 ; MAX256-NEXT: ret void ; ; MAX1024-LABEL: @phi_float32( @@ -481,6 +489,8 @@ define void @phi_float32(half %hval, float %fval) { ; MAX1024-NEXT: br label [[BB2]] ; MAX1024: bb2: ; MAX1024-NEXT: [[TMP165:%.*]] = phi <32 x float> [ [[TMP38]], [[BB3]] ], [ [[TMP125]], [[BB4]] ], [ [[TMP164]], [[BB5]] ], [ [[TMP86]], [[BB1]] ] +; MAX1024-NEXT: [[TMP166:%.*]] = extractelement <32 x float> [[TMP165]], i32 30 +; MAX1024-NEXT: store float [[TMP166]], float* undef, align 4 ; MAX1024-NEXT: ret void ; bb: @@ -603,5 +613,6 @@ bb2: %phi30 = phi float [ %i63, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ] %phi31 = phi float [ %i65, %bb3 ], [ %fval, %bb4 ], [ %i65, %bb5 ], [ %i65, %bb1 ] %phi32 = phi float [ %i67, %bb3 ], [ %i67, %bb4 ], [ %fval, %bb5 ], [ %i67, %bb1 ] + store float %phi31, float* undef ret void } </cut>

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 34 - Successful!

by ci_notify＠linaro.org

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_bmk_tk1/llvm-master-arm-spec2k6-Oz - Build # 12 - Successful!

by ci_notify＠linaro.org

Successfully identified regression in *llvm* in CI configuration tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-Oz. So far, this commit has regressed CI configurations: - tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-Oz Culprit: <cut> commit cd76f43b4995cf01bae9f97a54ca0e79c2355032 Author: David Green <david.green(a)arm.com> Date: Wed Jun 30 19:19:03 2021 +0100 [ARM] Set the immediate cost of GEP operands to 0 This prevents constant gep operands from being hoisted by the Constant Hoisting pass, leaving them to CodegenPrepare which can usually do a better job at splitting large offsets. This can, in general, improve performance and decrease codesize, especially for v6m where many constants have a high cost. Differential Revision: https://reviews.llvm.org/D104877 </cut> Results regressed to (for first_bad == cd76f43b4995cf01bae9f97a54ca0e79c2355032) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--disable-libsanitizer: -5 # build_llvm true: -3 # true: 0 # benchmark -Oz_mthumb -- artifacts/build-cd76f43b4995cf01bae9f97a54ca0e79c2355032/results_id: 1 # 470.lbm,lbm_base.default regressed by 107 from (for last_good == 4339d3bd84a9bc1b5ecc58ddfc935d53e9de4fd4) # reset_artifacts: -10 # build_abe binutils: -9 # build_abe stage1 -- --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--disable-libsanitizer: -8 # build_abe linux: -7 # build_abe glibc: -6 # build_abe stage2 -- --set gcc_override_configure=--with-mode=thumb --set gcc_override_configure=--disable-libsanitizer: -5 # build_llvm true: -3 # true: 0 # benchmark -Oz_mthumb -- artifacts/build-4339d3bd84a9bc1b5ecc58ddfc935d53e9de4fd4/results_id: 1 Artifacts of last_good build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… Results ID of last_good: tk1_32/tcwg_bmk_llvm_tk1/bisect-llvm-master-arm-spec2k6-Oz/1400 Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… Results ID of first_bad: tk1_32/tcwg_bmk_llvm_tk1/bisect-llvm-master-arm-spec2k6-Oz/1406 Build top page/logs: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… Configuration details: Reproduce builds: <cut> mkdir investigate-llvm-cd76f43b4995cf01bae9f97a54ca0e79c2355032 cd investigate-llvm-cd76f43b4995cf01bae9f97a54ca0e79c2355032 git clone https://git.linaro.org/toolchain/jenkins-scripts mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_bmk-build.sh @@ artifacts/manifests/build-baseline.sh cd llvm # Reproduce first_bad build git checkout --detach cd76f43b4995cf01bae9f97a54ca0e79c2355032 ../artifacts/test.sh # Reproduce last_good build git checkout --detach 4339d3bd84a9bc1b5ecc58ddfc935d53e9de4fd4 ../artifacts/test.sh cd .. </cut> History of pending regressions and results: https://git.linaro.org/toolchain/ci/base-artifacts.git/log/?h=linaro-local/… Artifacts: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… Build log: https://ci.linaro.org/job/tcwg_bmk_ci_llvm-bisect-tcwg_bmk_tk1-llvm-master-… Full commit (up to 1000 lines): <cut> commit cd76f43b4995cf01bae9f97a54ca0e79c2355032 Author: David Green <david.green(a)arm.com> Date: Wed Jun 30 19:19:03 2021 +0100 [ARM] Set the immediate cost of GEP operands to 0 This prevents constant gep operands from being hoisted by the Constant Hoisting pass, leaving them to CodegenPrepare which can usually do a better job at splitting large offsets. This can, in general, improve performance and decrease codesize, especially for v6m where many constants have a high cost. Differential Revision: https://reviews.llvm.org/D104877 --- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 5 ++ llvm/test/CodeGen/ARM/gep-imm.ll | 74 ++++++++++------------ .../ConstantHoisting/ARM/gep-struct-index.ll | 9 +-- 3 files changed, 42 insertions(+), 46 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp index 6c393405a185..7410d8d1eabe 100644 --- a/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -337,6 +337,11 @@ InstructionCost ARMTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, Idx == 1) return 0; + // Leave any gep offsets for the CodeGenPrepare, which will do a better job at + // splitting any large offsets. + if (Opcode == Instruction::GetElementPtr && Idx != 0) + return 0; + if (Opcode == Instruction::And) { // UXTB/UXTH if (Imm == 255 || Imm == 65535) diff --git a/llvm/test/CodeGen/ARM/gep-imm.ll b/llvm/test/CodeGen/ARM/gep-imm.ll index 5358261426b4..20218725f8a4 100644 --- a/llvm/test/CodeGen/ARM/gep-imm.ll +++ b/llvm/test/CodeGen/ARM/gep-imm.ll @@ -37,16 +37,15 @@ entry: define void @large(i32 %a, i32 %b, i32 *%c, i32* %d) { ; CHECKV6M-LABEL: large: ; CHECKV6M: @ %bb.0: @ %entry -; CHECKV6M-NEXT: .save {r4, r5, r7, lr} -; CHECKV6M-NEXT: push {r4, r5, r7, lr} -; CHECKV6M-NEXT: movs r4, #125 -; CHECKV6M-NEXT: lsls r4, r4, #4 -; CHECKV6M-NEXT: lsls r4, r4, #2 -; CHECKV6M-NEXT: str r0, [r3, r4] -; CHECKV6M-NEXT: ldr r5, .LCPI1_0 -; CHECKV6M-NEXT: str r1, [r3, r5] -; CHECKV6M-NEXT: str r0, [r2, r4] -; CHECKV6M-NEXT: pop {r4, r5, r7, pc} +; CHECKV6M-NEXT: .save {r4, lr} +; CHECKV6M-NEXT: push {r4, lr} +; CHECKV6M-NEXT: ldr r4, .LCPI1_0 +; CHECKV6M-NEXT: str r1, [r3, r4] +; CHECKV6M-NEXT: movs r1, #125 +; CHECKV6M-NEXT: lsls r1, r1, #6 +; CHECKV6M-NEXT: str r0, [r3, r1] +; CHECKV6M-NEXT: str r0, [r2, r1] +; CHECKV6M-NEXT: pop {r4, pc} ; CHECKV6M-NEXT: .p2align 2 ; CHECKV6M-NEXT: @ %bb.1: ; CHECKV6M-NEXT: .LCPI1_0: @@ -82,47 +81,42 @@ entry: define void @huge(i32 %a, i32 %b, i32 *%c, i32* %d) { ; CHECKV6M-LABEL: huge: ; CHECKV6M: @ %bb.0: @ %entry -; CHECKV6M-NEXT: .save {r4, r5, r7, lr} -; CHECKV6M-NEXT: push {r4, r5, r7, lr} +; CHECKV6M-NEXT: .save {r4, lr} +; CHECKV6M-NEXT: push {r4, lr} ; CHECKV6M-NEXT: ldr r4, .LCPI2_0 -; CHECKV6M-NEXT: lsls r4, r4, #2 -; CHECKV6M-NEXT: str r0, [r3, r4] -; CHECKV6M-NEXT: ldr r5, .LCPI2_1 -; CHECKV6M-NEXT: str r1, [r3, r5] -; CHECKV6M-NEXT: str r0, [r2, r4] -; CHECKV6M-NEXT: pop {r4, r5, r7, pc} +; CHECKV6M-NEXT: str r1, [r3, r4] +; CHECKV6M-NEXT: ldr r1, .LCPI2_1 +; CHECKV6M-NEXT: str r0, [r3, r1] +; CHECKV6M-NEXT: str r0, [r2, r1] +; CHECKV6M-NEXT: pop {r4, pc} ; CHECKV6M-NEXT: .p2align 2 ; CHECKV6M-NEXT: @ %bb.1: ; CHECKV6M-NEXT: .LCPI2_0: -; CHECKV6M-NEXT: .long 200000 @ 0x30d40 -; CHECKV6M-NEXT: .LCPI2_1: ; CHECKV6M-NEXT: .long 1200000 @ 0x124f80 +; CHECKV6M-NEXT: .LCPI2_1: +; CHECKV6M-NEXT: .long 800000 @ 0xc3500 ; ; CHECKV7M-LABEL: huge: ; CHECKV7M: @ %bb.0: @ %entry -; CHECKV7M-NEXT: .save {r7, lr} -; CHECKV7M-NEXT: push {r7, lr} -; CHECKV7M-NEXT: movw r12, #3392 -; CHECKV7M-NEXT: movw lr, #20352 -; CHECKV7M-NEXT: movt r12, #3 -; CHECKV7M-NEXT: movt lr, #18 -; CHECKV7M-NEXT: str.w r0, [r3, r12, lsl #2] -; CHECKV7M-NEXT: str.w r1, [r3, lr] -; CHECKV7M-NEXT: str.w r0, [r2, r12, lsl #2] -; CHECKV7M-NEXT: pop {r7, pc} +; CHECKV7M-NEXT: movw r12, #20352 +; CHECKV7M-NEXT: movt r12, #18 +; CHECKV7M-NEXT: str.w r1, [r3, r12] +; CHECKV7M-NEXT: movw r1, #13568 +; CHECKV7M-NEXT: movt r1, #12 +; CHECKV7M-NEXT: str r0, [r3, r1] +; CHECKV7M-NEXT: str r0, [r2, r1] +; CHECKV7M-NEXT: bx lr ; ; CHECKV7A-LABEL: huge: ; CHECKV7A: @ %bb.0: @ %entry -; CHECKV7A-NEXT: .save {r7, lr} -; CHECKV7A-NEXT: push {r7, lr} -; CHECKV7A-NEXT: movw r12, #3392 -; CHECKV7A-NEXT: movw lr, #20352 -; CHECKV7A-NEXT: movt r12, #3 -; CHECKV7A-NEXT: movt lr, #18 -; CHECKV7A-NEXT: str.w r0, [r3, r12, lsl #2] -; CHECKV7A-NEXT: str.w r1, [r3, lr] -; CHECKV7A-NEXT: str.w r0, [r2, r12, lsl #2] -; CHECKV7A-NEXT: pop {r7, pc} +; CHECKV7A-NEXT: movw r12, #20352 +; CHECKV7A-NEXT: movt r12, #18 +; CHECKV7A-NEXT: str.w r1, [r3, r12] +; CHECKV7A-NEXT: movw r1, #13568 +; CHECKV7A-NEXT: movt r1, #12 +; CHECKV7A-NEXT: str r0, [r3, r1] +; CHECKV7A-NEXT: str r0, [r2, r1] +; CHECKV7A-NEXT: bx lr entry: %arrayidx = getelementptr inbounds i32, i32* %d, i32 200000 store i32 %a, i32* %arrayidx, align 4 diff --git a/llvm/test/Transforms/ConstantHoisting/ARM/gep-struct-index.ll b/llvm/test/Transforms/ConstantHoisting/ARM/gep-struct-index.ll index 45f4500b37c1..70a01a660b62 100644 --- a/llvm/test/Transforms/ConstantHoisting/ARM/gep-struct-index.ll +++ b/llvm/test/Transforms/ConstantHoisting/ARM/gep-struct-index.ll @@ -19,14 +19,11 @@ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } -; Indices for GEPs that index into a struct type should not be hoisted. +; Indices for GEPs should not be hoisted. define i32 @test1(%T* %P) nounwind { ; CHECK-LABEL: @test1 -; CHECK: %const = bitcast i32 256 to i32 -; CHECK: %addr1 = getelementptr %T, %T* %P, i32 %const, i32 256 -; CHECK: %addr2 = getelementptr %T, %T* %P, i32 %const, i32 256 -; The first index into the pointer is hoisted, but the second one into the -; struct isn't. +; CHECK: %addr1 = getelementptr %T, %T* %P, i32 256, i32 256 +; CHECK: %addr2 = getelementptr %T, %T* %P, i32 256, i32 256 %addr1 = getelementptr %T, %T* %P, i32 256, i32 256 %tmp1 = load i32, i32* %addr1 %addr2 = getelementptr %T, %T* %P, i32 256, i32 256 </cut>

4 years, 8 months

[CI-NOTIFY]: TCWG Bisect tcwg_cross/gnu-master-aarch64-build_cross - Build # 32 - Successful!

by ci_notify＠linaro.org

Successfully identified regression in *glibc* in CI configuration tcwg_cross/gnu-master-aarch64-build_cross. So far, this commit has regressed CI configurations: - tcwg_cross/gnu-master-aarch64-build_cross Culprit: <cut> commit 7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8 Author: Florian Weimer <fweimer(a)redhat.com> Date: Wed Jul 7 08:40:41 2021 +0200 elf: Clean up GLIBC_PRIVATE exports of internal libdl symbols They are no longer needed after everything has been moved into libc. The _dl_vsym test has to be removed because the symbol cannot be used outside libc anymore. Reviewed-by: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> </cut> Results regressed to (for first_bad == 7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8) # reset_artifacts: -10 # true: 0 # build_abe binutils: 1 # build_abe stage1: 2 # build_abe linux: 3 # First few build errors in logs: # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/start.o] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:499: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/start.os] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/crtn.o] Error 1 # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:483: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/crti.o] Error 1 # 00:00:14 make[2]: *** [../o-iterator.mk:9: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/check_fds.o] Error 1 # 00:00:14 make[2]: *** [../o-iterator.mk:9: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/check_fds.os] Error 1 # 00:00:14 ../sysdeps/aarch64/nptl/tls.h:91:19: error: ‘__builtin_thread_pointer’ is not supported on this target # 00:00:14 make[2]: *** [/home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/sysd-rules:485: /home/tcwg-buildslave/workspace/tcwg_gnu_0/abe/builds/x86_64-pc-linux-gnu/aarch64-linux-gnu/glibc-glibc.git~master/csu/libc-tls.o] Error 1 # 00:00:14 ../sysdeps/unix/sysv/linux/aarch64/sysdep.h:190:17: error: invalid register name for ‘_x0’ # 00:00:14 ../sysdeps/unix/sysv/linux/aarch64/sysdep.h:174:22: error: invalid register name for ‘_x8’ from (for last_good == ceda365fbac3083e16eed07892fbd5970b3839a0) # reset_artifacts: -10 # true: 0 # build_abe binutils: 1 # build_abe stage1: 2 # build_abe linux: 3 # build_abe glibc: 4 # build_abe stage2: 5 # build_abe qemu: 6 Artifacts of last_good build: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Artifacts of first_bad build: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Build top page/logs: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Configuration details: Reproduce builds: <cut> mkdir investigate-glibc-7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8 cd investigate-glibc-7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8 git clone https://git.linaro.org/toolchain/jenkins-scripts mkdir -p artifacts/manifests curl -o artifacts/manifests/build-baseline.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail curl -o artifacts/manifests/build-parameters.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail curl -o artifacts/test.sh https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… --fail chmod +x artifacts/test.sh # Reproduce the baseline build (build all pre-requisites) ./jenkins-scripts/tcwg_gnu-build.sh @@ artifacts/manifests/build-baseline.sh cd glibc # Reproduce first_bad build git checkout --detach 7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8 ../artifacts/test.sh # Reproduce last_good build git checkout --detach ceda365fbac3083e16eed07892fbd5970b3839a0 ../artifacts/test.sh cd .. </cut> History of pending regressions and results: https://git.linaro.org/toolchain/ci/base-artifacts.git/log/?h=linaro-local/… Artifacts: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Build log: https://ci.linaro.org/job/tcwg_cross-bisect-gnu-master-aarch64-build_cross/… Full commit (up to 1000 lines): <cut> commit 7a5db2e82fbb6c3a6e3fdae02b7166c5d0e8c7a8 Author: Florian Weimer <fweimer(a)redhat.com> Date: Wed Jul 7 08:40:41 2021 +0200 elf: Clean up GLIBC_PRIVATE exports of internal libdl symbols They are no longer needed after everything has been moved into libc. The _dl_vsym test has to be removed because the symbol cannot be used outside libc anymore. Reviewed-by: Adhemerval Zanella <adhemerval.zanella(a)linaro.org> --- dlfcn/dlerror.c | 1 - elf/Makefile | 16 ++---- elf/Versions | 3 - elf/dl-addr.c | 1 - elf/dl-libc.c | 4 -- elf/dl-sym.c | 2 - elf/tst-libc_dlvsym-dso.c | 25 --------- elf/tst-libc_dlvsym-static.c | 32 ----------- elf/tst-libc_dlvsym.c | 34 ----------- elf/tst-libc_dlvsym.h | 130 ------------------------------------------- include/dlfcn.h | 30 +++++----- 11 files changed, 18 insertions(+), 260 deletions(-) diff --git a/dlfcn/dlerror.c b/dlfcn/dlerror.c index d0194a7cef..5047b14066 100644 --- a/dlfcn/dlerror.c +++ b/dlfcn/dlerror.c @@ -196,4 +196,3 @@ _dlerror_run (void (*operate) (void *), void *args) return 1; } } -libc_hidden_def (_dlerror_run) diff --git a/elf/Makefile b/elf/Makefile index 698a6ab985..b1e01d9516 100644 --- a/elf/Makefile +++ b/elf/Makefile @@ -165,7 +165,7 @@ tests-static-normal := tst-leaks1-static tst-array1-static tst-array5-static \ tests-static-internal := tst-tls1-static tst-tls2-static \ tst-ptrguard1-static tst-stackguard1-static \ - tst-tls1-static-non-pie tst-libc_dlvsym-static + tst-tls1-static-non-pie CRT-tst-tls1-static-non-pie := $(csu-objpfx)crt1.o tst-tls1-static-non-pie-no-pie = yes @@ -229,7 +229,7 @@ tests += restest1 preloadtest loadfail multiload origtest resolvfail \ tests-internal += loadtest unload unload2 circleload1 \ neededtest neededtest2 neededtest3 neededtest4 \ tst-tls3 tst-tls6 tst-tls7 tst-tls8 tst-dlmopen2 \ - tst-ptrguard1 tst-stackguard1 tst-libc_dlvsym \ + tst-ptrguard1 tst-stackguard1 \ tst-create_format1 tst-tls-surplus tst-dl-hwcaps_split tests-container += tst-pldd tst-dlopen-tlsmodid-container \ tst-dlopen-self-container tst-preload-pthread-libc @@ -326,7 +326,7 @@ modules-names = testobj1 testobj2 testobj3 testobj4 testobj5 testobj6 \ tst-audit12mod1 tst-audit12mod2 tst-audit12mod3 tst-auditmod12 \ tst-latepthreadmod $(tst-tls-many-dynamic-modules) \ tst-nodelete-dlclose-dso tst-nodelete-dlclose-plugin \ - tst-main1mod tst-libc_dlvsym-dso tst-absolute-sym-lib \ + tst-main1mod tst-absolute-sym-lib \ tst-absolute-zero-lib tst-big-note-lib tst-unwind-ctor-lib \ tst-audit13mod1 tst-sonamemove-linkmod1 \ tst-sonamemove-runmod1 tst-sonamemove-runmod2 \ @@ -352,7 +352,7 @@ modules-names = testobj1 testobj2 testobj3 testobj4 testobj5 testobj6 \ # Most modules build with _ISOMAC defined, but those filtered out # depend on internal headers. -modules-names-tests = $(filter-out ifuncmod% tst-libc_dlvsym-dso tst-tlsmod%,\ +modules-names-tests = $(filter-out ifuncmod% tst-tlsmod%,\ $(modules-names)) ifeq (yes,$(have-mtls-dialect-gnu2)) @@ -1582,14 +1582,6 @@ LDLIBS-tst-absolute-zero-lib.so = tst-absolute-zero-lib.lds $(objpfx)tst-absolute-zero-lib.so: $(LDLIBS-tst-absolute-zero-lib.so) $(objpfx)tst-absolute-zero: $(objpfx)tst-absolute-zero-lib.so -# Both the main program and the DSO for tst-libc_dlvsym need to link -# against libdl. -$(objpfx)tst-libc_dlvsym-dso.so: $(libsupport) -$(objpfx)tst-libc_dlvsym.out: $(objpfx)tst-libc_dlvsym-dso.so -tst-libc_dlvsym-static-ENV = \ - LD_LIBRARY_PATH=$(ld-library-path):$(common-objpfx)dlfcn -$(objpfx)tst-libc_dlvsym-static.out: $(objpfx)tst-libc_dlvsym-dso.so - $(objpfx)tst-big-note: $(objpfx)tst-big-note-lib.so # Avoid creating an ABI tag note, which may come before the # artificial, large note in tst-big-note-lib.o and invalidate the diff --git a/elf/Versions b/elf/Versions index a12d64e8db..775aab62af 100644 --- a/elf/Versions +++ b/elf/Versions @@ -22,9 +22,6 @@ libc { %endif GLIBC_PRIVATE { # functions used in other libraries - _dl_addr; - _dl_sym; _dl_vsym; - __libc_dlclose; __libc_dlopen_mode; __libc_dlsym; __libc_dlvsym; __libc_early_init; # Internal error handling support. Interposes the functions in ld.so. diff --git a/elf/dl-addr.c b/elf/dl-addr.c index 70a60d5b91..3226880d48 100644 --- a/elf/dl-addr.c +++ b/elf/dl-addr.c @@ -142,4 +142,3 @@ _dl_addr (const void *address, Dl_info *info, return result; } -libc_hidden_def (_dl_addr) diff --git a/elf/dl-libc.c b/elf/dl-libc.c index ba792e9589..d5bc4a277f 100644 --- a/elf/dl-libc.c +++ b/elf/dl-libc.c @@ -162,7 +162,6 @@ __libc_dlopen_mode (const char *name, int mode) #endif return dlerror_run (do_dlopen, &args) ? NULL : (void *) args.map; } -libc_hidden_def (__libc_dlopen_mode) #ifndef SHARED void * @@ -192,7 +191,6 @@ __libc_dlsym (void *map, const char *name) return (dlerror_run (do_dlsym, &args) ? NULL : (void *) (DL_SYMBOL_ADDRESS (args.loadbase, args.ref))); } -libc_hidden_def (__libc_dlsym) /* Replacement for dlvsym. MAP must be a real map. This function returns NULL without setting the dlerror value in case of static @@ -219,7 +217,6 @@ __libc_dlvsym (void *map, const char *name, const char *version) : (void *) (DL_SYMBOL_ADDRESS (args.dlsym.loadbase, args.dlsym.ref))); } -libc_hidden_def (__libc_dlvsym) int __libc_dlclose (void *map) @@ -230,7 +227,6 @@ __libc_dlclose (void *map) #endif return dlerror_run (do_dlclose, map); } -libc_hidden_def (__libc_dlclose) static bool __libc_freeres_fn_section diff --git a/elf/dl-sym.c b/elf/dl-sym.c index fa0cce678f..de5769f926 100644 --- a/elf/dl-sym.c +++ b/elf/dl-sym.c @@ -188,11 +188,9 @@ _dl_vsym (void *handle, const char *name, const char *version, void *who) return do_sym (handle, name, who, &vers, 0); } -libc_hidden_def (_dl_vsym) void * _dl_sym (void *handle, const char *name, void *who) { return do_sym (handle, name, who, NULL, DL_LOOKUP_RETURN_NEWEST); } -libc_hidden_def (_dl_sym) diff --git a/elf/tst-libc_dlvsym-dso.c b/elf/tst-libc_dlvsym-dso.c deleted file mode 100644 index 19091ddb41..0000000000 --- a/elf/tst-libc_dlvsym-dso.c +++ /dev/null @@ -1,25 +0,0 @@ -/* Compare dlvsym and __libc_dlvsym results. Shared object code. - Copyright (C) 2017-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <https://www.gnu.org/licenses/>. */ - -#include "tst-libc_dlvsym.h" - -void -compare_vsyms_global (void) -{ - compare_vsyms (); -} diff --git a/elf/tst-libc_dlvsym-static.c b/elf/tst-libc_dlvsym-static.c deleted file mode 100644 index 19c438c3cd..0000000000 --- a/elf/tst-libc_dlvsym-static.c +++ /dev/null @@ -1,32 +0,0 @@ -/* Compare dlvsym and __libc_dlvsym results. Static version. - Copyright (C) 2017-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <https://www.gnu.org/licenses/>. */ - -#include <support/xdlfcn.h> - -static int -do_test (void) -{ - void *handle = xdlopen ("tst-libc_dlvsym-dso.so", RTLD_LAZY); - void (*compare) (void) = xdlsym (handle, "compare_vsyms_global"); - compare (); - xdlclose (handle); - - return 0; -} - -#include <support/test-driver.c> diff --git a/elf/tst-libc_dlvsym.c b/elf/tst-libc_dlvsym.c deleted file mode 100644 index 823643fb1c..0000000000 --- a/elf/tst-libc_dlvsym.c +++ /dev/null @@ -1,34 +0,0 @@ -/* Compare dlvsym and __libc_dlvsym results. Dynamic version. - Copyright (C) 2017-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <https://www.gnu.org/licenses/>. */ - -#include "tst-libc_dlvsym.h" - -static int -do_test (void) -{ - compare_vsyms (); - - void *handle = xdlopen ("tst-libc_dlvsym-dso.so", RTLD_LAZY); - void (*compare) (void) = xdlsym (handle, "compare_vsyms_global"); - compare (); - xdlclose (handle); - - return 0; -} - -#include <support/test-driver.c> diff --git a/elf/tst-libc_dlvsym.h b/elf/tst-libc_dlvsym.h deleted file mode 100644 index 1a8f2e9271..0000000000 --- a/elf/tst-libc_dlvsym.h +++ /dev/null @@ -1,130 +0,0 @@ -/* Compare dlvsym and __libc_dlvsym results. Common code. - Copyright (C) 2017-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - <https://www.gnu.org/licenses/>. */ - -/* compare_vsyms is the main entry point for these tests. - - Indirectly, It calls __libc_dlvsym (from libc.so; internal - interface) and dlvsym (from libdl.so; public interface) to compare - the results for a selected set of symbols in libc.so which - typically have more than one symbol version. The two functions are - implemented by somewhat different code, and this test checks that - their results are the same. - - The versions are generated to range from GLIBC_2.0 to GLIBC_2.Y, - with Y being the current __GLIBC_MINOR__ version plus two. In - addition, there is a list of special symbol versions of the form - GLIBC_2.Y.Z, which were used for some releases. - - Comparing the two dlvsym results at versions which do not actually - exist does not test much, but it will not contribute to false test - failures, either. */ - -#include <array_length.h> -#include <gnu/lib-names.h> -#include <stdbool.h> -#include <stdio.h> -#include <support/check.h> -#include <support/xdlfcn.h> - -/* Run consistency check for versioned symbol NAME@VERSION. NB: We - may execute in a shared object, so exit on error for proper error - reporting. */ -static void -compare_vsyms_0 (void *libc_handle, const char *name, const char *version, - bool *pfound) -{ - void *dlvsym_address = dlvsym (libc_handle, name, version); - void *libc_dlvsym_address - = __libc_dlvsym (libc_handle, name, version); - if (dlvsym_address != libc_dlvsym_address) - FAIL_EXIT1 ("%s@%s mismatch: %p != %p", - name, version, dlvsym_address, libc_dlvsym_address); - if (dlvsym_address != NULL) - *pfound = true; -} - - -/* Run consistency check for versioned symbol NAME at multiple symbol - version. */ -static void -compare_vsyms_1 (void *libc_handle, const char *name) -{ - bool found = false; - - /* Historic versions which do not follow the usual GLIBC_2.Y - pattern, to increase test coverage. Not all architectures have - those, but probing additional versions does not hurt. */ - static const char special_versions[][12] = - { - "GLIBC_2.1.1", - "GLIBC_2.1.2", - "GLIBC_2.1.3", - "GLIBC_2.1.4", - "GLIBC_2.2.1", - "GLIBC_2.2.2", - "GLIBC_2.2.3", - "GLIBC_2.2.4", - "GLIBC_2.2.5", - "GLIBC_2.2.6", - "GLIBC_2.3.2", - "GLIBC_2.3.3", - "GLIBC_2.3.4", - }; - for (int i = 0; i < array_length (special_versions); ++i) - compare_vsyms_0 (libc_handle, name, special_versions[i], &found); - - /* Iterate to an out-of-range version, to cover some unused symbols - as well. */ - for (int minor_version = 0; minor_version <= __GLIBC_MINOR__ + 2; - ++minor_version) - { - char version[30]; - snprintf (version, sizeof (version), "GLIBC_%d.%d", - __GLIBC__, minor_version); - compare_vsyms_0 (libc_handle, name, version, &found); - } - - if (!found) - FAIL_EXIT1 ("symbol %s not found at any version", name); -} - -/* Run consistency checks for various symbols which usually have - multiple versions. */ -static void -compare_vsyms (void) -{ - /* The minor version loop in compare_vsyms_1 needs updating in case - we ever switch to glibc 3.0. */ - if (__GLIBC__ != 2) - FAIL_EXIT1 ("unexpected glibc major version: %d", __GLIBC__); - - /* __libc_dlvsym does not recognize the special RTLD_* handles, so - obtain an explicit handle for libc.so. */ - void *libc_handle = xdlopen (LIBC_SO, RTLD_LAZY | RTLD_NOLOAD); - - - /* sys_errlist and sys_siglist were deprecated in glibc 2.32 and they are - not available on architectures with base ABI newer than 2.32. */ -#if TEST_COMPAT (libc, GLIBC_2_0, GLIBC_2_32) - compare_vsyms_1 (libc_handle, "_sys_errlist"); - compare_vsyms_1 (libc_handle, "_sys_siglist"); -#endif - compare_vsyms_1 (libc_handle, "quick_exit"); - - xdlclose (libc_handle); -} diff --git a/include/dlfcn.h b/include/dlfcn.h index d4440c567e..a4c283728f 100644 --- a/include/dlfcn.h +++ b/include/dlfcn.h @@ -45,20 +45,20 @@ extern char **__libc_argv attribute_hidden; better error handling semantics for the library. */ #define __libc_dlopen(name) \ __libc_dlopen_mode (name, RTLD_NOW | __RTLD_DLOPEN) -extern void *__libc_dlopen_mode (const char *__name, int __mode); -extern void *__libc_dlsym (void *__map, const char *__name); -extern void *__libc_dlvsym (void *map, const char *name, const char *version); -extern int __libc_dlclose (void *__map); -libc_hidden_proto (__libc_dlopen_mode) -libc_hidden_proto (__libc_dlsym) -libc_hidden_proto (__libc_dlvsym) -libc_hidden_proto (__libc_dlclose) +extern void *__libc_dlopen_mode (const char *__name, int __mode) + attribute_hidden; +extern void *__libc_dlsym (void *__map, const char *__name) + attribute_hidden; +extern void *__libc_dlvsym (void *map, const char *name, const char *version) + attribute_hidden; +extern int __libc_dlclose (void *__map) + attribute_hidden; /* Locate shared object containing the given address. */ #ifdef ElfW extern int _dl_addr (const void *address, Dl_info *info, - struct link_map **mapp, const ElfW(Sym) **symbolp); -libc_hidden_proto (_dl_addr) + struct link_map **mapp, const ElfW(Sym) **symbolp) + attribute_hidden; #endif struct link_map; @@ -73,23 +73,21 @@ extern void _dl_close_worker (struct link_map *map, bool force) /* Look up NAME in shared object HANDLE (which may be RTLD_DEFAULT or RTLD_NEXT). WHO is the calling function, for RTLD_NEXT. Returns the symbol value, which may be NULL. */ -extern void *_dl_sym (void *handle, const char *name, void *who); -libc_hidden_proto (_dl_sym) +extern void *_dl_sym (void *handle, const char *name, void *who) + attribute_hidden; /* Look up version VERSION of symbol NAME in shared object HANDLE (which may be RTLD_DEFAULT or RTLD_NEXT). WHO is the calling function, for RTLD_NEXT. Returns the symbol value, which may be NULL. */ extern void *_dl_vsym (void *handle, const char *name, const char *version, - void *who); -libc_hidden_proto (_dl_vsym) + void *who) attribute_hidden; /* Helper function for <dlfcn.h> functions. Runs the OPERATE function via _dl_catch_error. Returns zero for success, nonzero for failure; and arranges for `dlerror' to return the error details. ARGS is passed as argument to OPERATE. */ -extern int _dlerror_run (void (*operate) (void *), void *args); -libc_hidden_proto (_dlerror_run) +extern int _dlerror_run (void (*operate) (void *), void *args) attribute_hidden; /* This structure is used to make the outer (statically linked) implementation of dlopen and related functions to the inner libc </cut>

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