linaro-toolchain

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9 participants
5482 discussions

[ACTIVITY] 23-27 November 2020

by Christophe Lyon

== Progress == * GCC upstream validation: - reported several regressions/new failures * GCC - Neon intrinsics: vceqq, vceqz and vceqzq for p64 patch: no feedback - MVE autovectorization: sent a few patches (vand, vorr, veor, vshr, vshl). WIP vmvn, vbic * benchmarking: - Scripts to run coremark on stm32 now merged, debugging issues. * infra: - debugging issues with our docker containers - looking at ABE patches == Next == * GCC/cortex-M testing improvements & fixes * cortex-m benchmarking * MVE intrinsics improvements Reply Forward

3 years, 12 months

[ACTIVITY] report week ending 27 Nov

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + Cut rc3; there were a few last-minute bugfixes that came in so we will need an rc4 * VIRT-364 [QEMU support for ARMv8.1-M extensions] + read through the SSE-300 TRM and identified the required work to model it (it's similar to the SSE-200 which we already have but with various minor changes and a couple of new devices) * wisdom tooth extracted \o/ thanks -- PMM

3 years, 12 months

[ACTIVITY] week ending 22 Nov 2020

by Richard Henderson

[UM-59 # FPU Emulation Maintainership ] Lots more work converting to FloatParts. Almost all floatx80 now converted. Still to do are log2 and rem/mod for full conversion. r~

4 years

[ACTIVITY] 16-20 November 2020

by Christophe Lyon

== Progress == * GCC upstream validation: - reported several regressions/new failures * GCC - Neon intrinsics: vceqq, vceqz and vceqzq for p64 patch: no feedback - MVE autovectorization: more patterns updates (vshl, vshr). WIP * benchmarking: - Scripts to run coremark on stm32 now merged, debugging issues. * infra: - debugging issues with our docker containers == Next == * GCC/cortex-M testing improvements & fixes * cortex-m benchmarking * MVE intrinsics improvements

4 years

[ACTIVITY] report week ending 20 Nov

by Peter Maydell

Generally productive week rather derailed at the end by a sudden onset of toothache Thursday night :-/ Progress: * UM-2 [QEMU upstream maintainership] + usual release cycle work * VIRT-364 [QEMU support for ARMv8.1-M extensions] + Worked through the remaining set of identified new features for v8.1M implementing them. + Fixed a handful of pre-existing bugs along the way. + Sent out a patchset with all this plus the "Implement (no-MVE) Cortex-M55 model" patch on top, since we now have all the pieces needed for it. + The next and final piece of work here is to implement a model of a board that uses the Cortex-M55. -- PMM

4 years

[ACTIVITY] week ending Nov. 15 2020

by Alex Bennée

VirtIO Initiative ([STR-9]) =========================== VirtIO Portability Demo ([STR-13]) ================================== - recorded AGL demo videos (KVM, TCG Xen Dom0 with and without Xen aware kernel) - recorded [preview version of talk] [STR-13] <https://projects.linaro.org/browse/STR-13> [preview version of talk] <https://fileserver.linaro.org/s/wgt2AAj9rxYqJop> QEMU Upstream Work ([UM-2]) =========================== - posted [PATCH v1 for 5.1 00/10] various fixes (CI, Xen, plugins) Message-Id: <20201110192316.26397-1-alex.bennee(a)linaro.org> [UM-2] <https://projects.linaro.org/browse/UM-2> Completed Reviews [2/2] ======================= [for-5.2 0/9] docs: Move orphan top-level .rst files into manuals Message-Id: <20201112144041.32278-1-peter.maydell(a)linaro.org> [PATCH v3 00/41] Mirror map JIT memory for TCG Message-Id: <20201106032921.600200-1-richard.henderson(a)linaro.org> - CLOSING NOTE [2020-11-14 Sat 11:52] Had a brief look over, waiting for next revision Added: <2020-11-06 Fri> Current Review Queue ==================== * [PATCH v2 0/4] linux/sparc: more get/set_context fixes Message-Id: <20201106152738.26026-1-peter.maydell(a)linaro.org> Added: <2020-11-06 Fri> * [PATCH 0/8] arm/virt: add usb support Message-Id: <20201023071022.24916-1-kraxel(a)redhat.com> Added: <2020-10-27 Tue> * [PATCH 0/4] riscv: Add semihosting support [v10] Message-Id: <20201026212853.92880-1-keithp(a)keithp.com> Added: <2020-10-27 Tue> * [PATCH v2 0/7] xen/arm: Unbreak ACPI Message-Id: <20201023154156.6593-1-julien(a)xen.org> Added: <2020-10-24 Sat> -- Alex Bennée

4 years

[ACTIVITY] 9-13 November 2020

by Christophe Lyon

== Progress == * GCC upstream validation: - reported several regressions/new failures * GCC - Neon intrinsics: vceqq, vceqz and vceqzq for p64 patch: no feedback - MVE autovectorization: started patterns updates (vand, vorr, veor) * Misc - investigated LP bug 1747966 (https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966) there is a fix in binutils upstream: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=0e6a3f07f50723d18… * benchmarking: - Scripts to run coremark on stm32 now merged, debugging issues. * infra: - debugging issues with our docker containers == Next == * GCC/cortex-M testing improvements & fixes * cortex-m benchmarking * MVE intrinsics improvements

4 years

[ACTIVITY] report week ending 13 Nov

by Peter Maydell

Progress: * UM-2 [QEMU upstream maintainership] + investigated and fixed a bug that had been lurking unfixed in our n800 models for years which prevented guest boot of Maemo images + docs tidyup: moved "orphan" rST documents into the manual structure so they actually get shipped to users + usual release candidate related work * VIRT-364 [QEMU support for ARMv8.1-M extensions] + working on handling for new FP system registers; the FPCXT regs in particular have some tricky corners... thanks -- PMM

4 years

[ACTIVITY] week ending 8 Nov 2020

by Richard Henderson

[VIRT-327 # Richard's upstream QEMU work ] * Fix neon register offsets big-endian hosts. * Fix neon register offsets for VTBL. * Working through a 4th revision of float128_muladd. * Random patch review and bug fixes. [UM-61 # TCG Core Maintainership ] * Two revisions of split w^x patch set. r~

4 years

Demo of using etm traces on arm for instructions and functions recording and reverse debugging

by Zied Guermazi

hi all, to demonstrate extending gdb to use etm traces for implementing btrace on arm processors, I have made this video available on youtube https://youtu.be/ptKbJRNUqUI users can then have access to process record and replay, on instructions and functions level (https://sourceware.org/gdb/current/onlinedocs/gdb/Process-Record-and-Replay…) and reverse debugging(https://www.gnu.org/software/gdb/news/reversible.html) we have all functionalities available for intel PT except tracing multi-threaded applications. In this demo I have "reconstructed" the cspr register to enable setting breakpoints in reverse debugging. it is still dirty (adds arm specific register to an architecture agnostic structure) but it shows that it works when implemented properly Kind Regards Zied Guermazi

4 years

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