== Progress ==
* Various patch review and followup (2/10)
* Helping diagnose an aarch64 linker crash in buildroot (1/10)
* Failed attempt to update kernel on Chromebook (1/10)
* Analyze and benchmark cortex-strings to find the oustanding work (1/10)
* Get docker setup with cgroups to measure memory usage (4/10, TCWG-441)
* Trying to get NX working on Fedora 20 (1/10)
== Issues ==
* None
== Plan ==
* Get postgresql and hopefully others working with new benchmark setup
* Figure out how to make NX work
--
Will Newton
Toolchain Working Group, Linaro
Hi All,
AAarch64 back-end defines GENERAL_REGS and CORE_REGS with the same set
of register. Is there any reason why we need this?
target hooks like aarch64_register_move_cost doesn’t handle CORE_REGS.
In addition, IRA cost calculation also has logics like make common class
biggest of best and alternate; this might get confused with this.
Attached RFC patch removes it. regression tested for
aarch64-none-linux-gnu on qemu-aarch64 with now new regression. Is this OK ?
Thanks,
Kugan
gcc/
2014-05-14 Kugan Vivekanandarajah <kuganv(a)linaro.org>
* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.
== Progress ==
* Reload - IRA bug fix (5/10)
- Expression foo(a,0,((b==a)||(c==a))) a gets register r1 and second
a gets register r6, but third a not able to reuse r6 or r1 and spill
failure.
- Debugging the IRA dumps and reload dumps
- Getting Maxim help
* TCWG-180 (3/10)
- GCC bootstrap fails with compare errors.
- comparing the dis assembly.
* Misc (2/10)
- AMD meetings
- 1-1 meetings
- looked at 1 x86 related bug
== Plan ==
* Continue bug fixing.
* LTO bootstrap failure
Short week, 2 days off (4/10)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 (6/10)
- Prepared FSF 4.9 branch merge in Linaro one.
- Backported Zhenqiang upstream patches.
- Iterate with rob on various jenkins issues
- Looked at gerrit for the backport reviews
* Misc:
o Cbuildv1 baby-sitting
== Next ==
* Continue on Linaro GCC 4.9 release.
== Progress ==
* TCWG-413 (5/10)
- Rebuild FSF 4.8, Linaro 4.8 and Linaro 4.9 releases for aarch64 with
crosstool-ng (Kept all the dependencies same and used different gcc).
- Lost all the config for running benchmark on the test-machine and set
it up again.
- Re-ran spec2k benchmarking and results.
* TCWG-468 (5/10)
- Looked in detail IRA dumps and cost models.
- Also looked at IRA and LRA code to get better understanding of the
algorithms.
- Costs dumped seems odd and looking further.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* GDB arm v8 record/replay: core files issue [TCWG-451] [6/10]
-- Add bfd support for missing aarch64 core file handlers.
-- Added regset caching functions for aarch64 linux gdb.
* GDB arm v8 record/replay: Support for recording A64 Data processing
- Floating point instructions [TCWG-404] [3/10]
* Miscellaneous [1/10]
-- Meetings
-- Browse through Linaro training resources.
-- UK visa documents preparation.
== Plan ==
* Continue work to support GDB arm v8 record/replay
-- Support for recording A64 Data processing - Floating point
instructions [TCWG-404]
-- Support for recording syscalls, signals etc [TCWG-409]
* UK visa application submission.
= Progress ==
* Continue improving LAVA support in DejaGnu. (TCWG 455 - 1/10)
* More work on regression test analysis and reporting. (TCWG 448 - 4/10)
- Did builds of 4.8, 4.9, and master to establish baseline test
results.
- Worked on test analysis script.
- Jenkins matrix builds & test runs are working, and copying results to
toolchain64.
* Meetings and Misc (5/10)
- Fixing various Cbuildv2 bugs found by yroux dealing with git.
- Fixed bug where the GDB build was polluting the destdir with
binutils.
- Installed OpenNX chroot on toolchain64 with maxim.
- Fixed disk on toolchain64 with maxim to access all 4TB. Use GPT...
- Added more config triplets to Jenkins, so now it builds everything
we support.
== Plan ==
* Install lava-tool and get it working on all the tcwgbuild* machines.
* Continue improving LAVA support in DejaGnu. (TCWG 455)
* More work on regression test analysis and reporting. (TCWG 448)
- Do diffs of new builds test runs from the baseline, not the previous
build.
* Try to look at the LLVM branch of Cbuildv2, do some testing of it.
== Issues ==
* Jenkins needs to be able to see LAVA slaves as online, but not
booted..
* The skiing is good, but the avalanche danger is high, so limits
accessibility.
* We need a backup plan for toolchain64.
* Google groups have problems, so had to setup test results list on
one of my servers instead. (ask me if you want to be on the list) The
new beta release of GNU Mailman looks very nice.
* The chromebooks in our build farm can't build GCC native.
- rob -
== Issue ==
* None.
== Progress ==
* Identify a build environment issue for linux64 gdb binaries "Symbol
format `elf32-littlearm' unknown".
* Send out shrink-wrap related patches from community review (TCWG-133, 2/10)
* Move-loop-invariant heuristic tuning (TCWG-469, 8/10).
- Update heuristic according to benchmark testing.
== Plan ==
* Update shrink-wrap patches according to comments.
* Continue on move-loop-invariants heuristic tune.
== Planned leaves ==
* June 2.
== Progress==
Holiday [2/10]
Fixing performance bugs in lowlevellock - TCWG-435 [4/10]
* Initial patch for lowlevellock.h largely done, awaiting an aarch64 test run
* About 1/2 of the lowlevellock.h's remain post-patch, need to ask
some questions about them
cortex-strings memset - TCWG-156 [1/10]
* Fixed an alternative implementation, a little more benchmarking investigation
cbuild benchmarking branch [1/10]
* Hunting for correct benchmark source, added a little more error checking
Meetings/mail/etc [2/10]
== Plan ==
More of the same -
* Post lowlevellock.h patch and ask some questions
* Finish exploring memset alternatives and work out how to benchmark them
* Carry on with cbuild benchmarking branch
Holiday 26th - 30th May
