Hi,
I'm trying to follow
https://wiki.linaro.org/WorkingGroups/ToolChain/Using/GCCNative but it
looks like it is outdated? Can someone confirm?
E.g.:
configure: WARNING: unrecognized options: --disable-bootstrap,
--with-mode, --with-arch, --with-tune, --with-fpu, --with-float
--
João M. S. Silva
== Issue ==
* None.
== Progress ==
* Commit the fixes for pr61220, 61278 and part of 61225. The patch to
fix other part of 61225 is still in review (2/10).
* Loop invariant heuristics tuning. Tests are ongoing. (7/10, TCWG-763)
* Rebase conditional compare patches. Tests are ongoing.
* Prepare UK visa.
== Plans ==
* Send out loop-invariant heuristic tuning patches for review.
* Rework on the conditional compare patches.
== Leaves ==
* June 2.
== This week ==
- Memorial day holiday Monday (2/10)
- Investigated launchpad 1295738 - [4.8 Regression] unable to find a
register to spill in class 'LO_REGS' [CARD-300](2/10)
- Will mark as unlikely to fix (reload error); works with LRA and/or
with -fomit-frame-pointer
- Investigated launchpad 757427 - gconftool-2 segfaults on arm
[shrinkwrap] [CARD-300](2/10)
- Segfault not reproducible in linaro 4.8 or 4.9
- Shrinkwrap bug not reproducible in linaro 4.8 or 4.9
- Investigating launchpad 1225317 - gcc mis-compiles (large-value) jump
tables with -fPIC or thumb2 [CARD-300](1/10)
- Investigating launchpad 1234146 - Bad Neon intrinsics code gen when
using ld4/st4 on AArch64 [CARD-300] (2/10)
== Next week ==
- Resolve Launchpad bugs 1225317 and 1234146
== Future ==
No Plans.
== Planned holidays ==
Possible vacation June 16th - June 20th
== Progress ==
* Meetings and Misc (3/10)
- Upgraded my Samsung Chromebook to boot Ubuntu trusty instead of
using crouton. Works much better for native builds now.
* Worked on perfecting building binary tarballs in a 32bit chroot
that run on any platform. (TCWG 383 - 7/10)
- Added zlib to infrastructure so libz.so.1 can be found at runtime.
- Force libgloss to build for bare metal.
- Fixed minor issues with Canadian cross builds.
== Plan ==
* Figure out why Canadian cross builds fail on the TCWG build farm,
but work on my local machines.
* Continue improving building binary releases.
* Get D01 board setup and working.
* Get back to test result verification automation.
- rob -
== Progress ==
* GDB arm v8 record/replay
-- Support for recording advance SIMD load store instructions.
[TCWG-403] [4/10]
-- Code cleanup and patch creation. [2/10]
-- Investigation of patches failing in native configuration. [TCWG-484] [2/10]
* Miscellaneous
-- Sick day off on Monday [2/10]
== Plan ==
* GDB arm v8 record/replay
-- Bug fix issues stalling patch submission upstream.
-- Submission of patches upstream.
-- Bug fixing to reduce failures.
* Run gdb testsuites on arm/x86 in native/remote for latest feature parity.
* Day out of office on Thursday to collect passport from UK visa office.
Short week (2 days off) (4/10)
== Progress ==
* GCC trunk cross-validation (CARD-647) (2/10)
- reported 2 new compiler build failures and 2 regressions
- tested one proposed patch, which did not fix the regression
- trunk now builds OK again
* Neon intrinsics tests (1/10)
- cleaned branch to prepare submission
- working on Cumulative Saturation Neon flag support for AArch64
* aarch64 libsanitizer support
- resumed work: libsanitizer no longer builds with recent glibc,
will need to patch it upstream before bringing it back to GCC.
- testing will be difficult using qemu since libsanitizer reserves a
huge chunk of memory at startup (8GB) which may not be available on
the host machine
* Misc (meetings, conf-calls, ....) (3/10)
- 1:1 calls, weekly calls
- backports review
== Next ==
* GCC trunk cross-validation:
- test Kugan's patch before submission
- evaluate effort to develop a mail-driven support for testing
patches vs trunk befiore submission
- add support for validation of FSF-4.9 branch
* Neon intrinsics tests
- add support for Cumulative Saturation Neon flags on AArch64
* AArch64 libsanitizer
- discuss how to make cross-testing more practical
Short week (3 days)
== Issues ==
* None
== Progress ==
* CARD-1162 : Linaro GCC 4.9 and CARD-1355 : stabilization and
optimization effort for ARMv8-a (4/10)
- Enhanced my backporting script
- Looked at the merge process (4.9, 4.8 and 4.7 merge are comming)
- 40 backports stiil need validation
* Misc: (2/10)
o Various meetings.
o Discussed schroot testing
== Next ==
* FSF branch merges
* Document backporting script usage
* Continue feedback and help with the validation
== Progress ==
* Zero/sign extension elimination (TCWG-15) (7/10)
- regression tested and fixed all the issues
- final bootstrap and regression testing for arm and x86_64 are ongoing
- will post the patch for comment after checking the results
* benchmarking (TCWG-468) (1/10)
- Set-up chrome-book for a15 release benchmarking
* SAH1 performance (TCWG-413) (2/10)
- Christophe noted regression for aarch64_be due to clean-up patch.
- register_move_cost hook in aarch64 does not handle all the cases
(CORE_REGS and POINTER_REGS) and due to this, it calculates FP2FP cost
for these classes . With CORE_REGS gone, costs for register classes are
now different. Cost table needs adjustment.
* FENV for C11 TCWG-447
- Committed ARM part.
== Plan ==
* Benchmarking.
* Upstream zero/sign extension elimination activities.
* sha1 performance.
== Progress ==
* Kernel (CARD-1246 2/8)
- Fixed edge cases for named registers
- http://llvm.org/PR19841
- http://llvm.org/PR19837
* Background (6/8)
- Code review, meetings, discussions, etc.
- TCWG Rack re-org
- Trying to set up native Chromebooks
- Trying to set up APM
- Trying to add Compiler-RT to our buildbots
== Plan ==
* Continue rack re-org
* Continue RT support on current bots
* Try libc++ bot
* Have a look at sanitizer bot
== Progress ==
* Bank Holiday Monday (2/10)
* Got a postgresql malloc benchmark running (4/10, TCWG-441)
* Started refactoring malloc microbenchmark based on review (2/10, TCWG-160)
* Patch review and testing (2/10)
== Issues ==
* None
== Plan ==
* Holiday Tuesday and Wednesday
* Finish refactoring malloc microbenchmark
* Work on results plotting code for benchmarks
--
Will Newton
Toolchain Working Group, Linaro
