# Progress #
* TCWG-685, GDB 7.12 release. [5/10]
Release branch is created. Finished the test and triage for aarch64
native.
Tests are good. Two patches are committed. Running regression tests
for cross for arm and aarch64.
Upgrade the native compiler to gcc mainline, and run aarch64 tests
with the new compiler.
* OpenOCD for aarch64. [3/10]
Investigate OpenOCD support for aarch64. There was an openocd patch
for aarch64 posted in Feb 2015, but never merged.
* Misc, [2/10]
# Plan #
* TCWG-685.
* Finish OpenOCD investigation.
* US visa interview on Wed.
--
Yao
== Progress ==
* LLVM 3.9.0 Release for AArch64 [TCWG-696] [3/10]
- Ran the tests on one of our APM boards
- Fixed an issue with some tests that are only supposed to be run
for the x86 target but were accidentally running for other targets too
- Wrote up some release notes for AArch64
* Enable MLx Expansion pass for non-Cortex-A9 targets [TCWG-674] [3/10]
- Did a few runs of the test-suite on one of our chromebooks (Cortex-A15)
- The pass is expanding > 2000 MLx instructions in the test-suite, so it
looks like we can use it for evaluation
* [AArch64] Keep merging consecutive stores in store sequences [TCWG-704] [2/10]
- When merging stores, we always start looking from the end of the store
sequence, and if the last store cannot be merged we stop; we should instead
keep looking through the rest of the sequence to see if we can merge any of
the previous stores
- Working on a fix
* Refactor SelectionDAGBuilder::visitInlineAsm [TCWG-643] [2/10]
- Made it shorter by about 100 LOC; it could still use some cleanup, but I've
sent the patch upstream to get an initial round of feedback
== Plan ==
* LLVM 3.9.0 Release for AArch64 [TCWG-696]
- Wait for the next release candidate
* [AArch64] Keep merging consecutive stores in store sequences [TCWG-704]
== Progress ==
* Validation
- reviews in Jenkins jobs/ABE
- checked that the new xenial builder works as expected
* GCC
- PR 67591 (ARM v8 Thumb IT blocks deprecated)
* misc (conf-calls, meetings, emails, ....)
- catching up after holidays
- Cauldron and Connect: booked flights and hotels
== Next ==
On holidays until Aug 22nd
== This Week ==
* LTO (4/10)
a) TCWG-666 (3/10)
- No idea where data corruption happens in ltrans with my patch,
tree value in ipa_bits gets corrupted for some reason.
- Started over with widest_int representing value and mask
- WIP new prototype patch:
http://people.linaro.org/~prathamesh.kulkarni/ipa-bits-0_1.diff
b) TCWG-548 (1/10)
- Benchmarking fails on my chromebook, input/output error,
no idea why.
* TCWG-72 (2/10)
- Rebased patch on trunk, bootstrapped on x86_64, cross tested on arm*-*-*
- Addressed comments from Ramana
- Strange issue with armv8l-unknown-linux-gnu which has hardware div
but produced call to __aeabi_idiv, maybe I screwed sth during the build.
Building from scratch doesn't reproduce the issue and patch does not
regress armv8l-unknown-linux-gnueabihf.
* Misc (4/10)
- PR70920: Fix committed upstream.
- PR71078: Fix committed upstream.
- Committed r238874 to restrict pr70929-4.c for lp64 targets to avoid
fallout caused by the test-case on ilp32 targets.
- Submitted RFC patch to warn for dead calls, rejected due
to potentially false positives.
- WIP patch to fold strlen (s) eq/ne 0 to *s eq/ne 0
== Next Week ==
- Continue with TCWG-72, TCWG-548 and TCWG-666
Hi Everyone,
I'm having trouble finding vreinterpretq_u64_p128 (and friends) to
help convert a polynomial. I can't find it in arm_neon.h or
arm_acle.h:
$ grep p128 /usr/lib/gcc/aarch64-linux-gnu/4.9/include/arm_acle.h
$ grep p128 /usr/lib/gcc/aarch64-linux-gnu/4.9/include/arm_neon.h
$ grep p64 /usr/lib/gcc/aarch64-linux-gnu/4.9/include/arm_acle.h
$ grep p64 /usr/lib/gcc/aarch64-linux-gnu/4.9/include/arm_neon.h
vmull_p64 (poly64_t a, poly64_t b)
vmull_high_p64 (poly64x2_t a, poly64x2_t b)
$
An RPI-3 with ARMv8/Aarch32 and GCC 4.9.2 has it in arm_neon.h:
$ cat /usr/lib/gcc/arm-linux-gnueabihf/4.9.2/include/arm_neon.h | grep
-A 4 vreinterpretq_u64_p128
vreinterpretq_u64_p128 (poly128_t __a)
{
return (uint64x2_t)__builtin_neon_vreinterpretv2diti
((__builtin_neon_ti) __a);
}
Is there another file that should be included for it? Or is there
something else I should be doing when I want to convert from a
polynomial to a type like uint64x2_t?
Thanks in advance.
Jeff
Hi Everyone,
I have a HiKey running Linaro. I'm trying to build out a test case
which tests Aarch32 on Aarch64.
When I attempt to build an Aarch32 binary I experience the compile
error below. The GCC folks helped me with the Aarch32 CFLAGS, so I
believe they are correct.
$ gcc -march=armv8-a+crc -mtune=cortex-a53
-mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard test.cc -o test.exe
gcc: error: unrecognized command line option ‘-mfpu=crypto-neon-fp-armv8’
gcc: error: unrecognized command line option ‘-mfloat-abi=hard’
Trying an -m32:
$ gcc -march=armv8-a+crc -mtune=cortex-a53
-mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -m32 test.cc -o test.exe
gcc: error: unrecognized command line option ‘-mfpu=crypto-neon-fp-armv8’
gcc: error: unrecognized command line option ‘-mfloat-abi=hard’
gcc: error: unrecognized command line option ‘-m32’
And without the -mtune:
$ gcc -march=armv8-a+crc -mfpu=crypto-neon-fp-armv8
-mfloat-abi=hard test.cc -o test.exe
gcc: error: unrecognized command line option ‘-mfpu=crypto-neon-fp-armv8’
gcc: error: unrecognized command line option ‘-mfloat-abi=hard’
I'm obviously suffering a disconnect. I may have more problems after
the build when attempting to run the program, but I'll cross that
bridge when I encounter it.
How does one build an Aarch32 program on Aarch64?
Thanks in advance.
== Progress ==
* PR24234 - [AArch64] error in backend: fixup value out of range
[TCWG-681] [5/10]
- Wrong instruction size computed for TLS accesses
- Accepted upstream, will commit first thing next week
* [AArch64] Register all AArch64 passes [TCWG-687] [3/10]
- Cleanup that should enable us to run AArch64 passes in llc (incidentally,
this was useful for testing TCWG-681)
- Accepted upstream, will commit first thing next week
* Enable MLx Expansion pass for non-Cortex-A9 targets [TCWG-674] [2/10]
- Started playing with a code snippet so I can understand the pass better
== Plan ==
* Enable MLx Expansion pass for non-Cortex-A9 targets [TCWG-674]
- Brush up the code snippet and do some runs on a Cortex-A15 to see how it
behaves there
* Pick up another AArch64 bug from TCWG-678
* Off on Tue and Wed [4/10]
# Progress #
* TCWG-655, workaround ARM linux kernel ptrace bug on setting VFP
registers. Pedro isn't happy about the workaround, and inclined to
upgrade kernel.
* TCWG-685, GDB 7.12 release. [4/10]
Fix a bug on threads are disappeared when gdb detach. GDB gets
odd task state (disk sleep) from /proc/<pid>/status, and takes some
time understanding what does "disk sleep" mean for a thread to be
exited. Patch is being tested.
* US visa. [1/10]
Get the visa photo, finish the DS-160 form, and make an interview
appointment.
* Misc, [1/10]
# Plan #
* TCWG-685, GDB 7.12 release. More testing on aarch32.
* TCWG-655.
--
Yao
The Linaro Binary Toolchain
============================
The Linaro GCC 5.3-2016.05 Release is now available.
Notice: All Linaro GCC 5 series toolchain users should migrate to the
latest version of the Linaro GCC 5 toolchain in order to mitigate
potential security exposure to CVE-2015-7547. See the NEWS section
below for details.
Download release packages from:
http://releases.linaro.org/components/toolchain/gcc-linaro/5.3-2016.05/http://releases.linaro.org/components/toolchain/binaries/5.3-2016.05/
Previous snapshots and release-candidates are at:
http://snapshots.linaro.org/components/toolchain/binaries/
Previous releases are at:
http://releases.linaro.org/components/toolchain/binaries/
Host Requirements
==================
Linaro officially supports the current and previous Ubuntu LTS
releases (as of the time of this release). This does not mean that
the toolchain will not work on other/older Linux distributions. See
the following for the life-time of Ubuntu LTS releases.
https://wiki.ubuntu.com/Releases
The host system upon which the cross-compiler will run requires a
minimum of glibc 2.14, because of API changes to glibc's memcpy API.
https://bugs.linaro.org/show_bug.cgi?id=1869
Package Versions
=================
Linaro GCC 5.3-2016.05
Linaro glibc 2.21 (linaro/2.21)
Linaro newlib 2.1.0-2014.09 (linaro_newlib-branch)
Linaro binutils 2.25 (linaro_binutils-2_25-branch)
FSF GDB 7.10 (gdb-7.10-branch)
Linaro toolchain package git branches are hosted at:
http://git.linaro.org/?a=project_list&s=toolchain%2F&btnS=Search
NEWS for Linaro GCC 5.3-2016.05
================================
* Increment binutils release date to 2016_02 to reflect the most recent
commit:
commit ef90a4718f535cbe6345b4e7168baea7b1972abf
Author: Matthew Wahab <matthew.wahab(a)arm.com>
Date: Tue Jan 12 16:35:30 2016 +0000
[ARM] Support ARMv8.2 RAS extension.
* Baremetal sysroot names now contain 'newlib' rather than 'glibc'.
* Manifests now contain relative paths rather than absolute paths.
* Now generating proper manifest files.
* Fixed pi requeue support in glibc 2.21 while allowing the existing
2.21 minimum kernel default setting. This was checked into the
linaro/2.21/master branch.
commit a68cafa11c500d8a49a3014c43c5152859d037ae
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Tue May 17 10:16:39 2016 -0300
Add runtime check for __ASSUME_REQUEUE_PI (BZ# 18463)
commit 6e5cb616b5b442ce8b2664ad673c0acf42a490ac
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 19:01:10 2016 -0300
Remove __ASSUME_SET_ROBUST_LIST
commit 9ac61c0047295696cbcdbc26bdc174c7bd25a3c8
Author: Adhemerval Zanella <adhemerval.zanella(a)linaro.org>
Date: Mon May 16 10:35:25 2016 -0300
Remove __ASSUME_FUTEX_LOCK_PI
* Backported support into GCC for Cortex-A32, Cortex-A35, and Cortex-R8.
* Applied fix for CVE-2015-7547 - A stack-based buffer overflow in
glibc's getaddrinfo() was corrected in glibc 2.23 and backported into
glibc 2.21.
https://sourceware.org/ml/libc-alpha/2016-02/msg00416.html
* ARMv8.1 Instruction Support - ARMv8.1 instructions support was checked
into GCC and binutils. It has been backported into Linaro GCC 5.3
and Linaro binutils 2.25.
* Backported -Bsymbolic-functions into Linaro binutils 2.25.
* Performance related backports from Linaro GCC 5.2-2015.11, Linaro GCC
5.2-2015.12, and Linaro GCC 5.3-2016.01-1, Linaro GCC 5.3-2016.02,
Linaro GCC 5.3-2016.03, and Linaro GCC 5.3-2016.04 have been included.
See the following Linaro GCC snapshots:
http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.2-2015.11/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2015.12/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.01-1/http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.02http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.03http://snapshots.linaro.org/components/toolchain/gcc-linaro/5.3-2016.04
Contact Linaro
===============
File bugs at http://bugs.linaro.org
For Linaro member support see http://support.linaro.org
For Linaro community support email linaro-toolchain(a)lists.linaro.org
--
Ryan S. Arnold | Linaro Toolchain Engineering Manager
ryan.arnold(a)linaro.org | ryanarn on #linaro-tcwg @ freenode.irc.net
T: +1-612-424-1861 <+16124241861>
== Progress ==
* IPA VRP and Early VRP
- Posted patch series and revised based on review
- Few patches are accepted; others are waiting for re-review
* Tree VRP
- Converted to use allocpool
* Committed upstream tree-reassoc patch for missed optimization due to
factoring out CONVERT_EXPR in phiopt.
== Plan ==
- Follow upon remaining upstream patches
- IPA VRP
