o Teaching activity (4/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 2017.01:
- prepared source and binaries for RC1
- release notes to be finalized for publication
* GCC 5.4 2017.01
- Rebuilt binaries for the release
- Release notes almost completed
* Reviews
* Back to tree reassociation
o Misc (1/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 release
o Backports review
o Tree reassociation
=== This Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717] [6/10]
-- Fixed hardware breakpoints routines in LLDB AArch64 register context.
-- Code tweaks in NativeProcessLinux/NativeThreadLinux/ProcessGDBRemote
-- Hardware breakpoint working with single threaded applications
-- Submitted a fix for LLDB AArch64 android gcc build failure
-- Wrote single and multi threaded test applications for test hardware
breakpoints.
Monitor LLDB buildbot for minimum down time. [TCWG-712] [2/10]
-- Investigate random test failures on Arm and add them to flakey tests.
-- Buildbot down due to UPS failure
-- Got UPS fixed. Restart builders and testers.
Miscellaneous Activities [2/10]
-- Meetings, Emails etc.
-- Hungary visa passport collection
-- Background study about GDB Linux Kernel awareness
=== Next Week ===
LLDB ARM/AArch64 hardware breakpoints [TCWG-717]
-- Continue work on hardware breakpoint register context routines Arm/AArch64
-- Find a way to install hardware breakpoints on multiple threads.
# Progress #
* TCWG-984, PR 20939, GDB aborts if there is an error in disassembly.
Done. All patches are committed to mainline. [3/10]
* Patch reviews, a lot, [5/10]
** Hold one of ILP32 BFD patch because it may affect aarch64 GDB,
Reviewed ILP32 GDB patch, and convince them not to add new target
descriptions for ILP32, to make our life easier in the future.
Otherwise, we need two copies of target description for each new
hardware feature, such as v8.3, SVE, etc.
** Try to hold one disassembler options patch, which affects ARM and
GDB. Gave some comments on the interface design, but looks I am
late.
** Finish the review on DW_OP_implicit_value. Met some grey area in
DWARF spec.
* Atomicity of concurrent modification on ptrace. [1/10]
It is unclear weather debugging can modify memory for one thread while
other threads are running. After the discussions with some kernel guy,
PTRACE_POKETEXT is atomic, but GDB use it in a non-atomic way when
writing 2-byte aligned 32-bit thumb-2 instruction. Suggested a
workaround upstreams.
* Misc, meeting [1/10]
# Plan #
* ILP32 patch review.
* Carefully read IBM's kernel debugging patches.
* Set up AArch64 bare debugging with GDB, OpenOCD, JTAG and
HiKey. Soldering is needed.
--
Yao Qi
[TCWG-614] Range extension thunks
- LLD now uses synthetic sections for Thunks.
ARM Thunks now have symbols and mapping symbols.
As a side-effect we can now create local symbols in synthetic sections
so I've added them to the ARM PLT sections.
[Misc]
- Wrote 3 lines of lld 4.0 release notes for ARM
- Some upstream patch review in rtdyld and ilp32 support in the assembler
- Presented my personal Linaro objectives to the TCWG leads.
Plans for next week:
- Complete Fosdem presentation, will be leaving early Friday to catch
the Eurostar
- Respond to any post commit review comments on Thunks
- Start work on range extension thunks, the previous commits to use
synthetic sections were pre-requisites to range extension thunks, but
added little new user-visible functionality.
Planned absences:
- Fosdem 2017 will need to leave early on Friday 4th Feb
- Holiday 21st Feb to 1st March
- Linaro Connect 6th to 10th March Euro LLVM 27-28 March (Linaro's
request and cost-code)
== Progress ==
* National holiday on Tuesday [2/10]
* [AArch64] Investigate PR30225 [TCWG-1021] [2/10]
- This was a bug related to the code alignment factor for the debug frame
- Decided it was not a correctness issue and the size savings for
using a different factor are probably not noticeable in practice, so I
closed the bug
* [ARM GlobalISel] Add support for integers < 32 bits wide [TCWG-980] [1/10]
- Committed all 3 patches upstream, reworked the third one a bit
* [ARM GlobalISel] Add support for pointers [TCWG-1028] [1/10]
- Started working on a patch
* Misc [4/10]
- Mailing list, code reviews, meetings
- Buildbots: reverted 2 sets of patches, noticed an issue with some
buildbots (which Renato ended up investigating)
- FOSDEM slides
== Plan ==
* [ARM GlobalISel] Add support for pointers [TCWG-1028]
=== This Week ===
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012] [4/10]
-- Capture tests leaving behind runaway processes, found 3 so far.
-- Capture random failures and mark them flakey.
ARM/AArch64 hardware breakpoints [TCWG-717] [5/10]
-- Code review and prepared debug environment
-- Looked into Android Arm64 build failure with debug info.
Miscellaneous Activities [1/10]
-- Meetings, Emails etc.
=== Next Week ===
ARM/AArch64 hardware breakpoints [TCWG-717]
-- Fix hardware breakpoints routines in LLDB AArch64 register context.
Investigate LLDB testsuite failures on Pine64 target (AArch32 and
AArch64 modes) [TCWG-1012]
-- Keep and eye on tests marked flakey or any new random failures.
o Teaching activity (2/10)
== Progress ==
o Linaro GCC/Validation (5/10)
* GCC 4.9 snapshot:
- completed snapshot process
- waiting for linaro bug #1118 status before
releasing or re-spinning the snapshot.
https://bugs.linaro.org/show_bug.cgi?id=1118
* Made an published GCC 5.4 RC2, preparing the release
o Misc (3/10)
* Various meetings and discussions.
== Plan ==
o GCC 4.9 snapshot and binaries
o GCC 5.4 release
== This Week ==
* TCWG-1005 (malloc attr propagation) (4/10)
- Extended for pointer comparisons
- Patch review from Kugan
- Removed some cruft from the patch
* TCWG-1010 (bitwise dce propagation) (4/10)
- Started working on prototype
* Misc (2/10)
- Looked at Wheader-guard
- Building chromium with gcc
- Meetings
== Next Week ==
- TCWG-1005, TCWG-1010
