[QEMU Upstream]
Fix for softfloat scalbn, broken during the 2.12 reorg.
Code review for Alex's tcg/tests patchset.
Produced a script describing how to build cross-compilers.
[VIRT-198 # QEMU: SVE Emulation Support ]
Fix an tcg generic vector assert hitting SVE w/ VQ=3.
Rebase and post cleanup patch for TCGv_ptr operations.
Finished round 2 of SVE cleanup and fixes. RISU now once
again passes for VQ in [1-4] (which is the limitation of
the FoundationModel against which we are generating trace files).
I'll note that a lulesh binary that I generated for HKG18
does not work on the branch, but does under FoundationModel.
Therefore there must be remaining emulation errors.
However, it's a really complicated binary that is non-debuggable.
Adding printfs interferes with vectorization and gdb does not
yet let us print all of the relevant registers.
My thoughts from here go toward running the gcc testsuite,
and seeing what can be uncovered by those smaller examples.
r~
Progress:
Monday Tuesday at Euro LLVM, trip report at
https://collaborate.linaro.org/display/CR/20180416+EuroLLVM+2018
Found an example that shows that both gold and ld attempt to fix up
illegal "by strict interpretation of ELF" local debug references to
discarded local symbols from rejected comdat groups.
[TCWG-1375] LLVM should do relaxation per function.
- Worked out what instruction bundling is (From NaCl) and how it
relates to MCFragments.
- Posted revised patch upstream to handle relaxation and fixups, now
diagnoses attempt to change MCSubtargetInfo mid bundle.
- I have a finished a large series of patches to pass the
MCSubtargetInfo through to all the places it needs to be including
writeNops. Will post upstream review next week.
Next week:
- Post revised patches to TCWG-1375 and ping reviews.
- Work through a laundry list of small things to do in LLD.
- Get back to trying to link Android AOSP with LLD.
=== Work done during this GCC week ===
* TCWG-1379 (stack-protector failure on GCC ARM): need feedback from
community
+ reproduce on trunk and find out why it happens on ARM and not AArch64
or x86
+ find potential issue for all targets as well, though less likely
+ find discrepencies between code and documentation and wondered if code
is not overly zealous in some case
* 2 days doing Arm handover & meetings
=== Plan for next week (week 12) ===
* Progress on stack-protector failure
* Support arithmetic on FileCheck regex variable: finish patch
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent another patch related to linux-user signal frames (a wrinkle
I had thought had no effect with SVE disabled turns out to be
relevant in the no-SVE case too)
+ testing and applying patches for 2.12 rc4
+ code review:
- latest spin of the SMMUv3 emulation patches
- some last-minute fixes to our softfloat refactoring
- memory barrier handling in the 32-bit arm TCG backend was broken
+ tracked down a zephyr test failure on QEMU as the same bug in
the Zephyr timer device driver as the one I reported 6 months ago...
+ sent a patch fixing linux-user emulation of getdents syscall for
64-bit guest on 32-bit host
+ sent a patchset that removes the long-standing "only 4 serial ports"
limit in QEMU (various Arm boards really have 5 or 6)
+ some patches fixing errors in arm boards that don't properly
register all their RAM regions for migration
thanks
-- PMM
[VIRT-198 # QEMU: SVE Emulation Support ]
Cleaning up patches and fixing RISU failures.
[UPSTREAM]
Review of the tb_lock patch set.
Finish review of the v2 TranslateOps patch set.
Pushed a couple of softfloat fixes and an icount fix for 2.12.
r~
Note1: working for Linaro every other week
=== Issues ===
* IT issues made me loose 1 day of work
=== Work done during this LLVM+GCC week ===
* LLVM PR34170 (crashes with inline asm with double output operand in GPR):
internal review
+ improved patch to also support case with several output operands
-> had to choose to relax test a bit to not put expectation on
register allocator
* Support arithmetic on FileCheck regex variables: in progress
+ an attempt to be able to express that 2 registers are related by some
arithmetic expression (eg. vmov dY, rX, rX+1), seems doable
Upstream work on Arm GCC side:
cmse_nonsecure_caller return wrong answer: backported to GCC 7
* __builtin_arm_set_fpscr crashes with literal values input: committed to
trunk, backport oked
+ do more testing and prepare backport to GCC 6 & 7
* PR85344 (GCC fails constraint check on valid code): in progress
+ 2 prototype patches done but inconclusive result
+ pondering what should be the expect behaviour
+ investigating the extent of the problem -> both immediate and register
constraints can be surprising
=== Plan for next week (week 12) ===
* Investigate stack-protector failure with Linaro GCC 7 toolchains
* DSGHACK-25 (Support arithmetic on FileCheck regex variable): finish patch
=== Planned leave ===
* 28th April -> 29th May Sabbatical (Trip to France, then China, then
France again)
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ sent patch fixing problem where some aarch64 binaries would segfault
under linux-user (changes for SVE accidentally caused them to get
a too-small signal frame)
+ wrote an RFC kernel patch which sanitizes the ESR value reported to
userspace for faults on kernel addresses, rather than dropping it
entirely
+ wrote a patch to fix a reported QEMU compile failure for Arm
guests on MIPS hosts
+ code review:
- various bug fixes for 2.12
- another round of the patchset to implement the PMU properly
- DS1338 RTC device emulation overhaul patches
- QEMU side of changes to allow more than 123 CPUs with KVM
(mostly involving allowing split GIC redistributor regions)
- linux-user FDPIC ABI support
Hopefully next week I'll be able to get back to non-release
related work...
thanks
-- PMM
