* Thursday off
== Progress ==
* GCC:
- FDPIC: handling feedback.
- noinit attribute: committed (ld patch too)
* GNU-583 (Fix Linux kernel built for Thumb-2 with GCC using LTO)
- no progress this week
* GCC upstream validation:
- a few issues reported this week.
* Binutils:
- Non-contiguous memory regions support in the BFD linker: not started
yet.
* misc:
- infra fixes / troubleshooting
== Next ==
GCC:
- handle feedback on FDPIC patches
- binutils/linker support for non-contiguous memory regions
- GNU-583
- GCC upstream validation: Add a config for cortex-m33 (v8-m)
QEMU Tooling ([VIRT-252])
=========================
QEMU plugin support ([VIRT-280])
- continued working through v4 comments on [next version branch]
- did some benchmarking to justify no fast path in translator_ld
[VIRT-280] https://projects.linaro.org/browse/VIRT-280
[next version branch]
https://github.com/stsquad/qemu/tree/plugins/plugins-v5
GSoC Mentoring ([VIRT-348])
- spent some time reviewing the current state and experimenting
[VIRT-348] https://projects.linaro.org/browse/VIRT-384
Upstream Work ([VIRT-109])
==========================
- more work on [my docker fixup branch]
- now can run make docker-test-build on qemu-test
- posted {PATCH v3 00/13} softfloat updates (include tweaks, rm LIT64)
Message-Id: <20190813124946.25322-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
[my docker fixup branch]
https://github.com/stsquad/qemu/tree/testing/docker-def-and-buster-fixes
Completed Reviews [6/6]
=======================
{Qemu-devel} {PATCH v5 00/10} Measure Tiny Code Generation Quality
Message-Id: <20190815021857.19526-1-vandersonmr2(a)gmail.com>
- CLOSING NOTE [2019-08-15 Thu 20:45]
Looks pretty good but some racy crashes need to be fixed.
{Qemu-devel} {PATCH v1 0/2} Integrating qemu to Linux Perf
Message-Id: <20190815023725.2659-1-vandersonmr2(a)gmail.com>
- CLOSING NOTE [2019-08-15 Thu 20:46]
Needs a v2 with compile fixes
Absences
========
- Moving house & office ~20th/21st Aug
Current Review Queue
====================
* {PATCH v3 00/34} target/arm: Implement ARMv8.1-VHE
Message-Id: <20190803184800.8221-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v4 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20190307170440.3113-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH} Implement qemu_thread_yield for posix, use it in mttcg to handle EXCP_YIELD
Message-Id: <20190717054655.14104-1-npiggin(a)gmail.com>
* {PATCH v3 0/6} tests/docker: add podman support
Message-Id: <20190713143311.17620-1-marcandre.lureau(a)redhat.com>
* {PATCH 0/2} tests/acceptance: Add test of NeXTcube framebuffer using OCR
Message-Id: <20190629150056.9071-1-f4bug(a)amsat.org>
* {Qemu-devel} {PATCH 0/4} Introduce the microvm machine type
Message-Id: <20190628115349.60293-1-slp(a)redhat.com>
--
Alex Bennée
- Fixed LLD segfault when exceptions.
- Implement large code model TLSLD relocations in LLD.
- More thoughts on MOVK prel relocations in the ABI as there looks to
be a use case for them in HWASAN that isn't covered by the existing
relocations.
- Some thoughts on how TCWG LLVM Jira initiatives could be worded and
how we may want to word them in the next cycle.
- Initial thoughts written down on Connect presentation, need to flesh
out more this week.
- Upgraded machine to 18.04, almost managed to break it in the process
but luckily it was recoverable. Will likely have some teething
problems.
o LLVM:
* Machine Outliner:
- Improved stack fixup handling (remove cnadidates when it is not
bebeficial)
- Fixing an issue related to R12 usage.
o Misc
* Various meetings and discussions.
[VIRT-327 # Richard's upstream QEMU work ]
Posted v4 of arm hflags reorg.
Split out 3 minor patch sets from the larger aa32 decodetree set.
Reviewed v6 of invert-endian tlb patch set.
Reviewed ajb's fpu header reorg.
Posted an RFC vs Andrew Jones' SVE-in-KVM patch set.
r~
QEMU Tooling ([VIRT-252])
=========================
- working through v4 comments on [next version branch]
[next version branch]
https://github.com/stsquad/qemu/tree/plugins/plugins-v5
Upstream Work ([VIRT-109])
==========================
- spent some more time looking at TCG EL2 behaviour
- there is something not working properly even without the VHE
patches
- need to do some tooling work to be able to properly debug HYP code
- posted {PATCH v1 0/7} softfloat header cleanups Message-Id:
<20190808164117.23348-1-alex.bennee(a)linaro.org>
- posted {PATCH v2 0/7} softfloat includes cleanup Message-Id:
<20190809091940.1223-1-alex.bennee(a)linaro.org>
- posted {PATCH v1 0/2} docker DEF_TARGET_LIST cleanup Message-Id:
<20190809155047.24526-1-alex.bennee(a)linaro.org>
[VIRT-109] https://projects.linaro.org/browse/VIRT-109
Completed Reviews [6/6]
=======================
{Qemu-arm} {PATCH 0/2} target/arm: Fix routing of singlestep exceptions
Message-Id: <20190805130952.4415-1-peter.maydell(a)linaro.org>
- CLOSING NOTE [2019-08-07 Wed 11:47]
Looks good, would be nice to integrate a better testcase
{PATCH} gdbstub: Fix handling of '!' packet with new infra
Message-Id: <20190805190901.14072-1-ramiro.polla(a)gmail.com>
- CLOSING NOTE [2019-08-07 Wed 11:59]
Queued to my tree
{PATCH 0/3} tests/tcg: disentangle makefiles
Message-Id: <20190730123759.21723-1-pbonzini(a)redhat.com>
{Qemu-devel} {PATCH v2 00/29} Tame a few "touch this, recompile the world" headers
Message-Id: <20190806151435.10740-1-armbru(a)redhat.com>
- CLOSING NOTE [2019-08-07 Wed 17:32]
Looks OK but breaks a lot of cross compiles. More subtly to fix.
{Qemu-devel} {PATCH untested for-4.2} memory: fix race between TCG and accesses to dirty bitmap
Message-Id: <20190729214717.6616-1-pbonzini(a)redhat.com>
{PATCH v3 00/29} Tame a few "touch this, recompile the world" headers
Message-Id: <87k1bmpn7y.fsf(a)dusky.pond.sub.org>
Current Review Queue
====================
* {PATCH v3 00/34} target/arm: Implement ARMv8.1-VHE
Message-Id: <20190803184800.8221-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {PATCH v4 00/22} target/arm: Implement ARMv8.5-MemTag, system mode
Message-Id: <20190307170440.3113-1-richard.henderson(a)linaro.org>
* {Qemu-devel} {RFC PATCH} Implement qemu_thread_yield for posix, use it in mttcg to handle EXCP_YIELD
Message-Id: <20190717054655.14104-1-npiggin(a)gmail.com>
* {PATCH v3 0/6} tests/docker: add podman support
Message-Id: <20190713143311.17620-1-marcandre.lureau(a)redhat.com>
* {PATCH 0/2} tests/acceptance: Add test of NeXTcube framebuffer using OCR
Message-Id: <20190629150056.9071-1-f4bug(a)amsat.org>
* {Qemu-devel} {PATCH 0/4} Introduce the microvm machine type
Message-Id: <20190628115349.60293-1-slp(a)redhat.com>
--
Alex Bennée
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ we needed an rc4 for 4.1.0 (predictably), so herded the necessary
fixes into it
+ bug fixing:
- LP:1838913 : single-step exceptions were always being taken to EL1,
even if the guest configured debug exceptions to go to EL2 or EL3
- LP:1815423 : x86 TCG bug where we were giving the wrong result for
SSE float-to-int conversions that raised the 'invalid' exception
- LP:1796520 and LP:1839325 : started investigating some sh4 linux-user bugs
+ code review:
- patch to implement aspeed SD controller model
- Eric Auger's patchset of minor SMMUv3 fixes
- Aspeed GPIO controller model
- v3 of the GreenSocs reset-handling refactoring
- RTH's preliminary cleanup of handling of PC in arm decoder
thanks
-- PMM
[VIRT-263 # ARMv8.1-VHE Virtual Host Extensions ]
Posted a couple of revisions. Good feedback between this
and MemTag, both of which need to adjust the set of TLBs.
[VIRT-339 # ARMv8.5-BTI, Branch Target Identification ]
Posted v7.
[VIRT-344 # ARMv8.5-MemTag, Memory Tagging Extension ]
Rebased upon current VHE+BTI work. Updated from beta manuals
to the ARM ARM issue E.a manual.
[VIRT-327 # Richard's upstream QEMU work ]
Reviewed v1 x86 gen_sse rewrite.
Reviewed Alex's v4 plugin patchset.
r~
o LLVM:
* Bots babysitting
* Machine Outliner:
- Rebased branch on upstream
- Working on stack fixup limits test cases
o Misc
* Various meetings and discussions.
Progress:
* VIRT-65 [QEMU upstream maintainership]
+ QEMU 4.1.0 rc3 sent out. As usual, we've found some last minute
bugs and we'll need an rc4 next week...
+ patch review:
- series from Philippe making some cleanups to use object_initialize_child()
and friends
- Alex's patch "generate a custom MIDR for -cpu max"
- made a start on reviewing RTH's 32-bit arm decodetree conversion
+ bug fixing:
- LP:1838277 : we were taking exceptions caused by BRK instructions at
EL2 to EL1, rather than to EL2; sent a patch fixing this
- LP:1838475 : FPU register stacking in M-profile CPUs without the
Security Extensions was incorrectly failing an NSACR check and
taking a bogus exception: sent a patch to fix
+ wrote a patchset that converts the sparc target away from the
deprecated and broken do_unassigned_access hook to use the new-in-2017
do_transaction_failure hook instead; one step closer to being able
to remove the old hook entirely...
+ did the same for the mips target
thanks
-- PMM
