On 4/10/2026 3:49 PM, Aniket Randive wrote:
In GPI mode, the I2C GENI driver programs an extra TX DMA transfer descriptor (TRE) on the TX channel when handling a single read message. This results in an unintended write phase being issued on the I2C bus, even though a read transaction does not require any TX data.
For a single-byte read, the correct hardware sequence consists of the CONFIG and GO commands followed by a single RX DMA TRE. Programming an additional TX DMA TRE is redundant, causes unnecessary DMA buffer mapping on the TX channel, and may lead to incorrect bus behavior.
Update the transfer logic to avoid programming a TX DMA TRE for single read messages in GPI mode.
Co-developed-by: Maramaina Naresh naresh.maramaina@oss.qualcomm.com Signed-off-by: Maramaina Naresh naresh.maramaina@oss.qualcomm.com Signed-off-by: Aniket Randive aniket.randive@oss.qualcomm.com
Reviewed-by: Mukesh Kumar Savaliya mukesh.savaliya@oss.qualcomm.com
Changes in v4:
- Added some more description in comment and changed the label name.
Changes in v3:
- Added comment in the driver for better readability and changed the position of 'skip_dma' label to allow dma engine configuration.
Changes in v2:
- Updated the commit message.
drivers/i2c/busses/i2c-qcom-geni.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index a4acb78fafb6..a482a4c60744 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -625,8 +625,8 @@ static int geni_i2c_gpi(struct geni_i2c_dev *gi2c, struct i2c_msg msgs[],
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