On Thu, Dec 04, 2025 at 03:00:02AM -0800, Christoph Hellwig wrote:
Why do you care about alignment to the controller page size?
- for_each_sgtable_dma_sg(sgt, sg, tmp) {
dma_addr_t dma = sg_dma_address(sg);unsigned long sg_len = sg_dma_len(sg);while (sg_len) {dma_list[i++] = dma;dma += NVME_CTRL_PAGE_SIZE;sg_len -= NVME_CTRL_PAGE_SIZE;}- }
Why does this build controller pages sized chunks?
I think the idea was that having fixed size entries aligned to the device's PRP unit is that it's efficient to jump to the correct index for any given offset. A vector of mixed sizes would require you walk the list to find the correct starting point, which we want to avoid.
This is similar to the way io_uring registered memory is set up, though io_uring has extra logic to use largest common contiguous segment size, or even just one segment if it coalesces. We could probably do that too.
Anyway, that representation naturally translates to the PRP format, but this could be done in the SGL format too.