On 4/24/25 01:31, Yabin Cui wrote:
On Tue, Apr 22, 2025 at 7:21 AM Leo Yan leo.yan@arm.com wrote:
On Mon, Apr 21, 2025 at 02:58:18PM -0700, Yabin Cui wrote:
The cs_etm PMU, regardless of the underlying trace sink (ETF, ETR or TRBE), doesn't require contiguous pages for its AUX buffer.
Though contiguous pages are not mandatory for TRBE, I would set the PERF_PMU_CAP_AUX_NO_SG flag for it. This can potentially benefit performance.
As explained in the patch 1/2, my use case periodically collects ETM data from the field (using both TRBE and ETR), and needs to reduce memory fragmentation. If the performance impact is big, we can make it user configurable. Otherwise, shall we default it to non-contiguous pages?
But is not that already happening ? cs_etm does not set the PMU cap PERF_PMU_CAP_AUX_NO_SG that means it can allocate non-contig memory chunk. Where am I missing ?
For non per CPU sinks, it is fine to allocate non-contiguous pages.
Thanks, Leo
This patch adds the PERF_PMU_CAP_AUX_NON_CONTIGUOUS_PAGES capability to the cs_etm PMU. This allows the kernel to allocate non-contiguous pages for the AUX buffer, reducing memory fragmentation when using cs_etm.
Signed-off-by: Yabin Cui yabinc@google.com
drivers/hwtracing/coresight/coresight-etm-perf.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index f4cccd68e625..c98646eca7f8 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -899,7 +899,8 @@ int __init etm_perf_init(void) int ret;
etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
PERF_PMU_CAP_ITRACE);
PERF_PMU_CAP_ITRACE |PERF_PMU_CAP_AUX_NON_CONTIGUOUS_PAGES); etm_pmu.attr_groups = etm_pmu_attr_groups; etm_pmu.task_ctx_nr = perf_sw_context;-- 2.49.0.805.g082f7c87e0-goog
-
Anshuman Khandual