On Wed, Apr 22, 2026 at 02:21:54PM +0100, Yeoreum Yun wrote:

[...]

@@ -573,11 +573,9 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, config->res_ctrl[i], TRCRSCTLRn(i)); for (i = 0; i < caps->nr_ss_cmp; i++) {

• /* always clear status bit on restart if using single-shot */
  

• if (config->ss_ctrl[i] || config->ss_pe_cmp[i])
  

• 	config->ss_status[i] &= ~TRCSSCSRn_STATUS;
  

  etm4x_relaxed_write32(csa, config->ss_ctrl[i], TRCSSCCRn(i));

• etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i));
  

• /* always clear status and pending bits on restart if using single-shot */
  

• etm4x_relaxed_write32(csa, 0x0, TRCSSCSRn(i));
  

After confirmed with hardware team, we should preserve status bits (including STATUS and PENDING bits) during a session. So here we should set drvdata->ss_status to TRCSSCSRn.

@@ -1503,8 +1501,9 @@ static void etm4_init_arch_data(void *info) */ caps->nr_ss_cmp = FIELD_GET(TRCIDR4_NUMSSCC_MASK, etmidr4); for (i = 0; i < caps->nr_ss_cmp; i++) {

• drvdata->config.ss_status[i] =
  

• 	etm4x_relaxed_read32(csa, TRCSSCSRn(i));
  

• drvdata->ss_status[i] = etm4x_relaxed_read32(csa, TRCSSCSRn(i));
  

• drvdata->ss_status[i] &= (TRCSSCSRn_PC | TRCSSCSRn_DV |
  

• 			  TRCSSCSRn_DA | TRCSSCSRn_INST);
  

It is fine for read these capacity bits when probe, but we need to clear status when a session is starting to avoid the stale value left from previous session:

drvdata->ss_status[idx] &= ~(TRCSSCSRn_STATUS | TRCSSCSRn_PENDING);

We can do this in etm4_parse_event_config() for perf mode, and might create a new function (say etm4_parse_sysfs_config()) for preparing config for sysfs mode?

The rest looks good to me.

Thanks, Leo