From: liangzhen zhen.liang@spacemit.com
Enable CoreSight tracing support on RISC-V architecture by: - Adding RISC-V to Kconfig dependencies for CoreSight - Replacing ARM-specific memory barriers (isb, dmb) with RISC-V equivalents (local_flush_icache_all, __mb) - Removing ARM-specific header dependencies: perf/arm_pmu.h, asm/smp_plat.h - Adding PMU format attribute macros for cross-architecture support
This allows CoreSight tracing infrastructure to work on RISC-V systems while maintaining compatibility with existing ARM/ARM64 implementations.
Signed-off-by: liangzhen zhen.liang@spacemit.com --- drivers/hwtracing/Kconfig | 2 ++ drivers/hwtracing/coresight/Kconfig | 2 +- drivers/hwtracing/coresight/coresight-core.c | 8 +++++++ .../hwtracing/coresight/coresight-etm-perf.c | 1 - .../hwtracing/coresight/coresight-etm-perf.h | 21 +++++++++++++++++++ .../hwtracing/coresight/coresight-platform.c | 1 - .../hwtracing/coresight/coresight-tmc-etf.c | 4 ++++ .../hwtracing/coresight/coresight-tmc-etr.c | 4 ++++ 8 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/drivers/hwtracing/Kconfig b/drivers/hwtracing/Kconfig index 911ee977103c..167ff172dd72 100644 --- a/drivers/hwtracing/Kconfig +++ b/drivers/hwtracing/Kconfig @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0-only menu "HW tracing support"
+source "drivers/hwtracing/coresight/Kconfig" + source "drivers/hwtracing/stm/Kconfig"
source "drivers/hwtracing/intel_th/Kconfig" diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 6a4239ebb582..2b1ebe3f614d 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -4,7 +4,7 @@ # menuconfig CORESIGHT tristate "CoreSight Tracing Support" - depends on ARM || ARM64 + depends on ARM || ARM64 || RISCV depends on OF || ACPI select ARM_AMBA select PERF_EVENTS diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 80e26396ad0a..1ca202153cc4 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -141,7 +141,11 @@ static void coresight_set_self_claim_tag_unlocked(struct coresight_device *csdev { csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED, CORESIGHT_CLAIMSET); +#if defined(__riscv) + local_flush_icache_all(); +#else isb(); +#endif }
void coresight_clear_self_claim_tag(struct csdev_access *csa) @@ -158,7 +162,11 @@ void coresight_clear_self_claim_tag_unlocked(struct csdev_access *csa) { csdev_access_relaxed_write32(csa, CORESIGHT_CLAIM_SELF_HOSTED, CORESIGHT_CLAIMCLR); +#if defined(__riscv) + local_flush_icache_all(); +#else isb(); +#endif } EXPORT_SYMBOL_GPL(coresight_clear_self_claim_tag_unlocked);
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 72017dcc3b7f..70a6aaffbf9d 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -13,7 +13,6 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/perf_event.h> -#include <linux/perf/arm_pmu.h> #include <linux/percpu-defs.h> #include <linux/slab.h> #include <linux/stringhash.h> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h index 24d929428633..e48c0ad46db1 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -58,6 +58,27 @@ struct cscfg_config_desc; #define ATTR_CFG_FLD_cc_threshold_LO 0 #define ATTR_CFG_FLD_cc_threshold_HI 11
+#define __GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \ + (lo) == (hi) ? #cfg ":" #lo "\n" : #cfg ":" #lo "-" #hi + +#define _GEN_PMU_FORMAT_ATTR(cfg, lo, hi) \ + __GEN_PMU_FORMAT_ATTR(cfg, lo, hi) + +#define GEN_PMU_FORMAT_ATTR(name) \ + PMU_FORMAT_ATTR(name, \ + _GEN_PMU_FORMAT_ATTR(ATTR_CFG_FLD_##name##_CFG, \ + ATTR_CFG_FLD_##name##_LO, \ + ATTR_CFG_FLD_##name##_HI)) + +#define _ATTR_CFG_GET_FLD(attr, cfg, lo, hi) \ + ((((attr)->cfg) >> lo) & GENMASK_ULL(hi - lo, 0)) + +#define ATTR_CFG_GET_FLD(attr, name) \ + _ATTR_CFG_GET_FLD(attr, \ + ATTR_CFG_FLD_##name##_CFG, \ + ATTR_CFG_FLD_##name##_LO, \ + ATTR_CFG_FLD_##name##_HI) + /** * struct etm_filter - single instruction range or start/stop configuration. * @start_addr: The address to start tracing on. diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c index 0db64c5f4995..261ba6a75b86 100644 --- a/drivers/hwtracing/coresight/coresight-platform.c +++ b/drivers/hwtracing/coresight/coresight-platform.c @@ -14,7 +14,6 @@ #include <linux/amba/bus.h> #include <linux/coresight.h> #include <linux/cpumask.h> -#include <asm/smp_plat.h>
#include "coresight-priv.h"
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 8882b1c4cdc0..dc366f4a5ca8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -661,7 +661,11 @@ static int tmc_panic_sync_etf(struct coresight_device *csdev) * Make sure all previous writes are ordered, * before we mark valid */ +#if defined(__riscv) + __mb(); +#else dmb(sy); +#endif mdata->valid = true; /* * Below order need to maintained, since crc of metadata diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 4dc1defe27a5..ac379d1751e6 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1883,7 +1883,11 @@ static int tmc_panic_sync_etr(struct coresight_device *csdev) * Make sure all previous writes are ordered, * before we mark valid */ +#if defined(__riscv) + __mb(); +#else dmb(sy); +#endif mdata->valid = true; /* * Below order need to maintained, since crc of metadata