Intel PT uses a zero instruction length for asynchronous branches so the thread stack resumes at the source IP. A dlfilter can fetch the instruction before call/return processing and replace that zero with its opcode length, advancing the saved return address.
Set sample.ret_addr to sample.ip for asynchronous branch samples so instruction fetching cannot change the return address. This also covers asynchronous trace-end samples and VM exits.
Assisted-by: Codex:gpt-6 Signed-off-by: Leo Yan leo.yan@arm.com --- tools/perf/util/intel-pt.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/tools/perf/util/intel-pt.c b/tools/perf/util/intel-pt.c index 8c21c9f52d572d2dd4e15b3b5c341b253ccea1b5..e8b9c8a67b0a0635e0110eda4b6ccb2511132fc7 100644 --- a/tools/perf/util/intel-pt.c +++ b/tools/perf/util/intel-pt.c @@ -1803,6 +1803,13 @@ static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq) perf_sample__init(&sample, /*all=*/true); intel_pt_prep_b_sample(pt, ptq, event, &sample);
+ /* + * For asynchronous branches, use the sample IP as the return address + * instead of advancing it during instruction decoding. + */ + if (sample.flags & PERF_IP_FLAG_ASYNC) + sample.ret_addr = sample.ip; + sample.id = ptq->pt->branches_id; sample.stream_id = ptq->pt->branches_id;