On 13 July 2016 at 10:35, Al Grant <Al.Grant(a)arm.com> wrote:
> Hi,
>
> When you see the libraries being mapped multiple times, are you just seeing the code and data segments? I see that too, I just ignore the data segments.
>
(Taking the liberty of CC'ing the list as this is probably a topic of interest)
Each time a library is mapped perf gets notified by the mm subsystem.
Part of the notification is a new vm_area_struct that contains the new
start address of the library (vm_area_struct::vm_start). Upon
receiving the notification the new address is communicated to the ETM
drivers which do the required filter configuration. That is all good
and working well.
On ARM64 (because I _assume_ X86 folks didn't see this) we get 3
notifications. For example notification A will have address
0x7f93a60000 while, subsequently, notification B and C address
0x7f93a70000. Note that the latter two are 64K higher than the first
one.
Once the last notification has been received the code in the main
program is executed. That code (in the main program) jumps to library
code mapped at the address it got from the first notification and not
the last one, making the filter configuration all wrong.
As such I have to understand what notification B and C are for. Based
on the vm_area_struct::vm_flags I'm guessing some sort of accounting
feature but not sure yet. If I ignore notification B and C, things
work amazingly well and one can really see the power offered by
coresight.
That's where I'm at now.
Get back to me if you (or anyone else) want more information.
Mathieu
> Al
> IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
>
An issue was noted while running tests in windows debug mode on the latest
development library.
As noted in the patch commit message, an initialisation issue for the
output packet structure was highlighted by the windows debug memory
initialisation (0xcdcdcdcd) which did not show up in linux tests (probably
due to default 0 init).
This led to the discovery of an additional issue with the setting of the
.isa field in the instruction range output packets. Prior to the patch this
was defaulting AArch32 in linux and not always being set correctly in the
ETMv4 and PTM decoders The default for PTM was probably OK in none-thumb
cases but the AArch64 juno captures were consistently reporting AArch32 in
the output packets which should have been AArch64.
The updated release has been tested against the opencsd-perf-4.7-rc4 build
of the perf report/script tools.
As expected the output from perf report is unchanged.
However, the perf script, which runs the architecture based disassembly is
also unchanged, suggesting that this code is not at present taking note of
the ISA supplied by the trace output.
Running against both the unpatched library, with packets marked as AArch32,
and the patched library, with packets marked as AArch64, resulted in the
disassembly correctly being output as AArch64.
I assume that the disassembly routines are obtaining the current core arch
from other information in the perf.data file. We should probably consider
if this is the best way to go in this case.
Regards
Mike
--
Mike Leach
Principal Engineer, ARM Ltd.
Blackburn Design Centre. UK
Patch updates the handler function in cs-etm-decoder to deal with a new generic packet type introduced in the latest decoder.
Mike Leach (1):
cs-etm: Update to cs-etm-decoder to handle new packet type from
OpenCSD.
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
--
1.9.1
Additional Generic element type was added in OpenCSD 0v003 (ETMv3 additions) - this broke the perf build as it was missing from the case statement handling the enum types.
Patch fixes this - generated relative to perf-opencsd-4.7-rc1 branch
Mike Leach (1):
csetm: Update to cs-etm-decoder to handle new packet type.
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 1 +
1 file changed, 1 insertion(+)
--
1.9.1
Good day all,
Here's the first draft of the "abstract" I intend to submit for ELC-E
in Berlin. Keeping in mind the 900 character limit (this is already
880), please have a read and get back to me with your thoughts.
[Begin]
The CoreSight framework available in the Linux kernel has recently
been integrated with the Perf core, making HW assisted tracing on ARM
systems accessible to developers working on a wide spectrum of
products. This presentation will start by giving a brief overview of
the CoreSight technology itself before presenting the current
solution, from trace collection in kernel space to off system trace
decoding. To help with the latter part the Open CoreSight Decoding
Library (openCSD) is introduced. OpenCSD is an open source library
assisting in the decoding of collected trace data. We will see how it
is used with the existing perf tools to provide an end-to-end solution
for CoreSight trace decoding. The presentation will conclude with
trace acquisition and decoding scenarios, along with tips on how to
interpret trace information rendered by the perf tools.
[End]
Many thanks,
Mathieu
Hello Tor,
While ramping up on the "perf report" and "perf script" features I fixed
a few things and decided to play a little:
1/4: No influence on the current results but good to fix.
2/4: That changes a lot of things when multiple buffers have been collected.
3/4: No change in functionality, just cleanup.
4/4: Enhancement to make the output easier to read.
These changes can be found here[1]. If this is good with you I'll push them
to gitHub for the 4.7 cycle.
Regards,
Mathieu
[1]. https://git.linaro.org/people/mathieu.poirier/coresight.git/shortlog/refs/h…
Mathieu Poirier (4):
cs-etm: avoid casting variable
cs-etm: account for each trace buffer in the queue
cs-etm: removing unecessary structure field
cs-etm: associating output packet with CPU they executed on
tools/perf/scripts/python/cs-trace-disasm.py | 2 +
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c | 15 +++-
tools/perf/util/cs-etm-decoder/cs-etm-decoder.h | 1 +
tools/perf/util/cs-etm.c | 103 +++++++++++++++++++-----
tools/perf/util/cs-etm.h | 7 ++
5 files changed, 106 insertions(+), 22 deletions(-)
--
2.5.0
Hi Tor,
Running through the ETMv3 decode is making me think a bit more about the generic output packets.
For ETMv4, we output a OCSD_GEN_TRC_ELEM_PE_CONTEXT to indicate context info for the core, then a string of OCSD_GEN_TRC_ELEM_INSTR_RANGE for the instructions executed with the context.
This mirrors the way ETMv4 packet streams work.
ETMv3 and to a lesser extent PTM handles context differently, meaning we have to work harder to output the a OCSD_GEN_TRC_ELEM_PE_CONTEXT prior to the OCSD_GEN_TRC_ELEM_INSTR_RANGE packets.
It occurs to me that the context packet is only really relevant when processing the instruction ranges (and possibly for data tracing later on), so I was considering:-
1) Mandating that the context part of the generic packet structure is valid for the instruction range packet (it happens to be for the current decoder, but that is a consequence of how it is written rather than a deliberate rule). In future it can be mandated for data packets if required.
2) Dropping the OCSD_GEN_TRC_ELEM_PE_CONTEXT packets completely.
For the decoders this mandate is not onerous as they have to maintain the current context anyway to do the decode. Dropping a packet could simplify both decoder and library client operation.
How would this affect the current perf decode?
After the ETMv3 dev (or possibly at the end of it), I am going to expand the docs for the generic packets to set down these rules and dependencies.
Regards
Mike
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