This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-defconfig in repository toolchain/ci/qemu.
from 41fb4c14ee Merge tag 'linux-user-for-7.0-pull-request' of https://gitla [...] adds d9e9cd59df Add dummy Aspeed AST2600 Display Port MCU (DPMCU) adds b7469ef92a target/arm: Add missing FEAT_TLBIOS instructions adds a120157b24 hw/intc/arm_gicv3_its: Correct off-by-one bounds check on rdbase adds 8d2d6dd9bb hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED define adds 6c1db43de4 hw/intc/arm_gicv3_its: Remove maxids union from TableDesc adds 62df780e3d hw/intc/arm_gicv3_its: Don't return early in extract_table_p [...] adds e5487a4139 hw/intc/arm_gicv3_its: Reduce code duplication in extract_ta [...] adds 9ae8543190 hw/intc/arm_gicv3_its: Correct setting of TableDesc entry_sz adds 764d6ba10c hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL define adds b87fab1c8e hw/intc/arm_gicv3_its: Correct handling of MAPI adds e07f844599 hw/intc/arm_gicv3_its: Use FIELD macros for DTEs adds 257bb6501c hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field size adds 437dc0ea98 hw/intc/arm_gicv3_its: Use FIELD macros for CTEs adds 80dcd37feb hw/intc/arm_gicv3_its: Fix various off-by-one errors adds 7f18ac3ab3 hw/intc/arm_gicv3_its: Rename max_l2_entries to num_l2_entries adds 560223dcf0 hw/arm: Add kudo i2c eeproms. adds b27de2c57b hw/arm: attach MMC to kudo-bmc adds 5b0829d38c hw/arm: add i2c muxes to kudo-bmc adds b8905cc2dd hw/arm: kudo add lm75s on bus 13 adds c87507a8cf Merge tag 'pull-target-arm-20220107' of https://git.linaro.o [...] adds 7656d9ce09 virtio-mem: Don't skip alignment checks when warning about b [...] adds 9bd6565cce acpi: validate hotplug selector on access adds bf1d85c166 virtio: introduce macro IRTIO_CONFIG_IRQ_IDX adds e3480ef81f virtio-pci: decouple notifier from interrupt process adds 316011b8a7 virtio-pci: decouple the single vector from the interrupt process adds 8806237234 vhost: introduce new VhostOps vhost_set_config_call adds 634f7c89fb vhost-vdpa: add support for config interrupt adds 081f864f56 virtio: add support for configure interrupt adds f7220a7ce2 vhost: add support for configure interrupt adds 497679d510 virtio-net: add support for configure interrupt adds d48185f1a4 virtio-mmio: add support for configure interrupt adds d5d24d859c virtio-pci: add support for configure interrupt adds deeb956c40 trace-events,pci: unify trace events format adds b7107e758f vhost-user-blk: reconnect on any error during realize adds e87975051e chardev/char-socket: tcp_chr_recv: don't clobber errno adds 666265036f chardev/char-socket: tcp_chr_sync_read: don't clobber errno adds 6dcae534e8 vhost-backend: avoid overflow on memslots_limit adds 2d88d9c65c vhost-backend: stick to -errno error return convention adds 3631151b3e vhost-vdpa: stick to -errno error return convention adds 025faa872b vhost-user: stick to -errno error return convention adds 5d33ae4b7a vhost: stick to -errno error return convention adds fb76785934 vhost-user-blk: propagate error return from generic vhost adds 2fedf46e34 pci: Export the pci_intx() function adds 20766514d6 pcie_aer: Don't trigger a LSI if none are defined adds 10be11d0b4 smbios: Rename SMBIOS_ENTRY_POINT_* enums adds bdf54a9a7b hw/smbios: Use qapi for SmbiosEntryPointType adds 0e4edb3b3b hw/i386: expose a "smbios-entry-point-type" PC machine property adds 0a963af3e3 hw/vhost-user-blk: turn on VIRTIO_BLK_F_SIZE_MAX feature for [...] adds 6c427ab926 util/oslib-posix: Let touch_all_pages() return an error adds a384bfa32e util/oslib-posix: Support MADV_POPULATE_WRITE for os_mem_prealloc() adds dba506788b util/oslib-posix: Introduce and use MemsetContext for touch_ [...] adds 89aec6411c util/oslib-posix: Don't create too many threads with small m [...] adds ac86e5c37d util/oslib-posix: Avoid creating a single thread with MADV_P [...] adds a960d6642d util/oslib-posix: Support concurrent os_mem_prealloc() invocation adds 29b838c05d util/oslib-posix: Forward SIGBUS to MCE handler under Linux adds 09b3b7e092 virtio-mem: Support "prealloc=on" option adds 750539c4c4 virtio: signal after wrapping packed used_idx adds d135536d5f MAINTAINERS: Add a separate entry for acpi/VIOT tables adds 3ff9b192de linux-headers: sync VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE adds 23ad8dec8d virtio-mem: Support VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE adds 60f1f77cab virtio-mem: Set "unplugged-inaccessible=auto" for the 7.0 ma [...] adds 5178d78f4b intel-iommu: correctly check passthrough during translation adds 8cdb99af45 acpi: fix QEMU crash when started with SLIC table adds e71f6ab9d9 tests: acpi: whitelist expected blobs before changing them adds 11edfabee4 tests: acpi: add SLIC table test adds c8adb4d222 tests: acpi: SLIC: update expected blobs adds 784802689f acpihp: simplify acpi_pcihp_disable_root_bus adds 44bff3767c hw/i386/pc: Add missing property descriptions adds 14dc58e3e0 docs: reSTify virtio-balloon-stats documentation and move to [...] adds b259772afc hw/scsi/vhost-scsi: don't leak vqs on error adds 539ba1acac hw/scsi/vhost-scsi: don't double close vhostfd on error adds d731ab3119 virtio/vhost-vsock: don't double close vhostfd, remove redun [...] adds b193e5f9cc tests: acpi: prepare for updated TPM related tables adds 5903646d39 acpi: tpm: Add missing device identification objects adds ca745d2277 tests: acpi: Add updated TPM related tables adds d70075373a Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/vir [...] adds 0fbb5d2d3c target/riscv/pmp: fix no pmp illegal intrs adds 6fd3f397ca hw/dma: sifive_pdma: support high 32-bit access of 64-bit register adds e6b0408a17 hw/dma: sifive_pdma: permit 4/8-byte access size of PDMA registers adds 83b92b8efc hw/intc: sifive_plic: Add a reset function adds fb926d57cc hw/intc: sifive_plic: Cleanup the write function adds b79e1c76c0 hw/intc: sifive_plic: Cleanup the read function adds 41bcc44a25 hw/intc: sifive_plic: Cleanup remaining functions adds 6ca7155a8c target/riscv: Mark the Hypervisor extension as non experimental adds 07cb270a9a target/riscv: Enable the Hypervisor extension by default adds 8f972e5b4b hw/riscv: Use error_fatal for SoC realisation adds d4452c6924 hw/riscv: virt: Allow support for 32 cores adds b3e0204968 roms/opensbi: Upgrade from v0.9 to v1.0 adds 629ccdaa4e target/riscv: rvv-1.0: Call the correct RVF/RVD check functi [...] adds 91cade44cd target/riscv: rvv-1.0: Call the correct RVF/RVD check functi [...] adds 79e6176ea0 target/riscv: rvv-1.0: Call the correct RVF/RVD check functi [...] adds dfdb46a376 target/riscv: Fix position of 'experimental' comment adds fc313c6434 exec/memop: Adding signedness to quad definitions adds c7f9dd5465 exec/memop: Adding signed quad and octo defines adds e9d07601f6 qemu/int128: addition of div/rem 128-bit operations adds 344b4a82fc target/riscv: additional macros to check instruction support adds a1a3aac448 target/riscv: separation of bitwise logic and arithmetic helpers adds 2b5470843a target/riscv: array for the 64 upper bits of 128-bit registers adds 332dab6878 target/riscv: setup everything for rv64 to support rv128 execution adds 76a361066f target/riscv: moving some insns close to similar insns adds a2f827ff4f target/riscv: accessors to registers upper part and 128-bit [...] adds 568f247f69 target/riscv: support for 128-bit bitwise instructions adds 57c108b864 target/riscv: support for 128-bit U-type instructions adds 6bf4bbed20 target/riscv: support for 128-bit shift instructions adds 7fd40f8679 target/riscv: support for 128-bit arithmetic instructions adds b3a5d1fbeb target/riscv: support for 128-bit M extension adds 2c64ab66c1 target/riscv: adding high part of some csrs adds 961738ffea target/riscv: helper functions to wrap calls to 128-bit csr insns adds 7934fdeee7 target/riscv: modification of the trans_csrxx for 128-bit support adds 457c360f9c target/riscv: actual functions to realize crs 128-bit insns adds ea7b5d5af6 target/riscv: Set the opcode in DisasContext adds 86d0c45739 target/riscv: Fixup setting GVA adds 48eaeb56de target/riscv: Implement the stval/mtval illegal instruction adds afe3326258 Merge tag 'pull-riscv-to-apply-20220108' of github.com:alist [...] adds 73d72229fc bsd-user/mips*: Remove mips support adds aa3a242830 bsd-user/freebsd: Create common target_os_ucontext.h file adds 19bf129f82 bsd-user: create a per-arch signal.c file adds 4dca396631 bsd-user/i386/target_arch_signal.h: Remove target_sigcontext adds c504713f34 bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h adds 679041b1ef bsd-user/i386/target_arch_signal.h: Update mcontext_t to mat [...] adds f7d5ed6184 bsd-user/i386: Move the inlines into signal.c adds fc1fc2c78e bsd-user/x86_64/target_arch_signal.h: Remove target_sigcontext adds c104b7505b bsd-user/x86_64/target_arch_signal.h: use new target_os_ucontext.h adds 164f94bc30 bsd-user/x86_64/target_arch_signal.h: Fill in mcontext_t adds 1b4e358a61 bsd-user/x86_64: Move functions into signal.c adds 108fffe536 bsd-user/target_os_signal.h: Move signal prototypes to targe [...] adds c186aa67de bsd-user/arm/target_arch_sysarch.h: Use consistent include guards adds 559d09a6cd bsd-user/arm/target_syscall.h: Add copyright and update name adds 8c98705bb9 bsd-user/arm/target_arch_cpu.c: Target specific TLS routines adds ca5d32a3f3 bsd-user/arm/target_arch_cpu.h: CPU Loop definitions adds e17d4c9a37 bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs adds 06efe3bfce bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implem [...] adds 70985aec1c bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions adds ef1412bd84 bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions adds 8d450c9a30 bsd-user/arm/target_arch_cpu.h: Implement system call dispatch adds bcacf30808 bsd-user/arm/target_arch_reg.h: Implement core dump register [...] adds dacfdf3ba4 bsd-user/arm/target_arch_vmparam.h: Parameters for arm addre [...] adds eacb50b8d9 bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm adds f10521cc22 bsd-user/arm/target_arch_thread.h: Routines to create and sw [...] adds 082e65314b bsd-user/arm/target_arch_elf.h: arm defines for ELF adds 6c5d60fa78 bsd-user/arm/target_arch_elf.h: arm get hwcap adds 883d19ccf9 bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl adds 156d75579f bsd-user/arm/target_arch_signal.h: arm specific signal regis [...] adds 03fd4028f1 bsd-user/arm/target_arch_signal.h: arm machine context and t [...] adds 2cb1e6432f bsd-user/arm/target_arch_signal.h: Define size of *context_t adds 781be8666c bsd-user/arm/signal.c: arm set_sigtramp_args adds 38ce1471c9 bsd-user/arm/signal.c: arm get_mcontext adds d6d4509a9f bsd-user/arm/signal.c: arm set_mcontext adds 3ac34cc985 bsd-user/arm/signal.c: arm get_ucontext_sigreturn adds ca4fc704a4 bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE adds 18fe5d99f2 bsd-user: add arm target build adds df722e33d5 Merge tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/q [...] adds 214bdf8e71 hw: m68k: Add virt compat machine type for 7.0 adds 0969e00b39 q800: fix segfault with invalid MacROM adds 4e136629f0 macfb: fix VRAM dirty memory region logging adds 31144eb639 target/m68k: don't word align SP in stack frame if M68K_FEAT [...] adds de3f5223fa Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-7 [...] adds 847e9bc974 Revert "virtio-pci: add support for configure interrupt" adds 99478e5941 Revert "virtio-mmio: add support for configure interrupt" adds b3ef6664b7 Revert "virtio-net: add support for configure interrupt" adds a86d1a0a93 Revert "vhost: add support for configure interrupt" adds 81c3ebc32f Revert "virtio: add support for configure interrupt" adds 73bd56abe1 Revert "vhost-vdpa: add support for config interrupt" adds 98b34e030e Revert "vhost: introduce new VhostOps vhost_set_config_call" adds 38ce405198 Revert "virtio-pci: decouple the single vector from the inte [...] adds a20fa00ce1 Revert "virtio-pci: decouple notifier from interrupt process" adds a882b57123 Revert "virtio: introduce macro IRTIO_CONFIG_IRQ_IDX" adds bf99e0ec9a Merge remote-tracking branch 'remotes/mst/tags/for_upstream' [...] adds 6947feca58 hw/sd/sdcard: Rename Write Protect Group variables adds b66f73a0cb hw/sd: Add SDHC support for SD card SPI-mode adds 64c01c7da4 Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-2022 [...]
No new revisions were added by this update.
Summary of changes: MAINTAINERS | 8 + accel/tcg/cputlb.c | 30 +- accel/tcg/ldst_common.c.inc | 8 +- accel/tcg/user-exec.c | 8 +- bsd-user/arm/signal.c | 196 ++++++ bsd-user/arm/target_arch.h | 28 + bsd-user/arm/target_arch_cpu.c | 39 ++ bsd-user/arm/target_arch_cpu.h | 211 ++++++ bsd-user/arm/target_arch_elf.h | 128 ++++ bsd-user/arm/target_arch_reg.h | 60 ++ bsd-user/arm/target_arch_signal.h | 88 +++ bsd-user/arm/target_arch_sigtramp.h | 49 ++ bsd-user/arm/target_arch_sysarch.h | 6 +- bsd-user/arm/target_arch_thread.h | 82 +++ bsd-user/arm/target_arch_vmparam.h | 48 ++ bsd-user/arm/target_syscall.h | 27 +- bsd-user/freebsd/target_os_signal.h | 3 - bsd-user/freebsd/target_os_ucontext.h | 44 ++ bsd-user/i386/signal.c | 55 ++ bsd-user/i386/target_arch_signal.h | 95 ++- bsd-user/mips/target_arch_sysarch.h | 69 -- bsd-user/mips/target_syscall.h | 52 -- bsd-user/mips64/target_arch_sysarch.h | 69 -- bsd-user/mips64/target_syscall.h | 53 -- bsd-user/x86_64/{target_arch_signal.h => signal.c} | 47 +- bsd-user/x86_64/target_arch_signal.h | 103 +-- chardev/char-socket.c | 17 +- configs/targets/arm-bsd-user.mak | 2 + disas/riscv.c | 5 + docs/interop/index.rst | 1 + .../virtio-balloon-stats.rst} | 58 +- hw/acpi/core.c | 4 +- hw/acpi/pcihp.c | 12 +- hw/arm/aspeed_ast2600.c | 8 + hw/arm/npcm7xx_boards.c | 27 + hw/arm/virt-acpi-build.c | 1 + hw/arm/virt.c | 2 +- hw/block/vhost-user-blk.c | 5 +- hw/display/macfb.c | 2 +- hw/dma/sifive_pdma.c | 181 +++++- hw/i386/acpi-build.c | 9 + hw/i386/intel_iommu.c | 38 +- hw/i386/pc.c | 38 +- hw/i386/pc_piix.c | 2 +- hw/i386/pc_q35.c | 2 +- hw/intc/arm_gicv3_its.c | 234 +++---- hw/intc/gicv3_internal.h | 40 +- hw/intc/sifive_plic.c | 254 +++----- hw/m68k/q800.c | 5 +- hw/m68k/virt.c | 9 +- hw/pci/pci.c | 9 +- hw/pci/pci_host.c | 6 +- hw/pci/pcie_aer.c | 4 +- hw/pci/trace-events | 8 +- hw/riscv/microchip_pfsoc.c | 2 +- hw/riscv/opentitan.c | 2 +- hw/riscv/sifive_e.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/scsi/vhost-scsi.c | 15 +- hw/sd/sd.c | 52 +- hw/smbios/smbios.c | 8 +- hw/virtio/vhost-backend.c | 4 +- hw/virtio/vhost-user.c | 401 +++++++----- hw/virtio/vhost-vdpa.c | 37 +- hw/virtio/vhost-vsock.c | 11 +- hw/virtio/vhost.c | 98 ++- hw/virtio/virtio-mem.c | 105 ++- hw/virtio/virtio.c | 1 + include/disas/dis-asm.h | 1 + include/exec/memop.h | 15 +- include/hw/arm/aspeed_soc.h | 2 + include/hw/firmware/smbios.h | 10 +- include/hw/i386/pc.h | 4 + include/hw/intc/arm_gicv3_its_common.h | 9 +- include/hw/pci/pci.h | 5 + include/hw/riscv/virt.h | 2 +- include/hw/virtio/virtio-mem.h | 12 + include/qemu/int128.h | 27 + include/qemu/osdep.h | 7 + include/standard-headers/linux/virtio_mem.h | 9 +- include/tcg/tcg-op.h | 4 +- meson.build | 2 +- pc-bios/opensbi-riscv32-generic-fw_dynamic.bin | Bin 78680 -> 108504 bytes pc-bios/opensbi-riscv32-generic-fw_dynamic.elf | Bin 727464 -> 838904 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.bin | Bin 75096 -> 105296 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.elf | Bin 781264 -> 934696 bytes qapi/machine.json | 12 + roms/opensbi | 2 +- softmmu/cpus.c | 4 + target/alpha/translate.c | 32 +- target/arm/helper-a64.c | 8 +- target/arm/helper.c | 32 + target/arm/translate-a32.h | 4 +- target/arm/translate-a64.c | 8 +- target/arm/translate-neon.c | 6 +- target/arm/translate-sve.c | 10 +- target/arm/translate-vfp.c | 8 +- target/arm/translate.c | 2 +- target/cris/translate.c | 2 +- target/hppa/translate.c | 4 +- target/i386/tcg/mem_helper.c | 2 +- target/i386/tcg/translate.c | 36 +- target/m68k/op_helper.c | 7 +- target/mips/tcg/micromips_translate.c.inc | 10 +- target/mips/tcg/translate.c | 58 +- target/mips/tcg/tx79_translate.c | 8 +- target/ppc/translate.c | 32 +- target/ppc/translate/fixedpoint-impl.c.inc | 22 +- target/ppc/translate/fp-impl.c.inc | 4 +- target/ppc/translate/vsx-impl.c.inc | 42 +- target/riscv/cpu.c | 34 +- target/riscv/cpu.h | 24 + target/riscv/cpu_bits.h | 3 + target/riscv/cpu_helper.c | 24 +- target/riscv/csr.c | 194 +++++- target/riscv/gdbstub.c | 5 + target/riscv/helper.h | 9 + target/riscv/insn16.decode | 27 +- target/riscv/insn32.decode | 25 + target/riscv/insn_trans/trans_rva.c.inc | 22 +- target/riscv/insn_trans/trans_rvb.c.inc | 48 +- target/riscv/insn_trans/trans_rvd.c.inc | 4 +- target/riscv/insn_trans/trans_rvh.c.inc | 4 +- target/riscv/insn_trans/trans_rvi.c.inc | 716 ++++++++++++++++++--- target/riscv/insn_trans/trans_rvm.c.inc | 192 +++++- target/riscv/insn_trans/trans_rvv.c.inc | 78 ++- target/riscv/m128_helper.c | 109 ++++ target/riscv/machine.c | 22 + target/riscv/meson.build | 1 + target/riscv/op_helper.c | 47 +- target/riscv/translate.c | 257 +++++++- target/s390x/tcg/insn-data.def | 28 +- target/s390x/tcg/mem_helper.c | 8 +- target/s390x/tcg/translate.c | 8 +- target/s390x/tcg/translate_vx.c.inc | 18 +- target/sh4/translate.c | 12 +- target/sparc/translate.c | 36 +- target/tricore/translate.c | 4 +- target/xtensa/translate.c | 4 +- tcg/aarch64/tcg-target.c.inc | 2 +- tcg/arm/tcg-target.c.inc | 10 +- tcg/i386/tcg-target.c.inc | 12 +- tcg/mips/tcg-target.c.inc | 12 +- tcg/ppc/tcg-target.c.inc | 16 +- tcg/riscv/tcg-target.c.inc | 6 +- tcg/s390x/tcg-target.c.inc | 18 +- tcg/sparc/tcg-target.c.inc | 16 +- tcg/tcg.c | 4 +- tcg/tci.c | 16 +- tests/data/acpi/q35/DSDT.tis.tpm12 | Bin 8894 -> 8900 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8894 -> 8921 bytes tests/data/acpi/q35/FACP.slic | Bin 0 -> 244 bytes tests/data/acpi/q35/SLIC.slic | Bin 0 -> 36 bytes tests/qtest/bios-tables-test.c | 15 + util/int128.c | 147 +++++ util/meson.build | 1 + util/oslib-posix.c | 232 +++++-- 157 files changed, 4530 insertions(+), 1733 deletions(-) create mode 100644 bsd-user/arm/signal.c create mode 100644 bsd-user/arm/target_arch.h create mode 100644 bsd-user/arm/target_arch_cpu.c create mode 100644 bsd-user/arm/target_arch_cpu.h create mode 100644 bsd-user/arm/target_arch_elf.h create mode 100644 bsd-user/arm/target_arch_reg.h create mode 100644 bsd-user/arm/target_arch_signal.h create mode 100644 bsd-user/arm/target_arch_sigtramp.h create mode 100644 bsd-user/arm/target_arch_thread.h create mode 100644 bsd-user/arm/target_arch_vmparam.h create mode 100644 bsd-user/freebsd/target_os_ucontext.h create mode 100644 bsd-user/i386/signal.c delete mode 100644 bsd-user/mips/target_arch_sysarch.h delete mode 100644 bsd-user/mips/target_syscall.h delete mode 100644 bsd-user/mips64/target_arch_sysarch.h delete mode 100644 bsd-user/mips64/target_syscall.h copy bsd-user/x86_64/{target_arch_signal.h => signal.c} (50%) create mode 100644 configs/targets/arm-bsd-user.mak rename docs/{virtio-balloon-stats.txt => interop/virtio-balloon-stats.rst} (66%) create mode 100644 target/riscv/m128_helper.c create mode 100644 tests/data/acpi/q35/FACP.slic create mode 100644 tests/data/acpi/q35/SLIC.slic create mode 100644 util/int128.c