Tcwg-commits May 2023

tcwg-commits@lists.linaro.org

4 participants
7900 discussions

[gcc] branch releases/gcc-11 updated (0697a1a4264 -> d4cbcb9e45c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-11 in repository gcc. from 0697a1a4264 c++: non-templated friends [PR105852] new d4cbcb9e45c tree-optimization/108950 - widen-sum reduction ICE The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.dg/vect/pr108950.c | 13 +++++++++++++ gcc/tree-vect-loop.c | 19 ++++++++++++------- gcc/tree-vect-patterns.c | 4 +++- 3 files changed, 28 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/vect/pr108950.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[gcc] branch master updated (153eafaa0b7 -> c2cf2dc988e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 153eafaa0b7 genmatch: fixup get_out_file new a8302d2a466 tree-ssa-ccp, wide-int: Fix up handling of [LR]ROTATE_EXPR [...] new c2cf2dc988e testsuite: Add further testcase for already fixed PR [PR109778] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.c-torture/execute/pr109778.c | 26 ++++++++++++++++++++++++++ gcc/testsuite/gcc.dg/lto/pr109778_0.c | 22 ++++++++++++++++++++++ gcc/testsuite/gcc.dg/lto/pr109778_1.c | 7 +++++++ gcc/tree-ssa-ccp.cc | 6 ++++-- gcc/wide-int.h | 11 +++++++---- 5 files changed, 66 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr109778.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr109778_0.c create mode 100644 gcc/testsuite/gcc.dg/lto/pr109778_1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[toolchain/ci/interesting-commits] branch master updated (327d946b -> ca885b84)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch master in repository toolchain/ci/interesting-commits. from 327d946b Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] new ca885b84 Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../tcwg_gcc_check/master-arm/build_url | 2 +- .../tcwg_gcc_check/master-arm/summary.txt | 20 ++++++++++---------- .../tcwg_gcc_check/status.txt | 22 +++++++++++----------- 3 files changed, 22 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[gcc] branch master updated (af84cb1f3e1 -> 153eafaa0b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from af84cb1f3e1 aarch64: Avoid hard-coding specific register allocations new 2ed6dd975d1 genmatch: clean up emit_func new 425198bb5d2 genmatch: clean up showUsage new 153eafaa0b7 genmatch: fixup get_out_file The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/genmatch.cc | 159 ++++++++++++++++++++++++++++---------------------------- 1 file changed, 79 insertions(+), 80 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[toolchain/ci/interesting-commits] branch master updated (6747aea0 -> 327d946b)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch master in repository toolchain/ci/interesting-commits. from 6747aea0 Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] new 327d946b Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../tcwg_gcc_check/master-aarch64/build_url | 2 +- .../tcwg_gcc_check/master-aarch64/summary.txt | 26 ++++++++++---------- .../tcwg_gcc_check/status.txt | 28 +++++++++++----------- 3 files changed, 28 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[gcc] branch releases/gcc-13 updated (26803e0ee5f -> 6bc2cf17eb9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-13 in repository gcc. from 26803e0ee5f Daily bump. new 5e24077cbe7 rs6000: Fix predicate for const vector in sldoi_to_mov [PR109069] new 6bc2cf17eb9 rs6000: Guard power9-vector for vsx_scalar_cmp_exp_qp_* [PR108758] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config/rs6000/altivec.md | 14 +++- gcc/config/rs6000/predicates.md | 37 ++++++++++ gcc/config/rs6000/rs6000-builtins.def | 26 +++---- gcc/testsuite/gcc.target/powerpc/pr109069-1.c | 25 +++++++ gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c | 50 ++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr109069-2.c | 12 ++++ gcc/testsuite/gcc.target/powerpc/pr109069-2.h | 83 +++++++++++++++++++++++ 7 files changed, 231 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109069-1.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109069-2.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pr109069-2.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[binutils-gdb] branch master updated (06ba6be6299 -> 55a75aae9d9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 06ba6be6299 alpha-vms reloc sanity check new 55a75aae9d9 stack overflow in debug_write_type The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/debug.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[toolchain/ci/interesting-commits] branch master updated (edc44bcd -> 6747aea0)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch master in repository toolchain/ci/interesting-commits. from edc44bcd Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] new 6747aea0 Add entry d6654a4be3ba44c0d57be7c8a51d76d9721345e1 from https [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../tcwg_gcc_check/master-arm/build_url | 2 +- .../tcwg_gcc_check/master-arm/summary.txt | 20 ++++++++++---------- .../tcwg_gcc_check/status.txt | 22 +++++++++++----------- 3 files changed, 22 insertions(+), 22 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[gcc] branch releases/gcc-12 updated (4ea5fe97223 -> a4308f9d432)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-12 in repository gcc. from 4ea5fe97223 rs6000: Guard power9-vector for vsx_scalar_cmp_exp_qp_* [PR108758] new a4308f9d432 Fix ICE related to implicit access attributes for VLA argum [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/c-family/c-attribs.cc | 28 ++++++++++++++++------------ gcc/c-family/c-warn.cc | 2 ++ gcc/testsuite/gcc.dg/pr105660-1.c | 13 +++++++++++++ gcc/testsuite/gcc.dg/pr105660-2.c | 12 ++++++++++++ 4 files changed, 43 insertions(+), 12 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr105660-1.c create mode 100644 gcc/testsuite/gcc.dg/pr105660-2.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

[gcc] branch master updated (73f7109ffb1 -> af84cb1f3e1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 73f7109ffb1 c++: non-template friend of template [PR106740] new ba72a8d8518 ira: Don't create copies for earlyclobbered pairs new aebd8471a17 aarch64: Fix move-after-intrinsic function-body tests new 4ff89f10ca0 aarch64: Allow moves after tied-register intrinsics new 75bd358e0cc aarch64: Relax ordering requirements in SVE dup tests new 3e60e57e52f aarch64: Relax predicate register matches new 5c53d82582c aarch64: Relax FP/vector register matches new af84cb1f3e1 aarch64: Avoid hard-coding specific register allocations The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ira-conflicts.cc | 3 + gcc/testsuite/g++.target/aarch64/sve/vcond_1.C | 258 ++++++++++----------- .../aarch64/advsimd-intrinsics/bfcvtnq2-untied.c | 5 + .../aarch64/advsimd-intrinsics/bfdot-1.c | 10 + .../aarch64/advsimd-intrinsics/vdot-3-1.c | 10 + .../aarch64/advsimd-intrinsics/vshl-opt-6.c | 2 +- .../gcc.target/aarch64/asimd-mul-to-shl-sub.c | 4 +- .../gcc.target/aarch64/asm-x-constraint-1.c | 4 +- .../gcc.target/aarch64/auto-init-padding-1.c | 2 +- .../gcc.target/aarch64/auto-init-padding-2.c | 3 +- .../gcc.target/aarch64/auto-init-padding-3.c | 3 +- .../gcc.target/aarch64/auto-init-padding-4.c | 3 +- .../gcc.target/aarch64/auto-init-padding-9.c | 2 +- gcc/testsuite/gcc.target/aarch64/fmul_fcvt_2.c | 6 +- gcc/testsuite/gcc.target/aarch64/ldp_stp_17.c | 2 +- gcc/testsuite/gcc.target/aarch64/ldp_stp_21.c | 2 +- gcc/testsuite/gcc.target/aarch64/ldp_stp_8.c | 2 +- .../gcc.target/aarch64/memset-corner-cases.c | 22 +- gcc/testsuite/gcc.target/aarch64/memset-q-reg.c | 22 +- gcc/testsuite/gcc.target/aarch64/simd/vaddlv_1.c | 24 +- gcc/testsuite/gcc.target/aarch64/simd/vpaddd_f64.c | 2 +- gcc/testsuite/gcc.target/aarch64/simd/vpaddd_s64.c | 2 +- gcc/testsuite/gcc.target/aarch64/simd/vpaddd_u64.c | 2 +- .../gcc.target/aarch64/sve-neon-modes_1.c | 4 +- .../gcc.target/aarch64/sve-neon-modes_3.c | 16 +- .../gcc.target/aarch64/sve/acle/asm/adda_f16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/adda_f32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/adda_f64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/asr_wide_s16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/asr_wide_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/asr_wide_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_s64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/bic_u64.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/brka_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/brkb_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/brkn_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_bf16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clasta_f64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_bf16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/clastb_f64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/dup_s16.c | 72 ++++++ .../gcc.target/aarch64/sve/acle/asm/dup_s32.c | 60 +++++ .../gcc.target/aarch64/sve/acle/asm/dup_s64.c | 60 +++++ .../gcc.target/aarch64/sve/acle/asm/dup_u16.c | 72 ++++++ .../gcc.target/aarch64/sve/acle/asm/dup_u32.c | 60 +++++ .../gcc.target/aarch64/sve/acle/asm/dup_u64.c | 60 +++++ .../gcc.target/aarch64/sve/acle/asm/dupq_b16.c | 86 +++---- .../gcc.target/aarch64/sve/acle/asm/dupq_b32.c | 48 ++-- .../gcc.target/aarch64/sve/acle/asm/dupq_b64.c | 16 +- .../gcc.target/aarch64/sve/acle/asm/dupq_b8.c | 136 +++++------ .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_s8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsl_wide_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u16.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/lsr_wide_u8.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/pfirst_b.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b16.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b32.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b64.c | 5 + .../gcc.target/aarch64/sve/acle/asm/pnext_b8.c | 5 + .../gcc.target/aarch64/sve/acle/asm/scale_f32.c | 2 +- .../gcc.target/aarch64/sve/acle/asm/scale_f64.c | 2 +- .../aarch64/sve/acle/general/whilele_10.c | 2 +- .../aarch64/sve/acle/general/whilele_5.c | 10 +- .../aarch64/sve/acle/general/whilele_6.c | 2 +- .../aarch64/sve/acle/general/whilele_7.c | 6 +- .../aarch64/sve/acle/general/whilele_9.c | 6 +- .../aarch64/sve/acle/general/whilelt_1.c | 10 +- .../aarch64/sve/acle/general/whilelt_2.c | 2 +- .../aarch64/sve/acle/general/whilelt_3.c | 6 +- gcc/testsuite/gcc.target/aarch64/sve/adr_1.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_2.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_3.c | 24 +- gcc/testsuite/gcc.target/aarch64/sve/adr_4.c | 6 +- gcc/testsuite/gcc.target/aarch64/sve/adr_5.c | 16 +- gcc/testsuite/gcc.target/aarch64/sve/extract_1.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_3.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/extract_4.c | 4 +- .../gcc.target/aarch64/sve/load_scalar_offset_1.c | 8 +- .../gcc.target/aarch64/sve/mask_gather_load_6.c | 4 +- .../gcc.target/aarch64/sve/pcs/args_5_be_bf16.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f16.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f32.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_f64.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s16.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s32.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s64.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_s8.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u16.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u32.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u64.c | 18 +- .../gcc.target/aarch64/sve/pcs/args_5_be_u8.c | 18 +- .../gcc.target/aarch64/sve/pcs/return_6_1024.c | 48 ++-- .../gcc.target/aarch64/sve/pcs/return_6_2048.c | 48 ++-- .../gcc.target/aarch64/sve/pcs/return_6_256.c | 48 ++-- .../gcc.target/aarch64/sve/pcs/return_6_512.c | 48 ++-- .../gcc.target/aarch64/sve/pcs/return_9.c | 16 +- .../gcc.target/aarch64/sve/pcs/varargs_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/peel_ind_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pr89007-1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pr89007-2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/slp_4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/spill_3.c | 8 +- .../gcc.target/aarch64/sve/store_scalar_offset_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/vcond_18.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve/vcond_19.c | 34 +-- gcc/testsuite/gcc.target/aarch64/sve/vcond_2.c | 248 ++++++++++---------- gcc/testsuite/gcc.target/aarch64/sve/vcond_20.c | 34 +-- gcc/testsuite/gcc.target/aarch64/sve/vcond_3.c | 26 +-- gcc/testsuite/gcc.target/aarch64/sve/vcond_7.c | 198 ++++++++-------- .../gcc.target/aarch64/sve2/acle/asm/aesd_u8.c | 4 +- .../gcc.target/aarch64/sve2/acle/asm/aese_u8.c | 4 +- .../gcc.target/aarch64/sve2/acle/asm/aesimc_u8.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/aesmc_u8.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/sli_s16.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_s32.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_s64.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_s8.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_u16.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_u32.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_u64.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sli_u8.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sm4e_u32.c | 2 +- .../gcc.target/aarch64/sve2/acle/asm/sri_s16.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_s32.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_s64.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_s8.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_u16.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_u32.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_u64.c | 15 ++ .../gcc.target/aarch64/sve2/acle/asm/sri_u8.c | 15 ++ gcc/testsuite/gcc.target/aarch64/vadd_reduc-1.c | 4 +- gcc/testsuite/gcc.target/aarch64/vadd_reduc-2.c | 4 +- gcc/testsuite/gcc.target/aarch64/vfp-1.c | 4 +- 145 files changed, 1701 insertions(+), 957 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years

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Tcwg-commits May 2023