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tcwg-buildslave pushed a change to branch master
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from 2dccb01b2 Add entry 2c3db94d9fd07681f8806dae93d555779ff4dfb1 from https [...]
new b7a1ca126 Add entry 2c3db94d9fd07681f8806dae93d555779ff4dfb1 from https [...]
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Summary of changes:
.../tcwg_bmk-code_size-spec2k6/gnu-aarch64-master-O2}/build_url | 2 +-
.../{gnu-aarch64-master-O2_LTO => gnu-aarch64-master-O2}/last_good | 0
2 files changed, 1 insertion(+), 1 deletion(-)
copy gcc/sha1/{0cfc9c953d0221ec3971a25e6509ebe1041f142e/tcwg_bmk-code_size-spec2k6 [...]
copy gcc/sha1/2c3db94d9fd07681f8806dae93d555779ff4dfb1/tcwg_bmk-code_size-spec2k6/ [...]
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unknown user pushed a change to branch master
in repository gcc.
from 3dd6f73a231 RISC-V: Fix calculation of max live vregs
new c5651e9bc05 LoongArch: Fix FP vector comparsons [PR113034]
new c7eefea622e LoongArch: Use force_reg instead of gen_reg_rtx + emit_move [...]
new e61c5100914 LoongArch: Clean up vec_init expander
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Summary of changes:
gcc/config/loongarch/lasx.md | 76 ---------
gcc/config/loongarch/loongarch.cc | 114 +++----------
gcc/config/loongarch/lsx.md | 83 ----------
gcc/config/loongarch/simd.md | 118 ++++++++++++++
gcc/testsuite/gcc.target/loongarch/pr113033.c | 23 +++
.../loongarch/vector/lasx/lasx-vcond-2.c | 4 +-
.../gcc.target/loongarch/vector/lsx/lsx-vcond-2.c | 4 +-
gcc/testsuite/gcc.target/loongarch/vfcmp-d.c | 28 ++++
gcc/testsuite/gcc.target/loongarch/vfcmp-f.c | 178 +++++++++++++++++++++
gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c | 29 ++++
gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c | 27 ++++
11 files changed, 428 insertions(+), 256 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/loongarch/pr113033.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vfcmp-d.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/vfcmp-f.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/xvfcmp-d.c
create mode 100644 gcc/testsuite/gcc.target/loongarch/xvfcmp-f.c
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unknown user pushed a change to branch master
in repository gcc.
from 96e0b513717 i386: Make most MD builtins nothrow, leaf [PR112962]
new 3dd6f73a231 RISC-V: Fix calculation of max live vregs
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Summary of changes:
gcc/config/riscv/riscv-vector-costs.cc | 10 +++++-----
.../riscv/rvv/{dynamic-lmul2-7.c => dynamic-lmul4-10.c} | 6 +++---
.../riscv/rvv/{dynamic-lmul4-4.c => dynamic-lmul8-11.c} | 6 +++---
3 files changed, 11 insertions(+), 11 deletions(-)
rename gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/{dynamic-lmul2-7.c => dynamic [...]
rename gcc/testsuite/gcc.dg/vect/costmodel/riscv/rvv/{dynamic-lmul4-4.c => dynamic [...]
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unknown user pushed a change to branch master
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from be9e8de6284 lower-bitint: Fix up handling of nested casts in mergeable [...]
new 96e0b513717 i386: Make most MD builtins nothrow, leaf [PR112962]
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Summary of changes:
gcc/config/i386/i386-builtins.cc | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
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