Tcwg-commits February 2022

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (0642912e83 -> 87fdd7ac09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/binutils-gdb. from 0642912e83 gdb/python: allow Value.format_string to return styled output adds a194bde670 Automatic date update in version.in adds 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string adds 87fdd7ac09 RISC-V: Stop reporting warnings for mismatched extension versions No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 78 +++++++--------------- bfd/elfxx-x86.c | 10 +-- bfd/version.h | 2 +- binutils/stabs.c | 8 +-- gdb/dwarf2/index-cache.c | 20 +++--- ld/testsuite/ld-elf/pr24718-1.d | 4 +- ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/pr28870.d | 10 +++ ld/testsuite/ld-i386/pr28870.s | 6 ++ .../ld-riscv-elf/attr-merge-arch-failed-01.d | 11 --- .../ld-riscv-elf/attr-merge-arch-failed-01a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-01b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02.d | 27 -------- .../ld-riscv-elf/attr-merge-arch-failed-02a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02c.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02d.s | 1 - ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 9 +++ .../attr-merge-user-ext-rv32i2p1_m2p0.s | 1 + .../attr-merge-user-ext-rv32i2p1_m2p1.s | 1 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 +- 21 files changed, 76 insertions(+), 121 deletions(-) create mode 100644 ld/testsuite/ld-i386/pr28870.d create mode 100644 ld/testsuite/ld-i386/pr28870.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (ac2206605 -> 7f88c5f53)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/base-artifacts. discards ac2206605 0: update: binutils-gcc-linux-glibc-gdb: 6 new 7f88c5f53 0: update: binutils-gcc-linux-glibc-gdb: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ac2206605) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_build/master- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1540 -> 1500 bytes 02-prepare_abe/console.log.xz | Bin 2756 -> 2756 bytes 04-build_abe-binutils/console.log.xz | Bin 52444 -> 53084 bytes 05-build_abe-gcc/console.log.xz | Bin 231504 -> 229568 bytes 06-clean_sysroot/console.log.xz | Bin 316 -> 316 bytes 07-build_abe-linux/console.log.xz | Bin 8692 -> 8944 bytes 08-build_abe-glibc/console.log.xz | Bin 231376 -> 231616 bytes 09-build_abe-gdb/console.log.xz | Bin 47632 -> 47544 bytes 10-check_regression/console.log.xz | Bin 416 -> 420 bytes 11-update_baseline/console.log | 24 ++++++++++++------------ jenkins/manifest.sh | 24 ++++++++++++------------ 11 files changed, 24 insertions(+), 24 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (73f4a989b7f -> be862bf1f61)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/gcc. from 73f4a989b7f [nvptx] Fix 'main (int argc)' compilation adds 3faeba72cf9 RISC-V: Add target machine headers as a dependency for riscv-sr.o adds 5e92fddad77 doc: RISC-V: Document the `-misa-spec=' option adds 6de582dd62d RISC-V/testsuite: Run target testing over all the usual opt [...] adds decde11183b [nvptx] Choose -mptx default based on -misa adds 5750952bec1 libstdc++: Fix filesystem::remove_all for Windows [PR104161] adds 61b783995fa libstdc++: Adjust Filesystem TS test for Windows adds 34ba3d9a2bf c++: constrained auto in lambda using outer tparms [PR103706] adds db5f1c17031 c++: lambda in pack expansion using pack in constraint [PR103706] adds 7ff201d85fa c++: satisfaction value of type const bool [PR104410] adds 676e987b850 c++: deducing only from noexcept-spec [PR80951] adds 8dbb60b8dfc libstdc++: Add comment to acinclude.m4 adds 38a177fa4c2 combine: Check for paradoxical subreg. adds 1e3185e714e s390: Increase costs for load on condition and change movqi [...] adds ab1355a4804 [nvptx] Unbreak build, add PTX_ISA_SM70 adds be862bf1f61 c++: Add testcase for already fixed PR [PR104425] No new revisions were added by this update. Summary of changes: gcc/combine.cc | 1 + gcc/config/nvptx/nvptx-opts.h | 3 + gcc/config/nvptx/nvptx.cc | 133 ++++++++++++++++++--- gcc/config/nvptx/nvptx.h | 1 + gcc/config/nvptx/nvptx.md | 4 +- gcc/config/nvptx/nvptx.opt | 2 +- gcc/config/riscv/t-riscv | 2 +- gcc/config/s390/s390.cc | 2 +- gcc/config/s390/s390.md | 4 +- gcc/cp/constraint.cc | 10 +- gcc/cp/cp-tree.h | 1 + gcc/cp/pt.cc | 84 +++++++++++-- gcc/doc/install.texi | 14 +++ gcc/doc/invoke.texi | 17 +++ gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C | 14 +++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C | 11 ++ gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C | 6 + .../g++.dg/template/partial-specialization10.C | 25 ++++ gcc/testsuite/gcc.target/riscv/arch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-11.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-1.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-10.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-11.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-12.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-13.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-14.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-15.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-16.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-17.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-2.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-3.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-4.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-5.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-7.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-8.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-9.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-1.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-2.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-3.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 3 +- .../gcc.target/riscv/interrupt-conflict-mode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-debug.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-mmode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-smode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-umode.c | 2 +- gcc/testsuite/gcc.target/riscv/li.c | 2 +- gcc/testsuite/gcc.target/riscv/load-immediate.c | 3 +- gcc/testsuite/gcc.target/riscv/losum-overflow.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-6.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-7.c | 2 +- gcc/testsuite/gcc.target/riscv/pr102957.c | 2 +- gcc/testsuite/gcc.target/riscv/pr103302.c | 3 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 2 +- gcc/testsuite/gcc.target/riscv/pr84660.c | 2 +- gcc/testsuite/gcc.target/riscv/pr93202.c | 1 + gcc/testsuite/gcc.target/riscv/pr93304.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95252.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95683.c | 2 +- gcc/testsuite/gcc.target/riscv/pr98777.c | 3 +- gcc/testsuite/gcc.target/riscv/pr99702.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-1.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-10.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-11.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-12.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-13.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-15.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-16.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-3.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-4.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-5.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-6.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-7.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-8.c | 2 +- .../gcc.target/riscv/promote-type-for-libcall.c | 3 +- gcc/testsuite/gcc.target/riscv/riscv.exp | 4 +- gcc/testsuite/gcc.target/riscv/save-restore-1.c | 2 +- gcc/testsuite/gcc.target/riscv/save-restore-2.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-3.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-4.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-6.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-7.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-8.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-9.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 3 +- gcc/testsuite/gcc.target/riscv/switch-qi.c | 2 +- gcc/testsuite/gcc.target/riscv/switch-si.c | 2 +- gcc/testsuite/gcc.target/riscv/weak-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zba-adduw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-zextw.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zbbw.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bext.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-binv.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bset.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-2.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-3.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-4.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-5.c | 2 +- .../gcc.target/s390/ifcvt-two-insns-int.c | 3 +- .../gcc.target/s390/ifcvt-two-insns-long.c | 3 +- libstdc++-v3/acinclude.m4 | 2 + libstdc++-v3/src/c++17/fs_dir.cc | 14 ++- libstdc++-v3/src/c++17/fs_ops.cc | 38 ++++-- libstdc++-v3/src/filesystem/ops-common.h | 1 + .../filesystem/operations/create_directories.cc | 15 +++ 144 files changed, 540 insertions(+), 168 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization10.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (bafae5524e -> 87fdd7ac09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb. from bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string adds 87fdd7ac09 RISC-V: Stop reporting warnings for mismatched extension versions No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 78 +++++++--------------- binutils/stabs.c | 8 +-- ld/testsuite/ld-elf/pr24718-1.d | 4 +- .../ld-riscv-elf/attr-merge-arch-failed-01.d | 11 --- .../ld-riscv-elf/attr-merge-arch-failed-01a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-01b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02.d | 27 -------- .../ld-riscv-elf/attr-merge-arch-failed-02a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02c.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02d.s | 1 - ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 9 +++ .../attr-merge-user-ext-rv32i2p1_m2p0.s | 1 + .../attr-merge-user-ext-rv32i2p1_m2p1.s | 1 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 +- 15 files changed, 42 insertions(+), 106 deletions(-) delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (c40289839 -> 9812f92ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/base-artifacts. discards c40289839 0: update: binutils-gcc: 1 new 9812f92ce 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c40289839) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-arm (98 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1520 -> 1524 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 51548 -> 52992 bytes 04-build_abe-gcc/console.log.xz | Bin 228632 -> 229876 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3804 -> 3804 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2852 -> 2408 bytes 07-check_regression/console.log.xz | Bin 2592 -> 2796 bytes 07-check_regression/results.compare | 16 +- 07-check_regression/results.compare2 | 78 +- 08-update_baseline/console.log | 294 ++- 08-update_baseline/results.compare | 16 +- 08-update_baseline/results.compare2 | 78 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 2739672 -> 2740368 bytes sumfiles/g++.sum | 149 +- sumfiles/gcc.log.xz | Bin 2340912 -> 2321732 bytes sumfiles/gcc.sum | 4648 ++++++++++++++++----------------- sumfiles/gfortran.log.xz | Bin 890732 -> 888932 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2172 -> 2172 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 188004 -> 188028 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2532 -> 2532 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 442236 -> 455904 bytes sumfiles/libstdc++.sum | 10 +- 27 files changed, 2754 insertions(+), 2613 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (55ef0b702b -> 0a301624c2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/qemu. from 55ef0b702b Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/li [...] adds 63888fa78b target/arm: Fix sve_zcr_len_for_el for VHE mode running adds 7701cee545 target/arm: Tidy sve_exception_el for CPACR_EL1 access adds d5a6fa2dcf target/arm: Fix {fp, sve}_exception_el for VHE mode running adds a7b66ada6e target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_el adds c74ccb5dd6 hw/arm/xlnx-zynqmp: 'Or' the QSPI / QSPI DMA IRQs adds bddd892ef1 target/arm: make psci-conduit settable after realize adds 0c3c25fcda cpu.c: Make start-powered-off settable after realize adds 817e2db8ce hw/arm/boot: Support setting psci-conduit based on guest EL adds ae2474f118 hw/arm: imx: Don't enable PSCI conduit when booting guest in EL3 adds 49865b9014 hw/arm: allwinner: Don't enable PSCI conduit when booting gu [...] adds 50c785f2c7 hw/arm/xlnx-zcu102: Don't enable PSCI conduit when booting g [...] adds 9437a76e10 hw/arm/versal: Let boot.c handle PSCI enablement adds 52c235ad75 hw/arm/virt: Let boot.c handle PSCI enablement adds 33284d482c hw/arm: highbank: For EL3 guests, don't enable PSCI, start a [...] adds 3f37979bf5 arm: tcg: Adhere to SMCCC 1.3 section 5.2 adds 61b82973e7 hw/arm/highbank: Drop use of secure_board_setup adds dc888dd43b hw/arm/boot: Prevent setting both psci_conduit and secure_bo [...] adds d4a29ed6db hw/arm/boot: Don't write secondary boot stub if using PSCI adds 45dd668f23 hw/arm/highbank: Drop unused secondary boot stub code adds d6dc926e6e hw/arm/boot: Drop nb_cpus field from arm_boot_info adds e4b0bb8071 hw/arm/boot: Drop existing dtb /psci node rather than retaining it adds 40874a383d hw/arm: versal-virt: Always call arm_load_kernel() adds c737d86804 arm: force flag recalculation when messing with DAIF adds 77cd997161 hw/timer/armv7m_systick: Update clock source before enabling timer adds 43530095e1 hw/arm/smmuv3: Fix device reset adds b6f96009ac hw/intc/arm_gicv3_its: Use address_space_map() to access com [...] adds 4acf93e193 hw/intc/arm_gicv3_its: Keep DTEs as a struct, not a raw uint64_t adds 22d62b08ba hw/intc/arm_gicv3_its: Pass DTEntry to update_dte() adds d37cf49b11 hw/intc/arm_gicv3_its: Keep CTEs as a struct, not a raw uint64_t adds 06985cc3fe hw/intc/arm_gicv3_its: Pass CTEntry to update_cte() adds a1ce993da6 hw/intc/arm_gicv3_its: Fix address calculation in get_ite() [...] adds 2954b93fe6 hw/intc/arm_gicv3_its: Avoid nested ifs in get_ite() adds 244194fe24 hw/intc/arm_gicv3_its: Pass ITE values back from get_ite() v [...] adds 7eb54267f2 hw/intc/arm_gicv3_its: Make update_ite() use ITEntry adds da4680ce3a hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid fields adds 84d43d2e82 hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field adds 3330241407 hw/intc/arm_gicv3_its: Don't allow intid 1023 in MAPI/MAPTI adds d7d359c4ac hw/intc/arm_gicv3_its: Split error checks adds 4fd1ebb105 hw/sensor: Add lsm303dlhc magnetometer device adds 0a301624c2 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] No new revisions were added by this update. Summary of changes: cpu.c | 22 +- hw/arm/allwinner-h3.c | 9 +- hw/arm/aspeed.c | 1 - hw/arm/boot.c | 107 +++++- hw/arm/exynos4_boards.c | 1 - hw/arm/fsl-imx6ul.c | 2 - hw/arm/fsl-imx7.c | 8 +- hw/arm/highbank.c | 72 +--- hw/arm/imx25_pdk.c | 3 +- hw/arm/kzm.c | 1 - hw/arm/mcimx6ul-evk.c | 2 +- hw/arm/mcimx7d-sabre.c | 2 +- hw/arm/npcm7xx.c | 3 - hw/arm/orangepi.c | 5 +- hw/arm/raspi.c | 1 - hw/arm/realview.c | 1 - hw/arm/sabrelite.c | 1 - hw/arm/sbsa-ref.c | 1 - hw/arm/smmuv3.c | 6 + hw/arm/vexpress.c | 1 - hw/arm/virt.c | 13 +- hw/arm/xilinx_zynq.c | 1 - hw/arm/xlnx-versal-virt.c | 17 +- hw/arm/xlnx-versal.c | 5 +- hw/arm/xlnx-zcu102.c | 1 + hw/arm/xlnx-zynqmp.c | 25 +- hw/intc/arm_gicv3_its.c | 684 +++++++++++++++------------------ hw/intc/gicv3_internal.h | 23 +- hw/sensor/Kconfig | 4 + hw/sensor/lsm303dlhc_mag.c | 556 +++++++++++++++++++++++++++ hw/sensor/meson.build | 1 + hw/timer/armv7m_systick.c | 8 +- include/hw/arm/boot.h | 14 +- include/hw/arm/xlnx-versal.h | 1 - include/hw/arm/xlnx-zynqmp.h | 2 + include/hw/intc/arm_gicv3_its_common.h | 2 - target/arm/cpu.c | 6 +- target/arm/helper-a64.c | 2 + target/arm/helper.c | 118 ++++-- target/arm/psci.c | 35 +- tests/qtest/lsm303dlhc-mag-test.c | 148 +++++++ tests/qtest/meson.build | 1 + 42 files changed, 1302 insertions(+), 614 deletions(-) create mode 100644 hw/sensor/lsm303dlhc_mag.c create mode 100644 tests/qtest/lsm303dlhc-mag-test.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (30a954525f -> 481153777e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gdb. from 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string No new revisions were added by this update. Summary of changes: binutils/stabs.c | 8 ++++---- gdb/dwarf2/index-cache.c | 20 ++++++++++---------- ld/testsuite/ld-elf/pr24718-1.d | 4 ++-- 3 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (0af7ef050ae -> be862bf1f61)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc. from 0af7ef050ae libgomp: Fix segfault with posthumous orphan tasks [PR104385] adds 04b54cc486c [nvptx] Fix .local atomic regressions adds f05cc4fd6f0 [testsuite] Require c99_runtime to run builtin-sprintf.c adds 73f4a989b7f [nvptx] Fix 'main (int argc)' compilation adds 3faeba72cf9 RISC-V: Add target machine headers as a dependency for riscv-sr.o adds 5e92fddad77 doc: RISC-V: Document the `-misa-spec=' option adds 6de582dd62d RISC-V/testsuite: Run target testing over all the usual opt [...] adds decde11183b [nvptx] Choose -mptx default based on -misa adds 5750952bec1 libstdc++: Fix filesystem::remove_all for Windows [PR104161] adds 61b783995fa libstdc++: Adjust Filesystem TS test for Windows adds 34ba3d9a2bf c++: constrained auto in lambda using outer tparms [PR103706] adds db5f1c17031 c++: lambda in pack expansion using pack in constraint [PR103706] adds 7ff201d85fa c++: satisfaction value of type const bool [PR104410] adds 676e987b850 c++: deducing only from noexcept-spec [PR80951] adds 8dbb60b8dfc libstdc++: Add comment to acinclude.m4 adds 38a177fa4c2 combine: Check for paradoxical subreg. adds 1e3185e714e s390: Increase costs for load on condition and change movqi [...] adds ab1355a4804 [nvptx] Unbreak build, add PTX_ISA_SM70 adds be862bf1f61 c++: Add testcase for already fixed PR [PR104425] No new revisions were added by this update. Summary of changes: gcc/combine.cc | 1 + gcc/config/nvptx/nvptx-opts.h | 3 + gcc/config/nvptx/nvptx-protos.h | 1 + gcc/config/nvptx/nvptx.cc | 167 ++++++++++++++++++--- gcc/config/nvptx/nvptx.h | 1 + gcc/config/nvptx/nvptx.md | 67 +++++---- gcc/config/nvptx/nvptx.opt | 2 +- gcc/config/riscv/t-riscv | 2 +- gcc/config/s390/s390.cc | 2 +- gcc/config/s390/s390.md | 4 +- gcc/cp/constraint.cc | 10 +- gcc/cp/cp-tree.h | 1 + gcc/cp/pt.cc | 84 ++++++++++- gcc/doc/install.texi | 14 ++ gcc/doc/invoke.texi | 17 +++ gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C | 14 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C | 11 ++ gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C | 6 + .../g++.dg/template/partial-specialization10.C | 25 +++ gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c | 3 +- gcc/testsuite/gcc.target/nvptx/softstack-2.c | 11 ++ gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c | 18 +++ gcc/testsuite/gcc.target/riscv/arch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-11.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-1.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-10.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-11.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-12.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-13.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-14.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-15.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-16.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-17.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-2.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-3.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-4.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-5.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-7.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-8.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-9.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-1.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-2.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-3.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 3 +- .../gcc.target/riscv/interrupt-conflict-mode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-debug.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-mmode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-smode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-umode.c | 2 +- gcc/testsuite/gcc.target/riscv/li.c | 2 +- gcc/testsuite/gcc.target/riscv/load-immediate.c | 3 +- gcc/testsuite/gcc.target/riscv/losum-overflow.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-6.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-7.c | 2 +- gcc/testsuite/gcc.target/riscv/pr102957.c | 2 +- gcc/testsuite/gcc.target/riscv/pr103302.c | 3 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 2 +- gcc/testsuite/gcc.target/riscv/pr84660.c | 2 +- gcc/testsuite/gcc.target/riscv/pr93202.c | 1 + gcc/testsuite/gcc.target/riscv/pr93304.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95252.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95683.c | 2 +- gcc/testsuite/gcc.target/riscv/pr98777.c | 3 +- gcc/testsuite/gcc.target/riscv/pr99702.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-1.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-10.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-11.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-12.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-13.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-15.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-16.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-3.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-4.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-5.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-6.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-7.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-8.c | 2 +- .../gcc.target/riscv/promote-type-for-libcall.c | 3 +- gcc/testsuite/gcc.target/riscv/riscv.exp | 4 +- gcc/testsuite/gcc.target/riscv/save-restore-1.c | 2 +- gcc/testsuite/gcc.target/riscv/save-restore-2.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-3.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-4.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-6.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-7.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-8.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-9.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 3 +- gcc/testsuite/gcc.target/riscv/switch-qi.c | 2 +- gcc/testsuite/gcc.target/riscv/switch-si.c | 2 +- gcc/testsuite/gcc.target/riscv/weak-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zba-adduw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-zextw.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zbbw.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bext.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-binv.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bset.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-2.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-3.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-4.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-5.c | 2 +- .../gcc.target/s390/ifcvt-two-insns-int.c | 3 +- .../gcc.target/s390/ifcvt-two-insns-long.c | 3 +- libstdc++-v3/acinclude.m4 | 2 + libstdc++-v3/src/c++17/fs_dir.cc | 14 +- libstdc++-v3/src/c++17/fs_ops.cc | 38 +++-- libstdc++-v3/src/filesystem/ops-common.h | 1 + .../filesystem/operations/create_directories.cc | 15 ++ 148 files changed, 635 insertions(+), 203 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization10.C create mode 100644 gcc/testsuite/gcc.target/nvptx/softstack-2.c create mode 100644 gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (30a954525f -> 481153777e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/binutils-gdb. from 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string No new revisions were added by this update. Summary of changes: binutils/stabs.c | 8 ++++---- gdb/dwarf2/index-cache.c | 20 ++++++++++---------- ld/testsuite/ld-elf/pr24718-1.d | 4 ++-- 3 files changed, 16 insertions(+), 16 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (1ea8ee5c2 -> 6dd133448)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards 1ea8ee5c2 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new 6dd133448 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (1ea8ee5c2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1544 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2764 bytes 03-build_abe-binutils/console.log.xz | Bin 30392 -> 30508 bytes 04-build_abe-stage1/console.log.xz | Bin 71772 -> 70932 bytes 05-clean_sysroot/console.log.xz | Bin 328 -> 328 bytes 06-build_abe-linux/console.log.xz | Bin 9204 -> 9268 bytes 07-build_abe-glibc/console.log.xz | Bin 237100 -> 237316 bytes 08-build_abe-stage2/console.log.xz | Bin 199428 -> 198604 bytes 09-build_abe-gdb/console.log.xz | Bin 37604 -> 37232 bytes 10-build_abe-qemu/console.log.xz | Bin 31116 -> 32004 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3892 -> 3916 bytes 12-build_abe-check_gcc/console.log.xz | Bin 2940 -> 2556 bytes 13-check_regression/console.log.xz | Bin 2752 -> 62252 bytes 13-check_regression/extra-bisect-params | 1 + 13-check_regression/fails.sum | 6 + 13-check_regression/results.compare | 41 +- 13-check_regression/results.compare2 | 14109 ++++++++++++++++++++++- 13-check_regression/results.regressions | 40 + 14-update_baseline/console.log | 14453 +++++++++++++++++++++++- 14-update_baseline/extra-bisect-params | 1 + 14-update_baseline/fails.sum | 6 + 14-update_baseline/results.compare | 41 +- 14-update_baseline/results.compare2 | 14109 ++++++++++++++++++++++- 14-update_baseline/results.regressions | 40 + jenkins/manifest.sh | 22 +- sumfiles/g++.log.xz | Bin 3318492 -> 3342576 bytes sumfiles/g++.sum | 244 +- sumfiles/gcc.log.xz | Bin 2922580 -> 2855456 bytes sumfiles/gcc.sum | 17895 +++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 1008736 -> 1012680 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2292 -> 2288 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 184852 -> 184928 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2668 -> 2660 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 411080 -> 407572 bytes sumfiles/libstdc++.sum | 18 +- 39 files changed, 51505 insertions(+), 9587 deletions(-) create mode 100644 13-check_regression/extra-bisect-params create mode 100644 13-check_regression/fails.sum create mode 100644 13-check_regression/results.regressions create mode 100644 14-update_baseline/extra-bisect-params create mode 100644 14-update_baseline/fails.sum create mode 100644 14-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

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