Tcwg-commits February 2022

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (73f4a989b7f -> be862bf1f61)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/gcc. from 73f4a989b7f [nvptx] Fix 'main (int argc)' compilation adds 3faeba72cf9 RISC-V: Add target machine headers as a dependency for riscv-sr.o adds 5e92fddad77 doc: RISC-V: Document the `-misa-spec=' option adds 6de582dd62d RISC-V/testsuite: Run target testing over all the usual opt [...] adds decde11183b [nvptx] Choose -mptx default based on -misa adds 5750952bec1 libstdc++: Fix filesystem::remove_all for Windows [PR104161] adds 61b783995fa libstdc++: Adjust Filesystem TS test for Windows adds 34ba3d9a2bf c++: constrained auto in lambda using outer tparms [PR103706] adds db5f1c17031 c++: lambda in pack expansion using pack in constraint [PR103706] adds 7ff201d85fa c++: satisfaction value of type const bool [PR104410] adds 676e987b850 c++: deducing only from noexcept-spec [PR80951] adds 8dbb60b8dfc libstdc++: Add comment to acinclude.m4 adds 38a177fa4c2 combine: Check for paradoxical subreg. adds 1e3185e714e s390: Increase costs for load on condition and change movqi [...] adds ab1355a4804 [nvptx] Unbreak build, add PTX_ISA_SM70 adds be862bf1f61 c++: Add testcase for already fixed PR [PR104425] No new revisions were added by this update. Summary of changes: gcc/combine.cc | 1 + gcc/config/nvptx/nvptx-opts.h | 3 + gcc/config/nvptx/nvptx.cc | 133 ++++++++++++++++++--- gcc/config/nvptx/nvptx.h | 1 + gcc/config/nvptx/nvptx.md | 4 +- gcc/config/nvptx/nvptx.opt | 2 +- gcc/config/riscv/t-riscv | 2 +- gcc/config/s390/s390.cc | 2 +- gcc/config/s390/s390.md | 4 +- gcc/cp/constraint.cc | 10 +- gcc/cp/cp-tree.h | 1 + gcc/cp/pt.cc | 84 +++++++++++-- gcc/doc/install.texi | 14 +++ gcc/doc/invoke.texi | 17 +++ gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C | 14 +++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C | 11 ++ gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C | 6 + .../g++.dg/template/partial-specialization10.C | 25 ++++ gcc/testsuite/gcc.target/riscv/arch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-11.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-1.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-10.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-11.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-12.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-13.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-14.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-15.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-16.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-17.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-2.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-3.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-4.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-5.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-7.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-8.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-9.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-1.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-2.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-3.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 3 +- .../gcc.target/riscv/interrupt-conflict-mode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-debug.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-mmode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-smode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-umode.c | 2 +- gcc/testsuite/gcc.target/riscv/li.c | 2 +- gcc/testsuite/gcc.target/riscv/load-immediate.c | 3 +- gcc/testsuite/gcc.target/riscv/losum-overflow.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-6.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-7.c | 2 +- gcc/testsuite/gcc.target/riscv/pr102957.c | 2 +- gcc/testsuite/gcc.target/riscv/pr103302.c | 3 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 2 +- gcc/testsuite/gcc.target/riscv/pr84660.c | 2 +- gcc/testsuite/gcc.target/riscv/pr93202.c | 1 + gcc/testsuite/gcc.target/riscv/pr93304.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95252.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95683.c | 2 +- gcc/testsuite/gcc.target/riscv/pr98777.c | 3 +- gcc/testsuite/gcc.target/riscv/pr99702.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-1.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-10.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-11.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-12.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-13.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-15.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-16.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-3.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-4.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-5.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-6.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-7.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-8.c | 2 +- .../gcc.target/riscv/promote-type-for-libcall.c | 3 +- gcc/testsuite/gcc.target/riscv/riscv.exp | 4 +- gcc/testsuite/gcc.target/riscv/save-restore-1.c | 2 +- gcc/testsuite/gcc.target/riscv/save-restore-2.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-3.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-4.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-6.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-7.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-8.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-9.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 3 +- gcc/testsuite/gcc.target/riscv/switch-qi.c | 2 +- gcc/testsuite/gcc.target/riscv/switch-si.c | 2 +- gcc/testsuite/gcc.target/riscv/weak-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zba-adduw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-zextw.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zbbw.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bext.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-binv.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bset.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-2.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-3.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-4.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-5.c | 2 +- .../gcc.target/s390/ifcvt-two-insns-int.c | 3 +- .../gcc.target/s390/ifcvt-two-insns-long.c | 3 +- libstdc++-v3/acinclude.m4 | 2 + libstdc++-v3/src/c++17/fs_dir.cc | 14 ++- libstdc++-v3/src/c++17/fs_ops.cc | 38 ++++-- libstdc++-v3/src/filesystem/ops-common.h | 1 + .../filesystem/operations/create_directories.cc | 15 +++ 144 files changed, 540 insertions(+), 168 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization10.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (481153777e -> 87fdd7ac09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/binutils-gdb. from 481153777e PR28862, heap-buffer-overflow in parse_stab_string adds 87fdd7ac09 RISC-V: Stop reporting warnings for mismatched extension versions No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 78 +++++++--------------- .../ld-riscv-elf/attr-merge-arch-failed-01.d | 11 --- .../ld-riscv-elf/attr-merge-arch-failed-01a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-01b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02.d | 27 -------- .../ld-riscv-elf/attr-merge-arch-failed-02a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02c.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02d.s | 1 - ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 9 +++ .../attr-merge-user-ext-rv32i2p1_m2p0.s | 1 + .../attr-merge-user-ext-rv32i2p1_m2p1.s | 1 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 +- 13 files changed, 36 insertions(+), 100 deletions(-) delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (bcd44aebb -> e8b0a913c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/base-artifacts. discards bcd44aebb 0: update: binutils-gcc: 1 new e8b0a913c 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bcd44aebb) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1536 -> 1520 bytes 02-prepare_abe/console.log.xz | Bin 2748 -> 2772 bytes 03-build_abe-binutils/console.log.xz | Bin 37968 -> 39316 bytes 04-build_abe-gcc/console.log.xz | Bin 207244 -> 206876 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3876 -> 3820 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2848 -> 2440 bytes 07-check_regression/console.log.xz | Bin 3360 -> 3496 bytes 07-check_regression/extra-bisect-params | 2 +- 07-check_regression/fails.sum | 10 +- 07-check_regression/results.compare | 36 +- 07-check_regression/results.compare2 | 115 +- 07-check_regression/results.regressions | 36 +- 08-update_baseline/console.log | 539 ++-- 08-update_baseline/extra-bisect-params | 2 +- 08-update_baseline/fails.sum | 10 +- 08-update_baseline/results.compare | 36 +- 08-update_baseline/results.compare2 | 115 +- 08-update_baseline/results.regressions | 36 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 3472500 -> 3504924 bytes sumfiles/g++.sum | 157 +- sumfiles/gcc.log.xz | Bin 2994528 -> 2972596 bytes sumfiles/gcc.sum | 4988 +++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 1026872 -> 1022096 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2188 -> 2188 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 190100 -> 190076 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2544 -> 2540 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 429664 -> 421692 bytes sumfiles/libstdc++.sum | 12 +- 33 files changed, 3123 insertions(+), 3049 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (0642912e83 -> 87fdd7ac09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/gdb. from 0642912e83 gdb/python: allow Value.format_string to return styled output adds a194bde670 Automatic date update in version.in adds 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string adds 87fdd7ac09 RISC-V: Stop reporting warnings for mismatched extension versions No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 78 +++++++--------------- bfd/elfxx-x86.c | 10 +-- bfd/version.h | 2 +- binutils/stabs.c | 8 +-- gdb/dwarf2/index-cache.c | 20 +++--- ld/testsuite/ld-elf/pr24718-1.d | 4 +- ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/pr28870.d | 10 +++ ld/testsuite/ld-i386/pr28870.s | 6 ++ .../ld-riscv-elf/attr-merge-arch-failed-01.d | 11 --- .../ld-riscv-elf/attr-merge-arch-failed-01a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-01b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02.d | 27 -------- .../ld-riscv-elf/attr-merge-arch-failed-02a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02c.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02d.s | 1 - ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 9 +++ .../attr-merge-user-ext-rv32i2p1_m2p0.s | 1 + .../attr-merge-user-ext-rv32i2p1_m2p1.s | 1 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 +- 21 files changed, 76 insertions(+), 121 deletions(-) create mode 100644 ld/testsuite/ld-i386/pr28870.d create mode 100644 ld/testsuite/ld-i386/pr28870.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (03c9c4fce4 -> 1b0c60f95b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/glibc. from 03c9c4fce4 benchtests: Sort benches in Makefile adds 1b0c60f95b x86: Remove SSSE3 instruction for broadcast in memset.S (SSE2 Only) No new revisions were added by this update. Summary of changes: sysdeps/x86_64/memset.S | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (dfd42facf1e4 -> 555f3d7be91a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/linux. from dfd42facf1e4 Linux 5.17-rc3 adds 926fd9f23b27 ima: fix reference leak in asymmetric_verify() adds 83230351c523 integrity: check the return value of audit_log_start() adds f7333b9572d0 ima: Remove ima_policy file before directory adds bb8e52e4906f ima: Allow template selection with ima_template[_fmt]= aft [...] adds 89677197ae70 ima: Do not print policy rule with inactive LSM labels adds c8ba56b7e8f3 Merge tag 'integrity-v5.17-fix' of git://git.kernel.org/pu [...] adds 40c67c291a93 mmc: sdhci-of-esdhc: Check for error num after setting mask adds 4d315357b3d6 mmc: sh_mmcif: Check for null res pointer adds 379f56c24e69 mmc: core: Wait for command setting 'Power Off Notificatio [...] adds bd2db32e7c3e moxart: fix potential use-after-free on remove path adds 51f7ea914d79 Merge tag 'mmc-v5.17-rc1' of git://git.kernel.org/pub/scm/ [...] adds fda17afc6166 ata: libata-core: Fix ata_dev_config_cpr() adds 2ade8eef993c Merge tag 'ata-5.17-rc4' of git://git.kernel.org/pub/scm/l [...] adds 9ca8581e79e5 ksmbd: fix SMB 3.11 posix extension mount failure adds 6d896d3b44cf ksmbd: smbd: validate buffer descriptor structures adds 97550c7478a2 ksmbd: fix same UniqueId for dot and dotdot entries adds 04e260948a16 ksmbd: don't align last entry offset in smb2 query directory adds deae24b0b13f ksmbd: reduce smb direct max read/write size adds f9929ef6a2a5 ksmbd: add support for key exchange adds 555f3d7be91a Merge tag '5.17-rc3-ksmbd-server-fixes' of git://git.samba [...] No new revisions were added by this update. Summary of changes: drivers/ata/libata-core.c | 14 +++++------ drivers/mmc/core/sd.c | 8 +++++- drivers/mmc/host/moxart-mmc.c | 2 +- drivers/mmc/host/sdhci-of-esdhc.c | 8 ++++-- drivers/mmc/host/sh_mmcif.c | 3 +++ fs/Kconfig | 4 +-- fs/ksmbd/auth.c | 27 ++++++++++++++++++++ fs/ksmbd/smb2pdu.c | 45 ++++++++++++++++++++++++++-------- fs/ksmbd/smb_common.c | 5 +++- fs/ksmbd/transport_rdma.c | 2 +- fs/ksmbd/vfs.h | 1 + include/linux/ata.h | 2 +- security/integrity/digsig_asymmetric.c | 15 +++++++----- security/integrity/ima/ima_fs.c | 2 +- security/integrity/ima/ima_policy.c | 8 ++++++ security/integrity/ima/ima_template.c | 10 +++++--- security/integrity/integrity_audit.c | 2 ++ 17 files changed, 121 insertions(+), 37 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (5d2a330dee3 -> be862bf1f61)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/gcc. from 5d2a330dee3 testsuite: Fix up testsuite/gcc.c-torture/execute/builtins/ [...] adds f30e65e94d1 testsuite: avoid analyzer asm failures on non-Linux adds 9d2c0fad597 analyzer: fixes to memcpy [PR103872] adds 0c04ac0e158 analyzer: fix ICE on realloc of non-heap [PR104417] adds cc2430c122a Daily bump. adds 0103c2e4082 Don't propagate for a more expensive reg-reg move. adds a3621580973 MAINTAINERS: Remove Hartmut Penner as s390 maintainer adds 0af7ef050ae libgomp: Fix segfault with posthumous orphan tasks [PR104385] adds 04b54cc486c [nvptx] Fix .local atomic regressions adds f05cc4fd6f0 [testsuite] Require c99_runtime to run builtin-sprintf.c adds 73f4a989b7f [nvptx] Fix 'main (int argc)' compilation adds 3faeba72cf9 RISC-V: Add target machine headers as a dependency for riscv-sr.o adds 5e92fddad77 doc: RISC-V: Document the `-misa-spec=' option adds 6de582dd62d RISC-V/testsuite: Run target testing over all the usual opt [...] adds decde11183b [nvptx] Choose -mptx default based on -misa adds 5750952bec1 libstdc++: Fix filesystem::remove_all for Windows [PR104161] adds 61b783995fa libstdc++: Adjust Filesystem TS test for Windows adds 34ba3d9a2bf c++: constrained auto in lambda using outer tparms [PR103706] adds db5f1c17031 c++: lambda in pack expansion using pack in constraint [PR103706] adds 7ff201d85fa c++: satisfaction value of type const bool [PR104410] adds 676e987b850 c++: deducing only from noexcept-spec [PR80951] adds 8dbb60b8dfc libstdc++: Add comment to acinclude.m4 adds 38a177fa4c2 combine: Check for paradoxical subreg. adds 1e3185e714e s390: Increase costs for load on condition and change movqi [...] adds ab1355a4804 [nvptx] Unbreak build, add PTX_ISA_SM70 adds be862bf1f61 c++: Add testcase for already fixed PR [PR104425] No new revisions were added by this update. Summary of changes: MAINTAINERS | 1 - gcc/ChangeLog | 46 ++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 14 ++ gcc/analyzer/region-model-impl-calls.cc | 28 ++-- gcc/analyzer/sm-taint.cc | 9 -- gcc/combine.cc | 1 + gcc/config/nvptx/nvptx-opts.h | 3 + gcc/config/nvptx/nvptx-protos.h | 1 + gcc/config/nvptx/nvptx.cc | 167 ++++++++++++++++++--- gcc/config/nvptx/nvptx.h | 1 + gcc/config/nvptx/nvptx.md | 67 +++++---- gcc/config/nvptx/nvptx.opt | 2 +- gcc/config/riscv/t-riscv | 2 +- gcc/config/s390/s390.cc | 2 +- gcc/config/s390/s390.md | 4 +- gcc/cp/constraint.cc | 10 +- gcc/cp/cp-tree.h | 1 + gcc/cp/pt.cc | 84 ++++++++++- gcc/doc/install.texi | 14 ++ gcc/doc/invoke.texi | 17 +++ gcc/regcprop.cc | 17 ++- gcc/testsuite/ChangeLog | 75 +++++++++ gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C | 14 ++ gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C | 11 ++ gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C | 6 + .../g++.dg/template/partial-specialization10.C | 25 +++ gcc/testsuite/gcc.dg/analyzer/asm-x86-1.c | 2 +- gcc/testsuite/gcc.dg/analyzer/asm-x86-lp64-1.c | 2 +- gcc/testsuite/gcc.dg/analyzer/asm-x86-lp64-2.c | 2 +- gcc/testsuite/gcc.dg/analyzer/memcpy-1.c | 125 +++++++++++++++ gcc/testsuite/gcc.dg/analyzer/pr104417.c | 7 + gcc/testsuite/gcc.dg/analyzer/taint-size-1.c | 9 ++ .../asm-x86-linux-array_index_mask_nospec.c | 2 +- .../torture/asm-x86-linux-cpuid-paravirt-1.c | 2 +- .../torture/asm-x86-linux-cpuid-paravirt-2.c | 2 +- .../gcc.dg/analyzer/torture/asm-x86-linux-cpuid.c | 2 +- .../torture/asm-x86-linux-rdmsr-paravirt.c | 2 +- .../gcc.dg/analyzer/torture/asm-x86-linux-rdmsr.c | 2 +- .../asm-x86-linux-wfx_get_ps_timeout-full.c | 2 +- .../asm-x86-linux-wfx_get_ps_timeout-reduced.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf.c | 3 +- gcc/testsuite/gcc.target/i386/pr104059.c | 22 +++ gcc/testsuite/gcc.target/nvptx/softstack-2.c | 11 ++ gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c | 18 +++ gcc/testsuite/gcc.target/riscv/arch-1.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-11.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-2.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-3.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-4.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-5.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-6.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-7.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-8.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-1.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-10.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-11.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-12.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-13.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-14.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-15.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-16.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-17.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-2.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-3.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-4.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-5.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-7.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-8.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-9.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-1.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-2.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-3.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 3 +- .../gcc.target/riscv/interrupt-conflict-mode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-debug.c | 3 +- gcc/testsuite/gcc.target/riscv/interrupt-mmode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-smode.c | 2 +- gcc/testsuite/gcc.target/riscv/interrupt-umode.c | 2 +- gcc/testsuite/gcc.target/riscv/li.c | 2 +- gcc/testsuite/gcc.target/riscv/load-immediate.c | 3 +- gcc/testsuite/gcc.target/riscv/losum-overflow.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-6.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-7.c | 2 +- gcc/testsuite/gcc.target/riscv/pr102957.c | 2 +- gcc/testsuite/gcc.target/riscv/pr103302.c | 3 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 2 +- gcc/testsuite/gcc.target/riscv/pr84660.c | 2 +- gcc/testsuite/gcc.target/riscv/pr93202.c | 1 + gcc/testsuite/gcc.target/riscv/pr93304.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95252.c | 3 +- gcc/testsuite/gcc.target/riscv/pr95683.c | 2 +- gcc/testsuite/gcc.target/riscv/pr98777.c | 3 +- gcc/testsuite/gcc.target/riscv/pr99702.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-1.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-10.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-11.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-12.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-13.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-14.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-15.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-16.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-2.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-3.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-4.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-5.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-6.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-7.c | 2 +- gcc/testsuite/gcc.target/riscv/predef-8.c | 2 +- .../gcc.target/riscv/promote-type-for-libcall.c | 3 +- gcc/testsuite/gcc.target/riscv/riscv.exp | 4 +- gcc/testsuite/gcc.target/riscv/save-restore-1.c | 2 +- gcc/testsuite/gcc.target/riscv/save-restore-2.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-3.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-4.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-6.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-7.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-8.c | 3 +- gcc/testsuite/gcc.target/riscv/save-restore-9.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shift-shift-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-1.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-2.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-3.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-4.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-5.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-6.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-7.c | 3 +- gcc/testsuite/gcc.target/riscv/shorten-memrefs-8.c | 3 +- gcc/testsuite/gcc.target/riscv/switch-qi.c | 2 +- gcc/testsuite/gcc.target/riscv/switch-si.c | 2 +- gcc/testsuite/gcc.target/riscv/weak-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zba-adduw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 3 +- gcc/testsuite/gcc.target/riscv/zba-zextw.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 3 +- .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 3 +- gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- gcc/testsuite/gcc.target/riscv/zbbw.c | 2 +- gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bext.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-binv.c | 3 +- gcc/testsuite/gcc.target/riscv/zbs-bset.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-1.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-2.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-3.c | 2 +- gcc/testsuite/gcc.target/riscv/zero-extend-4.c | 3 +- gcc/testsuite/gcc.target/riscv/zero-extend-5.c | 2 +- .../gcc.target/s390/ifcvt-two-insns-int.c | 3 +- .../gcc.target/s390/ifcvt-two-insns-long.c | 3 +- libgomp/task.c | 2 + libgomp/testsuite/libgomp.c/pr104385.c | 26 ++++ libstdc++-v3/acinclude.m4 | 2 + libstdc++-v3/src/c++17/fs_dir.cc | 14 +- libstdc++-v3/src/c++17/fs_ops.cc | 38 +++-- libstdc++-v3/src/filesystem/ops-common.h | 1 + .../filesystem/operations/create_directories.cc | 15 ++ 173 files changed, 1003 insertions(+), 240 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp1z/noexcept-type25.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda18.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-lambda19.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-pr104410.C create mode 100644 gcc/testsuite/g++.dg/template/partial-specialization10.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr104417.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104059.c create mode 100644 gcc/testsuite/gcc.target/nvptx/softstack-2.c create mode 100644 gcc/testsuite/gcc.target/nvptx/uniform-simt-1.c create mode 100644 libgomp/testsuite/libgomp.c/pr104385.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (0642912e83 -> 87fdd7ac09)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/binutils-gdb. from 0642912e83 gdb/python: allow Value.format_string to return styled output adds a194bde670 Automatic date update in version.in adds 30a954525f i386: Allow GOT32 relocations against ABS symbols adds bafae5524e gdb: remove tailing newlines from index_cache_debug calls adds cb5a1d7db9 Re: elf: Check symbol version without any symbols adds 481153777e PR28862, heap-buffer-overflow in parse_stab_string adds 87fdd7ac09 RISC-V: Stop reporting warnings for mismatched extension versions No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 78 +++++++--------------- bfd/elfxx-x86.c | 10 +-- bfd/version.h | 2 +- binutils/stabs.c | 8 +-- gdb/dwarf2/index-cache.c | 20 +++--- ld/testsuite/ld-elf/pr24718-1.d | 4 +- ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/pr28870.d | 10 +++ ld/testsuite/ld-i386/pr28870.s | 6 ++ .../ld-riscv-elf/attr-merge-arch-failed-01.d | 11 --- .../ld-riscv-elf/attr-merge-arch-failed-01a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-01b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02.d | 27 -------- .../ld-riscv-elf/attr-merge-arch-failed-02a.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02b.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02c.s | 1 - .../ld-riscv-elf/attr-merge-arch-failed-02d.s | 1 - ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d | 9 +++ .../attr-merge-user-ext-rv32i2p1_m2p0.s | 1 + .../attr-merge-user-ext-rv32i2p1_m2p1.s | 1 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 +- 21 files changed, 76 insertions(+), 121 deletions(-) create mode 100644 ld/testsuite/ld-i386/pr28870.d create mode 100644 ld/testsuite/ld-i386/pr28870.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-01b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02.d delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02a.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02b.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02c.s delete mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-arch-failed-02d.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-01.d create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p0.s create mode 100644 ld/testsuite/ld-riscv-elf/attr-merge-user-ext-rv32i2p1_m2p1.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (7fbfdc278 -> cb894ee34)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards 7fbfdc278 0: update: binutils-gcc-linux-glibc-gdb: 1 new cb894ee34 0: update: binutils-gcc-linux-glibc-gdb: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7fbfdc278) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gcc/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1580 -> 1584 bytes 02-prepare_abe/console.log.xz | Bin 2764 -> 2760 bytes 03-build_abe-binutils/console.log.xz | Bin 38416 -> 38688 bytes 04-build_abe-gcc/console.log.xz | Bin 209392 -> 207976 bytes 06-build_abe-linux/console.log.xz | Bin 8556 -> 8908 bytes 07-build_abe-glibc/console.log.xz | Bin 238228 -> 238160 bytes 08-build_abe-gdb/console.log.xz | Bin 37684 -> 37804 bytes 09-build_abe-dejagnu/console.log.xz | Bin 3844 -> 3848 bytes 10-build_abe-check_gcc/console.log.xz | Bin 3376 -> 2496 bytes 11-check_regression/console.log.xz | Bin 3196 -> 3888 bytes 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/fails.sum | 8 + 11-check_regression/results.compare | 15 +- 11-check_regression/results.compare2 | 184 +- 11-check_regression/results.regressions | 15 +- 12-update_baseline/console.log | 545 ++-- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/fails.sum | 8 + 12-update_baseline/results.compare | 15 +- 12-update_baseline/results.compare2 | 184 +- 12-update_baseline/results.regressions | 15 +- jenkins/manifest.sh | 24 +- sumfiles/g++.log.xz | Bin 3621732 -> 3645616 bytes sumfiles/g++.sum | 81 +- sumfiles/gcc.log.xz | Bin 3176940 -> 3160228 bytes sumfiles/gcc.sum | 4483 ++++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 1051300 -> 1051328 bytes sumfiles/gfortran.sum | 56 +- sumfiles/libatomic.log.xz | Bin 2272 -> 2272 bytes sumfiles/libatomic.sum | 2 +- sumfiles/libgomp.log.xz | Bin 200016 -> 199832 bytes sumfiles/libgomp.sum | 6 +- sumfiles/libitm.log.xz | Bin 2672 -> 2668 bytes sumfiles/libitm.sum | 2 +- sumfiles/libstdc++.log.xz | Bin 425128 -> 428672 bytes sumfiles/libstdc++.sum | 2 +- 36 files changed, 3048 insertions(+), 2601 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (31f59af395 -> 0a301624c2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/qemu. from 31f59af395 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] adds 2a728de1ff cpuid: use unsigned for max cpuid adds 274f5e6343 hw/i386: Add the possibility to disable the 'isapc' machine adds a849522f72 tests: acpi: manually pad OEM_ID/OEM_TABLE_ID for test_oem_f [...] adds d1e4a46541 tests: acpi: whitelist nvdimm's SSDT and FACP.slic expected blobs adds 748c030f36 acpi: fix OEM ID/OEM Table ID padding adds 5adc3aba87 tests: acpi: update expected blobs adds 408ca92634 tests: acpi: test short OEM_ID/OEM_TABLE_ID values in test_o [...] adds 316ee11144 libvhost-user: Add vu_rem_mem_reg input validation adds 9f4e63491b libvhost-user: Add vu_add_mem_reg input validation adds 4fd5ca829a libvhost-user: Simplify VHOST_USER_REM_MEM_REG adds fa3d5483f0 libvhost-user: fix VHOST_USER_REM_MEM_REG not closing the fd adds b906a23c33 libvhost-user: prevent over-running max RAM slots adds 4fafedc9da libvhost-user: handle removal of identical regions adds eb99baa9b3 libvhost-user: Map shared RAM with MAP_NORESERVE to support [...] adds 922f48d37a ACPI ERST: bios-tables-test.c steps 1 and 2 adds 22874353ea ACPI ERST: PCI device_id for ERST adds fb1c8f8966 ACPI ERST: header file for ERST adds f7e26ffa59 ACPI ERST: support for ACPI ERST feature adds c9cd06ca00 ACPI ERST: build the ACPI ERST table adds 8486f12f0b ACPI ERST: create ACPI ERST table for pc/x86 machines adds bd24550e5c ACPI ERST: qtest for ERST adds 646a793cc3 ACPI ERST: bios-tables-test testcase adds a4752a51f1 ACPI ERST: step 6 of bios-tables-test.c adds dd4fc60585 util/oslib-posix: Fix missing unlock in the error path of os [...] adds 0d564a3e32 Merge remote-tracking branch 'remotes/mst/tags/for_upstream' [...] adds b1b2138753 linux-user: Remove unnecessary 'aligned' attribute from TaskState adds ca9946d734 linux-user/alpha: Fix target rlimits for alpha and rearrange [...] adds 33f53ac52a linux-user: Fix inotify on aarch64 adds d3ced2a59a linux-user: rt_sigprocmask, check read perms first adds ebce1719ac linux-user: sigprocmask check read perms first adds eb33cdaeda linux-user: Implement starttime field in self stat emulation adds b13e49bc86 linux-user: Move generic TARGET_RLIMIT* definitions to gener [...] adds 244fd08323 linux-user/syscall: Translate TARGET_RLIMIT_RTTIME adds 55ef0b702b Merge remote-tracking branch 'remotes/lvivier-gitlab/tags/li [...] adds 63888fa78b target/arm: Fix sve_zcr_len_for_el for VHE mode running adds 7701cee545 target/arm: Tidy sve_exception_el for CPACR_EL1 access adds d5a6fa2dcf target/arm: Fix {fp, sve}_exception_el for VHE mode running adds a7b66ada6e target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_el adds c74ccb5dd6 hw/arm/xlnx-zynqmp: 'Or' the QSPI / QSPI DMA IRQs adds bddd892ef1 target/arm: make psci-conduit settable after realize adds 0c3c25fcda cpu.c: Make start-powered-off settable after realize adds 817e2db8ce hw/arm/boot: Support setting psci-conduit based on guest EL adds ae2474f118 hw/arm: imx: Don't enable PSCI conduit when booting guest in EL3 adds 49865b9014 hw/arm: allwinner: Don't enable PSCI conduit when booting gu [...] adds 50c785f2c7 hw/arm/xlnx-zcu102: Don't enable PSCI conduit when booting g [...] adds 9437a76e10 hw/arm/versal: Let boot.c handle PSCI enablement adds 52c235ad75 hw/arm/virt: Let boot.c handle PSCI enablement adds 33284d482c hw/arm: highbank: For EL3 guests, don't enable PSCI, start a [...] adds 3f37979bf5 arm: tcg: Adhere to SMCCC 1.3 section 5.2 adds 61b82973e7 hw/arm/highbank: Drop use of secure_board_setup adds dc888dd43b hw/arm/boot: Prevent setting both psci_conduit and secure_bo [...] adds d4a29ed6db hw/arm/boot: Don't write secondary boot stub if using PSCI adds 45dd668f23 hw/arm/highbank: Drop unused secondary boot stub code adds d6dc926e6e hw/arm/boot: Drop nb_cpus field from arm_boot_info adds e4b0bb8071 hw/arm/boot: Drop existing dtb /psci node rather than retaining it adds 40874a383d hw/arm: versal-virt: Always call arm_load_kernel() adds c737d86804 arm: force flag recalculation when messing with DAIF adds 77cd997161 hw/timer/armv7m_systick: Update clock source before enabling timer adds 43530095e1 hw/arm/smmuv3: Fix device reset adds b6f96009ac hw/intc/arm_gicv3_its: Use address_space_map() to access com [...] adds 4acf93e193 hw/intc/arm_gicv3_its: Keep DTEs as a struct, not a raw uint64_t adds 22d62b08ba hw/intc/arm_gicv3_its: Pass DTEntry to update_dte() adds d37cf49b11 hw/intc/arm_gicv3_its: Keep CTEs as a struct, not a raw uint64_t adds 06985cc3fe hw/intc/arm_gicv3_its: Pass CTEntry to update_cte() adds a1ce993da6 hw/intc/arm_gicv3_its: Fix address calculation in get_ite() [...] adds 2954b93fe6 hw/intc/arm_gicv3_its: Avoid nested ifs in get_ite() adds 244194fe24 hw/intc/arm_gicv3_its: Pass ITE values back from get_ite() v [...] adds 7eb54267f2 hw/intc/arm_gicv3_its: Make update_ite() use ITEntry adds da4680ce3a hw/intc/arm_gicv3_its: Drop TableDesc and CmdQDesc valid fields adds 84d43d2e82 hw/intc/arm_gicv3_its: In MAPC with V=0, don't check rdbase field adds 3330241407 hw/intc/arm_gicv3_its: Don't allow intid 1023 in MAPI/MAPTI adds d7d359c4ac hw/intc/arm_gicv3_its: Split error checks adds 4fd1ebb105 hw/sensor: Add lsm303dlhc magnetometer device adds 0a301624c2 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] No new revisions were added by this update. Summary of changes: configure | 2 +- cpu.c | 22 +- hw/acpi/Kconfig | 6 + hw/acpi/aml-build.c | 4 +- hw/acpi/erst.c | 1051 ++++++++++++++++++++ hw/acpi/meson.build | 1 + hw/acpi/trace-events | 15 + hw/arm/allwinner-h3.c | 9 +- hw/arm/aspeed.c | 1 - hw/arm/boot.c | 107 +- hw/arm/exynos4_boards.c | 1 - hw/arm/fsl-imx6ul.c | 2 - hw/arm/fsl-imx7.c | 8 +- hw/arm/highbank.c | 72 +- hw/arm/imx25_pdk.c | 3 +- hw/arm/kzm.c | 1 - hw/arm/mcimx6ul-evk.c | 2 +- hw/arm/mcimx7d-sabre.c | 2 +- hw/arm/npcm7xx.c | 3 - hw/arm/orangepi.c | 5 +- hw/arm/raspi.c | 1 - hw/arm/realview.c | 1 - hw/arm/sabrelite.c | 1 - hw/arm/sbsa-ref.c | 1 - hw/arm/smmuv3.c | 6 + hw/arm/vexpress.c | 1 - hw/arm/virt.c | 13 +- hw/arm/xilinx_zynq.c | 1 - hw/arm/xlnx-versal-virt.c | 17 +- hw/arm/xlnx-versal.c | 5 +- hw/arm/xlnx-zcu102.c | 1 + hw/arm/xlnx-zynqmp.c | 25 +- hw/i386/acpi-build.c | 15 + hw/i386/acpi-microvm.c | 15 + hw/i386/pc_piix.c | 5 +- hw/intc/arm_gicv3_its.c | 684 ++++++------- hw/intc/gicv3_internal.h | 23 +- hw/sensor/Kconfig | 4 + hw/sensor/lsm303dlhc_mag.c | 556 +++++++++++ hw/sensor/meson.build | 1 + hw/timer/armv7m_systick.c | 8 +- include/hw/acpi/erst.h | 24 + include/hw/arm/boot.h | 14 +- include/hw/arm/xlnx-versal.h | 1 - include/hw/arm/xlnx-zynqmp.h | 2 + include/hw/intc/arm_gicv3_its_common.h | 2 - include/hw/pci/pci.h | 1 + linux-user/aarch64/target_resource.h | 1 + linux-user/alpha/target_resource.h | 21 + linux-user/arm/target_resource.h | 1 + linux-user/cris/target_resource.h | 1 + linux-user/fd-trans.c | 5 +- linux-user/generic/target_resource.h | 38 + linux-user/hexagon/target_resource.h | 1 + linux-user/hppa/target_resource.h | 1 + linux-user/i386/target_resource.h | 1 + linux-user/m68k/target_resource.h | 1 + linux-user/main.c | 14 + linux-user/microblaze/target_resource.h | 1 + linux-user/mips/target_resource.h | 24 + linux-user/mips64/target_resource.h | 1 + linux-user/nios2/target_resource.h | 1 + linux-user/openrisc/target_resource.h | 1 + linux-user/ppc/target_resource.h | 1 + linux-user/qemu.h | 9 +- linux-user/riscv/target_resource.h | 1 + linux-user/s390x/target_resource.h | 1 + linux-user/sh4/target_resource.h | 1 + linux-user/sparc/target_resource.h | 17 + linux-user/syscall.c | 79 +- linux-user/syscall_defs.h | 56 +- linux-user/x86_64/target_resource.h | 1 + linux-user/xtensa/target_resource.h | 1 + subprojects/libvhost-user/libvhost-user.c | 86 +- subprojects/libvhost-user/libvhost-user.h | 2 + target/arm/cpu.c | 6 +- target/arm/helper-a64.c | 2 + target/arm/helper.c | 118 ++- target/arm/psci.c | 35 +- tcg/i386/tcg-target.c.inc | 2 +- tests/data/acpi/microvm/ERST.pcie | Bin 0 -> 912 bytes .../data/acpi/pc/{DSDT.hpbridge => DSDT.acpierst} | Bin tests/data/acpi/pc/ERST.acpierst | Bin 0 -> 912 bytes tests/data/acpi/pc/SSDT.dimmpxm | Bin 734 -> 734 bytes tests/data/acpi/q35/{DSDT.ivrs => DSDT.acpierst} | Bin tests/data/acpi/q35/ERST.acpierst | Bin 0 -> 912 bytes tests/data/acpi/q35/FACP.slic | Bin 244 -> 244 bytes tests/data/acpi/q35/SSDT.dimmpxm | Bin 734 -> 734 bytes tests/data/acpi/virt/SSDT.memhp | Bin 736 -> 736 bytes tests/qtest/bios-tables-test.c | 65 +- tests/qtest/cdrom-test.c | 2 +- tests/qtest/erst-test.c | 164 +++ tests/qtest/lsm303dlhc-mag-test.c | 148 +++ tests/qtest/meson.build | 3 + util/bufferiszero.c | 2 +- util/oslib-posix.c | 1 + 96 files changed, 2898 insertions(+), 763 deletions(-) create mode 100644 hw/acpi/erst.c create mode 100644 hw/sensor/lsm303dlhc_mag.c create mode 100644 include/hw/acpi/erst.h create mode 100644 linux-user/aarch64/target_resource.h create mode 100644 linux-user/alpha/target_resource.h create mode 100644 linux-user/arm/target_resource.h create mode 100644 linux-user/cris/target_resource.h create mode 100644 linux-user/generic/target_resource.h create mode 100644 linux-user/hexagon/target_resource.h create mode 100644 linux-user/hppa/target_resource.h create mode 100644 linux-user/i386/target_resource.h create mode 100644 linux-user/m68k/target_resource.h create mode 100644 linux-user/microblaze/target_resource.h create mode 100644 linux-user/mips/target_resource.h create mode 100644 linux-user/mips64/target_resource.h create mode 100644 linux-user/nios2/target_resource.h create mode 100644 linux-user/openrisc/target_resource.h create mode 100644 linux-user/ppc/target_resource.h create mode 100644 linux-user/riscv/target_resource.h create mode 100644 linux-user/s390x/target_resource.h create mode 100644 linux-user/sh4/target_resource.h create mode 100644 linux-user/sparc/target_resource.h create mode 100644 linux-user/x86_64/target_resource.h create mode 100644 linux-user/xtensa/target_resource.h create mode 100644 tests/data/acpi/microvm/ERST.pcie copy tests/data/acpi/pc/{DSDT.hpbridge => DSDT.acpierst} (100%) create mode 100644 tests/data/acpi/pc/ERST.acpierst copy tests/data/acpi/q35/{DSDT.ivrs => DSDT.acpierst} (100%) create mode 100644 tests/data/acpi/q35/ERST.acpierst create mode 100644 tests/qtest/erst-test.c create mode 100644 tests/qtest/lsm303dlhc-mag-test.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits February 2022