Tcwg-commits January 2022

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 updated (db4cd97ba -> aeebb2fc2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-aarch64 in repository toolchain/ci/base-artifacts. discards db4cd97ba 0: update: binutils-gcc-linux-glibc-gdb: 1 new aeebb2fc2 0: update: binutils-gcc-linux-glibc-gdb: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (db4cd97ba) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_check_gcc/mas [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1548 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2732 bytes 03-build_abe-binutils/console.log.xz | Bin 38012 -> 37684 bytes 04-build_abe-gcc/console.log.xz | Bin 205832 -> 206776 bytes 05-clean_sysroot/console.log.xz | Bin 312 -> 312 bytes 06-build_abe-linux/console.log.xz | Bin 9064 -> 9096 bytes 07-build_abe-glibc/console.log.xz | Bin 236160 -> 236528 bytes 08-build_abe-gdb/console.log.xz | Bin 37368 -> 37180 bytes 09-build_abe-dejagnu/console.log.xz | Bin 3836 -> 3820 bytes 10-build_abe-check_gcc/console.log.xz | Bin 2460 -> 3052 bytes 11-check_regression/console.log.xz | Bin 3836 -> 5020 bytes 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/fails.sum | 18 +- 11-check_regression/results.compare | 44 +- 11-check_regression/results.compare2 | 410 ++- 11-check_regression/results.regressions | 44 +- 12-update_baseline/console.log | 900 ++++-- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/fails.sum | 18 +- 12-update_baseline/results.compare | 44 +- 12-update_baseline/results.compare2 | 410 ++- 12-update_baseline/results.regressions | 44 +- jenkins/manifest.sh | 20 +- sumfiles/g++.log.xz | Bin 3589516 -> 3638352 bytes sumfiles/g++.sum | 162 +- sumfiles/gcc.log.xz | Bin 3163340 -> 3160268 bytes sumfiles/gcc.sum | 5016 ++++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 1056524 -> 1046684 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2272 -> 2268 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 199016 -> 199828 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2664 -> 2672 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 420884 -> 433940 bytes sumfiles/libstdc++.sum | 15 +- 37 files changed, 4228 insertions(+), 2987 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (47fa1ad534 -> aeb0ae95b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/qemu. from 47fa1ad534 Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-7 [...] adds 95ea96e8b1 hw/arm/virt: KVM: Enable PAuth when supported by the host adds 9adfbf1b61 hw: Move MARVELL_88W8618 Kconfig from audio/ to arm/ adds 8ede0245e2 hw/arm/musicpal: Fix coding style of code related to MV88W86 [...] adds 6d81f4887f hw/net: Move MV88W8618 network device out of hw/arm/ directory adds d55c316f91 hw/arm/virt: Support CPU cluster on ARM virt machine adds 28a60a59c0 hw/arm/virt: Support cluster level in DT cpu-map adds 11b9eb1b8a hw/acpi/aml-build: Improve scalability of PPTT generation adds 291f6dd566 tests/acpi/bios-tables-test: Allow changes to virt/PPTT file adds 88d0278aa7 hw/acpi/aml-build: Support cluster level in PPTT generation adds 3cda85b203 tests/acpi/bios-table-test: Update expected virt/PPTT file adds 87f14eaa51 docs/can: convert to restructuredText adds 1263615efe virtio-mem: Correct default THP size for ARM64 adds b1b87327a9 hw/arm/virt: Support for virtio-mem-pci adds a66a24585f hw/intc/arm_gic: Implement read of GICC_IIDR adds 5e66daec9e hw/intc/arm_gic: Allow reset of the running priority adds c8f008c40f hw/arm/virt: Add a control for the the highmem PCIe MMIO adds a63618b147 hw/arm/virt: Add a control for the the highmem redistributors adds 0152b169ce hw/arm/virt: Honor highmem setting when computing the memory map adds 3715c251cc hw/arm/virt: Use the PA range to compute the memory map adds d9afe24c29 hw/arm/virt: Disable highmem devices that don't fit in the PA range adds 2dcb74e5c2 hw/arm/virt: Drop superfluous checks against highmem adds 0419e6a867 hw/arm: kudo add lm75s behind bus 1 switch at 75 adds 119df56bf0 hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model. adds 3222165dcb hw/arm/aspeed: Add the i3c device to the AST2600 SoC adds 8f809f6992 hw/intc/arm_gicv3_its: Fix event ID bounds checks adds 905720f18d hw/intc/arm_gicv3_its: Convert int ID check to num_intids co [...] adds 7d62b2dcdb hw/intc/arm_gicv3_its: Fix handling of process_its_cmd() ret [...] adds f0b4b2a28c hw/intc/arm_gicv3_its: Don't use data if reading command failed adds ef011555da hw/intc/arm_gicv3_its: Use enum for return value of process_ [...] adds 593a7cc2d3 hw/intc/arm_gicv3_its: Fix return codes in process_its_cmd() adds be0ed8fb7f hw/intc/arm_gicv3_its: Refactor process_its_cmd() to reduce nesting adds 0241f73160 hw/intc/arm_gicv3_its: Fix return codes in process_mapti() adds f667519614 hw/intc/arm_gicv3_its: Fix return codes in process_mapc() adds 00d46e72e9 hw/intc/arm_gicv3_its: Fix return codes in process_mapd() adds d050f80f8c hw/intc/arm_gicv3_its: Factor out "find address of table ent [...] adds b13148d918 hw/intc/arm_gicv3_its: Check indexes before use, not after adds 58b88779f0 hw/intc/arm_gicv3_its: Range-check ICID before indexing into [...] adds b9d383ab79 hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR adds 2c89b5af5e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 28ca4689ae hw: timer: ibex_timer: Fixup reading w/o register adds 0df470c388 riscv: opentitan: fixup plic stride len adds dda94e5c66 hw: timer: ibex_timer: update/add reg address adds b91a0fa70c update-linux-headers: Add asm-riscv/kvm.h adds 91654e613b target/riscv: Add target/riscv/kvm.c to place the public kvm [...] adds 0a312b85cb target/riscv: Implement function kvm_arch_init_vcpu adds 937f0b4512 target/riscv: Implement kvm_arch_get_registers adds 9997cc1e19 target/riscv: Implement kvm_arch_put_registers adds ad40be2708 target/riscv: Support start kernel directly by KVM adds 2b650fbbcc target/riscv: Support setting external interrupt by KVM adds 4eb471258b target/riscv: Handle KVM_EXIT_RISCV_SBI exit adds 10f1ca27e0 target/riscv: Add host cpu type adds 27abe66f31 target/riscv: Add kvm_riscv_get/put_regs_timer adds 9ad3e016ae target/riscv: Implement virtual time adjusting with vm state [...] adds 1eb9a5da31 target/riscv: Support virtual time context synchronization adds fbf43c7dbf target/riscv: enable riscv kvm accel adds cfeeeb482a softmmu/device_tree: Silence compiler warning with --enable- [...] adds 22599b795c softmmu/device_tree: Remove redundant pointer assignment adds b4a99d4027 target/riscv: rvv-1.0: Add Zve64f extension into RISC-V adds c7a26fb2f6 target/riscv: rvv-1.0: Add Zve64f support for configuration insns adds 494104093f target/riscv: rvv-1.0: Add Zve64f support for load and store insns adds aaae69942f target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns adds 13dbc826fd target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and v [...] adds 40d78c85f6 target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns adds 193fb5c9bd target/riscv: rvv-1.0: Add Zve64f support for single-width f [...] adds 235d1161d4 target/riscv: rvv-1.0: Add Zve64f support for widening type- [...] adds 68fa38970e target/riscv: rvv-1.0: Add Zve64f support for narrowing type [...] adds bfefe406b7 target/riscv: rvv-1.0: Allow Zve64f extension to be turned on adds 32e579b8c5 target/riscv: rvv-1.0: Add Zve32f extension into RISC-V adds da61f1256f target/riscv: rvv-1.0: Add Zve32f support for configuration insns adds abe2d74032 target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns adds 8527b5db72 target/riscv: rvv-1.0: Add Zve32f support for single-width f [...] adds f4dcf51cdc target/riscv: rvv-1.0: Add Zve32f support for widening type- [...] adds 6db02328a7 target/riscv: rvv-1.0: Add Zve32f support for narrowing type [...] adds 2fc1b44dd0 target/riscv: rvv-1.0: Allow Zve32f extension to be turned on adds 8d8897accb hw/riscv: spike: Allow using binary firmware as bios adds 092dc6df92 hw/riscv: Remove macros for ELF BIOS image names adds 4211fc5532 roms/opensbi: Remove ELF images adds 79f26b3b95 target/riscv: Adjust pmpcfg access with mxl adds b655dc7cd9 target/riscv: Don't save pc when exception return adds a14db52f7f target/riscv: Sign extend link reg for jal and jalr adds 40f0c2046c target/riscv: Sign extend pc for different XLEN adds 440544e1cf target/riscv: Create xl field in env adds 8c796f1a15 target/riscv: Ignore the pc bits above XLEN adds bf9e776ec1 target/riscv: Extend pc for runtime pc write adds 1191be09a9 target/riscv: Use gdb xml according to max mxlen adds 47bdec821b target/riscv: Relax debug check for pm write adds 83b519b8a4 target/riscv: Adjust csr write mask with XLEN adds 40bfa5f695 target/riscv: Create current pm fields in env adds 0cff460de9 target/riscv: Alloc tcg global for cur_pm[mask|base] adds 4302bef9e1 target/riscv: Calculate address according to XLEN adds 4208dc7e9e target/riscv: Split pm_enabled into mask and base adds d96a271a8d target/riscv: Split out the vill from vtype adds 31961cfe50 target/riscv: Adjust vsetvl according to XLEN adds eef11ce325 target/riscv: Remove VILL field in VTYPE adds 01d09525da target/riscv: Fix check range for first fault only adds d6b9d93023 target/riscv: Adjust vector address with mask adds d8c40c24fd target/riscv: Adjust scalar reg in vector with XLEN adds 5a2ae2350e target/riscv: Set default XLEN for hypervisor adds f310df58bd target/riscv: Enable uxl field write adds f297245f6a target/riscv: Relax UXL field for debugging adds 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1e4d8b31be python: pin setuptools below v60.0.0 adds 57a6b4478c python: use avocado's "new" runner adds dc6877bd2e python/aqmp: fix docstring typo adds 3bc72e3aed python/aqmp: add __del__ method to legacy interface adds 3b5bf136f5 python/aqmp: handle asyncio.TimeoutError on execute() adds 0e6bfd8b96 python/aqmp: copy type definitions from qmp adds 728dcac5e3 python/aqmp: add SocketAddrT to package root adds 6e7751dc38 python/aqmp: rename AQMPError to QMPError adds 7017f3853a python/qemu-ga-client: don't use deprecated CLI syntax in us [...] adds 26db07516f python/qmp: switch qemu-ga-client to AQMP adds 8d6cdc5118 python/qmp: switch qom tools to AQMP adds f3efd12930 python/qmp: switch qmp-shell to AQMP adds 0347c4c4cf python: move qmp utilities to python/qemu/utils adds fd9c3a6219 python: move qmp-shell under the AQMP package adds 9922125615 scripts/cpu-x86-uarch-abi: fix CLI parsing adds 0665410dcf scripts/cpu-x86-uarch-abi: switch to AQMP adds 0590860242 scripts/render-block-graph: switch to AQMP adds aeb0ae95b7 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/opensbi.yml | 2 - MAINTAINERS | 2 + docs/system/arm/cpu-features.rst | 4 - docs/system/device-emulation.rst | 1 + docs/{can.txt => system/devices/can.rst} | 92 ++--- hw/acpi/aml-build.c | 68 +++- hw/arm/Kconfig | 4 + hw/arm/aspeed_ast2600.c | 16 + hw/arm/musicpal.c | 381 +----------------- hw/arm/npcm7xx_boards.c | 10 +- hw/arm/virt-acpi-build.c | 10 +- hw/arm/virt.c | 184 ++++++++- hw/audio/Kconfig | 3 - hw/char/riscv_htif.c | 33 +- hw/intc/arm_gic.c | 11 + hw/intc/arm_gicv3_its.c | 452 ++++++++++----------- hw/intc/arm_gicv3_redist.c | 4 +- hw/intc/sifive_plic.c | 20 +- hw/misc/aspeed_i3c.c | 384 ++++++++++++++++++ hw/misc/meson.build | 1 + hw/misc/trace-events | 6 + hw/net/meson.build | 1 + hw/net/mv88w8618_eth.c | 403 +++++++++++++++++++ hw/riscv/boot.c | 16 +- hw/riscv/opentitan.c | 2 +- hw/riscv/spike.c | 45 ++- hw/riscv/virt.c | 83 ++-- hw/timer/ibex_timer.c | 25 +- hw/virtio/virtio-mem.c | 36 +- include/hw/arm/aspeed_soc.h | 3 + include/hw/arm/virt.h | 5 +- include/hw/char/riscv_htif.h | 5 +- include/hw/misc/aspeed_i3c.h | 48 +++ include/hw/net/mv88w8618_eth.h | 12 + include/hw/riscv/boot.h | 3 +- include/hw/riscv/spike.h | 1 + include/hw/timer/ibex_timer.h | 1 - linux-headers/asm-riscv/kvm.h | 128 ++++++ meson.build | 2 + pc-bios/meson.build | 2 - pc-bios/opensbi-riscv32-generic-fw_dynamic.elf | Bin 838904 -> 0 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.elf | Bin 934696 -> 0 bytes python/Makefile | 2 + python/README.rst | 2 +- python/avocado.cfg | 2 +- python/qemu/aqmp/__init__.py | 16 +- python/qemu/aqmp/error.py | 12 +- python/qemu/aqmp/events.py | 4 +- python/qemu/aqmp/legacy.py | 41 +- python/qemu/aqmp/protocol.py | 24 +- python/qemu/aqmp/qmp_client.py | 16 +- python/qemu/{qmp => aqmp}/qmp_shell.py | 31 +- python/qemu/{qmp => utils}/qemu_ga_client.py | 24 +- python/qemu/{qmp => utils}/qom.py | 5 +- python/qemu/{qmp => utils}/qom_common.py | 3 +- python/qemu/{qmp => utils}/qom_fuse.py | 11 +- python/setup.cfg | 19 +- qemu-options.hx | 10 + roms/Makefile | 2 - scripts/cpu-x86-uarch-abi.py | 7 +- scripts/qmp/qemu-ga-client | 2 +- scripts/qmp/qmp-shell | 2 +- scripts/qmp/qom-fuse | 2 +- scripts/qmp/qom-get | 2 +- scripts/qmp/qom-list | 2 +- scripts/qmp/qom-set | 2 +- scripts/qmp/qom-tree | 2 +- scripts/render_block_graph.py | 8 +- softmmu/device_tree.c | 11 +- target/arm/cpu.c | 16 +- target/arm/cpu.h | 1 + target/arm/cpu64.c | 31 +- target/arm/kvm64.c | 21 + target/riscv/cpu.c | 77 +++- target/riscv/cpu.h | 58 ++- target/riscv/cpu_bits.h | 3 + target/riscv/cpu_helper.c | 99 ++--- target/riscv/csr.c | 90 ++++- target/riscv/gdbstub.c | 71 +++- target/riscv/helper.h | 4 +- target/riscv/insn_trans/trans_privileged.c.inc | 9 +- target/riscv/insn_trans/trans_rva.c.inc | 9 +- target/riscv/insn_trans/trans_rvd.c.inc | 19 +- target/riscv/insn_trans/trans_rvf.c.inc | 19 +- target/riscv/insn_trans/trans_rvi.c.inc | 39 +- target/riscv/insn_trans/trans_rvv.c.inc | 225 +++++++++-- target/{rx/cpu-param.h => riscv/kvm-stub.c} | 26 +- target/riscv/kvm.c | 535 +++++++++++++++++++++++++ target/{rx/cpu-param.h => riscv/kvm_riscv.h} | 17 +- target/riscv/machine.c | 46 ++- target/riscv/meson.build | 1 + target/riscv/op_helper.c | 7 +- target/riscv/pmp.c | 12 +- target/riscv/sbi_ecall_interface.h | 72 ++++ target/riscv/translate.c | 94 +++-- target/riscv/vector_helper.c | 39 +- tests/data/acpi/virt/PPTT | Bin 76 -> 96 bytes 97 files changed, 3180 insertions(+), 1233 deletions(-) rename docs/{can.txt => system/devices/can.rst} (68%) create mode 100644 hw/misc/aspeed_i3c.c create mode 100644 hw/net/mv88w8618_eth.c create mode 100644 include/hw/misc/aspeed_i3c.h create mode 100644 include/hw/net/mv88w8618_eth.h create mode 100644 linux-headers/asm-riscv/kvm.h delete mode 100644 pc-bios/opensbi-riscv32-generic-fw_dynamic.elf delete mode 100644 pc-bios/opensbi-riscv64-generic-fw_dynamic.elf rename python/qemu/{qmp => aqmp}/qmp_shell.py (96%) rename python/qemu/{qmp => utils}/qemu_ga_client.py (94%) rename python/qemu/{qmp => utils}/qom.py (98%) rename python/qemu/{qmp => utils}/qom_common.py (98%) rename python/qemu/{qmp => utils}/qom_fuse.py (97%) copy target/{rx/cpu-param.h => riscv/kvm-stub.c} (67%) create mode 100644 target/riscv/kvm.c copy target/{rx/cpu-param.h => riscv/kvm_riscv.h} (70%) create mode 100644 target/riscv/sbi_ecall_interface.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (2f34d7ef3d0 -> 4343f5e2567)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/gcc. from 2f34d7ef3d0 c++: add testcase for recently fixed PR [PR103631] adds 30b38394b48 c++: Add test for fixed PR [PR102338] adds cc01cd9397f c++: designator for base class member [PR101405] adds d2ad748eeef Fortran: Fix scope for OMP AFFINITY clause iterator variabl [...] adds f5a9d76be84 analyzer: add regression test [PR103685] adds c4b8f3730a8 analyzer: reject ((i + 1 > 0) && (i < 0)) for integers [PR94362] adds 5fa55d55abd Daily bump. adds 39cd3cce525 runtime: build panic32.go on amd64p32 adds 6f45deb2aed [committed] Fix expected output for various MIPS multiplica [...] adds c2d9159717b optabs: Don't create pseudos in prepare_cmp_insn when not a [...] adds eb5ee646480 Reset relations when crossing backedges. adds 3e0b19f1d67 warn-access: Fix up warning_at arguments adds 1ad72811242 tree-optimization/104152 - add missing check for SLP consta [...] adds f953c8bc5bf tree-optimization/104156 - fix unswitching compare-debug issue adds bab0f691d52 aarch64: Adjust spellcheck tests for recent quotation-mark changes adds 9d7a84b9698 [ARM] Add support for TLS register based stack protector ca [...] adds caca8eddd93 sanitizer/99673 - bad -Wstringop-overread diagnostic with asan adds 7d47aae7cd4 libstdc++: Fix constexpr constructor for atomic<shared_ptr<T>> adds 199cd0e0f87 tree-optimization/100089 - BB vectorization of if-converted [...] adds 97f81909343 Enable configure detection of ld.mold. adds 2da1ef06ff4 libstdc++: Fix condition for __cpp_lib_shared_ptr_arrays adds b8806796ec6 libstdc++: Ensure all feature test macros have type long [PR87193] adds 45cae5b6392 libstdc++: Fix typo in comment adds 23be9f83bbd c++: [[no_unique_address]] and virtual base [PR104139] adds 087e545747c Strengthen a few OpenACC test cases adds 3abcbf24323 c++: ICE with noexcept and canonical types [PR101715] adds 85419ac5972 [PR103676] LRA: Calculate and exclude some start hard regis [...] adds 886e9779581 PR middle-end/104140: bootstrap ICE on riscv. adds 518aad6a161 rs6000: Fix bootstrap adds afe91e2566f rs6000: Support vector float/double for vec_sldw adds c163647ffbc Disable -fsplit-stack support on non-glibc targets adds 847a8301add c++: class array new checking [PR104084] adds 2e01fde49ea c++: explain failing static_assert adds f36efe71bef c-family: Fix up a -Wformat regression [PR104148] adds 60953a23d57 x86: Properly disable -fsplit-stack support on non-glibc targets adds f9063d12633 Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 adds 9dd443578f3 Daily bump. adds abe3a4f0e9c Fix fold-vec-splat-floatdouble testsuite failure on power10 adds 0f4f9c0085e toplevel: Remove accedentally checked in file adds 6c1a93102b4 Fortran: fix simplification of TRANSFER for zero-sized char [...] adds 45b999f642a analyzer: fix ICE on vector casts [PR104159] adds a1fb81bda97 testsuite: guard usage of _Float16 in analyzer test [PR104150] adds 9ea451e2793 ootstrap: Fix bootstrap with --disable-plugin [PR104176] adds d43be9dcc1b Daily bump. adds 053bcc97f4a c++: constexpr and -fno-elide-constructors [PR101072] adds 9718bc4b03c c++: array temporary at file scope [PR104182] adds 603a9ab41f4 contrib: filter out one more Clang warning. adds cbcf4a50fa2 [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into inte [...] adds 2da90ad39bf c++: designated init of char array by string constant [PR55227] adds 2d8a9ad4a92 libstdc++: Fix aliasing violation in std::shared_ptr [PR104019] adds 084680db9af libstdc++: Restore support for unordered_map<const T, ...> [...] adds 416b6fc7483 libstdc++: Use fast_float for long double if it uses binary [...] adds 51631875a2f libstdc++: Fix std::spanstream move assignment [PR104032] adds 0c940703f00 Daily bump. adds 4d2321314a6 x86: Also check mode of memory broadcast in bcst_mem_operand adds 7b84fa2a2dd testsuite: Ignore pr104159 psabi warning. adds add6bb52e34 RISC-V: Update testcases info with new implement info adds 634de54f9c4 Update the type of control.base after changed adds 98416dbb0a6 RISC-V: Change default ISA version into 20191213 adds ca2bbb88f99 RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 adds c106529eb21 RISC-V: Fix testcase after bump isa spec version adds 2c31a8be4a5 properly disable -fsplit-stack on non-glibc targets [PR104170] adds 385196adb52 options: Add EnumSet and Set property support [PR104158] adds cd0377a460d options: Fix up -fsanitize-coverage= [PR104158] adds 9acd5a01175 fortran: Extend -fconvert= option for ppc64le r16_ieee and r16_ibm adds 0ebb09f5e49 options: Add EnumBitSet property support [PR104158] adds 2755037e40a acinclude.m4: Remove duplicite AC_DEFUN. adds f1af8528d34 tree-optimization/102131 - fix niter analysis wrt overflow adds 978abe918f8 gcc-changelog: Be stricter for top-level dir. adds 2a908f3da07 c++: value category of compound object expr [PR104173] adds b1aa2a3cf1b c++: Fix non-portable default argument of make_auto_1 [PR104197] adds 4343f5e2567 rtl: builtins: (not just) rs6000: Add builtins for fegetrou [...] No new revisions were added by this update. Summary of changes: ChangeLog | 9 + build.log | 0 contrib/ChangeLog | 5 + contrib/filter-clang-warnings.py | 3 +- contrib/gcc-changelog/git_commit.py | 12 +- contrib/gcc-changelog/test_email.py | 5 + contrib/gcc-changelog/test_patches.txt | 82 ++++++ gcc/ChangeLog | 315 +++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 32 +++ gcc/analyzer/constraint-manager.cc | 172 ++++++++++- gcc/analyzer/constraint-manager.h | 15 +- gcc/analyzer/region-model-manager.cc | 11 + gcc/analyzer/region-model.cc | 5 +- gcc/builtins.cc | 76 +++++ gcc/c-family/ChangeLog | 12 + gcc/c-family/c-common.cc | 25 +- gcc/c-family/c-common.h | 3 +- gcc/c-family/c-format.cc | 2 +- gcc/common.opt | 6 +- gcc/common/config/i386/i386-common.cc | 17 +- gcc/common/config/riscv/riscv-common.cc | 14 +- gcc/common/config/s390/s390-common.cc | 14 +- gcc/config.gcc | 8 +- gcc/config/aarch64/aarch64-builtins.cc | 7 + gcc/config/alpha/linux.h | 25 +- gcc/config/arm/arm-opts.h | 6 + gcc/config/arm/arm-protos.h | 2 + gcc/config/arm/arm.cc | 55 ++++ gcc/config/arm/arm.md | 71 ++++- gcc/config/arm/arm.opt | 22 ++ gcc/config/fuchsia.h | 2 + gcc/config/glibc-stdint.h | 3 + gcc/config/i386/predicates.md | 2 + gcc/config/linux.h | 25 +- gcc/config/riscv/riscv-c.cc | 3 + gcc/config/rs6000/linux.h | 25 +- gcc/config/rs6000/linux64.h | 25 +- gcc/config/rs6000/rs6000-overload.def | 4 + gcc/config/rs6000/rs6000-protos.h | 1 - gcc/config/rs6000/rs6000.cc | 40 +-- gcc/config/rs6000/rs6000.md | 135 ++++++++- gcc/config/rs6000/vsx.md | 12 +- gcc/configure | 18 ++ gcc/configure.ac | 16 ++ gcc/cp/ChangeLog | 83 ++++++ gcc/cp/call.cc | 32 ++- gcc/cp/class.cc | 4 +- gcc/cp/cp-gimplify.cc | 6 +- gcc/cp/cp-tree.h | 1 + gcc/cp/decl.cc | 49 ++-- gcc/cp/init.cc | 2 +- gcc/cp/pt.cc | 14 +- gcc/cp/semantics.cc | 42 ++- gcc/cp/tree.cc | 25 +- gcc/cp/typeck.cc | 19 +- gcc/doc/extend.texi | 8 + gcc/doc/generic.texi | 9 + gcc/doc/invoke.texi | 11 + gcc/doc/md.texi | 17 ++ gcc/doc/options.texi | 33 +++ gcc/fortran/ChangeLog | 20 ++ gcc/fortran/dump-parse-tree.cc | 4 +- gcc/fortran/gfortran.h | 3 + gcc/fortran/lang.opt | 18 +- gcc/fortran/openmp.cc | 6 +- gcc/fortran/simplify.cc | 13 +- gcc/fortran/trans-decl.cc | 3 + gcc/fortran/trans-openmp.cc | 2 +- gcc/fortran/trans-types.cc | 3 + gcc/gimple-range-path.cc | 48 +++- gcc/gimple-range-path.h | 3 +- gcc/gimple-ssa-warn-access.cc | 5 +- gcc/go/gofrontend/MERGE | 2 +- gcc/ira.cc | 14 +- gcc/ira.h | 7 + gcc/lra-assigns.cc | 2 +- gcc/lra-constraints.cc | 148 ++++++---- gcc/lra-int.h | 8 +- gcc/lra-remat.cc | 2 +- gcc/lra.cc | 18 +- gcc/lra.h | 2 - gcc/opt-functions.awk | 7 +- gcc/opt-read.awk | 4 + gcc/optabs.cc | 8 +- gcc/optabs.def | 4 + gcc/optc-gen.awk | 2 + gcc/opts-common.cc | 180 ++++++++++-- gcc/opts-global.cc | 6 +- gcc/opts.cc | 59 +++- gcc/opts.h | 24 +- gcc/testsuite/ChangeLog | 221 +++++++++++++++ gcc/testsuite/c-c++-common/Wformat-pr104148.c | 33 +++ gcc/testsuite/g++.dg/abi/no_unique_address2.C | 27 ++ gcc/testsuite/g++.dg/cpp0x/constexpr-empty14a.C | 11 + gcc/testsuite/g++.dg/cpp0x/initlist127.C | 39 +++ gcc/testsuite/g++.dg/cpp0x/noexcept72.C | 21 ++ gcc/testsuite/g++.dg/cpp0x/noexcept73.C | 13 + gcc/testsuite/g++.dg/cpp0x/ref-qual21.C | 23 ++ gcc/testsuite/g++.dg/cpp1y/noexcept2.C | 20 ++ gcc/testsuite/g++.dg/cpp2a/desig20.C | 20 ++ gcc/testsuite/g++.dg/cpp2a/desig21.C | 48 ++++ gcc/testsuite/g++.dg/init/new50.C | 9 + gcc/testsuite/g++.dg/template/explicit-args6.C | 2 + gcc/testsuite/g++.target/arm/pr103676.C | 32 +++ gcc/testsuite/gcc.dg/analyzer/pr104089.c | 2 + gcc/testsuite/gcc.dg/analyzer/pr94362-1.c | 60 ++++ gcc/testsuite/gcc.dg/analyzer/pr94362-2.c | 42 +++ gcc/testsuite/gcc.dg/analyzer/torture/pr103685.c | 33 +++ gcc/testsuite/gcc.dg/analyzer/torture/pr104159.c | 18 ++ gcc/testsuite/gcc.dg/asan/pr99673.c | 27 ++ gcc/testsuite/gcc.dg/loop-unswitch-6.c | 32 +++ gcc/testsuite/gcc.dg/pr102087_1.c | 13 + gcc/testsuite/gcc.dg/pr102478.c | 29 ++ gcc/testsuite/gcc.dg/pr103721-2.c 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gcc/testsuite/gcc.target/aarch64/spellcheck_7.c | 2 +- gcc/testsuite/gcc.target/aarch64/vsqrt-1.c | 17 ++ gcc/testsuite/gcc.target/aarch64/vsqrt-2.c | 28 ++ gcc/testsuite/gcc.target/arm/stack-protector-7.c | 12 + gcc/testsuite/gcc.target/arm/stack-protector-8.c | 7 + gcc/testsuite/gcc.target/i386/pr104188.c | 70 +++++ gcc/testsuite/gcc.target/mips/fix-r4000-2.c | 4 +- gcc/testsuite/gcc.target/mips/fix-r4000-3.c | 6 +- gcc/testsuite/gcc.target/mips/fix-r4000-7.c | 4 +- gcc/testsuite/gcc.target/mips/fix-r4000-8.c | 6 +- .../builtin-feclearexcept-feraiseexcept-1.c | 76 +++++ .../builtin-feclearexcept-feraiseexcept-2.c | 91 ++++++ .../gcc.target/powerpc/builtin-fegetround.c | 36 +++ gcc/testsuite/gcc.target/powerpc/builtins-4.c | 34 ++- .../powerpc/fold-vec-splat-floatdouble.c | 5 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-19.c | 2 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 11 + .../gfortran.dg/gomp/affinity-clause-3.f90 | 2 +- gcc/testsuite/gfortran.dg/gomp/pr102621.f90 | 12 + gcc/testsuite/gfortran.dg/gomp/pr103695.f90 | 18 ++ gcc/testsuite/gfortran.dg/transfer_simplify_11.f90 | 2 +- gcc/testsuite/gfortran.dg/transfer_simplify_13.f90 | 34 +++ gcc/tree-ssa-loop-niter.cc | 49 +++- gcc/tree-ssa-loop-unswitch.cc | 50 ++-- gcc/tree-ssa-math-opts.cc | 4 + gcc/tree-ssa-threadbackward.cc | 4 + gcc/tree-vect-slp.cc | 20 +- gcc/tree.def | 14 +- gcc/value-relation.cc | 4 +- gcc/value-relation.h | 1 + libatomic/acinclude.m4 | 102 ------- libatomic/configure | 6 +- libgo/go/runtime/panic32.go | 4 +- libgomp/ChangeLog | 18 ++ .../libgomp.oacc-c-c++-common/loop-gwv-1.c | 25 +- .../libgomp.oacc-c-c++-common/loop-gwv-2.c | 34 ++- .../libgomp.oacc-c-c++-common/loop-red-gwv-1.c | 22 +- .../libgomp.oacc-c-c++-common/loop-red-v-1.c | 11 +- .../libgomp.oacc-c-c++-common/loop-red-v-2.c | 11 +- .../libgomp.oacc-c-c++-common/loop-red-w-1.c | 13 +- .../libgomp.oacc-c-c++-common/loop-red-w-2.c | 13 +- .../libgomp.oacc-c-c++-common/loop-red-wv-1.c | 19 +- .../testsuite/libgomp.oacc-c-c++-common/loop-v-1.c | 13 +- .../testsuite/libgomp.oacc-c-c++-common/loop-w-1.c | 13 +- .../libgomp.oacc-c-c++-common/loop-wv-1.c | 19 +- .../libgomp.oacc-c-c++-common/routine-gwv-1.c | 21 +- .../libgomp.oacc-c-c++-common/routine-v-1.c | 13 +- .../libgomp.oacc-c-c++-common/routine-w-1.c | 13 +- .../libgomp.oacc-c-c++-common/routine-wv-1.c | 19 +- libstdc++-v3/ChangeLog | 123 ++++++++ libstdc++-v3/include/bits/alloc_traits.h | 2 +- libstdc++-v3/include/bits/allocator.h | 2 +- libstdc++-v3/include/bits/basic_string.h | 2 +- libstdc++-v3/include/bits/chrono.h | 4 +- libstdc++-v3/include/bits/hashtable_policy.h | 11 + libstdc++-v3/include/bits/move.h | 2 +- libstdc++-v3/include/bits/node_handle.h | 2 +- libstdc++-v3/include/bits/range_access.h | 2 +- libstdc++-v3/include/bits/shared_ptr.h | 2 +- libstdc++-v3/include/bits/shared_ptr_atomic.h | 4 +- libstdc++-v3/include/bits/shared_ptr_base.h | 2 +- libstdc++-v3/include/bits/stl_algo.h | 4 +- libstdc++-v3/include/bits/stl_algobase.h | 2 +- libstdc++-v3/include/bits/stl_function.h | 2 +- libstdc++-v3/include/bits/stl_iterator.h | 2 +- libstdc++-v3/include/bits/stl_map.h | 2 +- libstdc++-v3/include/bits/stl_tree.h | 2 +- libstdc++-v3/include/bits/unique_ptr.h | 2 +- libstdc++-v3/include/bits/unordered_map.h | 2 +- libstdc++-v3/include/c_global/cmath | 2 +- libstdc++-v3/include/c_global/cstddef | 2 +- libstdc++-v3/include/std/atomic | 2 +- libstdc++-v3/include/std/complex | 2 +- libstdc++-v3/include/std/filesystem | 2 +- libstdc++-v3/include/std/functional | 4 +- libstdc++-v3/include/std/iomanip | 2 +- libstdc++-v3/include/std/mutex | 2 +- libstdc++-v3/include/std/numeric | 6 +- libstdc++-v3/include/std/spanstream | 15 +- libstdc++-v3/include/std/tuple | 4 +- libstdc++-v3/include/std/type_traits | 22 +- libstdc++-v3/include/std/version | 102 +++---- libstdc++-v3/libsupc++/new | 2 +- libstdc++-v3/src/c++17/floating_from_chars.cc | 38 ++- .../20_util/shared_ptr/atomic/atomic_shared_ptr.cc | 3 + .../testsuite/20_util/shared_ptr/cons/array.cc | 2 +- .../testsuite/20_util/weak_ptr/atomic_weak_ptr.cc | 3 + .../23_containers/unordered_map/104174.cc | 4 + libstdc++-v3/testsuite/27_io/spanstream/2.cc | 113 ++++++++ 227 files changed, 4228 insertions(+), 701 deletions(-) delete mode 100644 build.log create mode 100644 gcc/testsuite/c-c++-common/Wformat-pr104148.c create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-empty14a.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist127.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept72.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept73.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/ref-qual21.C create mode 100644 gcc/testsuite/g++.dg/cpp1y/noexcept2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/desig20.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/desig21.C create mode 100644 gcc/testsuite/g++.dg/init/new50.C create mode 100644 gcc/testsuite/g++.target/arm/pr103676.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr94362-1.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr94362-2.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr103685.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr104159.c create mode 100644 gcc/testsuite/gcc.dg/asan/pr99673.c create mode 100644 gcc/testsuite/gcc.dg/loop-unswitch-6.c create mode 100644 gcc/testsuite/gcc.dg/pr102087_1.c create mode 100644 gcc/testsuite/gcc.dg/pr102478.c create mode 100644 gcc/testsuite/gcc.dg/pr103721-2.c create mode 100644 gcc/testsuite/gcc.dg/pr103721.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-1.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-2.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-3.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-4.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-5.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-6.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-7.c create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-24.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr100740.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101508.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101972.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-3.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-4.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr104152.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-7.c create mode 100644 gcc/testsuite/gcc.target/arm/stack-protector-8.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104188.c create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-fegetround.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr104140.c create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr102621.f90 create mode 100644 gcc/testsuite/gfortran.dg/gomp/pr103695.f90 create mode 100644 gcc/testsuite/gfortran.dg/transfer_simplify_13.f90 create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/104174.cc create mode 100644 libstdc++-v3/testsuite/27_io/spanstream/2.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (6d263fe46e -> 2f279a64a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 6d263fe46e Avoid bad breakpoints with --gc-sections adds df9d50bb22 Automatic date update in version.in adds 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h adds ec7194506d drop old unused stamp-h.in file adds b13d7831eb gdb/doc: fill in two missing @r adds e901223d53 Updated Serbian translation for the ld sub-directory adds ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in adds 31b0378d53 Regenerate configure files with autoconf 2.69 adds ad69b6b861 Regenerate Makefile.in files with automake 1.15.1 adds 0e3839bde6 bfd: Properly install library and header files adds 451c003d5f bfd: Partially revert commit 0e3839bde6f adds f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows new 2f279a64a2 Fix a proble building the libiberty library with gcc-12. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 16 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 508 +- bfd/configure | 42 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 --- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 152 + bfd/po/bfd.pot | 112 +- bfd/po/fr.po | 3116 ++++---- bfd/po/ro.po | 10194 ++++++++++++++++++++----- bfd/po/uk.po | 3102 ++++---- bfd/stamp-h.in | 1 - bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 21 + binutils/Makefile.in | 1 - binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 20 +- binutils/dlltool.c | 34 +- binutils/po/bg.po | 6039 +++++++++------ binutils/po/binutils.pot | 4084 +++++----- binutils/po/fr.po | 4192 +++++----- binutils/po/ro.po | 13085 +++++++++++++++++++++++++------- binutils/po/uk.po | 4202 +++++----- binutils/stamp-h.in | 1 - config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 13 + gas/Makefile.in | 1 - gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 20 +- gas/po/gas.pot | 20 +- gas/po/uk.po | 4880 ++++++------ gas/stamp-h.in | 1 - gdb/doc/python.texi | 10 +- gdb/rust-exp.h | 39 +- gdb/rust-lang.c | 44 +- gdb/ser-mingw.c | 1 + gdbsupport/gdb_regex.cc | 2 +- gold/ChangeLog | 15 + gold/po/gold.pot | 248 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 14 + gprof/configure | 20 +- gprof/po/gprof.pot | 4 +- gprof/po/ro.po | 386 +- gprof/stamp-h.in | 1 - include/ChangeLog | 4 + ld/ChangeLog | 24 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 20 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/bg.po | 4373 ++++++----- ld/po/ld.pot | 218 +- ld/po/sr.po | 4255 ++++++----- ld/po/uk.po | 3264 ++++---- ld/stamp-h.in | 1 - libctf/ChangeLog | 4 + libiberty/ChangeLog | 8 + libiberty/regex.c | 4 + opcodes/ChangeLog | 14 + opcodes/Makefile.in | 1 - opcodes/configure | 20 +- opcodes/po/de.po | 512 +- opcodes/po/opcodes.pot | 2 +- opcodes/po/ro.po | 2948 +++++-- opcodes/po/uk.po | 530 +- opcodes/stamp-h.in | 1 - 78 files changed, 45820 insertions(+), 26623 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk delete mode 100644 bfd/stamp-h.in delete mode 100644 binutils/stamp-h.in delete mode 100644 gas/stamp-h.in delete mode 100644 gprof/stamp-h.in delete mode 100644 ld/stamp-h.in delete mode 100644 opcodes/stamp-h.in -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (627651b7d -> 38873c3a4)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 627651b7d 0: update: binutils-gcc-linux-qemu: boot new 38873c3a4 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (627651b7d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1592 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2780 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 30716 -> 30368 bytes 04-build_abe-stage1/console.log.xz | Bin 71676 -> 71956 bytes 05-build_abe-qemu/console.log.xz | Bin 30048 -> 31008 bytes 06-build_linux/console.log.xz | Bin 4108 -> 3912 bytes 07-boot_linux/console.log.xz | Bin 504 -> 504 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 16 ++++++++-------- 10 files changed, 13 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (47fa1ad534 -> aeb0ae95b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig in repository toolchain/ci/qemu. from 47fa1ad534 Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-7 [...] adds 95ea96e8b1 hw/arm/virt: KVM: Enable PAuth when supported by the host adds 9adfbf1b61 hw: Move MARVELL_88W8618 Kconfig from audio/ to arm/ adds 8ede0245e2 hw/arm/musicpal: Fix coding style of code related to MV88W86 [...] adds 6d81f4887f hw/net: Move MV88W8618 network device out of hw/arm/ directory adds d55c316f91 hw/arm/virt: Support CPU cluster on ARM virt machine adds 28a60a59c0 hw/arm/virt: Support cluster level in DT cpu-map adds 11b9eb1b8a hw/acpi/aml-build: Improve scalability of PPTT generation adds 291f6dd566 tests/acpi/bios-tables-test: Allow changes to virt/PPTT file adds 88d0278aa7 hw/acpi/aml-build: Support cluster level in PPTT generation adds 3cda85b203 tests/acpi/bios-table-test: Update expected virt/PPTT file adds 87f14eaa51 docs/can: convert to restructuredText adds 1263615efe virtio-mem: Correct default THP size for ARM64 adds b1b87327a9 hw/arm/virt: Support for virtio-mem-pci adds a66a24585f hw/intc/arm_gic: Implement read of GICC_IIDR adds 5e66daec9e hw/intc/arm_gic: Allow reset of the running priority adds c8f008c40f hw/arm/virt: Add a control for the the highmem PCIe MMIO adds a63618b147 hw/arm/virt: Add a control for the the highmem redistributors adds 0152b169ce hw/arm/virt: Honor highmem setting when computing the memory map adds 3715c251cc hw/arm/virt: Use the PA range to compute the memory map adds d9afe24c29 hw/arm/virt: Disable highmem devices that don't fit in the PA range adds 2dcb74e5c2 hw/arm/virt: Drop superfluous checks against highmem adds 0419e6a867 hw/arm: kudo add lm75s behind bus 1 switch at 75 adds 119df56bf0 hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model. adds 3222165dcb hw/arm/aspeed: Add the i3c device to the AST2600 SoC adds 8f809f6992 hw/intc/arm_gicv3_its: Fix event ID bounds checks adds 905720f18d hw/intc/arm_gicv3_its: Convert int ID check to num_intids co [...] adds 7d62b2dcdb hw/intc/arm_gicv3_its: Fix handling of process_its_cmd() ret [...] adds f0b4b2a28c hw/intc/arm_gicv3_its: Don't use data if reading command failed adds ef011555da hw/intc/arm_gicv3_its: Use enum for return value of process_ [...] adds 593a7cc2d3 hw/intc/arm_gicv3_its: Fix return codes in process_its_cmd() adds be0ed8fb7f hw/intc/arm_gicv3_its: Refactor process_its_cmd() to reduce nesting adds 0241f73160 hw/intc/arm_gicv3_its: Fix return codes in process_mapti() adds f667519614 hw/intc/arm_gicv3_its: Fix return codes in process_mapc() adds 00d46e72e9 hw/intc/arm_gicv3_its: Fix return codes in process_mapd() adds d050f80f8c hw/intc/arm_gicv3_its: Factor out "find address of table ent [...] adds b13148d918 hw/intc/arm_gicv3_its: Check indexes before use, not after adds 58b88779f0 hw/intc/arm_gicv3_its: Range-check ICID before indexing into [...] adds b9d383ab79 hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR adds 2c89b5af5e Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 28ca4689ae hw: timer: ibex_timer: Fixup reading w/o register adds 0df470c388 riscv: opentitan: fixup plic stride len adds dda94e5c66 hw: timer: ibex_timer: update/add reg address adds b91a0fa70c update-linux-headers: Add asm-riscv/kvm.h adds 91654e613b target/riscv: Add target/riscv/kvm.c to place the public kvm [...] adds 0a312b85cb target/riscv: Implement function kvm_arch_init_vcpu adds 937f0b4512 target/riscv: Implement kvm_arch_get_registers adds 9997cc1e19 target/riscv: Implement kvm_arch_put_registers adds ad40be2708 target/riscv: Support start kernel directly by KVM adds 2b650fbbcc target/riscv: Support setting external interrupt by KVM adds 4eb471258b target/riscv: Handle KVM_EXIT_RISCV_SBI exit adds 10f1ca27e0 target/riscv: Add host cpu type adds 27abe66f31 target/riscv: Add kvm_riscv_get/put_regs_timer adds 9ad3e016ae target/riscv: Implement virtual time adjusting with vm state [...] adds 1eb9a5da31 target/riscv: Support virtual time context synchronization adds fbf43c7dbf target/riscv: enable riscv kvm accel adds cfeeeb482a softmmu/device_tree: Silence compiler warning with --enable- [...] adds 22599b795c softmmu/device_tree: Remove redundant pointer assignment adds b4a99d4027 target/riscv: rvv-1.0: Add Zve64f extension into RISC-V adds c7a26fb2f6 target/riscv: rvv-1.0: Add Zve64f support for configuration insns adds 494104093f target/riscv: rvv-1.0: Add Zve64f support for load and store insns adds aaae69942f target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns adds 13dbc826fd target/riscv: rvv-1.0: Add Zve64f support for vsmul.vv and v [...] adds 40d78c85f6 target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns adds 193fb5c9bd target/riscv: rvv-1.0: Add Zve64f support for single-width f [...] adds 235d1161d4 target/riscv: rvv-1.0: Add Zve64f support for widening type- [...] adds 68fa38970e target/riscv: rvv-1.0: Add Zve64f support for narrowing type [...] adds bfefe406b7 target/riscv: rvv-1.0: Allow Zve64f extension to be turned on adds 32e579b8c5 target/riscv: rvv-1.0: Add Zve32f extension into RISC-V adds da61f1256f target/riscv: rvv-1.0: Add Zve32f support for configuration insns adds abe2d74032 target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns adds 8527b5db72 target/riscv: rvv-1.0: Add Zve32f support for single-width f [...] adds f4dcf51cdc target/riscv: rvv-1.0: Add Zve32f support for widening type- [...] adds 6db02328a7 target/riscv: rvv-1.0: Add Zve32f support for narrowing type [...] adds 2fc1b44dd0 target/riscv: rvv-1.0: Allow Zve32f extension to be turned on adds 8d8897accb hw/riscv: spike: Allow using binary firmware as bios adds 092dc6df92 hw/riscv: Remove macros for ELF BIOS image names adds 4211fc5532 roms/opensbi: Remove ELF images adds 79f26b3b95 target/riscv: Adjust pmpcfg access with mxl adds b655dc7cd9 target/riscv: Don't save pc when exception return adds a14db52f7f target/riscv: Sign extend link reg for jal and jalr adds 40f0c2046c target/riscv: Sign extend pc for different XLEN adds 440544e1cf target/riscv: Create xl field in env adds 8c796f1a15 target/riscv: Ignore the pc bits above XLEN adds bf9e776ec1 target/riscv: Extend pc for runtime pc write adds 1191be09a9 target/riscv: Use gdb xml according to max mxlen adds 47bdec821b target/riscv: Relax debug check for pm write adds 83b519b8a4 target/riscv: Adjust csr write mask with XLEN adds 40bfa5f695 target/riscv: Create current pm fields in env adds 0cff460de9 target/riscv: Alloc tcg global for cur_pm[mask|base] adds 4302bef9e1 target/riscv: Calculate address according to XLEN adds 4208dc7e9e target/riscv: Split pm_enabled into mask and base adds d96a271a8d target/riscv: Split out the vill from vtype adds 31961cfe50 target/riscv: Adjust vsetvl according to XLEN adds eef11ce325 target/riscv: Remove VILL field in VTYPE adds 01d09525da target/riscv: Fix check range for first fault only adds d6b9d93023 target/riscv: Adjust vector address with mask adds d8c40c24fd target/riscv: Adjust scalar reg in vector with XLEN adds 5a2ae2350e target/riscv: Set default XLEN for hypervisor adds f310df58bd target/riscv: Enable uxl field write adds f297245f6a target/riscv: Relax UXL field for debugging adds 5e9d14f2be Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 1e4d8b31be python: pin setuptools below v60.0.0 adds 57a6b4478c python: use avocado's "new" runner adds dc6877bd2e python/aqmp: fix docstring typo adds 3bc72e3aed python/aqmp: add __del__ method to legacy interface adds 3b5bf136f5 python/aqmp: handle asyncio.TimeoutError on execute() adds 0e6bfd8b96 python/aqmp: copy type definitions from qmp adds 728dcac5e3 python/aqmp: add SocketAddrT to package root adds 6e7751dc38 python/aqmp: rename AQMPError to QMPError adds 7017f3853a python/qemu-ga-client: don't use deprecated CLI syntax in us [...] adds 26db07516f python/qmp: switch qemu-ga-client to AQMP adds 8d6cdc5118 python/qmp: switch qom tools to AQMP adds f3efd12930 python/qmp: switch qmp-shell to AQMP adds 0347c4c4cf python: move qmp utilities to python/qemu/utils adds fd9c3a6219 python: move qmp-shell under the AQMP package adds 9922125615 scripts/cpu-x86-uarch-abi: fix CLI parsing adds 0665410dcf scripts/cpu-x86-uarch-abi: switch to AQMP adds 0590860242 scripts/render-block-graph: switch to AQMP adds aeb0ae95b7 Merge remote-tracking branch 'remotes/jsnow-gitlab/tags/pyth [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/opensbi.yml | 2 - MAINTAINERS | 2 + docs/system/arm/cpu-features.rst | 4 - docs/system/device-emulation.rst | 1 + docs/{can.txt => system/devices/can.rst} | 92 ++--- hw/acpi/aml-build.c | 68 +++- hw/arm/Kconfig | 4 + hw/arm/aspeed_ast2600.c | 16 + hw/arm/musicpal.c | 381 +----------------- hw/arm/npcm7xx_boards.c | 10 +- hw/arm/virt-acpi-build.c | 10 +- hw/arm/virt.c | 184 ++++++++- hw/audio/Kconfig | 3 - hw/char/riscv_htif.c | 33 +- hw/intc/arm_gic.c | 11 + hw/intc/arm_gicv3_its.c | 452 ++++++++++----------- hw/intc/arm_gicv3_redist.c | 4 +- hw/intc/sifive_plic.c | 20 +- hw/misc/aspeed_i3c.c | 384 ++++++++++++++++++ hw/misc/meson.build | 1 + hw/misc/trace-events | 6 + hw/net/meson.build | 1 + hw/net/mv88w8618_eth.c | 403 +++++++++++++++++++ hw/riscv/boot.c | 16 +- hw/riscv/opentitan.c | 2 +- hw/riscv/spike.c | 45 ++- hw/riscv/virt.c | 83 ++-- hw/timer/ibex_timer.c | 25 +- hw/virtio/virtio-mem.c | 36 +- include/hw/arm/aspeed_soc.h | 3 + include/hw/arm/virt.h | 5 +- include/hw/char/riscv_htif.h | 5 +- include/hw/misc/aspeed_i3c.h | 48 +++ include/hw/net/mv88w8618_eth.h | 12 + include/hw/riscv/boot.h | 3 +- include/hw/riscv/spike.h | 1 + include/hw/timer/ibex_timer.h | 1 - linux-headers/asm-riscv/kvm.h | 128 ++++++ meson.build | 2 + pc-bios/meson.build | 2 - pc-bios/opensbi-riscv32-generic-fw_dynamic.elf | Bin 838904 -> 0 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.elf | Bin 934696 -> 0 bytes python/Makefile | 2 + python/README.rst | 2 +- python/avocado.cfg | 2 +- python/qemu/aqmp/__init__.py | 16 +- python/qemu/aqmp/error.py | 12 +- python/qemu/aqmp/events.py | 4 +- python/qemu/aqmp/legacy.py | 41 +- python/qemu/aqmp/protocol.py | 24 +- python/qemu/aqmp/qmp_client.py | 16 +- python/qemu/{qmp => aqmp}/qmp_shell.py | 31 +- python/qemu/{qmp => utils}/qemu_ga_client.py | 24 +- python/qemu/{qmp => utils}/qom.py | 5 +- python/qemu/{qmp => utils}/qom_common.py | 3 +- python/qemu/{qmp => utils}/qom_fuse.py | 11 +- python/setup.cfg | 19 +- qemu-options.hx | 10 + roms/Makefile | 2 - scripts/cpu-x86-uarch-abi.py | 7 +- scripts/qmp/qemu-ga-client | 2 +- scripts/qmp/qmp-shell | 2 +- scripts/qmp/qom-fuse | 2 +- scripts/qmp/qom-get | 2 +- scripts/qmp/qom-list | 2 +- scripts/qmp/qom-set | 2 +- scripts/qmp/qom-tree | 2 +- scripts/render_block_graph.py | 8 +- softmmu/device_tree.c | 11 +- target/arm/cpu.c | 16 +- target/arm/cpu.h | 1 + target/arm/cpu64.c | 31 +- target/arm/kvm64.c | 21 + target/riscv/cpu.c | 77 +++- target/riscv/cpu.h | 58 ++- target/riscv/cpu_bits.h | 3 + target/riscv/cpu_helper.c | 99 ++--- target/riscv/csr.c | 90 ++++- target/riscv/gdbstub.c | 71 +++- target/riscv/helper.h | 4 +- target/riscv/insn_trans/trans_privileged.c.inc | 9 +- target/riscv/insn_trans/trans_rva.c.inc | 9 +- target/riscv/insn_trans/trans_rvd.c.inc | 19 +- target/riscv/insn_trans/trans_rvf.c.inc | 19 +- target/riscv/insn_trans/trans_rvi.c.inc | 39 +- target/riscv/insn_trans/trans_rvv.c.inc | 225 +++++++++-- target/{rx/cpu-param.h => riscv/kvm-stub.c} | 26 +- target/riscv/kvm.c | 535 +++++++++++++++++++++++++ target/{rx/cpu-param.h => riscv/kvm_riscv.h} | 17 +- target/riscv/machine.c | 46 ++- target/riscv/meson.build | 1 + target/riscv/op_helper.c | 7 +- target/riscv/pmp.c | 12 +- target/riscv/sbi_ecall_interface.h | 72 ++++ target/riscv/translate.c | 94 +++-- target/riscv/vector_helper.c | 39 +- tests/data/acpi/virt/PPTT | Bin 76 -> 96 bytes 97 files changed, 3180 insertions(+), 1233 deletions(-) rename docs/{can.txt => system/devices/can.rst} (68%) create mode 100644 hw/misc/aspeed_i3c.c create mode 100644 hw/net/mv88w8618_eth.c create mode 100644 include/hw/misc/aspeed_i3c.h create mode 100644 include/hw/net/mv88w8618_eth.h create mode 100644 linux-headers/asm-riscv/kvm.h delete mode 100644 pc-bios/opensbi-riscv32-generic-fw_dynamic.elf delete mode 100644 pc-bios/opensbi-riscv64-generic-fw_dynamic.elf rename python/qemu/{qmp => aqmp}/qmp_shell.py (96%) rename python/qemu/{qmp => utils}/qemu_ga_client.py (94%) rename python/qemu/{qmp => utils}/qom.py (98%) rename python/qemu/{qmp => utils}/qom_common.py (98%) rename python/qemu/{qmp => utils}/qom_fuse.py (97%) copy target/{rx/cpu-param.h => riscv/kvm-stub.c} (67%) create mode 100644 target/riscv/kvm.c copy target/{rx/cpu-param.h => riscv/kvm_riscv.h} (70%) create mode 100644 target/riscv/sbi_ecall_interface.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (1f1854ce0fe5 -> 75e33f71c2da)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig in repository toolchain/ci/llvm-project. from 1f1854ce0fe5 [Driver][test] Fix undefined-libs.cpp when CLANG_DEFAULT_U [...] adds b3dcd156472f [ARM] Define ComplexPatternFuncMutatesDAG adds 6349865a8f37 [CMake] Don't use -fno-semantic-interposition with Clang<=13 adds 75e33f71c2da [X86] combineVectorHADDSUB - remove the broken HOP(x,x) me [...] No new revisions were added by this update. Summary of changes: llvm/cmake/modules/HandleLLVMOptions.cmake | 7 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 23 ------ llvm/test/CodeGen/ARM/shifter_operand.ll | 105 ++++++++++++++++++++++++++ llvm/test/CodeGen/X86/horizontal-shuffle-2.ll | 19 +++++ 5 files changed, 131 insertions(+), 27 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (589b6fc198 -> 5f62caec81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig in repository toolchain/ci/binutils-gdb. from 589b6fc198 Automatic date update in version.in adds 544818c087 Automatic date update in version.in adds 5f62caec81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig updated (43fc28fb6 -> d8ecdfe62)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig in repository toolchain/ci/base-artifacts. discards 43fc28fb6 0: update: binutils-llvm-linux-qemu: all new d8ecdfe62 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (43fc28fb6) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1560 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2780 bytes 03-build_abe-binutils/console.log.xz | Bin 41512 -> 41908 bytes 04-build_llvm/console.log.xz | Bin 58076 -> 58760 bytes 05-build_abe-qemu/console.log.xz | Bin 29756 -> 30748 bytes 06-build_linux/console.log.xz | Bin 3664 -> 4060 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 16 ++++++++-------- 10 files changed, 13 insertions(+), 13 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_gnu_eabi_stm32/gnu_eabi-release-arm_eabi-coremark-O3 updated (cf0ac00a84 -> 5f62caec81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_eabi_stm32/gnu_eabi-release-arm_eabi-coremark-O3 in repository toolchain/ci/binutils-gdb. from cf0ac00a84 Automatic date update in version.in adds 3f4442ae83 Automatic date update in version.in adds 589b6fc198 Automatic date update in version.in adds 544818c087 Automatic date update in version.in adds 5f62caec81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 7 months

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Tcwg-commits January 2022