Tcwg-commits January 2022

tcwg-commits@lists.linaro.org

4 participants
16484 discussions

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (2b1ca85cf8 -> 2f279a64a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gdb. from 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/po/fr.po | 3116 ++++++------ bfd/po/ro.po | 10194 +++++++++++++++++++++++++++++++-------- bfd/po/uk.po | 3102 ++++++------ binutils/ChangeLog | 7 + binutils/po/bg.po | 6039 +++++++++++++---------- binutils/po/fr.po | 4192 ++++++++-------- binutils/po/ro.po | 13085 ++++++++++++++++++++++++++++++++++++++++---------- binutils/po/uk.po | 4202 ++++++++-------- gas/ChangeLog | 4 + gas/po/uk.po | 4880 ++++++++++--------- gdb/doc/python.texi | 6 +- gold/ChangeLog | 4 + gold/po/uk.po | 257 +- gprof/ChangeLog | 4 + gprof/po/ro.po | 386 +- ld/ChangeLog | 5 + ld/po/bg.po | 4373 +++++++++-------- ld/po/uk.po | 3264 +++++++------ libiberty/ChangeLog | 4 + libiberty/regex.c | 4 + opcodes/ChangeLog | 5 + opcodes/po/de.po | 512 +- opcodes/po/ro.po | 2948 +++++++++--- opcodes/po/uk.po | 530 +- 25 files changed, 40203 insertions(+), 20926 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (976db046bc -> 5b8e7980c5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/glibc. from 976db046bc tst-realpath-toolong: Fix hurd build adds 114d07fd9a Add and use link-test-modules-rpath-link [BZ #28455] adds b5237c0746 elf: Add a test for PT_LOAD segments with mixed p_align [BZ #28676] adds e4c9268d15 elf: Add a test for PT_LOAD segments with p_align == 1 [BZ #28688] adds d8d94863ef elf: Add a test for PT_LOAD segments with invalid p_align [B [...] adds 84d2d0fe20 realpath: Avoid overwriting preexisting error (CVE-2021-3998) adds 8442f0d966 Fix handling of unterminated bracket expressions in fnmatch [...] adds 5b8e7980c5 Linux: Detect user namespace support in io/tst-getcwd-smallbuff No new revisions were added by this update. Summary of changes: Makeconfig | 2 + Makerules | 1 + elf/Makefile | 46 +++++++++ elf/tst-elf-edit.h | 126 +++++++++++++++++++++++++ elf/tst-global2.c | 32 +++++++ elf/tst-globalmod2.c | 41 ++++++++ elf/tst-p_align.h | 20 ++++ elf/tst-p_align1.c | 27 ++++++ elf/tst-p_align2.c | 27 ++++++ elf/tst-p_align3.c | 27 ++++++ elf/tst-p_align3.sh | 27 ++++++ elf/tst-p_alignmod-base.c | 41 ++++++++ elf/tst-p_alignmod1-edit.c | 27 ++++++ elf/tst-p_alignmod2-edit.c | 27 ++++++ elf/tst-p_alignmod3.c | 25 +++++ posix/Makefile | 2 +- posix/fnmatch_loop.c | 9 +- posix/tst-fnmatch7.c | 37 ++++++++ stdlib/canonicalize.c | 2 +- sysdeps/unix/sysv/linux/tst-getcwd-smallbuff.c | 18 ++++ 20 files changed, 560 insertions(+), 4 deletions(-) create mode 100644 elf/tst-elf-edit.h create mode 100644 elf/tst-global2.c create mode 100644 elf/tst-globalmod2.c create mode 100644 elf/tst-p_align.h create mode 100644 elf/tst-p_align1.c create mode 100644 elf/tst-p_align2.c create mode 100644 elf/tst-p_align3.c create mode 100755 elf/tst-p_align3.sh create mode 100644 elf/tst-p_alignmod-base.c create mode 100644 elf/tst-p_alignmod1-edit.c create mode 100644 elf/tst-p_alignmod2-edit.c create mode 100644 elf/tst-p_alignmod3.c create mode 100644 posix/tst-fnmatch7.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (978abe918f8 -> 4343f5e2567)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gcc. from 978abe918f8 gcc-changelog: Be stricter for top-level dir. adds 2a908f3da07 c++: value category of compound object expr [PR104173] adds b1aa2a3cf1b c++: Fix non-portable default argument of make_auto_1 [PR104197] adds 4343f5e2567 rtl: builtins: (not just) rs6000: Add builtins for fegetrou [...] No new revisions were added by this update. Summary of changes: gcc/builtins.cc | 76 ++++++++++++++ gcc/config/rs6000/rs6000.md | 111 +++++++++++++++++++++ gcc/cp/pt.cc | 5 +- gcc/cp/typeck.cc | 19 ++-- gcc/doc/extend.texi | 8 ++ gcc/doc/md.texi | 17 ++++ gcc/optabs.def | 4 + gcc/testsuite/g++.dg/cpp0x/ref-qual21.C | 23 +++++ .../builtin-feclearexcept-feraiseexcept-1.c | 76 ++++++++++++++ .../builtin-feclearexcept-feraiseexcept-2.c | 91 +++++++++++++++++ .../gcc.target/powerpc/builtin-fegetround.c | 36 +++++++ 11 files changed, 453 insertions(+), 13 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/ref-qual21.C create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-fegetround.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (2b1ca85cf8 -> 2f279a64a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/binutils-gdb. from 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/po/fr.po | 3116 ++++++------ bfd/po/ro.po | 10194 +++++++++++++++++++++++++++++++-------- bfd/po/uk.po | 3102 ++++++------ binutils/ChangeLog | 7 + binutils/po/bg.po | 6039 +++++++++++++---------- binutils/po/fr.po | 4192 ++++++++-------- binutils/po/ro.po | 13085 ++++++++++++++++++++++++++++++++++++++++---------- binutils/po/uk.po | 4202 ++++++++-------- gas/ChangeLog | 4 + gas/po/uk.po | 4880 ++++++++++--------- gdb/doc/python.texi | 6 +- gold/ChangeLog | 4 + gold/po/uk.po | 257 +- gprof/ChangeLog | 4 + gprof/po/ro.po | 386 +- ld/ChangeLog | 5 + ld/po/bg.po | 4373 +++++++++-------- ld/po/uk.po | 3264 +++++++------ libiberty/ChangeLog | 4 + libiberty/regex.c | 4 + opcodes/ChangeLog | 5 + opcodes/po/de.po | 512 +- opcodes/po/ro.po | 2948 +++++++++--- opcodes/po/uk.po | 530 +- 25 files changed, 40203 insertions(+), 20926 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (a2e00d699 -> f2907aad0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/base-artifacts. discards a2e00d699 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 new f2907aad0 0: update: binutils-gcc-linux-glibc-gdb-qemu: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a2e00d699) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_check_gcc/mast [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1560 -> 1556 bytes 02-prepare_abe/console.log.xz | Bin 2764 -> 2752 bytes 03-build_abe-binutils/console.log.xz | Bin 29964 -> 30116 bytes 04-build_abe-stage1/console.log.xz | Bin 89812 -> 90388 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 9252 -> 9096 bytes 07-build_abe-glibc/console.log.xz | Bin 231764 -> 230628 bytes 08-build_abe-stage2/console.log.xz | Bin 229056 -> 228316 bytes 09-build_abe-gdb/console.log.xz | Bin 36924 -> 37072 bytes 10-build_abe-qemu/console.log.xz | Bin 30328 -> 30280 bytes 11-build_abe-dejagnu/console.log.xz | Bin 3864 -> 3856 bytes 12-build_abe-check_gcc/console.log.xz | Bin 2564 -> 3104 bytes 13-check_regression/console.log.xz | Bin 3632 -> 2620 bytes 13-check_regression/results.compare | 22 +- 13-check_regression/results.compare2 | 332 +---- 14-update_baseline/console.log | 504 ++----- 14-update_baseline/results.compare | 22 +- 14-update_baseline/results.compare2 | 332 +---- jenkins/manifest.sh | 22 +- sumfiles/g++.log.xz | Bin 2604644 -> 2634020 bytes sumfiles/g++.sum | 110 +- sumfiles/gcc.log.xz | Bin 2170928 -> 2144324 bytes sumfiles/gcc.sum | 2442 ++++++++++++++++----------------- sumfiles/gfortran.log.xz | Bin 864476 -> 868360 bytes sumfiles/gfortran.sum | 40 +- sumfiles/libatomic.log.xz | Bin 2260 -> 2260 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 184456 -> 184464 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2668 -> 2664 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 414876 -> 425336 bytes sumfiles/libstdc++.sum | 16 +- 33 files changed, 1522 insertions(+), 2346 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 updated (5061eb6b0121 -> d27f02261442)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 in repository toolchain/ci/llvm-project. from 5061eb6b0121 [Sparc] Don't define __sparcv9 and __sparcv9__ when targeting V8+ adds e6ceec9c1d19 [Clang][RISCV] Restrict rvv builtins with zve macros adds 754d6af7c359 [NFC] Improve code reuse. adds 11754a4dbbad [RISCV] Use RVBUnary in more places to simplify some table [...] adds 4710750854ce [mlir][spirv] Support size-1 vector inserts during conversion adds fd0c6f53913f [mlir] Move linalg::PadTensorOp to tensor::PadOp. adds 3c90ae5d0b71 Revert "[flang] Update tco tool pipline and add translatio [...] adds 48132bb1e437 [RISCV] Simplify interface to combineMUL_VLToVWMUL. NFC adds d6e2c95d2252 [libc++] Use addressof in unordered_map. adds 4d0a18d06e8e [mlir][sparse] Adding assertions for overhead storage types adds cb8b94f6efa9 [AArch64] Add extra tests useful in testing hadd. NFC adds f18fcdabda72 [BOLT][NFC] Expand auto types pt.2 adds 5a654b01133f [BOLT] Make ICP target selection (more) deterministic adds f8c7fb499be6 [BOLT][NFC] Reduce includes with include-what-you-use adds 2f9f9afa4e12 [mlir] Add polynomial approximation for atan and atan2 adds 0d9cc6995401 [Support] Update missed tests with lazy caching behavior. adds cd4e600f5f5c [Sema] Warn about printf %n on Android and Fuchsia adds 0379459fc586 [RISCV] Strengthen a SDTypeProfile. Fix formatting. adds 4f8ea3c84f3d [SystemZ][z/OS][NFC] Remove extra symbol adds d84d1135d80c Emit swift5 reflection section data in dsym bundle generat [...] adds 9f4cc5a6bb56 [gn build] Set HAVE_MALLINFO2=1 adds 6103b2d45bfb Revert "Emit swift5 reflection section data in dsym bundle [...] adds e39c262979e6 Revert "[gn build] Set HAVE_MALLINFO2=1" adds 705d8c49f9be [x86] regenerate smul-with-overflow.ll; add test which fai [...] adds 6df05697ca1d [gn build] Set HAVE_MALLINFO2=1 adds 653b007dc186 [CodeComplete] fix nullptr crash in 612f5ed8823120 adds b796709a62da Only run MLIR PyTACO tests when python bindings are enabled. adds ba093fe58b15 Fix a commit. adds 6ba1fb04214b [llvm-pdbutil] Fix gaps ouput. adds 58ee14e29e98 [lldb] Fix timer logging inverted quiet condition adds efa15f417847 [mlir][sparse] add ability for sparse tensor output adds 10d0d8c0c1db [clang][cmake] Use `GNUInstallDirs` to support custom inst [...] adds 1613f8b8d7d5 NFC (build fix): Add header for llvm::errs(). adds 08574ce4d625 [mlir][tosa] Add clamp + clamp as single clamp canonicalization adds 13fa17db3a72 [split-file] Respect input file's line endings adds 4f547ee8b8a7 [libc++][test] Add const and reference tests for enable_vi [...] adds 9cddfe3085c4 [CMake] Passthrough OSX CMake options to builtins and runtimes adds e6cdef187ed3 [XRay][test] Clean up llc RUN lines adds 04eb93b1d559 [flang] Fix repeated "DT" editing adds db07e082abaf [TSan] Omit vfork interceptor iOS simulator runtime adds 3726626a26ec [flang] Fix crash from USE-associated defined I/O subprograms adds b95150418fb6 [lldb] Allow aliases to aliases of raw input commands adds e796eaf2af65 [RISCV][RFC] add MC support for zbkc subextension adds b1856009fbc1 [flang] Allow INQUIRE() on a child unit in user-defined I/ [...] adds 55d887b83364 [time-trace] Add optimizer and codegen regions to NPM adds b6098c07cb20 [MLIR] Fix negative gcd in `normalizeDivisionByGCD` function. adds de8723829515 [JITLink] Add anonymous symbols in LinkGraph for unnamed t [...] adds fdb6578514dd Revert "[JITLink] Add anonymous symbols in LinkGraph for u [...] adds f7d4cafe5a6a [JITLink][RISCV] Support R_RISCV_SET* and R_RISCV_32_PCREL [...] adds 26544b98f7bf [libc++] Use addressof in unordered_set. adds 4041354b4c12 [mlir] Add SingleBlockImplicitTerminator<"tensor::YieldOp" [...] adds 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 0b799791807e [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds f69379d0a43b [InstCombine] Add test coverage for PR48683 adds 818cfb10c574 [libcxx][test] Make MSVC `<charconv>` test compile when te [...] adds 8e382ae91b97 [Support] Simplify parallelForEach{,N} adds 1a5dea9e2b97 [NewGVN][NFC] precommit tests for PR53277 adds 7a29b0b58383 [llvm] Fix header guards (NFC) adds abb0ed44957c [Commands] Remove redundant member initialization (NFC) adds f8ddcb413125 [Object] Remove a redundant return statement (NFC) adds ad36f37ce2b4 [MLIR][Presburger] Clean PresburgerSet identifier interfac [...] adds 413684313d9d [RISCV] Adjust the header comment in RISCVInstrInfoZb.td t [...] adds 32dc14f876c4 [X86] LowerFunnelShift - use supportedVectorShiftWithBaseA [...] adds ab1add6adc44 [clang] Move the definition of ASTDiff (NFC) adds ee591a64a795 [clang] Forward-declare DynTypedNode (NFC) adds e59964b67e02 [clang] Remove unused forward declarations (NFC) adds 4762c077e710 [X86] LowerFunnelShift - always lower vXi8 fshl by constan [...] adds 88f33cff4bee [RISCV] Add bitreverse tests to bswap-ctlz-cttz-ctpop.ll. [...] adds 3575700b286f [RISCV] Add tests that do a bitreverse before or after a b [...] adds 47d7e922d843 [mlir] Ensure a newline at the end of a file (NFC) adds fa90fc6e0566 [Sema] Fix a bugprone argument comment (NFC) adds 448d0dfab701 [Analysis] Remove a redundant const from a return type (NFC) adds ab4756338c5b DebugInfo: Don't put types in type units if they reference [...] adds 7c77df1528c8 [X86] Add some basic tests for PR46809 adds 2e58a1891086 DebugInfo: Include template parameters for simplified temp [...] adds 3a3af2bbc97e [C++20] [Module] fix bug 47716 and implement [module.inter [...] adds 3f24cdec2572 [RISCV][NFC] Remove tailing whitespaces in RISCVInstrInfoV [...] adds b574048239bc [NFC] [Coroutines] Rename tests in coro-align adds 943aa1bfacaa Add modernize-use-default-member-init.UseAssignment to .cl [...] adds f63a9cd99db7 [Vectorize] Remove unused variables (NFC) adds b752eb887f7e [Analysis] Use default member initialization (NFC) adds d3b26dea1610 Clang: Change the default DWARF version to 5 adds 90abe181da7c Add missing function implementation from DWARF default change adds 68b70d17d8de [GlobalISel] Fold or of shifts with constant amount to fun [...] adds 8b280df504b9 Rough guess at fixing lldb tests to handle Clang defaultin [...] adds 1f4a0531b3fd [TSan] Mark test unsupported on Darwin adds e29d8fb16978 [RISCV] Initially support the K-extension instructions on [...] adds bf039a8620f1 [Target] Use range-based for loops (NFC) adds ba16e3c31f66 [RISCV] Decouple Zve* extensions and the V extension. adds c5590396d041 [PowerPC] Emit warning for ieeelongdouble on older GNU toolchain adds ea2112ea15a0 [clang-format] Remove unused assignment. NFC. adds 3519dcfec229 Added OpenMP 5.0 specification based semantic checks for a [...] adds 670a721de2a1 [clang-format] Assert Line->First. NFC. adds f53301125257 [Hexagon] Use llvm::Register instead of unsigned in Hexago [...] adds d6f8f56da04b [MLIR][Presburger] Silence -Wdangling-else warning (NFC) adds 81793bd276af [clang-format] Assert Line->First and State.NextToken->Pre [...] adds 9aaa74aeeff3 [RISCV] Add patterns of SET[U]LT_VI for STECC forms adds ba845787b3fd [clang][sema] Add missing diagnostic parameter adds 3ad6de31c0cf [clang][tests] Fix a c++/libc++ -stdlib value typo adds d29e319263de [OpaquePtrs] Add getNonOpaquePointerElementType() method (NFC) adds 67346b43e0ed [Attributor] Use MemoryLocation to get pointer operand and [...] adds 7ccacaf4428d [flang][examples] Add missing CMake dependencies adds 4f8fdf78279f [ISEL] Canonicalise constant splats to RHS. adds e7c9a6cae09d [SDAG] Don't move DBG_VALUE instructions after insertion p [...] adds 0d1308a7b77c [AArch64][GlobalISel] Support returned argument with multi [...] adds a08447d0de5d [LLD][ELF][AArch64] Update test with incorrect REQUIRES li [...] adds 906ebd5830e6 [AMDGPU][GlobalISel] Regenerate checks in inst-select-*ext.mir adds aa50b93e7cf9 [AMDGPU][GlobalISel] Add more sign/zero/any-extension tests adds 7d19566c3bfb [lldb] Ignore non-address bits in "memory find" arguments adds 022600334dcb [flang] Update the description of `!fir.coordinate_of` adds 912af6b570d6 [AMDGPU][GlobalISel] Remove the post ':' part of vreg oper [...] adds 577a6dc9a186 [X86] getVectorMaskingNode - fix indentation. NFC. adds e7926e8d972e [RISCV] Match VF variants for masked VFRDIV/VFRSUB adds af773a18181d [RISCV][VP] Lower VP_MERGE to RVV instructions adds 3e6be0241b31 [lldb] Update release notes with non-address bit handling changes adds 12a499eb00e3 Pre-commit test case for trunc+lshr+load folds adds 46cacdbb21c2 [DAGCombiner] Adjust some checks in DAGCombiner::reduceLoadWidth adds e5147f82e1cb [X86] Remove __builtin_ia32_pabs intrinsics and use generi [...] adds b2499bf3e851 [mlir][bufferize][NFC] Refactor createAlloc function signature adds 3e50593b1884 [X86] Remove `__builtin_ia32_pmax/min` intrinsics and use [...] adds 3696c70e67d9 [clang-tidy] Add `readability-container-contains` check adds e4074432d5bf [X86] Remove avx512f integer and/or/xor/min/max reduction [...] adds 8082ab2fc391 [LoopVectorize] Support epilogue vectorisation of loops wi [...] adds 54f1d950667c [gn build] Port 3696c70e67d9 adds b7f69b8d4650 [LV] Name values and blocks in same induction tests (NFC). adds 70f83f308449 [RISCV] add support for zbkx subextension in MC layer. adds b754d09fde0b [MLIR][Presburger] Refactor duplicate division merging to Utils adds b4b6d6374e2e [NFC] New test case for BasicAA and memcy/memmove with deopt adds f1e36474b9e5 [AMDGPU][NFC] Fix debug prints adds 0e70dd858eb7 [X86] Add PR46249 test case showing poorly widened select [...] adds b2a8eff45c55 [LV] Make some tests more robust by adding missing users. adds 5f290c090a24 Move STLFunctionalExtras out of STLExtras adds 853e79d8d8af [flang] Update tco tool pipline and add translation to LLVM IR adds 38ffea9b4c1f [demangler] Resync demangler sources adds 897d1bb659c2 [demangler] write-protect non-canonical source adds 6184e565ad40 [demangler][NFC] Refactor some parsing adds 589a93907222 Add `isConstinit` matcher adds a0d5e938fe9c Add missing include llvm/ADT/STLExtras adds f6ac8088b0e8 [LoopFlatten] Added comments about usage of various Loop A [...] adds ada6d78a7802 [LoopFlatten] Address FIXME about getTripCountFromExitCount. NFC. adds d42678b453bc [RISCV] Add side-effect-free vsetvli intrinsics adds 25e8f5f827bf Add missing STLExtras.h include from lldb/unittests/Testin [...] adds f7079bf9ee68 [X86] Fix v8i8 -> v8i16 typo in bool reductions adds 4436d4cd7c86 [X86] Rename cmp-with-zero bool reductions adds 0553f5e61ac7 [X86] Add cmp-equality bool reductions adds 34aedbe90d76 [AArch64] Regenerate CHECK lines for llvm/test/CodeGen/AAr [...] adds 5e5efd8a91f2 [clang-format] Fix SeparateDefinitionBlocks issues adds 7a5b0a2934f3 Reapply "IR: Make getRetAlign check callee function attributes" adds 99e8e17313e7 Reapply "Revert "GlobalISel: Add G_ASSERT_ALIGN hint instruction" adds 354b2c36ee46 Pre-commit test cases for (sra (load)) -> (sextload) folds. NFC adds 18aabae8e2b6 AMDGPU: Fix assertion on fixed stack objects with VGPR->AG [...] adds 49e37000691a [mlir][tensor] Move BufferizableOpInterface impl to tensor [...] adds 473aa8e10c49 [llvm][docs] Fix code-block in the testing guide adds 2d9ed1aba236 [mlir] Fix broken __repr__ implementation in Linalg OpDSL adds d193f7be7898 [libc++][AIX] Do not assert chmod return value is non-zero. adds fc08d1c29406 [mlir][tensor][bufferize] Support tensor.rank in Bufferiza [...] adds 4d53f88d1a18 [flang] Add MemoryAllocation pass to the pipeline adds 3ad35ba4dea5 [Templight] Don't display empty strings for names of unnam [...] adds c30d2893a43d [mlir][bufferize] Change insertion point for ToTensorOps adds 217570b03bbe [MLIR][OpenMP] Suppress -Wreturn-type warnings (NFC) adds c1335166b265 Don't run test/ClangScanDeps/modules-symlink.c on Windows adds cd2a9ff39788 [RISCV] Select int_riscv_vsll with shift of 1 to vadd.vv. adds b8c7cdcc81a0 [SelectionDAG][RISCV] Teach getNode to fold bswap(bswap(x))->x. adds b00ee46b5e4b [mlir][bufferize][NFC] Implement BufferizableOpInterface o [...] adds a43ed49f5b16 [DAGCombiner][RISCV] Canonicalize (bswap(bitreverse(x))->b [...] adds e494278ceeb7 [mlir][linalg] Add transpose support to hoist padding. adds cfe17986c952 [libcxx][test] {move,reverse}_iterator cannot be instantia [...] adds 699e22a083f2 [ISEL] Move trivial step_vector folds to FoldConstantArithmetic. adds 6997f4d07fa4 [X86] combineSetCCMOVMSK - fold allof(cmpeq(x,y)) -> ptest [...] adds c03fdd340356 [ELF] Fix the branch range computation when reusing a thunk adds a2afc8249a99 [libc++] Fix benchmark failure adds 6be77561f82d [SLP][NFC] Add debug logs for entry. adds 7cd441ff537e [clang][NFC] Wrap TYPE_SWITCH in "do while (0)" in the int [...] adds 80532ebb508d [AMDGPU][InstCombine] Remove zero image offset adds 74db5c8c95e2 Revert rG6a605b97a200 due to excessive memory use adds 50999e82e884 [clang-format] Space between attribute closing parenthesis [...] adds db2944e34b16 [libc++][format] Adds formatter floating-point. adds 787ccd345cbb [libc++][format] Adds formatter pointer. adds 2b8b48c5a0c4 [libc++][format] Disable default formatter. adds ade6d0d8fa1d [libc++][format] Adds formatter handle. adds a922324590a1 [gn build] Port 787ccd345cbb adds 5fa40fb29324 [gn build] Port db2944e34b16 adds ea17d29a6c83 [llvm] Do not replace dead constant references in metadata [...] adds 11cea7e5ce4d [AArch64] NFC: Clarify and auto-generate some CodeGen tests. adds 57eb5033cdff [libc] Add bazel definition for hypot/hypotf. new 38e16e1cebb8 Use -gdwarf-4 in compiler-rt/test/profile/Linux/instrprof- [...] new d27f02261442 [NFC][DebugInfo] Strip out an undesired #if 0 block The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .clang-tidy | 2 + bolt/include/bolt/Core/BinaryContext.h | 3 +- bolt/include/bolt/Core/BinaryData.h | 1 - bolt/include/bolt/Core/DebugData.h | 3 - bolt/include/bolt/Passes/AllocCombiner.h | 2 - bolt/include/bolt/Rewrite/DWARFRewriter.h | 3 +- bolt/lib/Core/BinaryFunction.cpp | 5 +- bolt/lib/Core/DebugData.cpp | 7 +- bolt/lib/Core/JumpTable.cpp | 1 - bolt/lib/Passes/IndirectCallPromotion.cpp | 24 +- bolt/lib/Passes/ThreeWayBranch.cpp | 2 - bolt/lib/Profile/YAMLProfileWriter.cpp | 2 +- bolt/lib/Rewrite/DWARFRewriter.cpp | 4 +- bolt/lib/Rewrite/MachORewriteInstance.cpp | 2 - bolt/lib/Rewrite/RewriteInstance.cpp | 2 - bolt/lib/Utils/Utils.cpp | 1 - clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- clang-tools-extra/clang-tidy/GlobList.cpp | 1 + .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/readability/CMakeLists.txt | 2 + .../readability/ContainerContainsCheck.cpp | 144 ++ .../readability/ContainerContainsCheck.h | 40 + .../readability/DuplicateIncludeCheck.cpp | 116 + .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../readability/ReadabilityTidyModule.cpp | 6 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- clang-tools-extra/clangd/DumpAST.h | 1 + clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 17 + ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 2 + .../checks/readability-container-contains.rst | 25 + .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/readability-container-contains.cpp | 230 ++ .../checkers/readability-duplicate-include.cpp | 72 + clang/CMakeLists.txt | 14 +- clang/cmake/modules/AddClang.cmake | 5 +- clang/cmake/modules/CMakeLists.txt | 4 +- clang/docs/JSONCompilationDatabase.rst | 4 + clang/docs/LibASTMatchersReference.html | 13 + clang/docs/ReleaseNotes.rst | 10 + clang/include/clang/AST/ASTContext.h | 1 - clang/include/clang/AST/DeclBase.h | 14 + clang/include/clang/AST/FormatString.h | 3 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 17 + clang/include/clang/Basic/BuiltinsX86.def | 72 - clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 10 +- clang/include/clang/Basic/DirectoryEntry.h | 1 + clang/include/clang/Driver/ToolChain.h | 2 +- clang/include/clang/Sema/Sema.h | 2 + clang/include/clang/Tooling/ASTDiff/ASTDiff.h | 28 +- .../clang/Tooling/ASTDiff/ASTDiffInternal.h | 3 - clang/lib/AST/DeclBase.cpp | 9 + clang/lib/AST/Interp/PrimType.h | 50 +- clang/lib/AST/OSLog.cpp | 4 +- clang/lib/AST/PrintfFormatString.cpp | 2 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Basic/Targets/RISCV.cpp | 2 +- clang/lib/Basic/Targets/X86.h | 11 +- clang/lib/CodeGen/BackendUtil.cpp | 14 +- clang/lib/CodeGen/CGBuiltin.cpp | 103 - clang/lib/Driver/ToolChains/Linux.cpp | 6 + clang/lib/Driver/ToolChains/Linux.h | 1 + clang/lib/Driver/ToolChains/PPCLinux.cpp | 56 + clang/lib/Driver/ToolChains/PPCLinux.h | 7 +- clang/lib/Format/AffectedRangeManager.cpp | 2 + clang/lib/Format/ContinuationIndenter.cpp | 9 +- clang/lib/Format/DefinitionBlockSeparator.cpp | 86 +- clang/lib/Format/DefinitionBlockSeparator.h | 2 +- clang/lib/Format/FormatToken.cpp | 1 + clang/lib/Format/FormatToken.h | 1 + clang/lib/Format/QualifierAlignmentFixer.cpp | 4 +- clang/lib/Format/SortJavaScriptImports.cpp | 1 + clang/lib/Format/TokenAnnotator.cpp | 27 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 3 +- clang/lib/Format/UnwrappedLineParser.cpp | 3 + clang/lib/Frontend/FrontendActions.cpp | 95 +- clang/lib/Headers/avx2intrin.h | 30 +- clang/lib/Headers/avx512bwintrin.h | 20 +- clang/lib/Headers/avx512fintrin.h | 72 +- clang/lib/Headers/avx512vlintrin.h | 20 +- clang/lib/Headers/emmintrin.h | 8 +- clang/lib/Headers/smmintrin.h | 16 +- clang/lib/Headers/tmmintrin.h | 6 +- clang/lib/Sema/SemaChecking.cpp | 72 +- clang/lib/Sema/SemaCodeComplete.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 49 +- clang/lib/Sema/SemaDeclCXX.cpp | 2 +- clang/lib/Sema/SemaModule.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 2 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 2 +- clang/test/CXX/module/module.interface/p2-2.cpp | 37 + clang/test/CXX/module/module.interface/p6.cpp | 93 + clang/test/ClangScanDeps/modules-symlink.c | 1 + .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../RISCV/rvb-intrinsics/riscv32-zbb-error.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrgather.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsext.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vzext.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/rvv-error.c | 18 + clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vfslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vid.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/viota.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmclr.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredxor.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vreinterpret.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vundefined.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv_errors.c | 2 +- clang/test/CodeGen/builtins-x86.c | 15 - clang/test/CodeGen/debug-info-extern-call.c | 4 +- clang/test/CodeGen/dwarf-version.c | 8 +- clang/test/CodeGen/target-data.c | 2 +- .../lib/gcc/powerpc64le-linux-gnu/11.2.0}/.keep | 0 clang/test/Driver/cl-options.c | 2 +- clang/test/Driver/clang-g-opts.c | 2 +- clang/test/Driver/ppc-float-abi-warning.cpp | 13 + clang/test/Driver/riscv-arch.c | 41 +- clang/test/Driver/ve-toolchain.c | 2 +- clang/test/Driver/ve-toolchain.cpp | 2 +- clang/test/Driver/wasm-toolchain.cpp | 10 +- clang/test/FixIt/format.m | 16 +- clang/test/Headers/riscv-vector-header.c | 2 +- clang/test/Modules/cxx20-export-import.cpp | 3 + clang/test/Preprocessor/riscv-target-features.c | 34 +- clang/test/Sema/format-strings.c | 84 +- clang/test/Sema/riscv-types.c | 2 +- .../test/Templight/templight-empty-entries-fix.cpp | 333 +++ clang/tools/c-index-test/CMakeLists.txt | 2 +- clang/tools/clang-format/CMakeLists.txt | 12 +- clang/tools/clang-nvlink-wrapper/CMakeLists.txt | 2 +- clang/tools/clang-rename/CMakeLists.txt | 4 +- clang/tools/diagtool/DiagTool.cpp | 1 + clang/tools/libclang/CMakeLists.txt | 2 +- clang/tools/scan-build-py/CMakeLists.txt | 6 +- clang/tools/scan-build/CMakeLists.txt | 6 +- clang/tools/scan-view/CMakeLists.txt | 4 +- .../ASTMatchers/ASTMatchersNarrowingTest.cpp | 19 + .../Format/DefinitionBlockSeparatorTest.cpp | 117 +- clang/unittests/Format/FormatTest.cpp | 2 + clang/utils/TableGen/RISCVVEmitter.cpp | 74 +- clang/utils/hmaptool/CMakeLists.txt | 2 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 2 + .../profile/Linux/instrprof-debug-info-correlate.c | 2 +- compiler-rt/test/tsan/vfork.cpp | 2 + flang/examples/CMakeLists.txt | 2 +- flang/examples/FlangOmpReport/CMakeLists.txt | 9 + flang/examples/FlangOmpReport/FlangOmpReport.cpp | 75 + .../FlangOmpReport/FlangOmpReportVisitor.cpp | 229 ++ .../FlangOmpReportVisitor.h} | 0 .../requirements.txt | 0 .../yaml_summarizer.py | 0 .../PrintFlangFunctionNames/CMakeLists.txt | 7 +- .../flang-omp-report-plugin/CMakeLists.txt | 6 - .../flang-omp-report-visitor.cpp | 229 -- .../flang-omp-report-plugin/flang-omp-report.cpp | 75 - flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- flang/include/flang/Optimizer/Transforms/Passes.h | 2 + flang/include/flang/Tools/CLOptions.inc | 8 + .../lib/Optimizer/Transforms/MemoryAllocation.cpp | 39 +- flang/lib/Semantics/check-omp-structure.cpp | 154 +- flang/lib/Semantics/check-omp-structure.h | 6 + flang/lib/Semantics/runtime-type-info.cpp | 2 +- flang/runtime/descriptor-io.cpp | 2 +- flang/runtime/descriptor-io.h | 1 + flang/runtime/edit-input.cpp | 10 +- flang/runtime/format-implementation.h | 137 +- flang/runtime/format.h | 14 +- flang/runtime/io-api.cpp | 51 +- flang/runtime/io-error.cpp | 8 +- flang/runtime/io-stmt.cpp | 5 +- flang/runtime/io-stmt.h | 12 +- flang/runtime/namelist.cpp | 17 +- flang/runtime/unit.h | 2 +- flang/test/Fir/basic-program.fir | 3 +- flang/test/Fir/convert-to-llvm.fir | 18 +- flang/test/Semantics/omp-atomic01.f90 | 48 +- flang/test/Semantics/omp-atomic02.f90 | 109 + flang/test/Semantics/omp-atomic03.f90 | 93 + flang/test/Semantics/omp-atomic04.f90 | 168 ++ flang/test/Semantics/omp-atomic05.f90 | 26 + flang/tools/tco/CMakeLists.txt | 7 +- flang/tools/tco/tco.cpp | 1 - flang/unittests/Runtime/Namelist.cpp | 31 + libcxx/benchmarks/filesystem.bench.cpp | 4 +- libcxx/benchmarks/formatter_float.bench.cpp | 241 ++ libcxx/docs/Status/Cxx20Issues.csv | 8 +- libcxx/docs/Status/Cxx20Papers.csv | 2 +- libcxx/docs/Status/Cxx2bIssues.csv | 10 +- libcxx/include/CMakeLists.txt | 2 + libcxx/include/__format/format_arg.h | 44 +- libcxx/include/__format/formatter.h | 58 +- libcxx/include/__format/formatter_bool.h | 2 +- libcxx/include/__format/formatter_floating_point.h | 717 ++++++ libcxx/include/__format/formatter_integer.h | 24 +- libcxx/include/__format/formatter_integral.h | 2 +- libcxx/include/__format/formatter_pointer.h | 91 + libcxx/include/__format/formatter_string.h | 10 +- libcxx/include/__format/parser_std_format_spec.h | 261 ++- libcxx/include/__hash_table | 40 +- libcxx/include/__iterator/readable_traits.h | 10 +- libcxx/include/__locale | 4 +- libcxx/include/__ranges/enable_view.h | 12 +- libcxx/include/__ranges/view_interface.h | 3 +- libcxx/include/format | 4 + libcxx/include/module.modulemap | 30 +- libcxx/include/unordered_map | 21 +- libcxx/include/unordered_set | 15 +- libcxx/include/version | 2 +- .../formatter_floating_point.module.verify.cpp | 15 + .../format/formatter_pointer.module.verify.cpp | 15 + .../format.arg/visit_format_arg.pass.cpp | 6 + .../format.arguments/format.args/get.pass.cpp | 2 + .../std_format_spec_floating_point.pass.cpp | 353 +++ .../std_format_spec_pointer.pass.cpp | 254 ++ .../iterator.operators.addressof.compile.pass.cpp | 49 + .../assign_move.addressof.compile.pass.cpp | 42 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../erase_const_iter.addressof.compile.pass.cpp | 27 + .../erase_range.addressof.compile.pass.cpp | 27 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + ...tructible_value_type.addressof.compile.pass.cpp | 28 + ...rt_rvalue_value_type.addressof.compile.pass.cpp | 28 + .../try_emplace_hint.addressof.compile.pass.cpp | 40 + .../unord.map.swap/swap.addressof.compile.pass.cpp | 29 + .../move.addressof.compile.pass.cpp | 33 + .../move_alloc.addressof.compile.pass.cpp | 36 + .../emplace_hint.addressof.compile.pass.cpp | 30 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 33 + .../emplace_hint.addressof.compile.pass.cpp | 30 + ...rt_hint_const_lvalue.addressof.compile.pass.cpp | 28 + .../insert_hint_rvalue.addressof.compile.pass.cpp | 27 + .../iterator.operators.addressof.compile.pass.cpp | 47 + .../move.addressof.compile.pass.cpp | 29 + .../move_alloc.addressof.compile.pass.cpp | 35 + .../directory_entry.cons/path.pass.cpp | 2 - .../directory_entry.mods/refresh.pass.cpp | 2 - .../directory_entry.mods/replace_filename.pass.cpp | 2 - .../directory_entry.obs/file_size.pass.cpp | 2 - .../directory_entry.obs/file_type_obs.pass.cpp | 2 - .../directory_entry.obs/hard_link_count.pass.cpp | 2 - .../directory_entry.obs/last_write_time.pass.cpp | 2 - .../directory_entry.obs/status.pass.cpp | 2 - .../directory_entry.obs/symlink_status.pass.cpp | 2 - .../directory_iterator.members/copy.pass.cpp | 2 - .../copy_assign.pass.cpp | 2 - .../directory_iterator.members/ctor.pass.cpp | 2 - .../directory_iterator.members/increment.pass.cpp | 2 - .../directory_iterator.members/move.pass.cpp | 2 - .../move_assign.pass.cpp | 2 - .../begin_end.pass.cpp | 2 - .../rec.dir.itr.members/copy.pass.cpp | 2 - .../rec.dir.itr.members/copy_assign.pass.cpp | 2 - .../rec.dir.itr.members/ctor.pass.cpp | 2 - .../rec.dir.itr.members/depth.pass.cpp | 2 - .../disable_recursion_pending.pass.cpp | 2 - .../rec.dir.itr.members/increment.pass.cpp | 2 - .../rec.dir.itr.members/move.pass.cpp | 2 - .../rec.dir.itr.members/move_assign.pass.cpp | 2 - .../rec.dir.itr.members/pop.pass.cpp | 2 - .../rec.dir.itr.members/recursion_pending.pass.cpp | 2 - .../rec.dir.itr.nonmembers/begin_end.pass.cpp | 2 - .../fs.op.funcs/fs.op.canonical/canonical.pass.cpp | 2 - .../fs.op.funcs/fs.op.copy/copy.pass.cpp | 2 - .../create_directories.pass.cpp | 2 - .../create_directory_with_attributes.pass.cpp | 2 - .../fs.op.current_path/current_path.pass.cpp | 2 - .../fs.op.equivalent/equivalent.pass.cpp | 2 - .../fs.op.funcs/fs.op.exists/exists.pass.cpp | 2 - .../fs.op.funcs/fs.op.file_size/file_size.pass.cpp | 2 - .../fs.op.hard_lk_ct/hard_link_count.pass.cpp | 2 - .../fs.op.is_block_file/is_block_file.pass.cpp | 2 - .../fs.op.is_char_file/is_character_file.pass.cpp | 2 - .../fs.op.is_directory/is_directory.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_empty/is_empty.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_fifo/is_fifo.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_other/is_other.pass.cpp | 2 - .../fs.op.is_regular_file/is_regular_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.is_socket/is_socket.pass.cpp | 2 - .../fs.op.is_symlink/is_symlink.pass.cpp | 2 - .../fs.op.read_symlink/read_symlink.pass.cpp | 2 - .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 2 - .../fs.op.funcs/fs.op.rename/rename.pass.cpp | 2 - .../fs.op.resize_file/resize_file.pass.cpp | 2 - .../fs.op.funcs/fs.op.space/space.pass.cpp | 2 - .../fs.op.funcs/fs.op.status/status.pass.cpp | 2 - .../fs.op.symlink_status/symlink_status.pass.cpp | 2 - .../weakly_canonical.pass.cpp | 2 - .../move.iter.op=/move_iterator.pass.cpp | 4 +- .../reverse.iter.cmp/three-way.pass.cpp | 4 + .../reverse.iter.cons/assign.pass.cpp | 2 + .../support.limits.general/memory.version.pass.cpp | 39 - .../cpo.compile.pass.cpp | 3 + .../niebloid.compile.pass.cpp | 1 + .../range.view/enable_view.compile.pass.cpp | 65 +- .../view.interface/view.interface.pass.cpp | 9 + .../utilities/charconv/charconv.msvc/test.pass.cpp | 5 + .../format.arg.store/class.pass.cpp | 2 + .../format.arg.store/make_format_args.sh.cpp | 2 + .../format.arg/operator_bool.pass.cpp | 2 + .../format.arguments/format.args/ctor.pass.cpp | 2 + .../format.context/format.context/arg.pass.cpp | 2 + .../format.context/format.context/ctor.pass.cpp | 2 + .../format.context/format.context/locale.pass.cpp | 2 + .../format.formatter.spec/formatter.char.pass.cpp | 2 + .../formatter.floating_point.pass.cpp | 418 +++- .../formatter.handle.pass.cpp | 76 + .../formatter.pointer.pass.cpp | 107 + .../formatter.signed_integral.pass.cpp | 2 + .../formatter.unsigned_integral.pass.cpp | 2 + .../format.formatter.spec/types.compile.pass.cpp | 370 +++ .../format/format.functions/format_tests.h | 1665 ++++++++++++- .../format.functions/locale-specific_form.pass.cpp | 1717 ++++++++++++++ libcxx/test/support/filesystem_test_helper.h | 6 + .../generate_feature_test_macro_components.py | 2 +- libcxxabi/src/demangle/ItaniumDemangle.h | 85 +- libcxxabi/src/demangle/StringView.h | 14 +- libcxxabi/src/demangle/Utility.h | 9 +- libcxxabi/src/demangle/cp-to-llvm.sh | 14 +- libcxxabi/test/test_demangle.pass.cpp | 2 + lld/ELF/Relocations.cpp | 5 +- lld/ELF/Relocations.h | 1 + lld/test/ELF/aarch64-combined-dynrel-ifunc.s | 5 +- lld/test/ELF/aarch64-combined-dynrel.s | 3 +- lld/test/ELF/aarch64-thunk-reuse.s | 49 + lld/test/ELF/arm-thunk-reuse.s | 52 + lldb/include/lldb/Utility/UserIDResolver.h | 1 + lldb/source/Commands/CommandCompletions.cpp | 2 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 56 +- .../Commands/CommandObjectBreakpointCommand.cpp | 9 +- lldb/source/Commands/CommandObjectCommands.cpp | 34 +- lldb/source/Commands/CommandObjectDisassemble.cpp | 3 +- lldb/source/Commands/CommandObjectExpression.cpp | 6 +- lldb/source/Commands/CommandObjectFrame.cpp | 18 +- lldb/source/Commands/CommandObjectHelp.cpp | 3 +- lldb/source/Commands/CommandObjectHelp.h | 2 +- lldb/source/Commands/CommandObjectLog.cpp | 5 +- lldb/source/Commands/CommandObjectMemory.cpp | 31 +- lldb/source/Commands/CommandObjectMemoryTag.cpp | 5 +- lldb/source/Commands/CommandObjectPlatform.cpp | 36 +- lldb/source/Commands/CommandObjectProcess.cpp | 45 +- lldb/source/Commands/CommandObjectRegexCommand.cpp | 2 +- lldb/source/Commands/CommandObjectRegister.cpp | 6 +- lldb/source/Commands/CommandObjectReproducer.cpp | 6 +- lldb/source/Commands/CommandObjectScript.h | 2 +- lldb/source/Commands/CommandObjectSession.cpp | 6 +- lldb/source/Commands/CommandObjectSettings.cpp | 15 +- lldb/source/Commands/CommandObjectSource.cpp | 12 +- lldb/source/Commands/CommandObjectStats.cpp | 2 +- lldb/source/Commands/CommandObjectTarget.cpp | 50 +- lldb/source/Commands/CommandObjectThread.cpp | 43 +- lldb/source/Commands/CommandObjectTrace.cpp | 15 +- lldb/source/Commands/CommandObjectType.cpp | 44 +- lldb/source/Commands/CommandObjectWatchpoint.cpp | 26 +- .../Commands/CommandObjectWatchpointCommand.cpp | 5 +- lldb/source/Commands/CommandOptionsProcessLaunch.h | 2 +- lldb/source/Host/common/Terminal.cpp | 2 +- .../ExpressionParser/Clang/CxxModuleHandler.cpp | 2 +- .../Plugins/Language/CPlusPlus/GenericBitset.cpp | 1 + .../Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp | 4 +- lldb/source/Utility/Timer.cpp | 4 +- .../command/nested_alias/TestNestedAlias.py | 7 + .../basic_entry_values/TestBasicEntryValues.py | 2 +- .../TestUnambiguousTailCalls.py | 2 +- .../Makefile | 0 .../TestAArch64LinuxTaggedMemoryAccess.py | 83 + .../API/linux/aarch64/tagged_memory_access/main.c | 19 + .../TestAArch64LinuxTaggedMemoryRead.py | 55 - .../API/linux/aarch64/tagged_memory_read/main.c | 15 - .../DWARF/x86/debug-types-dwo-cross-reference.cpp | 4 +- .../TestingSupport/MockTildeExpressionResolver.cpp | 1 + llvm/.gitattributes | 2 + llvm/docs/LangRef.rst | 42 +- llvm/docs/ReleaseNotes.rst | 11 +- llvm/docs/TestingGuide.rst | 2 +- llvm/include/llvm/ADT/CoalescingBitVector.h | 1 + llvm/include/llvm/ADT/CombinationGenerator.h | 2 +- llvm/include/llvm/ADT/STLExtras.h | 61 +- llvm/include/llvm/ADT/STLFunctionalExtras.h | 76 + llvm/include/llvm/ADT/SmallSet.h | 1 + llvm/include/llvm/ADT/SparseMultiSet.h | 2 +- llvm/include/llvm/ADT/SparseSet.h | 2 +- llvm/include/llvm/ADT/StringMap.h | 1 + llvm/include/llvm/ADT/StringMapEntry.h | 2 + llvm/include/llvm/ADT/StringRef.h | 11 +- llvm/include/llvm/ADT/StringSwitch.h | 1 + llvm/include/llvm/ADT/identity.h | 34 + .../include/llvm/Analysis/AliasAnalysisEvaluator.h | 16 +- llvm/include/llvm/Analysis/DependenceAnalysis.h | 17 +- llvm/include/llvm/Analysis/DivergenceAnalysis.h | 2 +- .../include/llvm/Analysis/IRSimilarityIdentifier.h | 2 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 2 +- .../include/llvm/Analysis/LazyBlockFrequencyInfo.h | 11 +- .../llvm/Analysis/LazyBranchProbabilityInfo.h | 4 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 33 +- llvm/include/llvm/Analysis/LoopAnalysisManager.h | 4 +- llvm/include/llvm/Analysis/MemorySSA.h | 4 +- .../include/llvm/Analysis/NoInferenceModelRunner.h | 2 +- llvm/include/llvm/Analysis/PHITransAddr.h | 4 +- .../include/llvm/Analysis/ReleaseModeModelRunner.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 +- .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 14 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 25 +- llvm/include/llvm/Demangle/ItaniumDemangle.h | 84 +- llvm/include/llvm/Demangle/StringView.h | 2 + llvm/include/llvm/Demangle/Utility.h | 2 + .../llvm/ExecutionEngine/JITLink/MemoryFlags.h | 1 + llvm/include/llvm/ExecutionEngine/JITLink/riscv.h | 32 +- llvm/include/llvm/IR/InstrTypes.h | 8 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 16 + llvm/include/llvm/IR/LLVMContext.h | 1 + llvm/include/llvm/IR/Type.h | 9 + llvm/include/llvm/MC/SubtargetFeature.h | 1 + llvm/include/llvm/ProfileData/MemProfData.inc | 4 +- llvm/include/llvm/Support/CrashRecoveryContext.h | 2 +- llvm/include/llvm/Support/JSON.h | 1 + llvm/include/llvm/Support/Parallel.h | 80 +- llvm/include/llvm/Support/TargetOpcodes.def | 3 +- llvm/include/llvm/Support/TimeProfiler.h | 1 + llvm/include/llvm/Support/Timer.h | 1 + llvm/include/llvm/Support/VirtualFileSystem.h | 1 + llvm/include/llvm/Support/raw_ostream.h | 1 + llvm/include/llvm/Target/GenericOpcodes.td | 7 + llvm/include/llvm/Testing/Support/Annotations.h | 2 + llvm/lib/Analysis/CaptureTracking.cpp | 12 +- llvm/lib/Analysis/ConstantFolding.cpp | 4 +- llvm/lib/Analysis/CostModel.cpp | 6 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 2 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 2 +- llvm/lib/Analysis/InlineCost.cpp | 7 +- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 10 +- llvm/lib/Analysis/LoopInfo.cpp | 5 +- llvm/lib/Analysis/MemorySSA.cpp | 4 +- llvm/lib/Analysis/ReplayInlineAdvisor.cpp | 3 +- llvm/lib/Analysis/ScalarEvolution.cpp | 2 +- llvm/lib/Analysis/ValueTracking.cpp | 4 +- llvm/lib/AsmParser/LLParser.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 12 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 3 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 24 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 16 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 38 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 47 +- llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp | 17 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 12 - llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 3 +- .../CodeGen/LiveDebugValues/LiveDebugValues.cpp | 7 +- llvm/lib/CodeGen/NonRelocatableStringpool.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 45 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 37 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 +- .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 12 +- llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp | 43 + llvm/lib/ExecutionEngine/JITLink/riscv.cpp | 10 + llvm/lib/IR/AutoUpgrade.cpp | 31 +- llvm/lib/IR/Constants.cpp | 9 +- llvm/lib/IR/Core.cpp | 25 +- llvm/lib/Object/Archive.cpp | 1 - llvm/lib/Support/CommandLine.cpp | 2 +- llvm/lib/Support/Parallel.cpp | 32 + llvm/lib/Support/RISCVISAInfo.cpp | 53 +- llvm/lib/Support/StringRef.cpp | 8 + llvm/lib/Support/ThreadPool.cpp | 1 + llvm/lib/Support/TimeProfiler.cpp | 2 +- llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp | 204 +- .../Target/AArch64/GISel/AArch64CallLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 1 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 17 + llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 1 + llvm/lib/Target/AMDGPU/MIMGInstructions.td | 58 + llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 3 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 1 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 8 + llvm/lib/Target/AVR/AVRISelLowering.cpp | 14 + llvm/lib/Target/AVR/AVRISelLowering.h | 2 + llvm/lib/Target/AVR/AVRInstrInfo.td | 6 +- llvm/lib/Target/AVR/AVRRegisterInfo.td | 20 - llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp | 13 +- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 9 +- llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 12 + llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 5 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 8 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 21 +- llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 12 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 1 + llvm/lib/Target/RISCV/RISCV.td | 132 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 121 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 2 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 54 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 4 + llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 99 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 16 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 93 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 68 +- llvm/lib/Target/RISCV/RISCVInstrInfoZk.td | 123 + llvm/lib/Target/RISCV/RISCVSchedRocket.td | 5 +- llvm/lib/Target/RISCV/RISCVSchedSiFive7.td | 5 +- llvm/lib/Target/RISCV/RISCVSubtarget.h | 36 +- llvm/lib/Target/RISCV/RISCVSystemOperands.td | 6 + llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp | 8 +- llvm/lib/Target/VE/LVLGen.cpp | 4 +- llvm/lib/Target/VE/VEMCInstLower.cpp | 3 +- .../Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 66 +- llvm/lib/Target/X86/X86PadShortFunction.cpp | 7 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- llvm/lib/Transforms/Coroutines/Coroutines.cpp | 4 +- llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 75 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 12 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 + .../Transforms/InstCombine/InstCombineCalls.cpp | 6 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 + .../InstCombine/InstCombineMulDivRem.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 64 + .../Instrumentation/HWAddressSanitizer.cpp | 17 +- llvm/lib/Transforms/Scalar/LoopFlatten.cpp | 432 ++-- llvm/lib/Transforms/Scalar/SROA.cpp | 6 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 91 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 7 +- llvm/lib/Transforms/Vectorize/VPlan.h | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 4 + llvm/runtimes/CMakeLists.txt | 14 +- llvm/test/Analysis/BasicAA/deoptimize.ll | 41 +- .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + .../CodeGen/AArch64/GlobalISel/assert-align.ll | 28 + .../AArch64/GlobalISel/regbank-assert-align.mir | 30 + llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir | 63 + llvm/test/CodeGen/AArch64/addsub.ll | 96 +- llvm/test/CodeGen/AArch64/arm64-rev.ll | 7 +- llvm/test/CodeGen/AArch64/arm64-vhadd.ll | 427 ++++ llvm/test/CodeGen/AArch64/concat-vector.ll | 2 +- llvm/test/CodeGen/AArch64/ext-narrow-index.ll | 229 +- .../CodeGen/AArch64/named-vector-shuffles-sve.ll | 48 +- llvm/test/CodeGen/AArch64/neon-stepvector.ll | 1 - llvm/test/CodeGen/AArch64/pr53315-returned-i128.ll | 25 + llvm/test/CodeGen/AArch64/shift_minsize.ll | 66 + llvm/test/CodeGen/AArch64/sve-cmp-select.ll | 37 +- .../CodeGen/AArch64/sve-fixed-length-sdiv-pow2.ll | 17 +- llvm/test/CodeGen/AArch64/sve-punpklo-combine.ll | 8 +- llvm/test/CodeGen/AArch64/sve2-int-mul.ll | 208 +- ...nfold-masked-merge-vector-variablemask-const.ll | 8 +- .../AArch64/xray-attribute-instrumentation.ll | 2 +- .../CodeGen/AArch64/xray-omit-function-index.ll | 4 +- .../xray-partial-instrumentation-skip-entry.ll | 2 +- .../xray-partial-instrumentation-skip-exit.ll | 2 +- llvm/test/CodeGen/AArch64/xray-tail-call-sled.ll | 2 +- .../test/CodeGen/AMDGPU/GlobalISel/assert-align.ll | 55 + .../test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir | 107 +- .../test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir | 104 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 116 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 99 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 99 +- .../AMDGPU/GlobalISel/irtranslator-assert-align.ll | 208 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 24 +- .../GlobalISel/regbankselect-assert-align.mir | 62 + llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll | 146 +- llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll | 146 +- llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 39 + llvm/test/CodeGen/ARM/shift-combine.ll | 20 +- .../ARM/xray-armv6-attribute-instrumentation.ll | 4 +- .../ARM/xray-armv7-attribute-instrumentation.ll | 4 +- llvm/test/CodeGen/ARM/xray-tail-call-sled.ll | 4 +- llvm/test/CodeGen/AVR/lpmx.ll | 22 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/store-undef.ll | 3 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- llvm/test/CodeGen/Hexagon/xray-pred-ret.ll | 2 +- llvm/test/CodeGen/Hexagon/xray.ll | 4 +- .../Mips/xray-mips-attribute-instrumentation.ll | 8 +- llvm/test/CodeGen/Mips/xray-section-group.ll | 8 +- llvm/test/CodeGen/PowerPC/combine-fneg.ll | 8 +- llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- .../PowerPC/xray-attribute-instrumentation.ll | 5 +- .../CodeGen/PowerPC/xray-conditional-return.ll | 2 +- .../test/CodeGen/PowerPC/xray-ret-is-terminator.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-hidden.ll | 2 +- llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll | 2 +- llvm/test/CodeGen/RISCV/attributes.ll | 65 +- .../RISCV/bswap-bitreverse-ctlz-cttz-ctpop.ll | 2441 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 1032 --------- llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 2 +- llvm/test/CodeGen/RISCV/rv32zbp.ll | 150 +- llvm/test/CodeGen/RISCV/rv64zbp.ll | 130 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 8 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 8 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 26 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 52 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 953 ++++++++ .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 4 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 66 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 --- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 --- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 +++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 1386 ----------- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfclass.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 --- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 --- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 +++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfmacc.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmadd.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 933 -------- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 917 -------- llvm/test/CodeGen/RISCV/rvv/vfmerge.ll | 904 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmin.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfmsac.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsub.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 197 -- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll | 200 ++ llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 482 ---- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 482 ---- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll | 484 ++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll | 634 +++++ .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 632 ----- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 1154 --------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 1130 --------- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll | 1108 +++++++++ llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 707 ------ llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll | 679 ++++++ llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrec7.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredmax.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredmin.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredosum.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 692 ------ llvm/test/CodeGen/RISCV/rvv/vfredusum.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 617 ----- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 708 ------ llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrsub.ll | 679 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 1385 ----------- llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 739 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 707 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll | 679 ++++++ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 754 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 722 ------ llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll | 694 ++++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 548 ----- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 707 ------ llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll | 619 +++++ llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 1417 ------------ llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 1386 ----------- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub.ll | 1357 +++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 1275 ---------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 1275 ---------- llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll | 1250 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 632 ----- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll | 634 +++++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll | 382 +++ .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 380 --- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 380 --- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll | 382 +++ llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwmul.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll | 510 ++++ llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 508 ---- llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll | 510 ++++ llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 848 ------- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.ll | 832 +++++++ llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 1275 ---------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 1275 ---------- llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll | 1250 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 758 ------ llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ------ llvm/test/CodeGen/RISCV/rvv/vid.ll | 760 ++++++ llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 882 ------- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 ------- llvm/test/CodeGen/RISCV/rvv/viota.ll | 884 +++++++ llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 - llvm/test/CodeGen/RISCV/rvv/vlm.ll | 96 + llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmand.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmandn.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmclr.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmnand.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmnor.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmor.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmorn.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 - llvm/test/CodeGen/RISCV/rvv/vmset.ll | 116 + llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsif.ll | 298 +++ llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 --- llvm/test/CodeGen/RISCV/rvv/vmsof.ll | 298 +++ llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmxnor.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 -- llvm/test/CodeGen/RISCV/rvv/vmxor.ll | 144 ++ llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 1280 ++++++++++ llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 137 -- llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 137 -- llvm/test/CodeGen/RISCV/rvv/vsm.ll | 139 ++ llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv32.mir | 2 +- .../CodeGen/RISCV/rvv/wrong-stack-slot-rv64.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 2 +- llvm/test/CodeGen/RISCV/scalable-vector-struct.ll | 2 +- llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll | 2 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 4 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 4 +- llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll | 4 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 112 +- llvm/test/CodeGen/X86/combine-sra-load.ll | 107 + llvm/test/CodeGen/X86/dpbusd_const.ll | 17 +- llvm/test/CodeGen/X86/extractelement-fp.ll | 8 +- llvm/test/CodeGen/X86/fp-round.ll | 14 +- llvm/test/CodeGen/X86/fp128-cast.ll | 2 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 16 +- llvm/test/CodeGen/X86/long-double-abi-align.ll | 4 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 10 +- llvm/test/CodeGen/X86/parity-vec.ll | 165 +- llvm/test/CodeGen/X86/pr43509.ll | 8 +- .../test/CodeGen/X86/pr53243-tail-call-fastisel.ll | 39 + llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 219 +- llvm/test/CodeGen/X86/scalar-fp-to-i64.ll | 32 +- llvm/test/CodeGen/X86/select-lea.ll | 177 ++ llvm/test/CodeGen/X86/shift-folding.ll | 25 + llvm/test/CodeGen/X86/smul-with-overflow.ll | 734 +++++- ...nfold-masked-merge-vector-variablemask-const.ll | 47 +- llvm/test/CodeGen/X86/vector-compare-all_of.ll | 15 +- llvm/test/CodeGen/X86/vector-compare-any_of.ll | 10 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 165 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 117 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 130 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 1090 ++++++++- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 1063 ++++++++- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 1159 +++++++++- llvm/test/CodeGen/X86/vselect-avx512.ll | 111 + .../CodeGen/X86/xray-attribute-instrumentation.ll | 7 +- llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-empty-firstmbb.mir | 2 +- .../test/CodeGen/X86/xray-ignore-loop-detection.ll | 4 +- llvm/test/CodeGen/X86/xray-log-args.ll | 4 +- llvm/test/CodeGen/X86/xray-loop-detection.ll | 4 +- .../CodeGen/X86/xray-multiplerets-in-blocks.mir | 2 +- .../X86/xray-partial-instrumentation-skip-entry.ll | 7 +- .../X86/xray-partial-instrumentation-skip-exit.ll | 6 +- llvm/test/CodeGen/X86/xray-section-group.ll | 6 +- .../CodeGen/X86/xray-selective-instrumentation.ll | 2 +- llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +- llvm/test/DebugInfo/X86/instr-ref-flag.ll | 4 + llvm/test/DebugInfo/X86/tu-to-non-tu.ll | 330 ++- .../JITLink/RISCV/ELF_pc_relative.s | 19 + .../ExecutionEngine/JITLink/RISCV/ELF_reloc_set.s | 31 + .../JITLink/RISCV/anonymous_symbol.s | 21 + .../LTO/Resolution/X86/Inputs/no-undef-type-md.ll | 13 + llvm/test/LTO/Resolution/X86/no-undef-type-md.ll | 37 + llvm/test/MC/PowerPC/gnu-attribute.s | 11 + llvm/test/MC/RISCV/attribute-arch-invalid.s | 6 - llvm/test/MC/RISCV/attribute-arch.s | 127 +- llvm/test/MC/RISCV/rv32zbkc-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkc-valid.s | 23 + llvm/test/MC/RISCV/rv32zbkx-invalid.s | 9 + llvm/test/MC/RISCV/rv32zbkx-valid.s | 17 + llvm/test/MC/RISCV/rv32zknd-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zknd-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv32zkne-only-valid.s | 13 + llvm/test/MC/RISCV/rv32zknh-only-valid.s | 29 + llvm/test/MC/RISCV/rv32zknh-valid.s | 26 + llvm/test/MC/RISCV/rv32zksed-invalid.s | 13 + llvm/test/MC/RISCV/rv32zksed-valid.s | 18 + llvm/test/MC/RISCV/rv32zksh-valid.s | 18 + llvm/test/MC/RISCV/rv64zknd-only-valid.s | 25 + llvm/test/MC/RISCV/rv64zkne-only-invalid.s | 17 + llvm/test/MC/RISCV/rv64zkne-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zknh-only-valid.s | 21 + llvm/test/MC/RISCV/rv64zksed-invalid.s | 13 + llvm/test/MC/RISCV/rvk-user-csr-name.s | 29 + llvm/test/MC/RISCV/rvv/add.s | 8 +- llvm/test/MC/RISCV/rvv/aliases.s | 4 +- llvm/test/MC/RISCV/rvv/and.s | 8 +- llvm/test/MC/RISCV/rvv/clip.s | 8 +- llvm/test/MC/RISCV/rvv/compare.s | 8 +- llvm/test/MC/RISCV/rvv/convert.s | 8 +- llvm/test/MC/RISCV/rvv/div.s | 8 +- llvm/test/MC/RISCV/rvv/ext.s | 8 +- llvm/test/MC/RISCV/rvv/fadd.s | 8 +- llvm/test/MC/RISCV/rvv/fcompare.s | 8 +- llvm/test/MC/RISCV/rvv/fdiv.s | 8 +- llvm/test/MC/RISCV/rvv/fmacc.s | 8 +- llvm/test/MC/RISCV/rvv/fminmax.s | 8 +- llvm/test/MC/RISCV/rvv/fmul.s | 8 +- llvm/test/MC/RISCV/rvv/fmv.s | 8 +- llvm/test/MC/RISCV/rvv/fothers.s | 8 +- llvm/test/MC/RISCV/rvv/freduction.s | 8 +- llvm/test/MC/RISCV/rvv/fsub.s | 8 +- llvm/test/MC/RISCV/rvv/invalid-eew.s | 2 +- llvm/test/MC/RISCV/rvv/invalid.s | 2 +- llvm/test/MC/RISCV/rvv/load.s | 8 +- llvm/test/MC/RISCV/rvv/macc.s | 8 +- llvm/test/MC/RISCV/rvv/mask.s | 8 +- llvm/test/MC/RISCV/rvv/minmax.s | 8 +- llvm/test/MC/RISCV/rvv/mul.s | 8 +- llvm/test/MC/RISCV/rvv/mv.s | 8 +- llvm/test/MC/RISCV/rvv/or.s | 8 +- llvm/test/MC/RISCV/rvv/others.s | 8 +- llvm/test/MC/RISCV/rvv/reduction.s | 8 +- llvm/test/MC/RISCV/rvv/shift.s | 8 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 8 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 8 +- llvm/test/MC/RISCV/rvv/sub.s | 8 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- llvm/test/MC/RISCV/rvv/vsetvl.s | 8 +- llvm/test/MC/RISCV/rvv/xor.s | 8 +- llvm/test/MC/RISCV/rvv/zvlsseg.s | 8 +- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 5 +- .../{coro-align-03.ll => coro-align16.ll} | 0 llvm/test/Transforms/Coroutines/coro-align32.ll | 60 + .../{coro-align-05.ll => coro-align64-02.ll} | 0 .../{coro-align-04.ll => coro-align64.ll} | 0 .../{coro-align-02.ll => coro-align8-02.ll} | 0 .../{coro-align-01.ll => coro-align8.ll} | 0 .../InstCombine/AMDGPU/amdgcn-intrinsics.ll | 565 +++++ .../Transforms/InstCombine/binop-phi-operands.ll | 122 +- .../Transforms/InstCombine/intrinsic-select.ll | 2 +- llvm/test/Transforms/InstCombine/intrinsics.ll | 56 +- .../test/Transforms/InstCombine/mul-masked-bits.ll | 47 +- llvm/test/Transforms/InstCombine/zext-or-icmp.ll | 12 +- .../Transforms/InstSimplify/ConstProp/bitcount.ll | 36 +- .../LoopVectorize/AArch64/induction-trunc.ll | 8 +- .../Transforms/LoopVectorize/AArch64/pr31900.ll | 12 +- .../AArch64/sve-epilog-vect-inloop-reductions.ll | 121 + .../AArch64/sve-epilog-vect-reductions.ll | 121 + .../AArch64/sve-epilog-vect-strict-reductions.ll | 116 + .../LoopVectorize/RISCV/masked_gather_scatter.ll | 4 +- .../Transforms/LoopVectorize/RISCV/reg-usage.ll | 8 +- .../LoopVectorize/RISCV/riscv-interleaved.ll | 2 +- .../Transforms/LoopVectorize/RISCV/riscv-unroll.ll | 8 +- .../LoopVectorize/RISCV/scalable-reductions.ll | 2 +- .../LoopVectorize/RISCV/scalable-vf-hint.ll | 2 +- .../RISCV/unroll-in-loop-vectorizer.ll | 2 +- .../X86/invariant-store-vectorization.ll | 106 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr42674.ll | 2 +- .../epilog-vectorization-reductions.ll | 529 +++++ llvm/test/Transforms/LoopVectorize/induction.ll | 138 +- .../optimal-epilog-vectorization-limitations.ll | 33 - .../LoopVectorize/single-value-blend-phis.ll | 96 +- .../tail-folding-vectorization-factor-1.ll | 96 +- .../LoopVectorize/vector-intrinsic-call-cost.ll | 26 +- llvm/test/Transforms/NewGVN/phi-of-ops-loads.ll | 148 ++ .../SLPVectorizer/RISCV/rvv-min-vector-size.ll | 6 +- llvm/test/tools/gold/X86/cache.ll | 4 +- .../tools/llvm-objcopy/MachO/update-section.test | 115 + .../Inputs/{basic-aa.txt => basic-aa.crlf} | 0 llvm/test/tools/split-file/Inputs/basic-bb.crlf | 4 + llvm/test/tools/split-file/basic.crlf.test | 10 + llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 56 + llvm/tools/llvm-objdump/MachODump.cpp | 4 +- llvm/tools/llvm-objdump/WasmDump.cpp | 2 +- llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp | 11 +- llvm/tools/split-file/split-file.cpp | 3 +- llvm/unittests/ADT/SequenceTest.cpp | 1 + llvm/unittests/ADT/SimpleIListTest.cpp | 1 + llvm/unittests/ADT/SmallPtrSetTest.cpp | 1 + llvm/unittests/ADT/StringMapTest.cpp | 1 + llvm/unittests/ADT/StringSetTest.cpp | 1 + llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 2 +- .../unittests/CodeGen/GlobalISel/KnownBitsTest.cpp | 55 + llvm/unittests/Support/ReverseIterationTest.cpp | 1 + .../clang-tidy/readability/BUILD.gn | 2 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + .../gn/secondary/llvm/include/llvm/Config/BUILD.gn | 3 +- .../mlir/Analysis/Presburger/PresburgerSet.h | 18 +- mlir/include/mlir/Analysis/Presburger/Utils.h | 17 + .../mlir/Conversion/GPUCommon/GPUCommonPass.h | 1 + .../Bufferization/IR/BufferizableOpInterface.h | 16 +- .../mlir/Dialect/Bufferization/IR/Bufferization.h | 1 + .../Bufferization/IR/BufferizationInterfaceImpl.h | 25 - .../Dialect/Bufferization/IR/BufferizationOps.td | 95 +- .../Dialect/Bufferization/Transforms/Bufferize.h | 7 +- .../ComprehensiveBufferize/TensorInterfaceImpl.h | 27 - mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 202 -- .../mlir/Dialect/Linalg/Transforms/HoistPadding.h | 25 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 72 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 16 +- .../Dialect/SparseTensor/IR/SparseTensorOps.td | 20 + mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 191 +- .../Dialect/Tensor/IR/TensorTilingInterfaceImpl.h | 36 + .../Transforms/BufferizableOpInterfaceImpl.h | 20 + mlir/include/mlir/Dialect/Tensor/Utils/Utils.h | 34 + mlir/include/mlir/InitAllDialects.h | 2 + mlir/lib/Analysis/Presburger/IntegerPolyhedron.cpp | 50 +- mlir/lib/Analysis/Presburger/PresburgerSet.cpp | 35 +- mlir/lib/Analysis/Presburger/Utils.cpp | 58 +- mlir/lib/CMakeLists.txt | 2 +- mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp | 3 +- .../Conversion/TosaToLinalg/TosaToLinalgNamed.cpp | 7 +- .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 22 +- .../Bufferization/IR/BufferizableOpInterface.cpp | 28 +- .../IR/BufferizationInterfaceImpl.cpp | 127 - .../Dialect/Bufferization/IR/BufferizationOps.cpp | 139 +- mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt | 16 +- .../Dialect/Bufferization/Transforms/Bufferize.cpp | 4 + .../Bufferization/Transforms/CMakeLists.txt | 1 - .../Linalg/ComprehensiveBufferize/CMakeLists.txt | 25 +- .../ComprehensiveBufferize/ModuleBufferization.cpp | 20 +- .../ComprehensiveBufferize/TensorInterfaceImpl.cpp | 484 ---- mlir/lib/Dialect/Linalg/IR/CMakeLists.txt | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 565 ----- mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp | 4 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 4 +- .../Transforms/ComprehensiveBufferizePass.cpp | 10 +- .../lib/Dialect/Linalg/Transforms/HoistPadding.cpp | 176 +- .../Linalg/Transforms/LinalgStrategyPasses.cpp | 6 +- .../Dialect/Linalg/Transforms/PadOpInterchange.cpp | 13 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 47 +- mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 65 +- .../Dialect/Linalg/Transforms/Vectorization.cpp | 75 +- mlir/lib/Dialect/Linalg/Utils/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 95 +- .../Math/Transforms/PolynomialApproximation.cpp | 134 +- .../SparseTensor/IR/SparseTensorDialect.cpp | 6 + .../Dialect/SparseTensor/Transforms/CMakeLists.txt | 2 +- .../Transforms/SparseTensorConversion.cpp | 70 +- mlir/lib/Dialect/Tensor/CMakeLists.txt | 1 + mlir/lib/Dialect/Tensor/IR/CMakeLists.txt | 18 + .../Tensor/IR/TensorInferTypeOpInterfaceImpl.cpp | 43 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 253 ++ .../Tensor/IR/TensorTilingInterfaceImpl.cpp | 279 +++ .../Transforms/BufferizableOpInterfaceImpl.cpp | 508 ++++ mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt | 2 + mlir/lib/Dialect/Tensor/Utils/CMakeLists.txt | 12 + mlir/lib/Dialect/Tensor/Utils/Utils.cpp | 54 + mlir/lib/Dialect/Tosa/IR/TosaOps.cpp | 31 + mlir/lib/ExecutionEngine/SparseTensorUtils.cpp | 98 +- mlir/lib/Parser/Token.h | 1 + .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 6 +- .../dialects/linalg/opdsl/lang/comprehension.py | 2 +- .../TosaToLinalg/tosa-to-linalg-named.mlir | 20 +- .../Conversion/TosaToLinalg/tosa-to-linalg.mlir | 16 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 22 + mlir/test/Dialect/Linalg/bufferize.mlir | 4 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 204 +- mlir/test/Dialect/Linalg/codegen-strategy.mlir | 2 +- .../Linalg/comprehensive-function-bufferize.mlir | 2 +- .../comprehensive-module-bufferize-alloca.mlir | 6 +- .../Linalg/comprehensive-module-bufferize.mlir | 17 +- .../test/Dialect/Linalg/generalize-pad-tensor.mlir | 8 +- mlir/test/Dialect/Linalg/hoist-padding.mlir | 165 +- mlir/test/Dialect/Linalg/invalid.mlir | 65 - mlir/test/Dialect/Linalg/lower-pad-tensor.mlir | 12 +- mlir/test/Dialect/Linalg/pad.mlir | 58 +- mlir/test/Dialect/Linalg/pad_fusion.mlir | 8 +- .../Linalg/resolve-shaped-type-result-dims.mlir | 4 +- mlir/test/Dialect/Linalg/roundtrip.mlir | 71 - .../Dialect/Linalg/subtensor-of-padtensor.mlir | 80 +- .../test/Dialect/Linalg/tile-and-fuse-tensors.mlir | 6 +- mlir/test/Dialect/Linalg/tile-pad-tensor-op.mlir | 22 +- mlir/test/Dialect/Linalg/vectorization.mlir | 52 +- .../Dialect/Math/polynomial-approximation.mlir | 82 + mlir/test/Dialect/SparseTensor/conversion.mlir | 24 + mlir/test/Dialect/SparseTensor/invalid.mlir | 8 + mlir/test/Dialect/SparseTensor/roundtrip.mlir | 14 + mlir/test/Dialect/Tensor/canonicalize.mlir | 196 ++ mlir/test/Dialect/Tensor/invalid.mlir | 46 + mlir/test/Dialect/Tensor/ops.mlir | 74 + mlir/test/Dialect/Tosa/canonicalize.mlir | 10 + .../Linalg/CPU/test-comprehensive-bufferize.mlir | 8 +- .../Dialect/Linalg/CPU/test-padtensor.mlir | 4 +- .../Dialect/SparseTensor/taco/lit.local.cfg | 5 + mlir/test/lib/Dialect/Linalg/CMakeLists.txt | 4 +- .../Dialect/Linalg/TestComprehensiveBufferize.cpp | 6 +- .../Dialect/Linalg/TestLinalgCodegenStrategy.cpp | 23 + .../lib/Dialect/Linalg/TestLinalgTransforms.cpp | 7 +- .../mlir-cpu-runner/math-polynomial-approx.mlir | 118 + .../Analysis/Presburger/IntegerPolyhedronTest.cpp | 27 +- openmp/CMakeLists.txt | 5 + openmp/libompd/src/CMakeLists.txt | 2 +- openmp/runtime/cmake/LibompCheckLinkerFlag.cmake | 2 + openmp/runtime/src/CMakeLists.txt | 6 +- openmp/runtime/src/kmp_atomic.cpp | 15 +- openmp/tools/multiplex/CMakeLists.txt | 2 +- utils/bazel/llvm-project-overlay/libc/BUILD.bazel | 5 + utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 114 +- .../llvm-project-overlay/mlir/test/BUILD.bazel | 3 +- 1986 files changed, 88965 insertions(+), 122963 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/readability/ContainerContainsCheck.h create mode 100644 clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability-container- [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability-duplicate- [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/readability-containe [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/readability-duplicat [...] create mode 100644 clang/test/CXX/module/module.interface/p2-2.cpp create mode 100644 clang/test/CXX/module/module.interface/p6.cpp create mode 100644 clang/test/CodeGen/RISCV/rvv-intrinsics/rvv-error.c copy clang/test/Driver/Inputs/{CUDA-macosx/usr/local/cuda/bin => powerpc64le-linux [...] create mode 100644 clang/test/Driver/ppc-float-abi-warning.cpp create mode 100644 clang/test/Modules/cxx20-export-import.cpp create mode 100644 clang/test/Templight/templight-empty-entries-fix.cpp create mode 100644 flang/examples/FlangOmpReport/CMakeLists.txt create mode 100644 flang/examples/FlangOmpReport/FlangOmpReport.cpp create mode 100644 flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp rename flang/examples/{flang-omp-report-plugin/flang-omp-report-visitor.h => Flang [...] rename flang/examples/{flang-omp-report-plugin => FlangOmpReport}/requirements.txt (100%) rename flang/examples/{flang-omp-report-plugin => FlangOmpReport}/yaml_summarizer. [...] delete mode 100644 flang/examples/flang-omp-report-plugin/CMakeLists.txt delete mode 100644 flang/examples/flang-omp-report-plugin/flang-omp-report-visitor.cpp delete mode 100644 flang/examples/flang-omp-report-plugin/flang-omp-report.cpp create mode 100644 flang/test/Semantics/omp-atomic02.f90 create mode 100644 flang/test/Semantics/omp-atomic03.f90 create mode 100644 flang/test/Semantics/omp-atomic04.f90 create mode 100644 flang/test/Semantics/omp-atomic05.f90 create mode 100644 libcxx/benchmarks/formatter_float.bench.cpp create mode 100644 libcxx/include/__format/formatter_floating_point.h create mode 100644 libcxx/include/__format/formatter_pointer.h create mode 100644 libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_ [...] create mode 100644 libcxx/test/libcxx/diagnostics/detail.headers/format/formatter_ [...] create mode 100644 libcxx/test/libcxx/utilities/format/format.string/format.string [...] create mode 100644 libcxx/test/libcxx/utilities/format/format.string/format.string [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/iterator.operators.a [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/assi [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/move [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/move [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.modifiers/ [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.swap/swap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multiset/unord.multiset. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multiset/unord.multiset. [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/emplace_hint.address [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/insert_hint_const_lv [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/insert_hint_rvalue.a [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/iterator.operators.a [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/move [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/unord.set.cnstr/move [...] create mode 100644 libcxx/test/std/utilities/format/format.formatter/format.contex [...] create mode 100644 libcxx/test/std/utilities/format/format.formatter/format.contex [...] create mode 100644 libcxx/test/std/utilities/format/format.formatter/format.format [...] create mode 100644 lld/test/ELF/aarch64-thunk-reuse.s create mode 100644 lld/test/ELF/arm-thunk-reuse.s rename lldb/test/API/linux/aarch64/{tagged_memory_read => tagged_memory_access}/Ma [...] create mode 100644 lldb/test/API/linux/aarch64/tagged_memory_access/TestAArch64Lin [...] create mode 100644 lldb/test/API/linux/aarch64/tagged_memory_access/main.c delete mode 100644 lldb/test/API/linux/aarch64/tagged_memory_read/TestAArch64Linux [...] delete mode 100644 lldb/test/API/linux/aarch64/tagged_memory_read/main.c create mode 100644 llvm/include/llvm/ADT/STLFunctionalExtras.h create mode 100644 llvm/include/llvm/ADT/identity.h create mode 100644 llvm/lib/Target/RISCV/RISCVInstrInfoZk.td create mode 100644 llvm/test/Bitcode/upgrade-datalayout4.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/assert-align.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-align.mir create mode 100644 llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir create mode 100644 llvm/test/CodeGen/AArch64/pr53315-returned-i128.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-assert-align.mir create mode 100644 llvm/test/CodeGen/RISCV/bswap-bitreverse-ctlz-cttz-ctpop.ll delete mode 100644 llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vcpop.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfadd.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfclass.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfdiv.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfirst.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmacc.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmadd.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmax.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmerge.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmin.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsac.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmsub.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmul.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.v.f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmacc.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmadd.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsac.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfnmsub.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrdiv.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrec7.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmax.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredmin.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredosum.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfredusum.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsqrt7.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfrsub.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnj.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjn.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsgnjx.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1down.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfslide1up.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsub.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmacc.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmsac.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwmul.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmacc.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwnmsac.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredosum.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwredusum.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vid.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/viota.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vlm-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlm.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmand.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmandn-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmandn.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmclr.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnand.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmnor.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmor.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmorn-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmorn.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmset.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsif.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmsof.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxnor.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmxor.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll delete mode 100644 llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsm.ll create mode 100644 llvm/test/CodeGen/X86/combine-sra-load.ll create mode 100644 llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll create mode 100644 llvm/test/CodeGen/X86/select-lea.ll create mode 100644 llvm/test/CodeGen/X86/vselect-avx512.ll create mode 100644 llvm/test/ExecutionEngine/JITLink/RISCV/ELF_pc_relative.s create mode 100644 llvm/test/ExecutionEngine/JITLink/RISCV/ELF_reloc_set.s create mode 100644 llvm/test/ExecutionEngine/JITLink/RISCV/anonymous_symbol.s create mode 100644 llvm/test/LTO/Resolution/X86/Inputs/no-undef-type-md.ll create mode 100644 llvm/test/LTO/Resolution/X86/no-undef-type-md.ll create mode 100644 llvm/test/MC/PowerPC/gnu-attribute.s create mode 100644 llvm/test/MC/RISCV/rv32zbkc-invalid.s create mode 100644 llvm/test/MC/RISCV/rv32zbkc-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zbkx-invalid.s create mode 100644 llvm/test/MC/RISCV/rv32zbkx-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zknd-only-invalid.s create mode 100644 llvm/test/MC/RISCV/rv32zknd-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zkne-only-invalid.s create mode 100644 llvm/test/MC/RISCV/rv32zkne-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zknh-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zknh-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zksed-invalid.s create mode 100644 llvm/test/MC/RISCV/rv32zksed-valid.s create mode 100644 llvm/test/MC/RISCV/rv32zksh-valid.s create mode 100644 llvm/test/MC/RISCV/rv64zknd-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv64zkne-only-invalid.s create mode 100644 llvm/test/MC/RISCV/rv64zkne-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv64zknh-only-valid.s create mode 100644 llvm/test/MC/RISCV/rv64zksed-invalid.s create mode 100644 llvm/test/MC/RISCV/rvk-user-csr-name.s rename llvm/test/Transforms/Coroutines/{coro-align-03.ll => coro-align16.ll} (100%) create mode 100644 llvm/test/Transforms/Coroutines/coro-align32.ll rename llvm/test/Transforms/Coroutines/{coro-align-05.ll => coro-align64-02.ll} (100%) rename llvm/test/Transforms/Coroutines/{coro-align-04.ll => coro-align64.ll} (100%) rename llvm/test/Transforms/Coroutines/{coro-align-02.ll => coro-align8-02.ll} (100%) rename llvm/test/Transforms/Coroutines/{coro-align-01.ll => coro-align8.ll} (100%) create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inlo [...] create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-redu [...] create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-stri [...] create mode 100644 llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll create mode 100644 llvm/test/Transforms/NewGVN/phi-of-ops-loads.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/update-section.test copy llvm/test/tools/split-file/Inputs/{basic-aa.txt => basic-aa.crlf} (100%) create mode 100644 llvm/test/tools/split-file/Inputs/basic-bb.crlf create mode 100644 llvm/test/tools/split-file/basic.crlf.test delete mode 100644 mlir/include/mlir/Dialect/Bufferization/IR/BufferizationInterfa [...] delete mode 100644 mlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/TensorI [...] create mode 100644 mlir/include/mlir/Dialect/Tensor/IR/TensorTilingInterfaceImpl.h create mode 100644 mlir/include/mlir/Dialect/Tensor/Transforms/BufferizableOpInter [...] create mode 100644 mlir/include/mlir/Dialect/Tensor/Utils/Utils.h delete mode 100644 mlir/lib/Dialect/Bufferization/IR/BufferizationInterfaceImpl.cpp delete mode 100644 mlir/lib/Dialect/Linalg/ComprehensiveBufferize/TensorInterfaceImpl.cpp create mode 100644 mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp create mode 100644 mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp create mode 100644 mlir/lib/Dialect/Tensor/Utils/CMakeLists.txt create mode 100644 mlir/lib/Dialect/Tensor/Utils/Utils.cpp create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/lit.local.cfg -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 updated (ee8d5e33ad -> 5b8e7980c5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 in repository toolchain/ci/glibc. from ee8d5e33ad realpath: Set errno to ENAMETOOLONG for result larger than P [...] adds e22a4557eb elf: Properly align all PT_LOAD segments [BZ #28676] adds 8c86ba4463 htl: Fix cleaning the reply port adds 6c2f050dbe Add valgrind smoke test adds 23e0e8f5f1 getcwd: Set errno to ERANGE for size == 1 (CVE-2021-3999) adds 976db046bc tst-realpath-toolong: Fix hurd build adds 114d07fd9a Add and use link-test-modules-rpath-link [BZ #28455] adds b5237c0746 elf: Add a test for PT_LOAD segments with mixed p_align [BZ #28676] adds e4c9268d15 elf: Add a test for PT_LOAD segments with p_align == 1 [BZ #28688] adds d8d94863ef elf: Add a test for PT_LOAD segments with invalid p_align [B [...] adds 84d2d0fe20 realpath: Avoid overwriting preexisting error (CVE-2021-3998) adds 8442f0d966 Fix handling of unterminated bracket expressions in fnmatch [...] adds 5b8e7980c5 Linux: Detect user namespace support in io/tst-getcwd-smallbuff No new revisions were added by this update. Summary of changes: Makeconfig | 2 + Makerules | 1 + NEWS | 6 + elf/Makefile | 53 +++++ elf/dl-load.c | 9 +- elf/tst-elf-edit.h | 126 ++++++++++ stdlib/tst-realpath-toolong.c => elf/tst-global2.c | 35 +-- elf/tst-globalmod2.c | 41 ++++ elf/tst-p_align.h | 20 ++ .../tst-realpath-toolong.c => elf/tst-p_align1.c | 32 +-- .../tst-realpath-toolong.c => elf/tst-p_align2.c | 32 +-- .../tst-realpath-toolong.c => elf/tst-p_align3.c | 32 +-- elf/tst-p_align3.sh | 27 +++ .../tst-p_alignmod-base.c | 44 ++-- elf/tst-p_alignmod1-edit.c | 27 +++ elf/tst-p_alignmod2-edit.c | 27 +++ elf/tst-p_alignmod3.c | 25 ++ elf/tst-valgrind-smoke.sh | 46 ++++ .../tst-realpath-toolong.c => elf/valgrind-test.c | 46 ++-- htl/pt-alloc.c | 5 +- htl/pt-create.c | 6 +- htl/pt-dealloc.c | 13 +- htl/pt-detach.c | 6 - htl/pt-internal.h | 16 +- htl/pt-join.c | 6 - posix/Makefile | 2 +- posix/fnmatch_loop.c | 9 +- .../tst-realpath-toolong.c => posix/tst-fnmatch7.c | 36 +-- stdlib/canonicalize.c | 2 +- stdlib/tst-realpath-toolong.c | 4 + sysdeps/mach/htl/pt-thread-terminate.c | 26 ++- sysdeps/posix/getcwd.c | 7 + sysdeps/unix/sysv/linux/Makefile | 7 +- sysdeps/unix/sysv/linux/tst-getcwd-smallbuff.c | 259 +++++++++++++++++++++ 34 files changed, 815 insertions(+), 220 deletions(-) create mode 100644 elf/tst-elf-edit.h copy stdlib/tst-realpath-toolong.c => elf/tst-global2.c (51%) create mode 100644 elf/tst-globalmod2.c create mode 100644 elf/tst-p_align.h copy stdlib/tst-realpath-toolong.c => elf/tst-p_align1.c (51%) copy stdlib/tst-realpath-toolong.c => elf/tst-p_align2.c (51%) copy stdlib/tst-realpath-toolong.c => elf/tst-p_align3.c (51%) create mode 100755 elf/tst-p_align3.sh copy stdlib/tst-realpath-toolong.c => elf/tst-p_alignmod-base.c (51%) create mode 100644 elf/tst-p_alignmod1-edit.c create mode 100644 elf/tst-p_alignmod2-edit.c create mode 100644 elf/tst-p_alignmod3.c create mode 100644 elf/tst-valgrind-smoke.sh copy stdlib/tst-realpath-toolong.c => elf/valgrind-test.c (50%) copy stdlib/tst-realpath-toolong.c => posix/tst-fnmatch7.c (54%) create mode 100644 sysdeps/unix/sysv/linux/tst-getcwd-smallbuff.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 updated (087e545747c -> 4343f5e2567)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 in repository toolchain/ci/gcc. from 087e545747c Strengthen a few OpenACC test cases adds 3abcbf24323 c++: ICE with noexcept and canonical types [PR101715] adds 85419ac5972 [PR103676] LRA: Calculate and exclude some start hard regis [...] adds 886e9779581 PR middle-end/104140: bootstrap ICE on riscv. adds 518aad6a161 rs6000: Fix bootstrap adds afe91e2566f rs6000: Support vector float/double for vec_sldw adds c163647ffbc Disable -fsplit-stack support on non-glibc targets adds 847a8301add c++: class array new checking [PR104084] adds 2e01fde49ea c++: explain failing static_assert adds f36efe71bef c-family: Fix up a -Wformat regression [PR104148] adds 60953a23d57 x86: Properly disable -fsplit-stack support on non-glibc targets adds f9063d12633 Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 adds 9dd443578f3 Daily bump. adds abe3a4f0e9c Fix fold-vec-splat-floatdouble testsuite failure on power10 adds 0f4f9c0085e toplevel: Remove accedentally checked in file adds 6c1a93102b4 Fortran: fix simplification of TRANSFER for zero-sized char [...] adds 45b999f642a analyzer: fix ICE on vector casts [PR104159] adds a1fb81bda97 testsuite: guard usage of _Float16 in analyzer test [PR104150] adds 9ea451e2793 ootstrap: Fix bootstrap with --disable-plugin [PR104176] adds d43be9dcc1b Daily bump. adds 053bcc97f4a c++: constexpr and -fno-elide-constructors [PR101072] adds 9718bc4b03c c++: array temporary at file scope [PR104182] adds 603a9ab41f4 contrib: filter out one more Clang warning. adds cbcf4a50fa2 [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into inte [...] adds 2da90ad39bf c++: designated init of char array by string constant [PR55227] adds 2d8a9ad4a92 libstdc++: Fix aliasing violation in std::shared_ptr [PR104019] adds 084680db9af libstdc++: Restore support for unordered_map<const T, ...> [...] adds 416b6fc7483 libstdc++: Use fast_float for long double if it uses binary [...] adds 51631875a2f libstdc++: Fix std::spanstream move assignment [PR104032] adds 0c940703f00 Daily bump. adds 4d2321314a6 x86: Also check mode of memory broadcast in bcst_mem_operand adds 7b84fa2a2dd testsuite: Ignore pr104159 psabi warning. adds add6bb52e34 RISC-V: Update testcases info with new implement info adds 634de54f9c4 Update the type of control.base after changed adds 98416dbb0a6 RISC-V: Change default ISA version into 20191213 adds ca2bbb88f99 RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 adds c106529eb21 RISC-V: Fix testcase after bump isa spec version adds 2c31a8be4a5 properly disable -fsplit-stack on non-glibc targets [PR104170] adds 385196adb52 options: Add EnumSet and Set property support [PR104158] adds cd0377a460d options: Fix up -fsanitize-coverage= [PR104158] adds 9acd5a01175 fortran: Extend -fconvert= option for ppc64le r16_ieee and r16_ibm adds 0ebb09f5e49 options: Add EnumBitSet property support [PR104158] adds 2755037e40a acinclude.m4: Remove duplicite AC_DEFUN. adds f1af8528d34 tree-optimization/102131 - fix niter analysis wrt overflow adds 978abe918f8 gcc-changelog: Be stricter for top-level dir. adds 2a908f3da07 c++: value category of compound object expr [PR104173] adds b1aa2a3cf1b c++: Fix non-portable default argument of make_auto_1 [PR104197] adds 4343f5e2567 rtl: builtins: (not just) rs6000: Add builtins for fegetrou [...] No new revisions were added by this update. Summary of changes: ChangeLog | 5 + build.log | 0 contrib/ChangeLog | 5 + contrib/filter-clang-warnings.py | 3 +- contrib/gcc-changelog/git_commit.py | 12 +- contrib/gcc-changelog/test_email.py | 5 + contrib/gcc-changelog/test_patches.txt | 82 +++++++++ gcc/ChangeLog | 205 +++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 8 + gcc/analyzer/region-model-manager.cc | 11 ++ gcc/builtins.cc | 76 ++++++++ gcc/c-family/ChangeLog | 12 ++ gcc/c-family/c-common.cc | 25 ++- gcc/c-family/c-common.h | 3 +- gcc/c-family/c-format.cc | 2 +- gcc/common.opt | 6 +- gcc/common/config/i386/i386-common.cc | 17 +- gcc/common/config/riscv/riscv-common.cc | 14 +- gcc/common/config/s390/s390-common.cc | 14 +- gcc/config.gcc | 8 +- gcc/config/aarch64/aarch64-builtins.cc | 7 + gcc/config/alpha/linux.h | 25 ++- gcc/config/fuchsia.h | 2 + gcc/config/glibc-stdint.h | 3 + gcc/config/i386/predicates.md | 2 + gcc/config/linux.h | 25 ++- gcc/config/riscv/riscv-c.cc | 3 + gcc/config/rs6000/linux.h | 25 ++- gcc/config/rs6000/linux64.h | 25 ++- gcc/config/rs6000/rs6000-overload.def | 4 + gcc/config/rs6000/rs6000-protos.h | 1 - gcc/config/rs6000/rs6000.cc | 40 +--- gcc/config/rs6000/rs6000.md | 135 +++++++++++++- gcc/config/rs6000/vsx.md | 12 +- gcc/cp/ChangeLog | 51 +++++ gcc/cp/call.cc | 32 ++-- gcc/cp/cp-gimplify.cc | 6 +- gcc/cp/cp-tree.h | 1 + gcc/cp/decl.cc | 35 ++-- gcc/cp/init.cc | 2 +- gcc/cp/pt.cc | 14 +- gcc/cp/semantics.cc | 42 +++-- gcc/cp/tree.cc | 25 ++- gcc/cp/typeck.cc | 19 +- gcc/doc/extend.texi | 8 + gcc/doc/generic.texi | 9 + gcc/doc/md.texi | 17 ++ gcc/doc/options.texi | 33 ++++ gcc/fortran/ChangeLog | 8 + gcc/fortran/lang.opt | 18 +- gcc/fortran/simplify.cc | 13 +- gcc/fortran/trans-types.cc | 3 + gcc/ira.cc | 14 +- gcc/ira.h | 7 + gcc/lra-assigns.cc | 2 +- gcc/lra-constraints.cc | 148 +++++++++------ gcc/lra-int.h | 8 +- gcc/lra-remat.cc | 2 +- gcc/lra.cc | 18 +- gcc/lra.h | 2 - gcc/opt-functions.awk | 7 +- gcc/opt-read.awk | 4 + gcc/optabs.def | 4 + gcc/optc-gen.awk | 2 + gcc/opts-common.cc | 180 ++++++++++++++++-- gcc/opts-global.cc | 6 +- gcc/opts.cc | 59 +++++- gcc/opts.h | 24 ++- gcc/testsuite/ChangeLog | 131 +++++++++++++ gcc/testsuite/c-c++-common/Wformat-pr104148.c | 33 ++++ gcc/testsuite/g++.dg/cpp0x/constexpr-empty14a.C | 11 ++ gcc/testsuite/g++.dg/cpp0x/initlist127.C | 39 ++++ gcc/testsuite/g++.dg/cpp0x/noexcept72.C | 21 +++ gcc/testsuite/g++.dg/cpp0x/noexcept73.C | 13 ++ gcc/testsuite/g++.dg/cpp0x/ref-qual21.C | 23 +++ gcc/testsuite/g++.dg/cpp2a/desig21.C | 48 +++++ gcc/testsuite/g++.dg/init/new50.C | 9 + gcc/testsuite/g++.dg/template/explicit-args6.C | 2 + gcc/testsuite/g++.target/arm/pr103676.C | 32 ++++ gcc/testsuite/gcc.dg/analyzer/pr104089.c | 2 + gcc/testsuite/gcc.dg/analyzer/torture/pr104159.c | 18 ++ gcc/testsuite/gcc.dg/pr102087_1.c | 13 ++ gcc/testsuite/gcc.dg/sancov/pr104158-1.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-2.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-3.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-4.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-5.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-6.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-7.c | 11 ++ gcc/testsuite/gcc.dg/spellcheck-options-24.c | 5 + gcc/testsuite/gcc.dg/torture/pr100740.c | 12 ++ gcc/testsuite/gcc.dg/torture/pr101508.c | 13 ++ gcc/testsuite/gcc.dg/torture/pr101972.c | 39 ++++ gcc/testsuite/gcc.dg/torture/pr102131-1.c | 16 ++ gcc/testsuite/gcc.dg/torture/pr102131-2.c | 15 ++ gcc/testsuite/gcc.dg/torture/pr102131-3.c | 11 ++ gcc/testsuite/gcc.dg/torture/pr102131-4.c | 15 ++ gcc/testsuite/gcc.target/aarch64/vsqrt-1.c | 17 ++ gcc/testsuite/gcc.target/aarch64/vsqrt-2.c | 28 +++ gcc/testsuite/gcc.target/i386/pr104188.c | 70 +++++++ .../builtin-feclearexcept-feraiseexcept-1.c | 76 ++++++++ .../builtin-feclearexcept-feraiseexcept-2.c | 91 +++++++++ .../gcc.target/powerpc/builtin-fegetround.c | 36 ++++ gcc/testsuite/gcc.target/powerpc/builtins-4.c | 34 +++- .../powerpc/fold-vec-splat-floatdouble.c | 5 +- gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-19.c | 2 +- gcc/testsuite/gcc.target/riscv/pr104140.c | 11 ++ gcc/testsuite/gfortran.dg/transfer_simplify_11.f90 | 2 +- gcc/testsuite/gfortran.dg/transfer_simplify_13.f90 | 34 ++++ gcc/tree-ssa-loop-niter.cc | 49 +++-- gcc/tree-ssa-math-opts.cc | 4 + gcc/tree.def | 14 +- libatomic/acinclude.m4 | 102 ---------- libatomic/configure | 6 +- libgomp/ChangeLog | 18 ++ libstdc++-v3/ChangeLog | 110 +++++++++++ libstdc++-v3/include/bits/hashtable_policy.h | 11 ++ libstdc++-v3/include/bits/shared_ptr_base.h | 2 +- libstdc++-v3/include/std/spanstream | 15 +- libstdc++-v3/src/c++17/floating_from_chars.cc | 38 +++- .../23_containers/unordered_map/104174.cc | 4 + libstdc++-v3/testsuite/27_io/spanstream/2.cc | 113 ++++++++++++ 126 files changed, 2682 insertions(+), 461 deletions(-) delete mode 100644 build.log create mode 100644 gcc/testsuite/c-c++-common/Wformat-pr104148.c create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-empty14a.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/initlist127.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept72.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept73.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/ref-qual21.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/desig21.C create mode 100644 gcc/testsuite/g++.dg/init/new50.C create mode 100644 gcc/testsuite/g++.target/arm/pr103676.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/pr104159.c create mode 100644 gcc/testsuite/gcc.dg/pr102087_1.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-1.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-2.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-3.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-4.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-5.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-6.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-7.c create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-24.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr100740.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101508.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101972.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-3.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104188.c create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-fegetround.c create mode 100644 gcc/testsuite/gcc.target/riscv/pr104140.c create mode 100644 gcc/testsuite/gfortran.dg/transfer_simplify_13.f90 create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/104174.cc create mode 100644 libstdc++-v3/testsuite/27_io/spanstream/2.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 updated (ed09c325ec -> 2f279a64a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 in repository toolchain/ci/binutils-gdb. from ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in adds 31b0378d53 Regenerate configure files with autoconf 2.69 adds ad69b6b861 Regenerate Makefile.in files with automake 1.15.1 adds 0e3839bde6 bfd: Properly install library and header files adds 451c003d5f bfd: Partially revert commit 0e3839bde6f adds f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 16 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 508 +- bfd/configure | 42 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 --- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 152 + bfd/po/bfd.pot | 112 +- bfd/po/fr.po | 3116 ++++---- bfd/po/ro.po | 10194 ++++++++++++++++++++----- bfd/po/uk.po | 3102 ++++---- bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 21 + binutils/Makefile.in | 1 - binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 20 +- binutils/dlltool.c | 34 +- binutils/po/bg.po | 6039 +++++++++------ binutils/po/binutils.pot | 4084 +++++----- binutils/po/fr.po | 4192 +++++----- binutils/po/ro.po | 13085 +++++++++++++++++++++++++------- binutils/po/uk.po | 4202 +++++----- config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 13 + gas/Makefile.in | 1 - gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 20 +- gas/po/gas.pot | 20 +- gas/po/uk.po | 4880 ++++++------ gdb/doc/python.texi | 6 +- gdb/rust-exp.h | 39 +- gdb/rust-lang.c | 44 +- gold/ChangeLog | 15 + gold/po/gold.pot | 248 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 14 + gprof/configure | 20 +- gprof/po/gprof.pot | 4 +- gprof/po/ro.po | 386 +- include/ChangeLog | 4 + ld/ChangeLog | 20 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 20 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/bg.po | 4373 ++++++----- ld/po/ld.pot | 218 +- ld/po/uk.po | 3264 ++++---- libctf/ChangeLog | 4 + libiberty/ChangeLog | 8 + libiberty/regex.c | 4 + opcodes/ChangeLog | 14 + opcodes/Makefile.in | 1 - opcodes/configure | 20 +- opcodes/po/de.po | 512 +- opcodes/po/opcodes.pot | 2 +- opcodes/po/ro.po | 2948 +++++-- opcodes/po/uk.po | 530 +- 69 files changed, 43546 insertions(+), 24625 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 updated (33780ad96 -> 77709e575)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master-arm-spec2k6-O3 in repository toolchain/ci/base-artifacts. discards 33780ad96 0: update: binutils-gcc-linux-glibc-llvm: 1 new 77709e575 0: update: binutils-gcc-linux-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (33780ad96) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_llvm_tk1/llvm-master [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1604 -> 1592 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2764 bytes 03-build_abe-binutils/console.log.xz | Bin 30656 -> 30236 bytes 04-build_abe-stage1/console.log.xz | Bin 91396 -> 91960 bytes 05-clean_sysroot/console.log.xz | Bin 336 -> 336 bytes 06-build_abe-linux/console.log.xz | Bin 9100 -> 8088 bytes 07-build_abe-glibc/console.log.xz | Bin 233616 -> 232800 bytes 08-build_abe-stage2/console.log.xz | Bin 219940 -> 216460 bytes 09-build_llvm-true/console.log.xz | Bin 59644 -> 58972 bytes 10-benchmark/benchmark-build.log | 66 +- 10-benchmark/benchmark.log | 64 +- 10-benchmark/console.log.xz | Bin 3224 -> 3180 bytes 11-check_regression/console.log.xz | Bin 5852 -> 5968 bytes 11-check_regression/results-0.csv | 2254 ++++----- 11-check_regression/results-1.csv | 2221 ++++----- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 77 +- 11-check_regression/results-full.csv | 2330 ++++----- 11-check_regression/results-perf-0.csv | 2254 ++++----- 11-check_regression/results-perf-1.csv | 2221 ++++----- 11-check_regression/results-vect-0.csv | 26 +- 11-check_regression/results-vect-1.csv | 26 +- 11-check_regression/results.csv | 157 +- 11-check_regression/results.log | 3462 +++++++------- 12-update_baseline/console.log | 4946 ++++++++++---------- 12-update_baseline/results-0.csv | 2254 ++++----- 12-update_baseline/results-1.csv | 2221 ++++----- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-compare.csv | 77 +- 12-update_baseline/results-full.csv | 2330 ++++----- 12-update_baseline/results-perf-0.csv | 2254 ++++----- 12-update_baseline/results-perf-1.csv | 2221 ++++----- 12-update_baseline/results-vect-0.csv | 26 +- 12-update_baseline/results-vect-1.csv | 26 +- 12-update_baseline/results.csv | 157 +- 12-update_baseline/results.log | 3518 +++++++------- .../top-artifacts/save-temps/400.perlbench.tar.xz | Bin 1220880 -> 1227168 bytes .../top-artifacts/save-temps/401.bzip2.tar.xz | Bin 103580 -> 103612 bytes .../top-artifacts/save-temps/403.gcc.tar.xz | Bin 3460364 -> 3444836 bytes .../top-artifacts/save-temps/429.mcf.tar.xz | Bin 34200 -> 34112 bytes .../top-artifacts/save-temps/433.milc.tar.xz | Bin 147804 -> 147512 bytes .../top-artifacts/save-temps/444.namd.tar.xz | Bin 204424 -> 204852 bytes .../top-artifacts/save-temps/445.gobmk.tar.xz | Bin 2027972 -> 2018352 bytes .../top-artifacts/save-temps/447.dealII.tar.xz | Bin 3297336 -> 3354524 bytes .../top-artifacts/save-temps/450.soplex.tar.xz | Bin 512264 -> 515568 bytes .../top-artifacts/save-temps/453.povray.tar.xz | Bin 1201888 -> 1191640 bytes .../top-artifacts/save-temps/456.hmmer.tar.xz | Bin 341236 -> 340340 bytes .../top-artifacts/save-temps/458.sjeng.tar.xz | Bin 150160 -> 150172 bytes .../top-artifacts/save-temps/462.libquantum.tar.xz | Bin 52276 -> 52296 bytes .../top-artifacts/save-temps/464.h264ref.tar.xz | Bin 660344 -> 662032 bytes .../top-artifacts/save-temps/470.lbm.tar.xz | Bin 25136 -> 25252 bytes .../top-artifacts/save-temps/471.omnetpp.tar.xz | Bin 823188 -> 816244 bytes .../top-artifacts/save-temps/473.astar.tar.xz | Bin 75672 -> 75236 bytes .../top-artifacts/save-temps/482.sphinx3.tar.xz | Bin 224908 -> 225388 bytes .../top-artifacts/save-temps/483.xalancbmk.tar.xz | Bin 7089132 -> 7016188 bytes jenkins/manifest.sh | 22 +- results | 2 +- results_id | 2 +- save-temps/400.perlbench.tar.xz | Bin 1220880 -> 1227168 bytes save-temps/401.bzip2.tar.xz | Bin 103580 -> 103612 bytes save-temps/403.gcc.tar.xz | Bin 3460364 -> 3444836 bytes save-temps/429.mcf.tar.xz | Bin 34200 -> 34112 bytes save-temps/433.milc.tar.xz | Bin 147804 -> 147512 bytes save-temps/444.namd.tar.xz | Bin 204424 -> 204852 bytes save-temps/445.gobmk.tar.xz | Bin 2027972 -> 2018352 bytes save-temps/447.dealII.tar.xz | Bin 3297336 -> 3354524 bytes save-temps/450.soplex.tar.xz | Bin 512264 -> 515568 bytes save-temps/453.povray.tar.xz | Bin 1201888 -> 1191640 bytes save-temps/456.hmmer.tar.xz | Bin 341236 -> 340340 bytes save-temps/458.sjeng.tar.xz | Bin 150160 -> 150172 bytes save-temps/462.libquantum.tar.xz | Bin 52276 -> 52296 bytes save-temps/464.h264ref.tar.xz | Bin 660344 -> 662032 bytes save-temps/470.lbm.tar.xz | Bin 25136 -> 25252 bytes save-temps/471.omnetpp.tar.xz | Bin 823188 -> 816244 bytes save-temps/473.astar.tar.xz | Bin 75672 -> 75236 bytes save-temps/482.sphinx3.tar.xz | Bin 224908 -> 225388 bytes save-temps/483.xalancbmk.tar.xz | Bin 7089132 -> 7016188 bytes 77 files changed, 17636 insertions(+), 17654 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits January 2022