Tcwg-commits January 2022

tcwg-commits@lists.linaro.org

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16484 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (6d263fe46e -> 94fd627d46)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/binutils-gdb. from 6d263fe46e Avoid bad breakpoints with --gc-sections adds df9d50bb22 Automatic date update in version.in adds 7bf5587873 gdbsupport/gdb_regex.cc: replace defs.h include with common-defs.h adds ec7194506d drop old unused stamp-h.in file adds b13d7831eb gdb/doc: fill in two missing @r adds e901223d53 Updated Serbian translation for the ld sub-directory adds ed09c325ec gdb: include gdbsupport/buildargv.h in ser-mingw.c adds 5b4ea8a740 Automatic date update in version.in adds cb2562f553 RISC-V: create new frag after alignment. adds a74e1cb344 Add markers for 2.38 branch adds f908e960c5 Change version number to 2.38.50 and regenerate files adds 5f7a57f131 Update release makeing script with new release numbers adds cc5e40736d Adjust default page sizes for haiku arm. adds 58de646be2 Allow inferring tmp_prefix from the dll name from a def file. adds 3dd8e5b615 bfd: replace doc header generation with pattern rules adds cb803d3749 bfd: rename core.texi to corefile.texi adds bd32be01c9 bfd: merge doc subdir up a level adds 35638469cb Automatic date update in version.in adds 31b0378d53 Regenerate configure files with autoconf 2.69 adds ad69b6b861 Regenerate Makefile.in files with automake 1.15.1 adds 0e3839bde6 bfd: Properly install library and header files adds 451c003d5f bfd: Partially revert commit 0e3839bde6f adds f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. adds fdf55097a3 bfd/doc: Fix racy build failure from missing mkdir adds 94fd627d46 bfd: Update doc/local.mk No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/.gitignore | 2 +- bfd/ChangeLog | 20 + bfd/Makefile.am | 22 +- bfd/Makefile.in | 508 +- bfd/configure | 42 +- bfd/configure.ac | 3 +- bfd/doc/Makefile.am | 217 - bfd/doc/Makefile.in | 1021 --- bfd/doc/bfd.texi | 2 +- bfd/doc/local.mk | 154 + bfd/po/bfd.pot | 112 +- bfd/po/fr.po | 3116 ++++---- bfd/po/ro.po | 10194 ++++++++++++++++++++----- bfd/po/uk.po | 3102 ++++---- bfd/stamp-h.in | 1 - bfd/version.h | 2 +- bfd/version.m4 | 2 +- binutils/BRANCHES | 1 + binutils/ChangeLog | 21 + binutils/Makefile.in | 1 - binutils/NEWS | 2 + binutils/README-how-to-make-a-release | 35 +- binutils/configure | 20 +- binutils/dlltool.c | 34 +- binutils/po/bg.po | 6039 +++++++++------ binutils/po/binutils.pot | 4084 +++++----- binutils/po/fr.po | 4192 +++++----- binutils/po/ro.po | 13085 +++++++++++++++++++++++++------- binutils/po/uk.po | 4202 +++++----- binutils/stamp-h.in | 1 - config/ChangeLog | 4 + cpu/ChangeLog | 4 + elfcpp/ChangeLog | 4 + gas/ChangeLog | 13 + gas/Makefile.in | 1 - gas/NEWS | 2 + gas/config/tc-riscv.c | 6 + gas/configure | 20 +- gas/po/gas.pot | 20 +- gas/po/uk.po | 4880 ++++++------ gas/stamp-h.in | 1 - gdb/doc/python.texi | 10 +- gdb/rust-exp.h | 39 +- gdb/rust-lang.c | 44 +- gdb/ser-mingw.c | 1 + gdbsupport/gdb_regex.cc | 2 +- gold/ChangeLog | 15 + gold/po/gold.pot | 248 +- gold/po/uk.po | 257 +- gprof/ChangeLog | 14 + gprof/configure | 20 +- gprof/po/gprof.pot | 4 +- gprof/po/ro.po | 386 +- gprof/stamp-h.in | 1 - include/ChangeLog | 4 + ld/ChangeLog | 24 + ld/Makefile.in | 1 - ld/NEWS | 2 + ld/configure | 20 +- ld/configure.tgt | 2 +- ld/emulparams/armelf_haiku.sh | 4 +- ld/po/bg.po | 4373 ++++++----- ld/po/ld.pot | 218 +- ld/po/sr.po | 4255 ++++++----- ld/po/uk.po | 3264 ++++---- ld/stamp-h.in | 1 - libctf/ChangeLog | 4 + libiberty/ChangeLog | 8 + libiberty/regex.c | 4 + opcodes/ChangeLog | 14 + opcodes/Makefile.in | 1 - opcodes/configure | 20 +- opcodes/po/de.po | 512 +- opcodes/po/opcodes.pot | 2 +- opcodes/po/ro.po | 2948 +++++-- opcodes/po/uk.po | 530 +- opcodes/stamp-h.in | 1 - 78 files changed, 45826 insertions(+), 26623 deletions(-) delete mode 100644 bfd/doc/Makefile.am delete mode 100644 bfd/doc/Makefile.in create mode 100644 bfd/doc/local.mk delete mode 100644 bfd/stamp-h.in delete mode 100644 binutils/stamp-h.in delete mode 100644 gas/stamp-h.in delete mode 100644 gprof/stamp-h.in delete mode 100644 ld/stamp-h.in delete mode 100644 opcodes/stamp-h.in -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig updated (a8bef4bf2 -> 627a78ef5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allmodconfig in repository toolchain/ci/base-artifacts. discards a8bef4bf2 4: update: binutils-gcc-linux-qemu: 21324 new 627a78ef5 4: update: binutils-gcc-linux-qemu: 21324 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a8bef4bf2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1592 -> 1560 bytes 02-prepare_abe/console.log.xz | Bin 2764 -> 2764 bytes 03-build_abe-binutils/console.log.xz | Bin 30688 -> 30324 bytes 04-build_abe-stage1/console.log.xz | Bin 71776 -> 71604 bytes 05-build_abe-qemu/console.log.xz | Bin 31000 -> 30508 bytes 06-build_linux/console.log.xz | Bin 48168 -> 48092 bytes 08-check_regression/console.log.xz | Bin 480 -> 476 bytes 09-update_baseline/console.log | 62 +++++++++++++++++------------------ jenkins/manifest.sh | 16 ++++----- 9 files changed, 39 insertions(+), 39 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto updated (603a9ab41f4 -> 4343f5e2567)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto in repository toolchain/ci/gcc. from 603a9ab41f4 contrib: filter out one more Clang warning. adds cbcf4a50fa2 [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into inte [...] adds 2da90ad39bf c++: designated init of char array by string constant [PR55227] adds 2d8a9ad4a92 libstdc++: Fix aliasing violation in std::shared_ptr [PR104019] adds 084680db9af libstdc++: Restore support for unordered_map<const T, ...> [...] adds 416b6fc7483 libstdc++: Use fast_float for long double if it uses binary [...] adds 51631875a2f libstdc++: Fix std::spanstream move assignment [PR104032] adds 0c940703f00 Daily bump. adds 4d2321314a6 x86: Also check mode of memory broadcast in bcst_mem_operand adds 7b84fa2a2dd testsuite: Ignore pr104159 psabi warning. adds add6bb52e34 RISC-V: Update testcases info with new implement info adds 634de54f9c4 Update the type of control.base after changed adds 98416dbb0a6 RISC-V: Change default ISA version into 20191213 adds ca2bbb88f99 RISC-V: Do not emit zcisr and zifencei if i-ext is 2.0 adds c106529eb21 RISC-V: Fix testcase after bump isa spec version adds 2c31a8be4a5 properly disable -fsplit-stack on non-glibc targets [PR104170] adds 385196adb52 options: Add EnumSet and Set property support [PR104158] adds cd0377a460d options: Fix up -fsanitize-coverage= [PR104158] adds 9acd5a01175 fortran: Extend -fconvert= option for ppc64le r16_ieee and r16_ibm adds 0ebb09f5e49 options: Add EnumBitSet property support [PR104158] adds 2755037e40a acinclude.m4: Remove duplicite AC_DEFUN. adds f1af8528d34 tree-optimization/102131 - fix niter analysis wrt overflow adds 978abe918f8 gcc-changelog: Be stricter for top-level dir. adds 2a908f3da07 c++: value category of compound object expr [PR104173] adds b1aa2a3cf1b c++: Fix non-portable default argument of make_auto_1 [PR104197] adds 4343f5e2567 rtl: builtins: (not just) rs6000: Add builtins for fegetrou [...] No new revisions were added by this update. Summary of changes: contrib/ChangeLog | 5 + contrib/gcc-changelog/git_commit.py | 12 +- contrib/gcc-changelog/test_email.py | 5 + contrib/gcc-changelog/test_patches.txt | 82 ++++++++++ gcc/ChangeLog | 8 + gcc/DATESTAMP | 2 +- gcc/builtins.cc | 76 +++++++++ gcc/common.opt | 6 +- gcc/common/config/i386/i386-common.cc | 4 +- gcc/common/config/riscv/riscv-common.cc | 14 +- gcc/common/config/s390/s390-common.cc | 6 +- gcc/config.gcc | 8 +- gcc/config/aarch64/aarch64-builtins.cc | 7 + gcc/config/alpha/linux.h | 25 +-- gcc/config/fuchsia.h | 2 + gcc/config/glibc-stdint.h | 3 + gcc/config/i386/predicates.md | 2 + gcc/config/linux.h | 25 +-- gcc/config/rs6000/linux.h | 25 +-- gcc/config/rs6000/linux64.h | 25 +-- gcc/config/rs6000/rs6000.md | 111 +++++++++++++ gcc/cp/ChangeLog | 25 +++ gcc/cp/decl.cc | 28 ++-- gcc/cp/pt.cc | 5 +- gcc/cp/typeck.cc | 19 +-- gcc/doc/extend.texi | 8 + gcc/doc/md.texi | 17 ++ gcc/doc/options.texi | 33 ++++ gcc/fortran/lang.opt | 18 ++- gcc/fortran/trans-types.cc | 3 + gcc/opt-functions.awk | 7 +- gcc/opt-read.awk | 4 + gcc/optabs.def | 4 + gcc/optc-gen.awk | 2 + gcc/opts-common.cc | 180 +++++++++++++++++++-- gcc/opts.cc | 59 ++++++- gcc/opts.h | 24 ++- gcc/testsuite/ChangeLog | 21 +++ gcc/testsuite/g++.dg/cpp0x/ref-qual21.C | 23 +++ gcc/testsuite/g++.dg/cpp2a/desig21.C | 48 ++++++ gcc/testsuite/gcc.dg/analyzer/torture/pr104159.c | 2 +- gcc/testsuite/gcc.dg/pr102087_1.c | 13 ++ gcc/testsuite/gcc.dg/sancov/pr104158-1.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-2.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-3.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-4.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-5.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-6.c | 11 ++ gcc/testsuite/gcc.dg/sancov/pr104158-7.c | 11 ++ gcc/testsuite/gcc.dg/spellcheck-options-24.c | 5 + gcc/testsuite/gcc.dg/torture/pr100740.c | 12 ++ gcc/testsuite/gcc.dg/torture/pr101508.c | 13 ++ gcc/testsuite/gcc.dg/torture/pr101972.c | 39 +++++ gcc/testsuite/gcc.dg/torture/pr102131-1.c | 16 ++ gcc/testsuite/gcc.dg/torture/pr102131-2.c | 15 ++ gcc/testsuite/gcc.dg/torture/pr102131-3.c | 11 ++ gcc/testsuite/gcc.dg/torture/pr102131-4.c | 15 ++ gcc/testsuite/gcc.target/aarch64/vsqrt-1.c | 17 ++ gcc/testsuite/gcc.target/aarch64/vsqrt-2.c | 28 ++++ gcc/testsuite/gcc.target/i386/pr104188.c | 70 ++++++++ .../builtin-feclearexcept-feraiseexcept-1.c | 76 +++++++++ .../builtin-feclearexcept-feraiseexcept-2.c | 91 +++++++++++ .../gcc.target/powerpc/builtin-fegetround.c | 36 +++++ gcc/testsuite/gcc.target/riscv/arch-10.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-12.c | 2 +- gcc/testsuite/gcc.target/riscv/arch-9.c | 2 +- gcc/testsuite/gcc.target/riscv/attribute-19.c | 2 +- gcc/tree-ssa-loop-niter.cc | 49 ++++-- libatomic/acinclude.m4 | 102 ------------ libatomic/configure | 6 +- libstdc++-v3/ChangeLog | 35 ++++ libstdc++-v3/include/bits/hashtable_policy.h | 11 ++ libstdc++-v3/include/bits/shared_ptr_base.h | 2 +- libstdc++-v3/include/std/spanstream | 15 +- libstdc++-v3/src/c++17/floating_from_chars.cc | 38 ++++- .../23_containers/unordered_map/104174.cc | 4 + libstdc++-v3/testsuite/27_io/spanstream/2.cc | 113 +++++++++++++ 77 files changed, 1648 insertions(+), 252 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/ref-qual21.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/desig21.C create mode 100644 gcc/testsuite/gcc.dg/pr102087_1.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-1.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-2.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-3.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-4.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-5.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-6.c create mode 100644 gcc/testsuite/gcc.dg/sancov/pr104158-7.c create mode 100644 gcc/testsuite/gcc.dg/spellcheck-options-24.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr100740.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101508.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101972.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-1.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-2.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-3.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr102131-4.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsqrt-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104188.c create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-feclearexcept-feraisee [...] create mode 100644 gcc/testsuite/gcc.target/powerpc/builtin-fegetround.c create mode 100644 libstdc++-v3/testsuite/23_containers/unordered_map/104174.cc create mode 100644 libstdc++-v3/testsuite/27_io/spanstream/2.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto updated (f10522c0e7 -> 94fd627d46)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto in repository toolchain/ci/binutils-gdb. from f10522c0e7 Simplify some Rust expression-evaluation code adds 2b1ca85cf8 Automatic date update in version.in adds 5fe73d4624 Update Bulgarian, French, Romaniam and Ukranian translation [...] adds 965c919f98 gdb/doc: improve description for Window.click on Python TUI windows adds 2f279a64a2 Fix a proble building the libiberty library with gcc-12. adds fdf55097a3 bfd/doc: Fix racy build failure from missing mkdir new 94fd627d46 bfd: Update doc/local.mk The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/ChangeLog | 10 + bfd/Makefile.in | 8 +- bfd/doc/local.mk | 8 +- bfd/po/fr.po | 3116 ++++++------ bfd/po/ro.po | 10194 +++++++++++++++++++++++++++++++-------- bfd/po/uk.po | 3102 ++++++------ bfd/version.h | 2 +- binutils/ChangeLog | 7 + binutils/po/bg.po | 6039 +++++++++++++---------- binutils/po/fr.po | 4192 ++++++++-------- binutils/po/ro.po | 13085 ++++++++++++++++++++++++++++++++++++++++---------- binutils/po/uk.po | 4202 ++++++++-------- gas/ChangeLog | 4 + gas/po/uk.po | 4880 ++++++++++--------- gdb/doc/python.texi | 6 +- gold/ChangeLog | 4 + gold/po/uk.po | 257 +- gprof/ChangeLog | 4 + gprof/po/ro.po | 386 +- ld/ChangeLog | 5 + ld/po/bg.po | 4373 +++++++++-------- ld/po/uk.po | 3264 +++++++------ libiberty/ChangeLog | 4 + libiberty/regex.c | 4 + opcodes/ChangeLog | 5 + opcodes/po/de.po | 512 +- opcodes/po/ro.po | 2948 +++++++++--- opcodes/po/uk.po | 530 +- 28 files changed, 40217 insertions(+), 20934 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto updated (f33143a33 -> 1a491bcba)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_lto in repository toolchain/ci/base-artifacts. discards f33143a33 0: update: binutils-gcc: 2 new 1a491bcba 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (f33143a33) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1520 -> 1500 bytes 02-prepare_abe/console.log.xz | Bin 2728 -> 2740 bytes 04-build_abe-binutils/console.log.xz | Bin 37496 -> 37380 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 266088 -> 268192 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 updated (93deac2e2ba9 -> accc07e65465)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 in repository toolchain/ci/llvm-project. from 93deac2e2ba9 [AArch64] Optimize add/sub with immediate through MIPeepholeOpt adds 0283b07746e8 reapply de872382951 "[JITLink] Add anonymous symbols in Li [...] adds b27e5459d51f [DAG] Convert truncstore(extend(x)) back to store(x) adds 8dedf9b58bff [PowerPC] Change CTR clobber estimation for 128-bit floati [...] adds 00d68c3824bf [PowerPC] Support parsing GNU attributes in MC adds 5f2854f1daa7 [LV] Always create VPWidenCanonicalIVRecipe, optimize away later. adds 26fffc1b8e75 [libc++] [test] {cpo,niebloid}.compile.pass.cpp: Also test [...] adds e9d0f8baf236 [flang] Don't drop format string for external child I/O adds 896a543e72fd [flang] Support DECIMAL='COMMA' mode in namelist I/O adds 0a6b4258ab0e [openmp][cmake] Use `GNUInstallDirs` to support custom ins [...] adds d44b6be6eaa8 [RISCV] Don't Custom legalize f16/f32/f64 bitcasts if thos [...] adds 39e602b6c433 [InstCombine] try to fold binop with phi operands adds 7c16647c3676 [clang-tools-extra][cmake] Use `GNUInstallDirs` to support [...] adds c1988dbf2d19 [openmp] Allow x87 fp functions only in Openmp runtime for x86. adds b8467952404c [docs] [clang] Small documentation change for compilation [...] adds 37d1d02200b9 [X86][MS] Change the alignment of f80 to 16 bytes on Windo [...] adds 2513b7903063 [libc++] Implement LWG3549: view_interface need not inheri [...] adds 3cf15af2daa9 [RISCV] Remove experimental prefix from rvv-related extensions. adds 85e42db1b6db [RISCV] Merge some rvv intrinsic test cases that only diff [...] adds be6070c290e2 [RISCV] Use FP ABI for some RVV intrinsic tests. NFC adds 3dc6fd515135 [llvm-objcopy][MachO] Implement --update-section adds a4f202549208 [X86] Regenerate avx512-mask-op.ll adds ff05b93a02d1 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 20d46fbd4a51 [CodeGenPrepare] Use dyn_cast result to check for null pointers adds 946f29028e06 [llvm-objdump] Use cast<> instead of dyn_cast<> to avoid d [...] adds 86497026a266 [clang-tidy] Use cast<>/castAs<> instead of dyn_cast<>/get [...] adds df0fd1c301d6 [clangd] Use castAs<> instead of getAs<> to avoid derefere [...] adds c93491352cf3 [lldb] CxxModuleHandler - use cast<> instead of dyn_cast<> [...] adds d7aa402b4b8a [lldb] PdbAstBuilder - use cast<> instead of dyn_cast<> to [...] adds d13847bbe5e6 [lldb] TerminalState::Save - fix unused variable warning adds 49d38b1d618c Fix "not all control paths return a value" warning. NFC. adds 938944445a1b [libc++] Mark LWG3541 as "Complete". NFC. adds 5d78fef6db15 [libc++] Fix LWG3437 "__cpp_lib_polymorphic_allocator is i [...] adds d4ed3eff9f9c [X86] Add vector signbit parity checks for non-popcnt targets adds eb3f20e8fa4b [clang-tidy] Remove gsl::at suggestion from cppcoreguideli [...] adds 153359180a9d [AVR] Remove regalloc workaround for LDDWRdPtrQ adds 116ab78694dd [AVR] Make use of the constant value 0 in R1 adds 7c66aaddb128 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] adds 2e26633af0c8 [IR] document and update ctlz/cttz intrinsics to optionall [...] adds d2e8fb331835 [clang-tidy] Add readability-duplicate-include check adds 6605057992b1 Revert rG7c66aaddb128dc0f342830c1efaeb7a278bfc48c "[DAG] F [...] adds 631f3e621586 [gn build] Port d2e8fb331835 adds accc07e65465 [DAG] Fold (X & Y) != 0 --> zextOrTrunc(X & Y) iff everyth [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/tool/CMakeLists.txt | 4 +- .../find-all-symbols/tool/CMakeLists.txt | 2 +- .../clang-include-fixer/tool/CMakeLists.txt | 4 +- clang-tools-extra/clang-tidy/CMakeLists.txt | 2 +- .../abseil/DurationFactoryScaleCheck.cpp | 2 +- .../ProBoundsConstantArrayIndexCheck.cpp | 3 +- .../clang-tidy/readability/CMakeLists.txt | 1 + .../readability/DuplicateIncludeCheck.cpp | 116 +++ .../clang-tidy/readability/DuplicateIncludeCheck.h | 35 + .../readability/ReadabilityTidyModule.cpp | 3 + .../readability/SuspiciousCallArgumentCheck.cpp | 4 +- clang-tools-extra/clang-tidy/tool/CMakeLists.txt | 4 +- clang-tools-extra/clangd/HeuristicResolver.cpp | 5 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/docs/ReleaseNotes.rst | 11 + ...eguidelines-pro-bounds-constant-array-index.rst | 2 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../checks/readability-duplicate-include.rst | 35 + clang-tools-extra/modularize/CMakeLists.txt | 2 +- .../readability-duplicate-include.h | 15 + .../readability-duplicate-include2.h | 1 + .../readability-duplicate-include/system/iostream | 1 + .../readability-duplicate-include/system/string.h | 1 + .../system/sys/types.h | 1 + .../readability-duplicate-include/system/types.h | 1 + ...s-pro-bounds-constant-array-index-gslheader.cpp | 6 +- ...eguidelines-pro-bounds-constant-array-index.cpp | 6 +- .../checkers/readability-duplicate-include.cpp | 72 ++ clang/docs/JSONCompilationDatabase.rst | 4 + clang/lib/Basic/Targets/X86.h | 11 +- .../CodeGen/RISCV/riscv-attr-builtin-alias-err.c | 2 +- .../test/CodeGen/RISCV/riscv-attr-builtin-alias.c | 2 +- clang/test/CodeGen/RISCV/riscv-inline-asm-rvv.c | 4 +- clang/test/CodeGen/RISCV/riscv-v-debuginfo.c | 2 +- clang/test/CodeGen/RISCV/riscv-v-lifetime.cpp | 2 +- .../RISCV/rvv-intrinsics-overloaded/vaadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vasub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcompress.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vcpop.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfabs.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfclass.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfirst.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vfmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfncvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfnmsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrdiv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrec7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsqrt7.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsgnj.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsqrt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vfwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vget.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vid.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/viota.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vloxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vlse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vlseg.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsegff.c | 4 +- .../RISCV/rvv-intrinsics-overloaded/vlsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vluxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmand.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmerge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfeq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmflt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmfne.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmin.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmnot.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsbf.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmseq.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsge.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsgt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsif.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsle.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmslt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsne.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmsof.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmul.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vmv.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxnor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vmxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnclip.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vncvt.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vneg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsac.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnmsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vnot.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vnsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredand.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmax.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredmin.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vredxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vreinterpret.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vrem.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrgather.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vrsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsadd.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsbc.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vse.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vset.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsext.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1down.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslide1up.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslidedown.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vslideup.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsll.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsoxseg.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsra.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsrl.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsse.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssra.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssrl.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vssub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vsub.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxei.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vsuxseg.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwadd.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwcvt.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmacc.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwmul.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwredsum.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vwsub.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics-overloaded/vxor.c | 2 +- .../RISCV/rvv-intrinsics-overloaded/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vaadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vasub.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vcompress.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vcpop.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfabs.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfclass.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfirst.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrdiv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrec7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsqrt7.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsgnj.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vfslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfslide1up.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsqrt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwnmsac.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vfwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vfwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vget.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vid.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/viota.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vleff.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlseg.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsegff.c | 4 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vlsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmclr.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmerge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfeq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmflt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmfne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsbf.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmseq.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsge.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsgt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsif.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsle.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmslt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsne.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmsof.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmv.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxnor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vmxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnclip.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vncvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vneg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsac.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnmsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnot.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vnsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredand.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredmin.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vredxor.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vreinterpret.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrem.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrgather.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vrsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsbc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vset.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsetvl.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vsetvlmax.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsext.c | 2 +- .../CodeGen/RISCV/rvv-intrinsics/vslide1down.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslide1up.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vslidedown.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vslideup.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsll.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsoxseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsse.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssra.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssrl.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssseg.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vssub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxei.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vsuxseg.c | 2 +- .../test/CodeGen/RISCV/rvv-intrinsics/vundefined.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwadd.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwcvt.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmacc.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwmul.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwredsum.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vwsub.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vxor.c | 2 +- clang/test/CodeGen/RISCV/rvv-intrinsics/vzext.c | 2 +- clang/test/CodeGen/RISCV/rvv_errors.c | 2 +- clang/test/CodeGen/target-data.c | 2 +- clang/test/Driver/riscv-arch.c | 41 +- clang/test/Headers/riscv-vector-header.c | 2 +- clang/test/Preprocessor/riscv-target-features.c | 34 +- clang/test/Sema/riscv-types.c | 2 +- clang/utils/TableGen/RISCVVEmitter.cpp | 2 +- flang/runtime/descriptor-io.h | 1 + flang/runtime/edit-input.cpp | 10 +- flang/runtime/format-implementation.h | 2 +- flang/runtime/io-api.cpp | 2 +- flang/runtime/io-error.cpp | 8 +- flang/runtime/io-stmt.cpp | 5 +- flang/runtime/io-stmt.h | 7 +- flang/runtime/namelist.cpp | 17 +- flang/unittests/Runtime/Namelist.cpp | 31 + libcxx/docs/Status/Cxx2bIssues.csv | 8 +- libcxx/include/__iterator/readable_traits.h | 10 +- libcxx/include/__ranges/enable_view.h | 12 +- libcxx/include/__ranges/view_interface.h | 3 +- libcxx/include/version | 2 +- .../support.limits.general/memory.version.pass.cpp | 39 - .../cpo.compile.pass.cpp | 3 + .../niebloid.compile.pass.cpp | 1 + .../view.interface/view.interface.pass.cpp | 9 + .../generate_feature_test_macro_components.py | 2 +- lldb/source/Host/common/Terminal.cpp | 2 +- .../ExpressionParser/Clang/CxxModuleHandler.cpp | 2 +- .../Plugins/Language/CPlusPlus/GenericBitset.cpp | 1 + .../Plugins/SymbolFile/NativePDB/PdbAstBuilder.cpp | 4 +- llvm/docs/LangRef.rst | 42 +- llvm/include/llvm/ExecutionEngine/JITLink/riscv.h | 12 +- llvm/lib/Analysis/ConstantFolding.cpp | 4 +- llvm/lib/Analysis/ValueTracking.cpp | 4 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 16 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 19 +- .../ExecutionEngine/JITLink/ELFLinkGraphBuilder.h | 12 +- llvm/lib/ExecutionEngine/JITLink/riscv.cpp | 4 +- llvm/lib/IR/AutoUpgrade.cpp | 31 +- llvm/lib/Support/RISCVISAInfo.cpp | 18 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 14 + llvm/lib/Target/AVR/AVRISelLowering.h | 2 + llvm/lib/Target/AVR/AVRInstrInfo.td | 6 +- llvm/lib/Target/AVR/AVRRegisterInfo.td | 20 - llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 12 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 10 +- llvm/lib/Target/RISCV/RISCV.td | 16 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 9 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 2 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 12 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 9 + .../Transforms/InstCombine/InstCombineCalls.cpp | 6 +- .../Transforms/InstCombine/InstCombineInternal.h | 10 + .../InstCombine/InstCombineMulDivRem.cpp | 18 + .../Transforms/InstCombine/InstCombineSelect.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 + .../InstCombine/InstructionCombining.cpp | 64 ++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 12 +- llvm/lib/Transforms/Vectorize/VPlan.h | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 27 + llvm/lib/Transforms/Vectorize/VPlanTransforms.h | 4 + .../CostModel/RISCV/fixed-vector-gather.ll | 2 +- .../CostModel/RISCV/fixed-vector-scatter.ll | 2 +- llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout3.ll | 2 +- llvm/test/Bitcode/upgrade-datalayout4.ll | 8 + llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 15 +- llvm/test/CodeGen/AVR/lpmx.ll | 22 +- llvm/test/CodeGen/AVR/smul-with-overflow.ll | 2 +- llvm/test/CodeGen/AVR/store-undef.ll | 3 +- llvm/test/CodeGen/AVR/umul-with-overflow.ll | 2 +- llvm/test/CodeGen/PowerPC/ctrloop-fp128.ll | 52 +- llvm/test/CodeGen/RISCV/attributes.ll | 8 +- llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 4 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-sats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 2 +- .../RISCV/rvv/commuted-op-indices-regression.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 8 +- .../CodeGen/RISCV/rvv/debug-info-rvv-dbg-value.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll | 4 +- .../fixed-vector-strided-load-store-negative.ll | 2 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 8 +- .../rvv/fixed-vectors-bitcast-large-vector.ll | 6 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 8 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 8 +- .../RISCV/rvv/fixed-vectors-emergency-slot.mir | 2 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 8 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 4 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 4 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 12 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-marith-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 28 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 8 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 4 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 4 +- .../RISCV/rvv/fixed-vectors-store-merge-crash.ll | 2 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll | 4 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 4 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/get-vlen-debugloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/inline-asm.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 4 +- .../CodeGen/RISCV/rvv/large-rvv-stack-size.mir | 2 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 4 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/marith-vp.ll | 4 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 2 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/masked-load-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-load-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/masked-store-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 4 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/pr52475.ll | 4 +- .../test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/reg-coalescing.mir | 2 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 2 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 4 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 4 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll | 2 +- .../CodeGen/RISCV/rvv/unaligned-loads-stores.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-policy.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vcpop-rv32.ll | 282 ------- llvm/test/CodeGen/RISCV/rvv/vcpop-rv64.ll | 282 ------- llvm/test/CodeGen/RISCV/rvv/vcpop.ll | 284 +++++++ llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 282 ------- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 282 ------- llvm/test/CodeGen/RISCV/rvv/vfirst.ll | 284 +++++++ llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 95 +-- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 79 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 148 ++-- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 124 ++- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfredusum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 186 ++--- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 154 ++-- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 139 ++-- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 139 ++-- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwredusum-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 94 +-- llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 139 ++-- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 139 ++-- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 758 ------------------ .../test/CodeGen/RISCV/rvv/{vid-rv32.ll => vid.ll} | 258 +++--- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 882 --------------------- .../CodeGen/RISCV/rvv/{viota-rv32.ll => viota.ll} | 270 +++---- llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlm-rv64.ll | 94 --- .../test/CodeGen/RISCV/rvv/{vlm-rv32.ll => vlm.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 142 ---- .../CodeGen/RISCV/rvv/{vmand-rv32.ll => vmand.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmandn-rv64.ll | 142 ---- .../RISCV/rvv/{vmandn-rv32.ll => vmandn.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 114 --- .../CodeGen/RISCV/rvv/{vmclr-rv32.ll => vmclr.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 142 ---- .../RISCV/rvv/{vmnand-rv32.ll => vmnand.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 142 ---- .../CodeGen/RISCV/rvv/{vmnor-rv32.ll => vmnor.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 142 ---- .../CodeGen/RISCV/rvv/{vmor-rv32.ll => vmor.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmorn-rv64.ll | 142 ---- .../CodeGen/RISCV/rvv/{vmorn-rv32.ll => vmorn.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 114 --- .../CodeGen/RISCV/rvv/{vmset-rv32.ll => vmset.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 296 ------- .../CodeGen/RISCV/rvv/{vmsif-rv32.ll => vmsif.ll} | 90 ++- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 296 ------- .../CodeGen/RISCV/rvv/{vmsof-rv32.ll => vmsof.ll} | 90 ++- llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 142 ---- .../RISCV/rvv/{vmxnor-rv32.ll => vmxnor.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 142 ---- .../CodeGen/RISCV/rvv/{vmxor-rv32.ll => vmxor.ll} | 48 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpload.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vpstore.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 2 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 4 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 2 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 2 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 137 ---- .../test/CodeGen/RISCV/rvv/{vsm-rv32.ll => vsm.ll} | 64 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 2 +- 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llvm/test/MC/RISCV/rvv/fdiv.s | 8 +- llvm/test/MC/RISCV/rvv/fmacc.s | 8 +- llvm/test/MC/RISCV/rvv/fminmax.s | 8 +- llvm/test/MC/RISCV/rvv/fmul.s | 8 +- llvm/test/MC/RISCV/rvv/fmv.s | 8 +- llvm/test/MC/RISCV/rvv/fothers.s | 8 +- llvm/test/MC/RISCV/rvv/freduction.s | 8 +- llvm/test/MC/RISCV/rvv/fsub.s | 8 +- llvm/test/MC/RISCV/rvv/invalid-eew.s | 2 +- llvm/test/MC/RISCV/rvv/invalid.s | 2 +- llvm/test/MC/RISCV/rvv/load.s | 8 +- llvm/test/MC/RISCV/rvv/macc.s | 8 +- llvm/test/MC/RISCV/rvv/mask.s | 8 +- llvm/test/MC/RISCV/rvv/minmax.s | 8 +- llvm/test/MC/RISCV/rvv/mul.s | 8 +- llvm/test/MC/RISCV/rvv/mv.s | 8 +- llvm/test/MC/RISCV/rvv/or.s | 8 +- llvm/test/MC/RISCV/rvv/others.s | 8 +- llvm/test/MC/RISCV/rvv/reduction.s | 8 +- llvm/test/MC/RISCV/rvv/shift.s | 8 +- llvm/test/MC/RISCV/rvv/sign-injection.s | 8 +- llvm/test/MC/RISCV/rvv/snippet.s | 4 +- llvm/test/MC/RISCV/rvv/store.s | 8 +- llvm/test/MC/RISCV/rvv/sub.s | 8 +- llvm/test/MC/RISCV/rvv/vsetvl-invalid.s | 4 +- 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llvm/tools/llvm-objdump/WasmDump.cpp | 2 +- llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp | 2 +- .../clang-tidy/readability/BUILD.gn | 1 + openmp/CMakeLists.txt | 5 + openmp/libompd/src/CMakeLists.txt | 2 +- openmp/runtime/cmake/LibompCheckLinkerFlag.cmake | 2 + openmp/runtime/src/CMakeLists.txt | 6 +- openmp/runtime/src/kmp_atomic.cpp | 15 +- openmp/tools/multiplex/CMakeLists.txt | 2 +- 1198 files changed, 7573 insertions(+), 13076 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/readability/DuplicateIncludeCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability-duplicate- [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/Inputs/readability-d [...] create mode 100644 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llvm/test/tools/llvm-objcopy/MachO/update-section.test -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 updated (2fc010aae -> adbfacf72)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 in repository toolchain/ci/base-artifacts. from 2fc010aae 1: reset: llvm-93deac2e2ba96248c05441a0bfa8385a73d78acb: 1 new adbfacf72 2: update: llvm-accc07e65465094dc5e12e78bee45b4d459c4ccd: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1616 -> 1608 bytes 02-prepare_abe/console.log.xz | Bin 2756 -> 2764 bytes 03-build_abe-binutils/console.log.xz | Bin 29868 -> 30564 bytes 04-build_abe-stage1/console.log.xz | Bin 72764 -> 74760 bytes 06-build_abe-linux/console.log.xz | Bin 10504 -> 10736 bytes 07-build_abe-glibc/console.log.xz | Bin 234688 -> 237272 bytes 08-build_abe-stage2/console.log.xz | Bin 174560 -> 179064 bytes 09-build_llvm-true/console.log.xz | Bin 60336 -> 60368 bytes 10-benchmark/benchmark-build.log | 60 +- 10-benchmark/benchmark.log | 58 +- 10-benchmark/console.log.xz | Bin 3152 -> 3156 bytes 11-check_regression/console.log.xz | Bin 6704 -> 5984 bytes 11-check_regression/exe.regressions | 1 - 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/jira-body.txt | 4 - 11-check_regression/mail-body.txt | 4 - 11-check_regression/mail-subject.txt | 1 - 11-check_regression/results-0.csv | 2290 +++--- 11-check_regression/results-1.csv | 2280 +++--- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-compare.csv | 106 +- 11-check_regression/results-full.csv | 2356 +++--- 11-check_regression/results-perf-0.csv | 2290 +++--- 11-check_regression/results-perf-1.csv | 2280 +++--- 11-check_regression/results-vect-0.csv | 20 +- 11-check_regression/results-vect-1.csv | 28 +- 11-check_regression/results.csv | 160 +- 11-check_regression/results.log | 3004 ++++---- 11-check_regression/results.regressions | 6 - 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mail/mail-body.txt | 25 - mail/mail-subject.txt | 1 - reset-baseline | 0 results | 6 - results_id | 2 +- save-temps/400.perlbench.tar.xz | Bin 1272292 -> 1267320 bytes save-temps/401.bzip2.tar.xz | Bin 108232 -> 107596 bytes save-temps/403.gcc.tar.xz | Bin 3517120 -> 3515740 bytes save-temps/429.mcf.tar.xz | Bin 36036 -> 35824 bytes save-temps/433.milc.tar.xz | Bin 147692 -> 147860 bytes save-temps/444.namd.tar.xz | Bin 194664 -> 194768 bytes save-temps/445.gobmk.tar.xz | Bin 2043508 -> 2033928 bytes save-temps/447.dealII.tar.xz | Bin 3460448 -> 3437756 bytes save-temps/450.soplex.tar.xz | Bin 529792 -> 530160 bytes save-temps/453.povray.tar.xz | Bin 1227544 -> 1220244 bytes save-temps/456.hmmer.tar.xz | Bin 357668 -> 358440 bytes save-temps/458.sjeng.tar.xz | Bin 158628 -> 159392 bytes save-temps/462.libquantum.tar.xz | Bin 53128 -> 53288 bytes save-temps/464.h264ref.tar.xz | Bin 634072 -> 635360 bytes save-temps/470.lbm.tar.xz | Bin 25420 -> 25316 bytes save-temps/471.omnetpp.tar.xz | Bin 839272 -> 845252 bytes save-temps/473.astar.tar.xz | Bin 78212 -> 78788 bytes save-temps/482.sphinx3.tar.xz | Bin 240804 -> 240984 bytes save-temps/483.xalancbmk.tar.xz | Bin 7239572 -> 7334956 bytes 89 files changed, 17143 insertions(+), 14566 deletions(-) delete mode 100644 11-check_regression/exe.regressions delete mode 100644 11-check_regression/mail-subject.txt delete mode 100644 11-check_regression/results.regressions delete mode 100644 11-check_regression/trigger-bisect delete mode 100644 mail/jira-body.txt delete mode 100644 mail/mail-body.txt delete mode 100644 mail/mail-subject.txt delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap updated (448e9a53939 -> ce3954262a6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap in repository toolchain/ci/gcc. from 448e9a53939 Daily bump. adds 99566992720 Daily bump. adds 8adfe466f55 Daily bump. adds a8c23451936 Fortran: fix ICE and wrong code with TRANSFER and CHARACTER [...] adds 11581a272eb Daily bump. adds 520147ba19d x86: Also check mode of memory broadcast in bcst_mem_operand adds c239267759b c: Fix ICE on deferred pragma in unknown attribute argument [...] adds 2712f1249e0 optabs: Fix up checking for CALLs in newly added code by do [...] adds 06142a317a4 loop-invariant: Fix -fcompare-debug failure [PR103837] adds fbc542de1bc fold-const: Fix up fold_truth_andor_1 shift handling [PR103813] adds a4e45a579e2 shrink-wrapping: Fix up prologue block discovery [PR103860] adds be66fad59a7 c-family: Use BULTINS_LOCATION for predefined macros change [...] adds 533695ca333 libcpp: Fix up ##__VA_OPT__ handling [PR89971] adds 27cfe106823 objc: Fix handling of break stmt inside of switch inside of [...] adds 0dd533da49c ifcvt: Check for asm goto at the end of then_bb/else_bb in [...] adds 18abe529d09 c++: Ensure some more that immediate functions aren't gimpl [...] adds 777b73e4598 c-family: Fix up -W*conversion on bitwise &/|/^ [PR101537] adds cb4998fcdf2 c++: Silence -Wuseless-cast warnings during move [PR103480] adds 91ac88cada3 c++: Fix handling of temporaries with consteval ctors and n [...] adds 8e4c410bb02 i386: Fix *aes<aeswideklvariant>u8 adds baf18a6d47c match.pd, optabs: Avoid vectorization of {FLOOR,CEIL,ROUND} [...] adds 3991e4c752b dwarf2out: Fix -gsplit-dwarf on riscv [PR103874] adds 505b418a40a optabs: Don't create pseudos in prepare_cmp_insn when not a [...] adds ce3954262a6 gcc-changelog: sync from master. No new revisions were added by this update. Summary of changes: contrib/gcc-changelog/git_commit.py | 12 ++- contrib/gcc-changelog/test_email.py | 5 + contrib/gcc-changelog/test_patches.txt | 82 +++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/c-cppbuiltin.c | 6 ++ gcc/c-family/c-warn.c | 28 ++++++ gcc/c/c-parser.c | 5 + gcc/c/c-typeck.c | 3 +- gcc/config/aarch64/aarch64-c.c | 2 + gcc/config/arm/arm-c.c | 2 + gcc/config/i386/i386-c.c | 4 + gcc/config/i386/predicates.md | 2 + gcc/config/i386/sse.md | 2 +- gcc/config/s390/s390-c.c | 2 + gcc/cp/constexpr.c | 6 +- gcc/cp/decl2.c | 1 + gcc/cp/semantics.c | 11 +++ gcc/cp/tree.c | 2 + gcc/dwarf2out.c | 5 +- gcc/fold-const.c | 14 ++- gcc/fortran/ChangeLog | 12 +++ gcc/fortran/target-memory.c | 2 +- gcc/fortran/trans-intrinsic.c | 17 +++- gcc/ifcvt.c | 6 ++ gcc/loop-invariant.c | 19 +++- gcc/match.pd | 15 +-- gcc/optabs-tree.c | 21 +++- gcc/optabs.c | 16 ++- gcc/shrink-wrap.c | 5 +- gcc/testsuite/ChangeLog | 8 ++ gcc/testsuite/c-c++-common/cpp/va-opt-9.c | 20 ++++ gcc/testsuite/c-c++-common/pr101537.c | 26 +++++ gcc/testsuite/c-c++-common/pr103881.c | 20 ++++ gcc/testsuite/g++.dg/cpp/pr103012.C | 18 ++++ gcc/testsuite/g++.dg/cpp2a/consteval26.C | 39 ++++++++ gcc/testsuite/g++.dg/cpp2a/consteval27.C | 18 ++++ gcc/testsuite/g++.dg/warn/Wuseless-cast2.C | 24 +++++ gcc/testsuite/g++.target/i386/pr103012.C | 19 ++++ gcc/testsuite/gcc.c-torture/compile/pr103813.c | 10 ++ gcc/testsuite/gcc.dg/debug/dwarf2/pr103874.c | 12 +++ gcc/testsuite/gcc.dg/pr102478.c | 29 ++++++ gcc/testsuite/gcc.dg/pr103587.c | 7 ++ gcc/testsuite/gcc.dg/pr103837.c | 19 ++++ gcc/testsuite/gcc.dg/pr103838.c | 28 ++++++ gcc/testsuite/gcc.dg/pr103860.c | 31 ++++++ gcc/testsuite/gcc.target/i386/pr103908.c | 24 +++++ gcc/testsuite/gcc.target/i386/pr104188.c | 70 +++++++++++++ gcc/testsuite/gfortran.dg/pr102860.f90 | 10 ++ gcc/testsuite/gfortran.dg/transfer_char_kind4.f90 | 115 ++++++++++++++++++++++ gcc/testsuite/objc.dg/pr103639.m | 101 +++++++++++++++++++ libcpp/macro.c | 5 + 51 files changed, 931 insertions(+), 31 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/cpp/va-opt-9.c create mode 100644 gcc/testsuite/c-c++-common/pr101537.c create mode 100644 gcc/testsuite/c-c++-common/pr103881.c create mode 100644 gcc/testsuite/g++.dg/cpp/pr103012.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval26.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/consteval27.C create mode 100644 gcc/testsuite/g++.dg/warn/Wuseless-cast2.C create mode 100644 gcc/testsuite/g++.target/i386/pr103012.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr103813.c create mode 100644 gcc/testsuite/gcc.dg/debug/dwarf2/pr103874.c create mode 100644 gcc/testsuite/gcc.dg/pr102478.c create mode 100644 gcc/testsuite/gcc.dg/pr103587.c create mode 100644 gcc/testsuite/gcc.dg/pr103837.c create mode 100644 gcc/testsuite/gcc.dg/pr103838.c create mode 100644 gcc/testsuite/gcc.dg/pr103860.c create mode 100644 gcc/testsuite/gcc.target/i386/pr103908.c create mode 100644 gcc/testsuite/gcc.target/i386/pr104188.c create mode 100644 gcc/testsuite/gfortran.dg/pr102860.f90 create mode 100644 gcc/testsuite/gfortran.dg/transfer_char_kind4.f90 create mode 100644 gcc/testsuite/objc.dg/pr103639.m -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap updated (544818c087 -> 5f62caec81)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap in repository toolchain/ci/binutils-gdb. from 544818c087 Automatic date update in version.in adds 5f62caec81 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap updated (bf98fd712 -> d2df51388)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/release-arm-bootstrap in repository toolchain/ci/base-artifacts. discards bf98fd712 0: update: binutils-gcc: 2 new d2df51388 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bf98fd712) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/release-ar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1532 -> 1548 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2756 bytes 04-build_abe-binutils/console.log.xz | Bin 61236 -> 59976 bytes 05-build_abe-bootstrap/console.log.xz | Bin 447732 -> 447384 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 6 months

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