Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

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9360 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (c47967b24 -> cb4906d5d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards c47967b24 0: update: llvm-linux-qemu: all new cb4906d5d 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c47967b24) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 400 +- 03-build_llvm/console.log | 13831 ++++++++++++------------ 04-build_linux/console.log | 798 +- 05-build_abe-qemu/console.log | 6771 ++++++------ 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 10 +- 08-update_baseline/console.log | 22 +- console.log | 21962 +++++++++++++++++++------------------- jenkins/manifest.sh | 12 +- 10 files changed, 21936 insertions(+), 22000 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (aadac5b3d9 -> 470dd6bd36)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/qemu. from aadac5b3d9 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds d2427956e1 tests/docker: Include 'ccache' in Debian base image adds f4c6557bfe tests/iotests: drop test 312 from auto group adds 93eaabde61 tests/acceptance: bound the size of readline in s390_ccw_virtio adds af229fc367 cirrus: don't run full qtest on macOS adds 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 14 ++++++++++---- tests/acceptance/machine_s390_ccw_virtio.py | 2 +- tests/docker/dockerfiles/debian10.docker | 1 + tests/qemu-iotests/group | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (71c061d24438 -> f5e6c330254a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/linux. from 71c061d24438 Merge tag 'for-5.11-rc2-tag' of git://git.kernel.org/pub/s [...] adds cffa4b2122f5 regmap: debugfs: Fix a memory leak when calling regmap_attach_dev adds f6bcb4c7f366 regmap: debugfs: Fix a reversed if statement in regmap_deb [...] adds fc37784dc71b Merge tag 'regmap-fix-v5.11-rc2' of git://git.kernel.org/p [...] adds df9716ec9ade regulator: pf8x00: Use specific compatible strings for devices adds 3b66e4a8e58a regulator: bd718x7: Add enable times adds 2ae6f64ce1ce Merge tag 'v5.11-rc1' into regulator-5.11 adds d957d1610c66 regulator: qcom-rpmh: add QCOM_COMMAND_DB dependency adds 2bf3a72b08e7 dt-bindings: regulator: qcom,rpmh-regulator: add pm8009 revision adds df6b92fa4005 regulator: qcom-rpmh-regulator: correct hfsmps515 definition adds 36836f5b377b Merge qcom driver fix into regulator-5.11 adds a1a7b4f32433 Merge tag 'regulator-fix-v5.11-rc2' of git://git.kernel.or [...] adds 127a7a95df41 Merge remote-tracking branch 'spi/for-5.10' into spi-5.11 adds 4aa1464acbe3 spi: spi-geni-qcom: Fix geni_spi_isr() NULL dereference in [...] adds 690d8b917bbe spi: spi-geni-qcom: Fail new xfers if xfer/cancel/abort pending adds 3d7d916f9bc9 spi: spi-geni-qcom: Don't try to set CS if an xfer is pending adds 17fa81aa702e spi: spi-geni-qcom: Print an error when we timeout setting the CS adds a590370d918f spi: stm32: FIFO threshold level - fix align packet size adds 8db90aa36063 Merge tag 'v5.11-rc1' into spi-5.11 adds ede090f5a438 spi: altera: fix return value for altera_spi_txrx() adds 6820e812dafb spi: Fix the clamping of spi->max_speed_hz adds 6170d077bf92 spi: fix the divide by 0 error when calculating xfer waiting time adds f5e6c330254a Merge tag 'spi-fix-v5.11-rc2' of git://git.kernel.org/pub/ [...] No new revisions were added by this update. Summary of changes: .../bindings/regulator/nxp,pf8x00-regulator.yaml | 6 +- .../bindings/regulator/qcom,rpmh-regulator.txt | 1 + drivers/base/regmap/regmap-debugfs.c | 9 ++- drivers/regulator/Kconfig | 1 + drivers/regulator/bd718x7-regulator.c | 57 +++++++++++++++ drivers/regulator/pf8x00-regulator.c | 8 ++- drivers/regulator/qcom-rpmh-regulator.c | 2 +- drivers/spi/spi-altera.c | 26 +++---- drivers/spi/spi-geni-qcom.c | 84 ++++++++++++++++++++-- drivers/spi/spi-stm32.c | 4 +- drivers/spi/spi.c | 11 ++- 11 files changed, 181 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (be6c485b24f -> 01d92cfd798)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/gcc. from be6c485b24f analyzer: fix false leak reports when merging states [PR97074] adds 1b566975242 Adjust testcase for PR 92658 adds d02a8b63e5a bswap: Fix up recent vector CONSTRUCTOR optimization [PR98568] adds d54be5ad210 i386: Merge various insn name mapping code attributes adds 78595e918ee gimple-isel: Fall back to using vcond_mask [PR98560] adds 298e76e6562 gimple-isel: Check whether IFN_VCONDEQ is supported [PR98560] adds 0f9d2c1a318 aarch64: Support conditional unpacked integer unary arithme [...] adds 6bca2ebf106 i386: Optimize blsi followed by comparison [PR98567] adds d54029179cb fix GIMPLE parser for loops adds dddea6d4d81 d: Merge upstream dmd 9038e64c5. adds 85fb1d7d5f4 Fortran: Improve resolution of associate variables. [PR93701]. adds 19f3c433cdc libstdc++: Fix long double to_chars testcase [PR98384] adds c8d2ed112e7 Update cpplib es.po. adds b87ec922c40 test: add new Go tests from source repo adds 0677759f753 analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580] adds b7c3f201be5 libstdc++: Add support for C++20 barriers adds 4d65a07d54b c++: Add some conversion sanity checking. adds 6c59b8a93cf c++: Add TARGET_EXPR comments adds 2f359597e49 c++: Fix thinko in auto return type checking [PR98441] adds 178f0afce36 PR middle-end/98578 - ICE warning on uninitialized VLA access adds aa4db31dd2a c++: Fix up tsubst of BIT_CAST_EXPR [PR98329] adds 7d187e4f6f5 Daily bump. new 0b7b4710111 RISC-V: Move class riscv_subset_list and riscv_subset_t to [...] new e3354b6de7a RISC-V: Implement new style of architecture extension test macros. new 01d92cfd798 Fix array-quals-1.c for RISC-V The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 54 +++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 27 +++ gcc/analyzer/region.cc | 5 + gcc/c-family/ChangeLog | 7 + gcc/c-family/c-pretty-print.c | 29 +-- gcc/c/ChangeLog | 5 + gcc/c/gimple-parser.c | 5 +- gcc/common/config/riscv/riscv-common.c | 72 +----- gcc/config/aarch64/aarch64-sve.md | 28 +-- gcc/config/i386/i386.md | 126 ++++++----- gcc/config/i386/mmx.md | 14 +- gcc/config/i386/sse.md | 82 +++---- gcc/config/riscv/riscv-c.c | 32 +++ gcc/config/riscv/riscv-subset.h | 95 ++++++++ gcc/config/riscv/t-riscv | 4 +- gcc/cp/ChangeLog | 29 +++ gcc/cp/call.c | 37 +-- gcc/cp/constexpr.c | 6 + gcc/cp/decl.c | 8 +- gcc/cp/pt.c | 11 +- gcc/d/ChangeLog | 6 + gcc/d/d-builtins.cc | 2 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/arrayop.c | 8 +- gcc/d/dmd/clone.c | 16 +- gcc/d/dmd/cond.c | 2 +- gcc/d/dmd/declaration.c | 2 +- gcc/d/dmd/dtemplate.c | 2 +- gcc/d/dmd/expression.c | 2 +- gcc/d/dmd/expressionsem.c | 5 +- gcc/d/dmd/func.c | 24 +- gcc/d/dmd/hdrgen.c | 12 + gcc/d/dmd/mtype.c | 30 +-- gcc/d/dmd/mtype.h | 7 +- gcc/d/dmd/parse.c | 113 ++++++++-- gcc/d/dmd/statementsem.c | 24 +- gcc/d/dmd/traits.c | 39 +++- gcc/fortran/ChangeLog | 7 + gcc/fortran/resolve.c | 9 + gcc/gimple-isel.cc | 32 ++- gcc/gimple-ssa-store-merging.c | 25 ++- gcc/internal-fn.c | 22 +- gcc/internal-fn.def | 4 +- gcc/testsuite/ChangeLog | 78 +++++++ gcc/testsuite/g++.dg/cpp0x/auto55.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/bit-cast10.C | 42 ++++ gcc/testsuite/g++.dg/torture/pr98568.C | 37 +++ gcc/testsuite/gcc.dg/analyzer/pr98580-a.c | 9 + gcc/testsuite/gcc.dg/analyzer/pr98580-b.c | 2 + gcc/testsuite/gcc.dg/array-quals-1.c | 40 ++-- gcc/testsuite/gcc.dg/plugin/gil-1.c | 4 +- gcc/testsuite/gcc.dg/uninit-pr98578.c | 110 +++++++++ gcc/testsuite/gcc.dg/vect/pr98560-1.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr98560-2.c | 17 ++ .../gcc.target/aarch64/sve/cond_unary_5.c | 49 ++++ .../gcc.target/aarch64/sve/cond_unary_5_run.c | 26 +++ .../gcc.target/aarch64/sve/cond_unary_6.c | 53 +++++ .../gcc.target/aarch64/sve/cond_unary_6_run.c | 27 +++ .../gcc.target/aarch64/sve/cond_unary_7.c | 48 ++++ .../gcc.target/aarch64/sve/cond_unary_7_run.c | 26 +++ .../gcc.target/aarch64/sve/cond_unary_8.c | 50 +++++ .../gcc.target/aarch64/sve/cond_unary_8_run.c | 28 +++ gcc/testsuite/gcc.target/i386/pr92658-avx512bw-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr92658-avx512bw.c | 2 +- gcc/testsuite/gcc.target/i386/pr98567-1.c | 31 +++ gcc/testsuite/gcc.target/i386/pr98567-2.c | 31 +++ gcc/testsuite/gcc.target/riscv/predef-10.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-11.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-12.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-13.c | 43 ++++ .../gdc.test/compilable/extra-files/header1.d | 18 ++ .../gdc.test/compilable/testheaderudamodule.d | 2 + .../gdc.test/fail_compilation/fail10207.d | 2 +- gcc/testsuite/gdc.test/runnable/uda.d | 194 ++++++++++++++++ gcc/testsuite/gfortran.dg/associate_54.f90 | 34 +++ gcc/testsuite/gfortran.dg/associate_55.f90 | 35 +++ gcc/testsuite/gfortran.dg/associate_56.f90 | 36 +++ .../test/fixedbugs/issue27836.dir/\303\204foo.go" | 13 ++ .../test/fixedbugs/issue27836.dir/\303\204main.go" | 13 ++ .../fixedbugs/{issue23311.go => issue27836.go} | 0 libcpp/po/ChangeLog | 4 + libcpp/po/es.po | 89 ++++---- libstdc++-v3/ChangeLog | 21 ++ libstdc++-v3/doc/doxygen/user.cfg.in | 1 + libstdc++-v3/include/Makefile.am | 1 + libstdc++-v3/include/Makefile.in | 1 + libstdc++-v3/include/precompiled/stdc++.h | 1 + libstdc++-v3/include/std/barrier | 247 +++++++++++++++++++++ libstdc++-v3/include/std/version | 3 + .../testsuite/20_util/to_chars/long_double.cc | 25 ++- libstdc++-v3/testsuite/30_threads/barrier/1.cc | 30 +++ libstdc++-v3/testsuite/30_threads/barrier/2.cc | 28 +++ .../testsuite/30_threads/barrier/arrive.cc | 48 ++++ .../30_threads/barrier/arrive_and_drop.cc | 46 ++++ .../30_threads/barrier/arrive_and_wait.cc | 46 ++++ .../testsuite/30_threads/barrier/completion.cc | 53 +++++ 97 files changed, 2579 insertions(+), 399 deletions(-) create mode 100644 gcc/config/riscv/riscv-subset.h create mode 100644 gcc/testsuite/g++.dg/cpp0x/auto55.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/bit-cast10.C create mode 100644 gcc/testsuite/g++.dg/torture/pr98568.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-a.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-b.c create mode 100644 gcc/testsuite/gcc.dg/uninit-pr98578.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr98560-1.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr98560-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_8_run.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98567-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98567-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-13.c create mode 100644 gcc/testsuite/gfortran.dg/associate_54.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_55.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_56.f90 create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204foo.go" create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204main.go" copy gcc/testsuite/go.test/test/fixedbugs/{issue23311.go => issue27836.go} (100%) create mode 100644 libstdc++-v3/include/std/barrier create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/1.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/2.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_drop.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_wait.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/completion.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (2652cfad8d -> 9a50f40e82)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/binutils-gdb. from 2652cfad8d RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructio [...] adds 1861f7cfbf sim: cris: fix C tests with newer toolchains adds 9446bcf6be fix paths in ChangeLog adds 4d4490b8d7 ld: xfail riscv64*-*-* for ld-scripts/empty-address-2 tests. adds aa881ecde4 RISC-V: Add pause hint instruction. adds 78e4948694 [gdb/build] Fix gdbserver build with -fsanitize=address adds 17d60030ae Fix another path length problem opening files on Win32 systems. adds d4813f1046 Fix regression in Ada aggregate assignment adds 8e604ff077 xfail more cases of complaints about relocs in read-only sections adds dc20061339 sh-pe ld XPASSes adds 959d6a673e Fix regression in Ada do_full_match adds 3b288c8e2e m68k: Require m68020up rather than m68000up for CHK.L instruction. adds d1bcae833b ELF: Don't generate unused section symbols adds 1b0927db3c Updated French translation for the opcodes/ subdirectory. adds f478212851 libtool.m4: update GNU/Hurd test from upstream. In upstream [...] adds e904f56d02 gdb/sim: add support for exporting memory map adds bfc7d04afb sim: h8300: delete opcode caching adds a39487c668 sim: cris: use -sim with C tests for cris-elf targets adds e6c1dbbfe8 sim: cris: disable test that crashes the linker adds 0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir adds 9a50f40e82 Automatic date update in version.in No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/ChangeLog | 90 ++++ bfd/aix386-core.c | 1 + bfd/aout-target.h | 1 + bfd/bfd-in2.h | 17 + bfd/bfdio.c | 23 +- bfd/binary.c | 1 + bfd/cisco-core.c | 2 + bfd/coff-alpha.c | 1 + bfd/coff-i386.c | 4 +- bfd/coff-ia64.c | 1 + bfd/coff-mips.c | 3 + bfd/coff-rs6000.c | 2 + bfd/coff-sh.c | 2 + bfd/coff-tic30.c | 1 + bfd/coff-tic54x.c | 26 + bfd/coff-x86_64.c | 2 + bfd/coff64-rs6000.c | 2 + bfd/coffcode.h | 3 + bfd/configure | 12 +- bfd/elf.c | 15 +- bfd/elfcode.h | 8 +- bfd/elflink.c | 61 ++- bfd/elfxx-riscv.c | 2 +- bfd/elfxx-target.h | 6 + bfd/elfxx-x86.h | 3 + bfd/hppabsd-core.c | 1 + bfd/hpux-core.c | 1 + bfd/i386msdos.c | 1 + bfd/ihex.c | 1 + bfd/irix-core.c | 1 + bfd/mach-o-target.c | 1 + bfd/mmo.c | 1 + bfd/netbsd-core.c | 1 + bfd/osf-core.c | 1 + bfd/pdp11.c | 1 + bfd/pef.c | 2 + bfd/plugin.c | 1 + bfd/ppcboot.c | 1 + bfd/ptrace-core.c | 1 + bfd/sco5-core.c | 1 + bfd/som.c | 1 + bfd/srec.c | 2 + bfd/syms.c | 3 + bfd/targets.c | 14 + bfd/tekhex.c | 1 + bfd/trad-core.c | 1 + bfd/verilog.c | 1 + bfd/version.h | 2 +- bfd/vms-alpha.c | 1 + bfd/vms-lib.c | 1 + bfd/wasm-module.c | 1 + bfd/xsym.c | 1 + binutils/ChangeLog | 20 + binutils/configure | 12 +- binutils/objcopy.c | 24 + binutils/testsuite/binutils-all/readelf.exp | 6 +- binutils/testsuite/binutils-all/readelf.s-64 | 2 +- .../{readelf.s-64 => readelf.s-64-unused} | 0 binutils/testsuite/binutils-all/readelf.ss | 5 +- binutils/testsuite/binutils-all/readelf.ss-64 | 5 +- .../{readelf.ss-64 => readelf.ss-64-unused} | 0 .../binutils-all/{readelf.ss => readelf.ss-unused} | 0 binutils/testsuite/lib/binutils-common.exp | 31 ++ gas/ChangeLog | 45 ++ gas/config/obj-elf.c | 3 + gas/config/tc-riscv.c | 2 + gas/configure | 12 +- gas/read.c | 3 + gas/subsegs.c | 4 + gas/testsuite/gas/cfi/cfi-label.d | 4 +- gas/testsuite/gas/elf/elf.exp | 6 +- gas/testsuite/gas/elf/section2.e | 7 - .../gas/elf/{section2.e => section2.e-unused} | 0 gas/testsuite/gas/elf/symver.d | 4 - gas/testsuite/gas/i386/ilp32/elf/symver.d | 4 - gas/testsuite/gas/i386/ilp32/x86-64-size-1.d | 24 +- gas/testsuite/gas/i386/ilp32/x86-64-size-3.d | 16 +- gas/testsuite/gas/i386/ilp32/x86-64-size-5.d | 12 +- gas/testsuite/gas/i386/ilp32/x86-64-unwind.d | 6 +- gas/testsuite/gas/i386/size-1.d | 24 +- gas/testsuite/gas/i386/size-3.d | 16 +- gas/testsuite/gas/i386/svr4.d | 3 - gas/testsuite/gas/i386/x86-64-size-1.d | 24 +- gas/testsuite/gas/i386/x86-64-size-3.d | 16 +- gas/testsuite/gas/i386/x86-64-size-5.d | 12 +- gas/testsuite/gas/i386/x86-64-unwind.d | 10 +- gas/testsuite/gas/riscv/pause.d | 10 + gas/testsuite/gas/riscv/pause.s | 2 + gas/write.c | 43 +- gdb/ChangeLog | 15 + gdb/ada-lang.c | 12 +- gdb/remote-sim.c | 18 + gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.ada/assign_arr.exp | 3 + gdbserver/ChangeLog | 7 + gdbserver/Makefile.in | 13 +- gprof/ChangeLog | 4 + gprof/configure | 12 +- include/ChangeLog | 6 + include/gdb/ChangeLog | 4 + include/gdb/remote-sim.h | 9 + include/opcode/riscv-opc.h | 3 + include/opcode/riscv.h | 1 + ld/ChangeLog | 112 +++++ ld/configure | 12 +- ld/testsuite/ld-elf/comm-data5.d | 2 +- ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +- ld/testsuite/ld-elf/ehdr_start.d | 2 +- ld/testsuite/ld-elf/export-class.sd | 2 - ld/testsuite/ld-elf/loadaddr3b.d | 3 - ld/testsuite/ld-elf/sec64k.exp | 16 +- ld/testsuite/ld-elf/shared.exp | 6 +- ld/testsuite/ld-i386/ibt-plt-1.d | 4 +- ld/testsuite/ld-i386/ibt-plt-2a.d | 4 +- ld/testsuite/ld-i386/ibt-plt-2c.d | 4 +- ld/testsuite/ld-i386/ibt-plt-3a.d | 4 +- ld/testsuite/ld-i386/ibt-plt-3c.d | 4 +- ld/testsuite/ld-i386/plt-pic.pd | 6 +- ld/testsuite/ld-i386/plt-pic2.dd | 6 +- ld/testsuite/ld-i386/plt.pd | 6 +- ld/testsuite/ld-i386/plt2.dd | 6 +- ld/testsuite/ld-i386/pr19636-1d.d | 2 +- ld/testsuite/ld-i386/pr19636-1l.d | 2 +- ld/testsuite/ld-i386/pr19636-2c.d | 2 +- ld/testsuite/ld-i386/tlsbin.rd | 13 - ld/testsuite/ld-i386/tlsbin2.rd | 11 - ld/testsuite/ld-i386/tlsbindesc.rd | 11 - ld/testsuite/ld-i386/tlsdesc.rd | 11 - ld/testsuite/ld-i386/tlsgdesc.rd | 10 - ld/testsuite/ld-i386/tlsnopic.rd | 9 - ld/testsuite/ld-i386/tlspic.rd | 12 - ld/testsuite/ld-i386/tlspic2.rd | 10 - ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-21-x86-64.d | 10 +- ld/testsuite/ld-ifunc/ifunc-22-x86-64.d | 10 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 10 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 8 +- ld/testsuite/ld-ifunc/pr17154-x86-64-now.d | 10 +- ld/testsuite/ld-ifunc/pr17154-x86-64.d | 8 +- ld/testsuite/ld-scripts/empty-address-2a.d | 2 +- ld/testsuite/ld-scripts/empty-address-2b.d | 2 +- ld/testsuite/ld-scripts/fill.d | 4 +- ld/testsuite/ld-scripts/fill16.d | 2 +- ld/testsuite/ld-scripts/pr22267.d | 1 + ld/testsuite/ld-scripts/segment-start.d | 2 +- ld/testsuite/ld-x86-64/bnd-branch-1-now.d | 10 +- ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d | 2 +- ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d | 8 +- ld/testsuite/ld-x86-64/bnd-ifunc-2.d | 8 +- ld/testsuite/ld-x86-64/bnd-plt-1-now.d | 8 +- ld/testsuite/ld-x86-64/bnd-plt-1.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-1-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-1.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2a-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2a.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2c-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2c.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3a-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3a.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3c-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3c.d | 4 +- ld/testsuite/ld-x86-64/mpx3.dd | 2 +- ld/testsuite/ld-x86-64/mpx3n.dd | 2 +- ld/testsuite/ld-x86-64/mpx4.dd | 2 +- ld/testsuite/ld-x86-64/mpx4n.dd | 2 +- ld/testsuite/ld-x86-64/pe-x86-64-1.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-2.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-3.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-4.od | 6 - ld/testsuite/ld-x86-64/plt.pd | 6 +- ld/testsuite/ld-x86-64/plt2.dd | 6 +- ld/testsuite/ld-x86-64/pr19609-4e.d | 4 +- ld/testsuite/ld-x86-64/pr19609-6a.d | 2 +- ld/testsuite/ld-x86-64/pr19609-6b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7d.d | 2 +- ld/testsuite/ld-x86-64/pr19636-2l.d | 6 +- ld/testsuite/ld-x86-64/pr20253-1d.d | 12 +- ld/testsuite/ld-x86-64/pr20253-1h.d | 12 +- ld/testsuite/ld-x86-64/pr21038b-now.d | 2 +- ld/testsuite/ld-x86-64/pr21038b.d | 2 +- ld/testsuite/ld-x86-64/pr21038c-now.d | 2 +- ld/testsuite/ld-x86-64/pr21038c.d | 2 +- ld/testsuite/ld-x86-64/pr23854.d | 36 +- ld/testsuite/ld-x86-64/pr25416-3.d | 4 +- ld/testsuite/ld-x86-64/pr25416-4.d | 4 +- ld/testsuite/ld-x86-64/tlsbin.rd | 13 - ld/testsuite/ld-x86-64/tlsbin2.rd | 11 - ld/testsuite/ld-x86-64/tlsbindesc.rd | 11 - ld/testsuite/ld-x86-64/tlsdesc.rd | 12 - ld/testsuite/ld-x86-64/tlsgdesc.rd | 10 - ld/testsuite/ld-x86-64/tlspic.rd | 12 - ld/testsuite/ld-x86-64/tlspic2.rd | 12 - libctf/ChangeLog | 4 + libctf/configure | 12 +- libtool.m4 | 12 +- opcodes/ChangeLog | 17 + opcodes/configure | 12 +- opcodes/m68k-opc.c | 2 +- opcodes/po/fr.po | 555 ++++++++++++--------- opcodes/riscv-opc.c | 3 + sim/ChangeLog | 490 ------------------ sim/avr/ChangeLog | 23 + sim/bpf/ChangeLog | 54 ++ sim/common/ChangeLog | 4 + sim/common/sim-core.c | 57 +++ sim/cris/ChangeLog | 355 +++++++++++++ sim/ft32/ChangeLog | 8 + sim/h8300/ChangeLog | 16 + sim/h8300/compile.c | 135 +---- sim/h8300/sim-main.h | 5 - sim/m32c/ChangeLog | 9 +- sim/or1k/ChangeLog | 52 ++ sim/ppc/ChangeLog | 4 + sim/testsuite/ChangeLog | 18 +- sim/testsuite/sim/bpf/ChangeLog | 20 + sim/testsuite/sim/cris/ChangeLog | 17 + sim/testsuite/sim/cris/c/c.exp | 4 + sim/testsuite/sim/cris/c/helloaout.c | 6 +- sim/testsuite/sim/cris/c/kill2.c | 2 + sim/testsuite/sim/cris/c/openpf1.c | 2 +- sim/testsuite/sim/cris/c/openpf2.c | 2 +- sim/testsuite/sim/cris/c/pipe1.c | 1 + sim/testsuite/sim/cris/c/sched1.c | 1 + sim/testsuite/sim/cris/c/sched2.c | 1 + sim/testsuite/sim/cris/c/sched3.c | 1 + sim/testsuite/sim/cris/c/sched4.c | 1 + sim/testsuite/sim/cris/c/sig5.c | 2 + sim/testsuite/sim/cris/c/sig8.c | 2 + zlib/configure | 12 +- 234 files changed, 1934 insertions(+), 1532 deletions(-) copy binutils/testsuite/binutils-all/{readelf.s-64 => readelf.s-64-unused} (100%) copy binutils/testsuite/binutils-all/{readelf.ss-64 => readelf.ss-64-unused} (100%) copy binutils/testsuite/binutils-all/{readelf.ss => readelf.ss-unused} (100%) copy gas/testsuite/gas/elf/{section2.e => section2.e-unused} (100%) create mode 100644 gas/testsuite/gas/riscv/pause.d create mode 100644 gas/testsuite/gas/riscv/pause.s create mode 100644 sim/bpf/ChangeLog create mode 100644 sim/or1k/ChangeLog create mode 100644 sim/testsuite/sim/bpf/ChangeLog -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (906872300 -> 7f142e551)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig in repository toolchain/ci/base-artifacts. discards 906872300 0: update: binutils-gcc-linux-qemu: all new 7f142e551 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (906872300) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ma [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 92 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11596 +++++---- 04-build_abe-stage1/console.log | 20752 ++++++++------- 05-build_linux/console.log | 654 +- 06-build_abe-qemu/console.log | 6735 +++-- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 14 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 18 +- 09-update_baseline/results.regressions | 2 +- console.log | 40301 +++++++++++++++--------------- jenkins/manifest.sh | 20 +- 13 files changed, 40222 insertions(+), 40404 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (2e0b5bbe81 -> 470dd6bd36)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/qemu. from 2e0b5bbe81 Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mip [...] adds 59a958bb74 hw/ppc/ppc4xx_devs: Make code style fixes to UIC code adds 34d0831f38 ppc: Convert PPC UIC to a QOM device adds c5ac9dc64f hw/ppc/virtex_ml507: Drop use of ppcuic_init() adds 0270d74ef8 hw/ppc/ppc440_bamboo: Drop use of ppcuic_init() adds 73231f7c5f spapr: DRC lookup cannot fail adds ab9c93c25c spapr/xive: Make spapr_xive_pic_print_info() static adds 776e887f08 spapr: Fix DR properties of the root node adds 1e8b5b1aa1 spapr: Allow memory unplug to always succeed adds 30499fdd98 spapr: Fix buffer overflow in spapr_numa_associativity_init() adds cd725bd748 spapr: Call spapr_drc_reset() for all DRCs at CAS adds 930ef3b5c2 spapr: Fix reset of transient DR connectors adds babb819f94 spapr: Introduce spapr_drc_reset_all() adds 1105504100 spapr: Use spapr_drc_reset_all() at machine reset adds 00f46c92a0 spapr: Add drc_ prefix to the DRC realize and unrealize functions adds b040e591c5 ppc: Fix build with --without-default-devices adds 27d5caec4f ppc: Simplify reverse dependencies of POWERNV and PSERIES on [...] adds 995d955647 pnv: Fix reverse dependency on PCI express root ports adds e6d5106786 ppc4xx: Move common dependency on serial to common option adds 038da2adf0 sam460ex: Remove FDT_PPC dependency from KConfig adds 2a9cf49598 ppc440_pcix: Improve comment for IRQ mapping adds 2d4c816a8d ppc440_pcix: Fix register write trace event adds 5cbd51a5a5 ppc440_pcix: Fix up pci config access adds 7a5fd9343d Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for [...] adds 62a9b228b5 hw/timer/slavio_timer: Allow 64-bit accesses adds 3391953660 hw/sparc: Make grlib-irqmp device handle its own inbound IRQ lines adds aecf994bca include/hw/sparc/grlib.h: Remove unused set_pil_in_fn typedef adds a879306ca1 sun4m: don't connect two qemu_irqs directly to the same input adds 30918661c1 Merge remote-tracking branch 'remotes/mcayland/tags/qemu-spa [...] adds f3890e71ac gitlab: include aarch64-softmmu and ppc64-softmmu cross-syst [...] adds 0e8e77d487 configure: move gettext detection to meson.build adds c87ea11631 configure: add --without-default-features adds afded359a6 python: add __repr__ to ConsoleSocket to aid debugging adds 3fed93f312 gitlab: move --without-default-devices build from Travis adds 53f41245b0 gitlab: add --without-default-features build adds 2af43a6a59 tests/tcg: build tests with -Werror adds ee381b7fe1 gitlab-CI: Test 32-bit builds with the fedora-i386-cross container adds c9d78b06c0 tests/docker: Remove the remainders of debian9 containers fr [...] adds 90e0c9b309 tests: update for rename of CentOS8 PowerTools repo adds c035c8d6f5 configure: document --without-default-{features,devices} adds facf7c60ee vl: initialize displays _after_ exiting preconfiguration adds 08bdf5d44f test-char: Destroy chardev correctly at char_file_test_internal() adds 63f957ac96 qom: Assert that objects being destroyed have no parent adds 3df1a3d070 target/i386: Check privilege level for protected mode 'int N [...] adds cdad781d09 configure,meson: add option to enable LTO adds c905a3680d cfi: Initial support for cfi-icall in QEMU adds 24496fe851 check-block: enable iotests with cfi-icall adds 9e62ba48ea configure,meson: support Control-Flow Integrity adds a111824382 docs: Add CFI Documentation adds 953d5a9ef3 build-sys: fix -static linking of libvhost-user adds 3b9bd3f46b remove TCG includes from common code adds 084cfca143 util: Extract flush_icache_range to cacheflush.c adds e921f1a710 trace: do not include TCG helper tracepoints in no-TCG builds adds fc5db021bd Makefile: add dummy target for build.ninja dependencies adds 0dbce6efb5 meson: fix detection of curses with pkgconfig adds a0fbbb6eb8 meson: use pkg-config method for libudev adds 2f2a376a42 meson: use dependency to gate block modules adds 0a18911074 meson: cleanup Kconfig.host handling adds 21c7843d82 configure: remove useless code to check for Xen PCI passthrough adds 975ff037f5 configure: remove variable bogus_os adds fd6fc2141c configure: accept --enable-slirp adds ddfcb8c43c configure: remove CONFIG_FILEVERSION and CONFIG_PRODUCTVERSION adds 8c6d4ff404 brlapi: convert to meson adds 8e4e2b551d curl: remove compatibility code, require 7.29.0 adds f9cd86fe72 curl: convert to meson adds 08821ca268 glusterfs: convert to meson adds 29ba6116b6 bzip2: convert to meson adds 9db405a335 libiscsi: convert to meson adds 30045c054f libnfs: convert to meson adds fabd1e93d9 rbd: convert to meson adds 0c32a0aeed lzo: convert to meson adds 241611eab2 snappy: convert to meson adds ecea3696b9 lzfse: convert to meson adds b1def33d19 zstd: convert to meson adds 90835c2b81 seccomp: convert to meson adds 69202b406e virtfs: convert to meson adds 727c8bb809 cap_ng: convert to meson adds f7f2d65135 libattr: convert to meson adds 7bc3ca7fc0 meson.build: convert --with-default-devices to meson adds acb1e6db84 configure: move tests/qemu-iotests/common.env generation to meson adds c8b2b7fed9 win32: drop fd registration to the main-loop on setting non-block adds aadac5b3d9 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds d2427956e1 tests/docker: Include 'ccache' in Debian base image adds f4c6557bfe tests/iotests: drop test 312 from auto group adds 93eaabde61 tests/acceptance: bound the size of readline in s390_ccw_virtio adds af229fc367 cirrus: don't run full qtest on macOS adds 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 14 +- .gitlab-ci.d/crossbuilds.yml | 22 +- .gitlab-ci.yml | 14 + .travis.yml | 8 - MAINTAINERS | 4 + Makefile | 1 + accel/Kconfig | 9 + accel/stubs/tcg-stub.c | 1 - accel/tcg/cpu-exec.c | 11 + accel/tcg/cputlb.c | 2 +- accel/tcg/translate-all.c | 2 +- accel/tcg/user-exec.c | 2 +- block/curl.c | 28 - block/meson.build | 22 +- chardev/meson.build | 2 +- configure | 756 +++++----------------- contrib/elf2dmp/meson.build | 2 +- contrib/vhost-user-scsi/meson.build | 2 +- cpu.c | 2 +- docs/devel/control-flow-integrity.rst | 137 ++++ docs/devel/index.rst | 5 +- docs/devel/kconfig.rst | 19 +- hw/i386/kvmvapic.c | 1 - hw/intc/Kconfig | 17 +- hw/intc/grlib_irqmp.c | 5 +- hw/intc/meson.build | 13 +- hw/intc/ppc-uic.c | 321 +++++++++ hw/intc/spapr_xive.c | 2 +- hw/pci-host/Kconfig | 5 + hw/pci-host/meson.build | 2 +- hw/ppc/Kconfig | 29 +- hw/ppc/ppc440_bamboo.c | 38 +- hw/ppc/ppc440_pcix.c | 50 +- hw/ppc/ppc4xx_devs.c | 262 +------- hw/ppc/spapr.c | 44 +- hw/ppc/spapr_drc.c | 63 +- hw/ppc/spapr_events.c | 3 +- hw/ppc/spapr_hcall.c | 33 +- hw/ppc/trace-events | 1 + hw/ppc/virtex_ml507.c | 21 +- hw/sparc/Kconfig | 1 + hw/sparc/leon3.c | 21 +- hw/sparc/sun4m.c | 24 +- hw/timer/slavio_timer.c | 4 + {accel/tcg => include/exec}/translate-all.h | 0 include/hw/{i2c/ppc4xx_i2c.h => intc/ppc-uic.h} | 68 +- include/hw/pci-host/spapr.h | 2 - include/hw/ppc/spapr.h | 6 +- include/hw/ppc/spapr_drc.h | 10 +- include/hw/ppc/spapr_xive.h | 2 - include/hw/sparc/grlib.h | 4 - include/qemu/cacheflush.h | 24 + include/qemu/compiler.h | 11 + meson.build | 410 +++++++++--- meson_options.txt | 47 +- migration/meson.build | 2 +- monitor/misc.c | 1 - plugins/core.c | 37 ++ plugins/loader.c | 7 + po/meson.build | 2 +- python/qemu/console_socket.py | 7 + qom/object.c | 1 + softmmu/meson.build | 2 +- softmmu/physmem.c | 4 +- softmmu/qemu-seccomp.c | 2 - softmmu/vl.c | 2 +- target/i386/tcg/seg_helper.c | 35 +- tcg/aarch64/tcg-target.h | 5 - tcg/arm/tcg-target.h | 5 - tcg/i386/tcg-target.h | 4 - tcg/mips/tcg-target.h | 11 - tcg/ppc/tcg-target.c.inc | 22 - tcg/ppc/tcg-target.h | 1 - tcg/riscv/tcg-target.h | 5 - tcg/s390/tcg-target.h | 4 - tcg/sparc/tcg-target.h | 8 - tcg/tcg.c | 1 + tcg/tci.c | 7 + tcg/tci/tcg-target.h | 4 - tests/acceptance/machine_s390_ccw_virtio.py | 2 +- tests/check-block.sh | 18 +- tests/docker/Makefile.include | 6 +- tests/docker/dockerfiles/centos8.docker | 5 +- tests/docker/dockerfiles/debian10.docker | 1 + tests/docker/dockerfiles/fedora-i386-cross.docker | 18 +- tests/qemu-iotests/common.env.in | 3 + tests/qemu-iotests/group | 2 +- tests/qemu-iotests/meson.build | 3 + tests/tcg/Makefile.target | 2 +- tests/test-char.c | 2 +- tools/meson.build | 6 +- trace/meson.build | 3 +- util/cacheflush.c | 71 ++ util/main-loop.c | 11 + util/meson.build | 2 +- util/oslib-posix.c | 11 + util/oslib-win32.c | 1 - version.rc | 4 +- 98 files changed, 1645 insertions(+), 1314 deletions(-) create mode 100644 docs/devel/control-flow-integrity.rst create mode 100644 hw/intc/ppc-uic.c rename {accel/tcg => include/exec}/translate-all.h (100%) copy include/hw/{i2c/ppc4xx_i2c.h => intc/ppc-uic.h} (50%) create mode 100644 include/qemu/cacheflush.h create mode 100644 tests/qemu-iotests/common.env.in create mode 100644 util/cacheflush.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (be604df55 -> bbafba7b9)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards be604df55 2: update: linux-2d3811a4fb231af9acb96fd0355ecb889d66ea41: 21253 new bbafba7b9 2: update: qemu-470dd6bd360782f5137f7e3376af6a44658eb1d3: 21253 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (be604df55) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 22 +- 02-prepare_abe/console.log | 438 +- 03-build_llvm/console.log | 13480 +++++++++++++-------------- 04-build_linux/console.log | 778 +- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 144 +- 08-update_baseline/results.regressions | 2 +- console.log | 14874 +++++++++++++++--------------- jenkins/manifest.sh | 8 +- 10 files changed, 14738 insertions(+), 15022 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (aadac5b3d9 -> 470dd6bd36)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig in repository toolchain/ci/qemu. from aadac5b3d9 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds d2427956e1 tests/docker: Include 'ccache' in Debian base image adds f4c6557bfe tests/iotests: drop test 312 from auto group adds 93eaabde61 tests/acceptance: bound the size of readline in s390_ccw_virtio adds af229fc367 cirrus: don't run full qtest on macOS adds 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 14 ++++++++++---- tests/acceptance/machine_s390_ccw_virtio.py | 2 +- tests/docker/dockerfiles/debian10.docker | 1 + tests/qemu-iotests/group | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig updated (25bf4a8f428 -> b934160aaa3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-defconfig in repository toolchain/ci/llvm-project. from 25bf4a8f428 [debuginfo-test] Fix -Wunused-value adds 25f23a60398 [AsmPrinter] Make OpAsmPrinter::printFunctionalType be resi [...] adds 7510c1152f0 Update for review feedback: Inline var declaration and expa [...] adds 01a2508aa58 [PowerPC] Delete remnant isOSDarwin references adds bfa6ca07a8c [PowerPC] Delete remnant Darwin ISelLowering code adds 022cc6e3434 [PowerPC] Delete dead Lower* adds 3bfc9bb8ef2 [VE][NFC] Update comments to match the generated instructions adds dbfc1ac4d86 [X86] Update tests for znver3 adds 238dbeb1e7b [mlir][ODS] Fix missed rename of TypeParameter 'description [...] adds 7ddbe0cb905 [LV] Merge tests into a single file (NFC) adds 248e3450fb8 [LLD] [MinGW] Pass the --demangle and --no-demangle options [...] adds f4485240a21 [libcxx] Handle backslash as path separator on windows adds c3529a5b080 [mlir] Mark methods from mlir::OpState that just forward to [...] adds d2ddc694ff9 Revert "Revert "[analyzer] NFC: Move path diagnostic consum [...] adds 5471b1fa401 [gn build] Port d2ddc694ff9 adds 77db83ae997 [clang][cli] Allow users to specify a conditional to preven [...] adds c6ea4d5b2c0 [clang][cli] Implement ContainsN Google Test matcher adds d0fa7a05be9 Revert "[clang][cli] Allow users to specify a conditional t [...] adds 76f6b125cef Revert "[llvm] Use BasicBlock::phis() (NFC)" adds c9154e8fa37 [RISCV] Add vector mask arithmetic ISel patterns adds 67a4c672b02 Reapply "[clang][cli] Allow users to specify a conditional [...] adds 0877b963ef2 [clang][ASTImporter] Fix a possible assertion failure `Need [...] adds 801c7866e6d [lldb][ARM/AArch64] Update disasm flags to latest v8.7a ISA adds a828fb463ed [clang][cli] Port a CommaJoined option to the marshalling i [...] adds e5cdb6c56ed [flang][driver] Add support for `-c` and `-emit-obj` adds b6ba5983079 [clang][cli] Port getAllArgumentValues to the marshalling i [...] adds b6fb0209b6d [libc++] [CI] Install Tip-of-Trunk clang. adds 33f90f38e11 [clang][cli] Report the actual argument parsing result adds 350ab7aa1c6 [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' st [...] adds 7da3e3a8983 [libcxx] Mark a test as unsupported for C++03 adds 044b892c79b [libc++] Use c++20 instead of c++2a consistently. adds 10164a2e50b [mlir] Refactor translation of OpenMP dialect ops to LLVM IR adds 213329d7c64 [clangd] Add server capability advertising hot-reloading of CDBs. adds 4284afdf943 [SLP]Need shrink the load vector after reordering. adds 236129fb446 [CompilationDatabase] Pass Twine by const reference instead [...] adds 028091195d7 [DWARF] DWARFDebugLoc::dumpRawEntry - remove dead stores. NFCI. adds a9a8caf2ce2 [llvm-objdump] Pass Twine by const reference instead of by [...] adds c1d58c2b002 [mlir] Add fastmath flags support to some LLVM dialect ops adds e72cdc5ba1e [clang][cli] NFC: Ensure non-null DiagnosticsEngine in Pars [...] adds 75d63630ebb [clang][cli] NFC: Move parseSimpleArgs adds a7cbc32a916 [mlir] remove a use of deprecated OpState::setAttr adds fcd1e35e4cc [clang][cli] NFC: Make parsing macro reusable adds 01c190e907c [AArch64][CostModel]Fix gather scatter cost model adds a2957f80f87 [flang][driver] Rename driver tests (nfc) adds fa6d8977999 [Analysis] MemoryDepChecker::couldPreventStoreLoadForward - [...] adds 037b058e419 [AArch64] SVEIntrinsicOpts - use range loop and cast<> inst [...] adds b73736a4048 [flang][openacc] Enforce delcare directive restriction adds aa7968a87b6 [TableGen] Add field kind to the RecordVal class. adds 048f184ee48 [SplitEdge] Add new parameter to SplitEdge to name the newl [...] adds 8dee0b4bd63 [llvm-reduce] ReduceGlobalVarInitializers delta pass: fix h [...] adds 6be1fd6b20f [SimplifyCFG] FoldValueComparisonIntoPredecessors(): drop r [...] adds ebfe4de2c04 [DDG] Fix duplicate edge removal during pi-block formation adds 6b7d5a928f5 AMDGPU/GlobalISel: Start cleaning up calling convention lowering adds 573d5782482 [DDG] Data Dependence Graph - DOT printer tests adds f4013359b3d [SVE] Add unpacked scalable floating point ZIP/UZP/TRN patterns adds e881a25f1e1 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds db33f85c712 [IR] Use LLVM_ENABLE_ABI_BREAKING_CHECKS to guard ABI changes. adds 82f5ee3c3e6 Adds argument attributes for using LLVM's sret and byval at [...] adds 59fce6b0661 [NFC] make clang/test/CodeGen/arm_neon_intrinsics.c resiste [...] adds f88fab50068 [mlir] NFC: fix trivial typos adds acbb3652931 [AST][NFC] Silence GCC warning about multiline comments adds 43043adcfbc Add element-type to the Vector TypeLoc types. adds ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC. new 696775d96ec Fix subprogram_ranges.test by explicitly using lld new 4a3c2ba8904 Fix print-dot-ddg.ll so it doesn't try to write to the sour [...] new 2ff36e79291 lldb subprogram_ranges.test - remove dependence on temp file name new 6b0ee02747e Revert "Revert "Revert "Revert "[analyzer] NFC: Move path d [...] new 495b301de6e [gn build] Port 6b0ee02747e new 8febb2e0f56 [CodeGen] Remove unused function isCallerPreservedOrConstPh [...] new 33bf1cad759 [llvm] Use *Set::contains (NFC) new b934160aaa3 [Target] Use llvm::find_if (NFC) The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 6 +- .../clangd/test/initialize-params.test | 3 + clang/docs/OpenMPSupport.rst | 4 +- clang/include/clang/AST/DeclOpenMP.h | 2 +- clang/include/clang/AST/TypeLoc.h | 77 +- .../include/clang/Analysis/CrossTUAnalysisHelper.h | 41 ++ .../PathDiagnosticConsumers.def} | 53 +- .../Core => Analysis}/PathDiagnosticConsumers.h | 13 +- clang/include/clang/CrossTU/CrossTranslationUnit.h | 21 +- clang/include/clang/Driver/Options.td | 88 ++- .../include/clang/StaticAnalyzer/Core/Analyses.def | 37 - .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 2 +- .../Core/PathSensitive/AnalysisManager.h | 2 +- clang/include/clang/Tooling/CompilationDatabase.h | 15 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ASTImporter.cpp | 8 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/Analysis/CMakeLists.txt | 7 + .../HTMLPathDiagnosticConsumer.cpp} | 111 ++- .../Analysis/PlistHTMLPathDiagnosticConsumer.cpp | 35 + .../PlistPathDiagnosticConsumer.cpp} | 62 +- .../SarifPathDiagnosticConsumer.cpp} | 30 +- .../TextPathDiagnosticConsumer.cpp} | 42 +- clang/lib/CodeGen/TargetInfo.cpp | 62 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 13 +- clang/lib/Driver/Driver.cpp | 16 +- clang/lib/Driver/ToolChains/Flang.cpp | 19 +- clang/lib/Driver/ToolChains/Gnu.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 231 +++--- clang/lib/Headers/__clang_hip_cmath.h | 28 + clang/lib/Sema/SemaType.cpp | 11 + clang/lib/Sema/TreeTransform.h | 8 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 4 - .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 4 +- clang/lib/Tooling/CompilationDatabase.cpp | 6 +- clang/test/CodeGen/arm_neon_intrinsics.c | 60 +- clang/test/CodeGen/object-size.c | 10 +- clang/test/Driver/cl-options.c | 5 + clang/test/Driver/x86-march.c | 4 + clang/test/Frontend/x86-target-cpu.c | 1 + clang/test/OpenMP/begin_declare_variant_messages.c | 2 +- clang/test/OpenMP/declare_variant_ast_x86_64.c | 10 + clang/test/OpenMP/declare_variant_messages.c | 10 +- clang/test/OpenMP/declare_variant_messages.cpp | 4 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 10 +- clang/test/OpenMP/target_codegen.cpp | 2 +- clang/test/SemaCXX/vector.cpp | 17 + clang/unittests/AST/ASTImporterTest.cpp | 35 + clang/unittests/Basic/FileEntryTest.cpp | 2 +- .../unittests/Frontend/CompilerInvocationTest.cpp | 298 +++++--- compiler-rt/lib/builtins/CMakeLists.txt | 7 +- debuginfo-tests/CMakeLists.txt | 4 +- .../llvm-prettyprinters/gdb/mlir-support.cpp | 4 +- flang/include/flang/Frontend/FrontendActions.h | 4 + flang/include/flang/Frontend/FrontendOptions.h | 3 + flang/lib/Frontend/CompilerInvocation.cpp | 4 +- flang/lib/Frontend/FrontendActions.cpp | 7 + .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 2 + flang/lib/Semantics/check-acc-structure.cpp | 23 +- flang/lib/Semantics/resolve-directives.cpp | 80 +++ flang/test/Driver/{no_files.f90 => no-files.f90} | 0 .../Driver/{version_test.f90 => version-test.f90} | 0 flang/test/Flang-Driver/code-gen.f90 | 15 + flang/test/Flang-Driver/driver-help-hidden.f90 | 1 + flang/test/Flang-Driver/driver-help.f90 | 2 + flang/test/Flang-Driver/emit-obj.f90 | 14 - .../{macro_def_undef.f90 => macro-def-undef.f90} | 0 .../{macro_multiline.f90 => macro-multiline.f90} | 0 flang/test/Flang-Driver/phases.f90 | 20 + flang/test/Semantics/acc-clause-validity.f90 | 3 - flang/test/Semantics/acc-declare-validity.f90 | 57 ++ .../{Generic-cxx2a.cmake => Generic-cxx20.cmake} | 0 libcxx/docs/DesignDocs/FeatureTestMacros.rst | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/docs/UsingLibcxx.rst | 2 +- libcxx/include/__config | 4 +- libcxx/include/filesystem | 7 +- libcxx/include/new | 20 +- libcxx/include/string | 12 +- libcxx/include/string_view | 12 +- libcxx/include/version | 22 +- libcxx/src/filesystem/operations.cpp | 25 +- .../algorithm.version.pass.cpp | 44 +- .../support.limits.general/any.version.pass.cpp | 8 +- .../support.limits.general/array.version.pass.cpp | 26 +- .../support.limits.general/atomic.version.pass.cpp | 104 +-- .../support.limits.general/bit.version.pass.cpp | 40 +- .../support.limits.general/chrono.version.pass.cpp | 12 +- .../support.limits.general/cmath.version.pass.cpp | 12 +- .../compare.version.pass.cpp | 16 +- .../complex.version.pass.cpp | 8 +- .../concepts.version.pass.cpp | 16 +- .../cstddef.version.pass.cpp | 8 +- .../support.limits.general/deque.version.pass.cpp | 24 +- .../exception.version.pass.cpp | 8 +- .../execution.version.pass.cpp | 8 +- .../filesystem.version.pass.cpp | 20 +- .../forward_list.version.pass.cpp | 40 +- .../functional.version.pass.cpp | 60 +- .../iomanip.version.pass.cpp | 8 +- .../istream.version.pass.cpp | 16 +- .../iterator.version.pass.cpp | 34 +- .../support.limits.general/limits.version.pass.cpp | 16 +- .../support.limits.general/list.version.pass.cpp | 40 +- .../support.limits.general/locale.version.pass.cpp | 16 +- .../support.limits.general/map.version.pass.cpp | 36 +- .../support.limits.general/memory.version.pass.cpp | 68 +- .../support.limits.general/mutex.version.pass.cpp | 8 +- .../support.limits.general/new.version.pass.cpp | 24 +- .../numbers.version.pass.cpp | 16 +- .../numeric.version.pass.cpp | 36 +- .../optional.version.pass.cpp | 8 +- .../ostream.version.pass.cpp | 16 +- .../support.limits.general/regex.version.pass.cpp | 8 +- .../scoped_allocator.version.pass.cpp | 8 +- .../support.limits.general/set.version.pass.cpp | 32 +- .../shared_mutex.version.pass.cpp | 12 +- .../support.limits.general/span.version.pass.cpp | 16 +- .../support.limits.general/string.version.pass.cpp | 44 +- .../string_view.version.pass.cpp | 20 +- .../support.limits.general/tuple.version.pass.cpp | 20 +- .../type_traits.version.pass.cpp | 68 +- .../unordered_map.version.pass.cpp | 44 +- .../unordered_set.version.pass.cpp | 40 +- .../utility.version.pass.cpp | 36 +- .../variant.version.pass.cpp | 8 +- .../support.limits.general/vector.version.pass.cpp | 28 +- .../version.version.pass.cpp | 626 ++++++++-------- .../support.types/nullptr_t_integral_cast.pass.cpp | 6 +- libcxx/test/support/test_macros.h | 2 + libcxx/utils/ci/Dockerfile | 25 +- libcxx/utils/ci/buildkite-pipeline.yml | 4 +- libcxx/utils/ci/run-buildbot | 6 +- .../generate_feature_test_macro_components.py | 700 +++++++++--------- libcxxabi/src/cxa_personality.cpp | 105 +-- lld/COFF/DebugTypes.cpp | 18 +- lld/COFF/DebugTypes.h | 3 +- lld/MinGW/Driver.cpp | 5 + lld/MinGW/Options.td | 3 + lld/test/COFF/Inputs/precomp-ghash-obj1.obj | Bin 0 -> 3263 bytes lld/test/COFF/Inputs/precomp-ghash-obj2.obj | Bin 0 -> 2413 bytes lld/test/COFF/Inputs/precomp-ghash-precomp.obj | Bin 0 -> 64047 bytes lld/test/COFF/precomp-ghash.test | 53 ++ lld/test/MinGW/driver.test | 9 + lld/test/wasm/debuginfo.test | 6 +- lldb/include/lldb/Utility/ArchSpec.h | 9 + .../Disassembler/LLVMC/DisassemblerLLVMC.cpp | 19 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 14 + .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 12 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 2 +- lldb/source/Utility/ArchSpec.cpp | 9 + lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml | 24 + .../SymbolFile/DWARF/Inputs/subprogram_ranges.s | 159 +++++ .../Shell/SymbolFile/DWARF/subprogram_ranges.test | 19 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 6 + llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 4 - llvm/include/llvm/CodeGen/TargetPassConfig.h | 6 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 20 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 22 +- llvm/include/llvm/IR/ValueHandle.h | 20 +- llvm/include/llvm/Option/OptParser.td | 2 + llvm/include/llvm/TableGen/Record.h | 26 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 9 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 6 +- llvm/lib/Analysis/DependenceGraphBuilder.cpp | 131 ++-- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 22 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 7 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 61 ++ llvm/lib/CodeGen/TargetPassConfig.cpp | 20 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 1 - llvm/lib/Frontend/OpenMP/OMPContext.cpp | 10 +- llvm/lib/IR/BasicBlock.cpp | 8 +- llvm/lib/Support/AMDGPUMetadata.cpp | 1 - llvm/lib/TableGen/JSONBackend.cpp | 2 +- llvm/lib/TableGen/Record.cpp | 16 +- llvm/lib/TableGen/TGParser.cpp | 15 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 16 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 + llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 15 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 15 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 19 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 23 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 228 +++--- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 16 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 3 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 8 - .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 9 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 5 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 23 +- .../Target/AMDGPU/AMDGPULowerKernelAttributes.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 - .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h | 4 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h | 3 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h | 1 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 7 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 15 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 39 - .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 8 - llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 37 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 9 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 59 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 35 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp | 5 - llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 26 - llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 29 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 31 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 - llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 13 - llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 17 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 20 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 5 - llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 6 - llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 22 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 8 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 5 - .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 - .../AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 12 - .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 18 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 9 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 14 - llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 10 - .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 26 - llvm/lib/Target/AMDGPU/R600Defines.h | 2 - llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 17 - llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 13 - llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 4 - llvm/lib/Target/AMDGPU/R600FrameLowering.h | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 24 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 6 - .../AMDGPU/R600OpenCLImageTypeLoweringPass.cpp | 15 - .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 20 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 - llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 7 - llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 27 - llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp | 2 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 - llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 6 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 62 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 14 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 - llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 38 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 17 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 18 - llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 8 - llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 18 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 13 - llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 17 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 19 - llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 8 +- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 21 +- llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 12 - llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 6 - .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 - llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 27 - llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 4 - llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 7 - llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 3 - llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 19 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 2 - llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 10 - llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 19 - llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 14 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 6 +- .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 1 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 789 +-------------------- llvm/lib/Target/PowerPC/PPCISelLowering.h | 20 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 3 - llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 15 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 33 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 42 ++ llvm/lib/Target/VE/VEAsmPrinter.cpp | 8 +- .../WebAssembly/WebAssemblyDebugValueManager.cpp | 14 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 4 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 7 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 36 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 2 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 2 +- .../Instrumentation/ControlHeightReduction.cpp | 18 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 28 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 29 +- llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp | 15 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 15 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 8 +- llvm/lib/Transforms/Utils/Local.cpp | 136 ++-- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 1 - llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 40 +- .../AArch64/sve-getIntrinsicInstrCost-gather.ll | 12 + .../AArch64/sve-getIntrinsicInstrCost-scatter.ll | 11 + llvm/test/Analysis/DDG/print-dot-ddg.ll | 74 ++ .../CodeGen/AArch64/sve-intrinsics-perm-select.ll | 120 ++++ .../AMDGPU/GlobalISel/combine-urem-pow-2.mir | 156 ++++ .../GlobalISel/irtranslator-call-non-fixed.ll | 4 +- .../CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll | 47 +- .../AMDGPU/GlobalISel/legalize-sextload-global.mir | 20 + .../AMDGPU/GlobalISel/legalize-zextload-global.mir | 20 + llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 59 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 394 +--------- llvm/test/CodeGen/AMDGPU/s_code_end.ll | 8 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 6 +- llvm/test/CodeGen/AMDGPU/saddsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll | 4 +- .../CodeGen/AMDGPU/schedule-regpressure-limit2.ll | 8 +- llvm/test/CodeGen/AMDGPU/scratch-simple.ll | 14 +- llvm/test/CodeGen/AMDGPU/sdiv.ll | 8 +- llvm/test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir | 6 +- .../AMDGPU/select-fabs-fneg-extract-legacy.ll | 2 +- llvm/test/CodeGen/AMDGPU/select.f16.ll | 4 +- llvm/test/CodeGen/AMDGPU/sendmsg-m0-hazard.mir | 4 +- llvm/test/CodeGen/AMDGPU/setcc-fneg-constant.ll | 2 +- llvm/test/CodeGen/AMDGPU/setcc64.ll | 4 +- llvm/test/CodeGen/AMDGPU/sext-in-reg.ll | 8 +- llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll | 4 +- llvm/test/CodeGen/AMDGPU/shl.ll | 6 +- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 6 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr_csub.ll | 2 +- llvm/test/CodeGen/AMDGPU/shl_add_ptr_global.ll | 2 +- .../test/CodeGen/AMDGPU/shrink-add-sub-constant.ll | 8 +- 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llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 4 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 2 +- llvm/test/CodeGen/AMDGPU/vector-alloca.ll | 10 +- llvm/test/CodeGen/AMDGPU/vgpr-spill.mir | 2 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/AMDGPU/xnor.ll | 10 +- llvm/test/CodeGen/AMDGPU/zero_extend.ll | 4 +- llvm/test/CodeGen/NVPTX/intrinsic-old.ll | 5 + .../test/CodeGen/NVPTX/nvvm-reflect-module-flag.ll | 3 +- llvm/test/CodeGen/NVPTX/nvvm-reflect.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 512 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 698 ++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 479 +++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 113 +++ llvm/test/CodeGen/WebAssembly/dbgvalue.ll | 2 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 66 +- llvm/test/CodeGen/X86/cmp-concat.ll | 18 +- llvm/test/CodeGen/X86/movmsk-cmp.ll | 595 ++++++---------- llvm/test/MC/WebAssembly/debug-byval-struct.ll | 116 +++ llvm/test/MC/X86/x86_long_nop.s | 2 + llvm/test/Other/copy-metadata-of-declaration.ll | 10 + llvm/test/Reduce/remove-global-vars.ll | 9 + .../Coroutines}/coro-retcon-unreachable.ll | 1 + .../Transforms/LoopUnroll/unroll-opt-attribute.ll | 34 + .../dont-fold-tail-for-assumed-divisible-TC.ll | 70 -- .../dont-fold-tail-for-divisible-TC.ll | 66 ++ .../SLPVectorizer/X86/shrink_after_reorder.ll | 3 +- ...ComparisonIntoPredecessors-no-new-successors.ll | 35 + llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 70 +- .../change-to-unreachable-matching-successor.ll | 16 + llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 186 ++++- .../SimplifyCFG/unreachable-matching-successor.ll | 16 + llvm/test/tools/llvm-cov/Inputs/branch-c-general.c | 260 +++++++ llvm/test/tools/llvm-cov/branch-c-general.c | 311 -------- llvm/test/tools/llvm-cov/branch-c-general.test | 166 +++++ llvm/test/tools/llvm-cov/branch-export-json.test | 4 +- llvm/test/tools/llvm-cov/branch-export-lcov.test | 4 +- llvm/test/tools/llvm-cov/branch-noShowBranch.test | 4 +- .../tools/llvm-pdbutil/Inputs/unknown-record.obj | Bin 0 -> 3284 bytes llvm/test/tools/llvm-pdbutil/unknown-records.test | 3 + llvm/tools/llvm-objdump/llvm-objdump.cpp | 9 +- llvm/tools/llvm-objdump/llvm-objdump.h | 5 +- llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp | 16 +- llvm/tools/llvm-pdbutil/FormatUtil.cpp | 7 +- llvm/tools/llvm-pdbutil/FormatUtil.h | 2 +- .../deltas/ReduceGlobalVarInitializers.cpp | 6 +- llvm/tools/opt/opt.cpp | 2 + llvm/unittests/Analysis/DDGTest.cpp | 154 ++++ llvm/unittests/IR/ValueHandleTest.cpp | 5 +- llvm/unittests/Option/OptionMarshallingTest.cpp | 6 +- llvm/unittests/Support/DataExtractorTest.cpp | 3 +- llvm/utils/TableGen/CodeEmitterGen.cpp | 2 +- llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenDAGPatterns.h | 2 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 2 +- llvm/utils/TableGen/OptParserEmitter.cpp | 4 + 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+ mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 52 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 4 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 +- .../mlir/Dialect/StandardOps/Transforms/Passes.td | 2 +- mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h | 2 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/IR/ImplicitLocOpBuilder.h | 4 +- mlir/include/mlir/IR/OpDefinition.h | 85 ++- mlir/include/mlir/IR/OpImplementation.h | 12 +- mlir/include/mlir/Pass/PassRegistry.h | 6 +- mlir/include/mlir/Support/IndentedOstream.h | 2 +- .../include/mlir/Target/LLVMIR/ModuleTranslation.h | 16 +- mlir/include/mlir/Target/LLVMIR/TypeTranslation.h | 2 +- mlir/include/mlir/Transforms/Bufferize.h | 2 +- .../Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir | 8 +- .../LLVMIR/CPU/test-vector-reductions-fp.mlir | 16 +- .../LLVMIR/CPU/test-vector-reductions-int.mlir | 62 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Bindings/Python/IRModules.cpp | 2 +- mlir/lib/CAPI/Transforms/Passes.cpp | 2 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 34 +- .../GPUCommon/ConvertKernelFuncToBlob.cpp | 2 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 18 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h | 4 +- .../GPUCommon/IndexIntrinsicsOpLowering.h | 13 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 27 +- mlir/lib/Conversion/PDLToPDLInterp/Predicate.h | 2 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 11 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 49 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 16 +- .../Dialect/Async/Transforms/AsyncParallelFor.cpp | 2 +- mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 1 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 189 ++++- mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp | 50 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 59 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 7 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/TypeDetail.h | 25 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 5 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 2 +- mlir/lib/Dialect/PDL/IR/PDL.cpp | 2 +- mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp | 2 +- .../Linking/ModuleCombiner/ModuleCombiner.cpp | 10 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 3 +- .../Dialect/StandardOps/Transforms/ExpandOps.cpp | 4 +- .../Tosa/Transforms/TosaMakeBroadcastable.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 8 +- mlir/lib/IR/AsmPrinter.cpp | 36 +- mlir/lib/IR/Operation.cpp | 24 + mlir/lib/IR/Value.cpp | 5 - mlir/lib/Rewrite/ByteCode.h | 2 +- mlir/lib/TableGen/TypeDef.cpp | 2 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 8 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 202 +++--- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 14 +- mlir/lib/Target/SPIRV/Serialization.cpp | 2 +- mlir/lib/Transforms/BufferUtils.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 3 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 2 +- mlir/test/Bindings/Python/ir_attributes.py | 2 +- mlir/test/Bindings/Python/ir_operation.py | 6 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 10 +- .../Conversion/GPUCommon/memory-attrbution.mlir | 76 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 70 +- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 58 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 40 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 18 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 14 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 222 +++--- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 10 +- .../SPIRVToLLVM/control-flow-ops-to-llvm.mlir | 32 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 8 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 4 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../SPIRVToLLVM/lower-host-to-llvm-calls.mlir | 8 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 40 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 22 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../StandardToLLVM/calling-convention.mlir | 14 +- .../StandardToLLVM/convert-argattrs.mlir | 4 +- .../StandardToLLVM/convert-dynamic-memref-ops.mlir | 284 ++++---- .../Conversion/StandardToLLVM/convert-funcs.mlir | 14 +- .../StandardToLLVM/convert-static-memref-ops.mlir | 220 +++--- .../StandardToLLVM/convert-to-llvmir.mlir | 622 ++++++++-------- .../StandardToLLVM/standard-to-llvm.mlir | 42 +- .../VectorToLLVM/vector-mask-to-llvm.mlir | 14 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 378 +++++----- mlir/test/Dialect/GPU/outlining.mlir | 4 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 14 +- mlir/test/Dialect/LLVMIR/func.mlir | 56 +- mlir/test/Dialect/LLVMIR/global.mlir | 78 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 220 +++--- mlir/test/Dialect/LLVMIR/legalize-for-export.mlir | 12 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 74 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 150 ++-- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 286 ++++---- mlir/test/Dialect/LLVMIR/terminator.mlir | 2 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 13 +- mlir/test/Dialect/LLVMIR/types.mlir | 32 +- mlir/test/Dialect/Linalg/llvm.mlir | 62 +- mlir/test/Dialect/OpenMP/ops.mlir | 12 +- mlir/test/Dialect/SPIRV/IR/types.mlir | 4 +- mlir/test/Target/arm-sve.mlir | 6 +- mlir/test/Target/avx512.mlir | 16 +- mlir/test/Target/import.ll | 84 +-- mlir/test/Target/llvmir-intrinsics.mlir | 84 +-- mlir/test/Target/llvmir-invalid.mlir | 13 + mlir/test/Target/llvmir-types.mlir | 24 +- mlir/test/Target/llvmir.mlir | 716 ++++++++++--------- mlir/test/Target/nvvmir.mlir | 50 +- mlir/test/Target/openmp-llvm.mlir | 60 +- mlir/test/Target/rocdl.mlir | 86 +-- mlir/test/Transforms/test-convert-call-op.mlir | 6 +- mlir/test/lib/Transforms/TestConvertCallOp.cpp | 3 +- mlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir | 2 +- mlir/test/mlir-cpu-runner/simple.mlir | 24 +- mlir/test/mlir-tblgen/rewriter-indexing.td | 3 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- openmp/docs/design/Runtimes.rst | 79 +++ openmp/docs/remarks/OptimizationRemarks.rst | 25 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 123 ++-- 635 files changed, 11309 insertions(+), 9318 deletions(-) create mode 100644 clang/include/clang/Analysis/CrossTUAnalysisHelper.h copy clang/include/clang/{StaticAnalyzer/Core/Analyses.def => Analysis/PathDiagnos [...] rename clang/include/clang/{StaticAnalyzer/Core => Analysis}/PathDiagnosticConsume [...] rename clang/lib/{StaticAnalyzer/Core/HTMLDiagnostics.cpp => Analysis/HTMLPathDiag [...] create mode 100644 clang/lib/Analysis/PlistHTMLPathDiagnosticConsumer.cpp rename clang/lib/{StaticAnalyzer/Core/PlistDiagnostics.cpp => Analysis/PlistPathDi [...] rename clang/lib/{StaticAnalyzer/Core/SarifDiagnostics.cpp => Analysis/SarifPathDi [...] rename clang/lib/{StaticAnalyzer/Core/TextDiagnostics.cpp => Analysis/TextPathDiag [...] create mode 100644 clang/test/OpenMP/declare_variant_ast_x86_64.c rename flang/test/Driver/{no_files.f90 => no-files.f90} (100%) rename flang/test/Driver/{version_test.f90 => version-test.f90} (100%) create mode 100644 flang/test/Flang-Driver/code-gen.f90 delete mode 100644 flang/test/Flang-Driver/emit-obj.f90 rename flang/test/Flang-Driver/{macro_def_undef.f90 => macro-def-undef.f90} (100%) rename flang/test/Flang-Driver/{macro_multiline.f90 => macro-multiline.f90} (100%) create mode 100644 flang/test/Flang-Driver/phases.f90 create mode 100644 flang/test/Semantics/acc-declare-validity.f90 rename libcxx/cmake/caches/{Generic-cxx2a.cmake => Generic-cxx20.cmake} (100%) create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj1.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj2.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-precomp.obj create mode 100644 lld/test/COFF/precomp-ghash.test create mode 100644 lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml create mode 100644 lldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s create mode 100644 lldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test create mode 100644 llvm/test/Analysis/DDG/print-dot-ddg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll create mode 100644 llvm/test/MC/WebAssembly/debug-byval-struct.ll create mode 100644 llvm/test/Other/copy-metadata-of-declaration.ll rename {clang/test/CodeGenCoroutines => llvm/test/Transforms/Coroutines}/coro-retc [...] delete mode 100644 llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-assumed-d [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredece [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll create mode 100644 llvm/test/tools/llvm-cov/Inputs/branch-c-general.c delete mode 100644 llvm/test/tools/llvm-cov/branch-c-general.c create mode 100644 llvm/test/tools/llvm-cov/branch-c-general.test create mode 100644 llvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj create mode 100644 llvm/test/tools/llvm-pdbutil/unknown-records.test create mode 100644 mlir/include/mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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