Tcwg-commits January 2021

tcwg-commits@lists.linaro.org

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9360 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (830d57df46 -> e9b6933e07)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from 830d57df46 Automatic date update in version.in adds e9b6933e07 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig updated (586f9d18c -> 6cb21f697)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards 586f9d18c 0: update: binutils-gcc-linux-qemu: boot new 6cb21f697 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (586f9d18c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 182 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11702 +++++----- 04-build_abe-stage1/console.log | 18522 ++++++++------- 05-build_linux/console.log | 812 +- 06-build_abe-qemu/console.log | 4535 ++-- 07-boot_linux/console.log | 496 +- 08-check_regression/console.log | 14 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 16 +- 09-update_baseline/results.regressions | 2 +- console.log | 36721 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 36714 insertions(+), 36740 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (6e6e24bb09c -> 9b228f107d4)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project. from 6e6e24bb09c [ValueTypes] Fix formatting on scalable vector warning (NFC) adds aa280c99f70 [AArch64][SVE] Emit DWARF location expr for SVE (dbg.declare) adds 816dba48af4 [VPlan] Keep start value in VPWidenIntOrFpInductionRecipe (NFC). adds cb0c034edc9 [PowerPC] Fix issue where vsrq is given incorrect shift vector adds dfcb872c3e8 [X86] Add scalar/vector test coverage for D93599 adds 223a6f94c59 [libc] remove modulo from CircularArrayRef iterator adds aa9db51ef69 [libc] Align src buffer instead of dst buffer adds 643e3c90761 [AArch64] Add BRB IALL and BRB INJ instructions adds ce8c59e6af4 Reapply multiple "[clang][cli]" patches adds 37ac4f865fb [Hexagon] Regenerate zext-v4i1.ll tests adds 29d375f5ff2 [OpenCL][NFC] Improve OpenCL test file naming adds 396dd6cd3d8 [ProfileData] Pass Twine by const reference instead of by value. adds df5c2caf0fc [MIPS] MipsAsmParser - Pass Twine by const reference instea [...] adds 26c486c2eb1 [TableGen] RegisterBankEmitter - Pass Twine by const refere [...] adds f60e0a91fbd [MLIR][SPIRV] Add `UnsignedOp` trait. adds 4e0e79dd349 [lldb] Simplify some lldb-server tests adds 494db3816b0 [LoopDeletion] Also consider loops with subloops for deletion. adds 0c41b1c9f93 [Driver][MachineOutliner] Support outlining option with LTO adds 3fa6cedb6be Fix MaterializeTemporaryExpr's type when its an incomplete array. adds 25c78de6d2a [mlir][spirv] Update pass docs adds 46975b5b29e [Hexagon] Wrap functions only used in asserts in ifndef NDEBUG adds b69fe6a85db [X86] Add icmp ne/eq (srl (ctlz x), log2(bw)) test coverage. adds 500864f928c Remove some unused <vector> includes. NFCI. adds 350247a93c0 [AArch64] Rearrange mul(dup(sext/zext)) to mul(sext/zext(dup)) adds 1307e3f6c46 [TargetLowering] Add icmp ne/eq (srl (ctlz x), log2(bw)) ve [...] adds 7809fa20400 [flang][driver] Add support for `-D`, `-U` adds 136f4989195 AMDGPU: Explicitly use SelectionDAG in legacy intrinsic tests adds 0a3cf7f4762 AMDGPU/GlobalISel: Add baseline IR tests for fdiv adds dfd3384feec [InstCombine] Update valueCoversEntireFragment to use TypeSize adds 3e357ecd44a [llvm][NFC] Disallow all warnings in TypeSize tests adds ab3a3f543b1 AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp in [...] adds b4706309130 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds 2b638ed5a12 [mlir] NFC: fix trivial typos fix typos under docs, test, a [...] adds bd166c813c5 Nit: fix spacing adds 6173d1277be Remove allow-unregistered-dialect from some tests that don' [...] adds 08e5e91e45a [X86] Remove [ER]SP from all CSR lists adds 7ef9139a391 [Clang] Remove unnecessary Attr.isArgIdent checks. adds 3f8c2520c04 [X86] Add commuted patterns test coverage for D93599 adds 90347ab96f2 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds 1ca5e68aa07 [NVPTX] Fix debugging information being added to NVPTX targ [...] adds 7afdc89c205 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 7916fd71e94 [lld-macho] Fix GCC -Wunused-variable in -DLLVM_ENABLE_ASSE [...] adds 322e98bc279 [flang][openacc] Add more parsing/sema tests for init and s [...] adds 7fea561eb1c [CGSCC][Coroutine][NewPM] Properly support function splitti [...] adds 5d24089a700 [SLP] reduce code for propagating flags on reductions; NFC adds 4c022b5a41d [SLP] use reduction kind's opcode to create new instructions; NFC adds 8f9da24fa7f [GVN] Regenerate test checks (NFC) adds a6df39236fd [InstSimplify] Fold out-of-bounds shift to poison adds 54c01057b68 Fix non-assert builds after D93828 adds a515342de9c [test] Pin AMDGPU/opt-pipeline.ll to legacy PM adds c68faed041e [RISCV] Return a vXi1 vector type from getSetCCResultType i [...] adds 47fba9e1eae [test] Pin partial-unswitch.ll to legacy PM adds 0bfe1001456 [NFC] Test case refactor adds 7d48eff8ba1 [PowerPC] Avoid call to undef in test (NFC) adds d042f2db5bf [InstSimplify] Fold call null/undef to poison adds 221c3b174b1 [InstSimplify] Canonicalize non-demanded shuffle op to pois [...] adds badc7606b0f [mlir] Remove a number of methods from mlir::OpState that j [...] adds 4fde2b6a0c0 [OpenCL] Add clang extension for function pointers. adds 0e874fc014b [OpenCL] Add clang extension for variadic functions. adds f6f6f6375d1 [BasicAA] Fix BatchAA results for phi-phi assumptions adds 90bf3ecef4b [clang-offload-bundler] Add option -list adds f9190c86813 [mlir][vector] Support unrolling for transfer ops using tensors adds 2a29ce30345 [hip] Fix HIP version parsing. adds e2a623094f6 [OpenMP] Fixed the test environment when building along with LLVM adds 5acdae1f9a7 [OpenMP] Fixed an issue that wrong LLVM headers might be in [...] adds 4726bec8f29 [libc] Add implementation of fmaf. adds e0a93e4b65b [mlir][ODS] Rename several uses of 'description' to 'summary' adds c42cee0c64f [mlir][ODS] Fix the use of cppClassName in Type constraints [...] adds efd05040e13 [mlir] Add hoisting transformation for transfer ops on tensor adds fb1c5285269 [OpenMP] Use c_int/c_size_t in Fortran target memory routin [...] adds 63aeaf754a7 [DominatorTree] Add support for mixed pre/post CFG views. adds a1265690cf6 Fix failing triple test for macOS 11 with non-zero minor versions. adds 41d919aa294 [mlir][TypeDefGen] Remove the need to define parser/printer [...] adds f9e858f5fd7 [libc] Use a wrapper for rand instead of calling std::rand [...] adds 080943f7525 [mlir][vector] Support transfer op on tensor optimizations adds b37de2afa30 [Support] Untie the llvm::Signpost interface from llvm::Timer adds 6d94eeadd28 [lldb] Ad os_signpost support to lldb_private::Timer adds 781c476ce09 [libc++] ADL-proof vector<bool> by adding _VSTD:: qualifica [...] adds 4bdab548266 [PPC] Remove old PPCSubTarget variable. adds 8deaec122ec [analyzer] Update Fuchsia checker to catch releasing unowne [...] adds 8871a4b4cab [Constant] Update ConstantVector::get to return poison if a [...] adds d853bd7a4e8 [lldb/Lua] add support for multiline scripted breakpoints adds 7a8ced43d7e [RISCV] Fix a few section number comments in RISCVInstrInfo [...] adds 37e83bc6db3 [NFC] Move readAPValue/writeAPValue up the inheritance hierarchy adds c95f39891a2 [Constant] Add tests for ConstantVector::get (NFC) adds 3a60a1f1657 [InstSimplify] Fold insertelement vec, poison, idx into vec adds b9bfe8a7530 [lldb] [debugserver] Add stN aliases for stmmN for compatibility adds fbc13e9345c [lldb] Skip scoped enum checks with Dwarf <4 adds 1d0bc055515 [llvm] Use llvm::append_range (NFC) adds 9b228f107d4 [llvm] Use BasicBlock::phis() (NFC) No new revisions were added by this update. Summary of changes: .../clangd/unittests/TUSchedulerTests.cpp | 7 +- clang/docs/LanguageExtensions.rst | 77 ++ clang/include/clang/AST/APValue.h | 16 +- clang/include/clang/AST/AbstractBasicReader.h | 34 + clang/include/clang/AST/AbstractBasicWriter.h | 35 + clang/include/clang/AST/PropertiesBase.td | 308 +++++ clang/include/clang/Basic/CodeGenOptions.h | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 - .../include/clang/Basic/DiagnosticFrontendKinds.td | 2 - clang/include/clang/Basic/OpenCLExtensions.def | 2 + clang/include/clang/Driver/Options.td | 1368 ++++++++++++-------- .../include/clang/Serialization/ASTRecordReader.h | 2 +- .../include/clang/Serialization/ASTRecordWriter.h | 9 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/APValue.cpp | 8 + clang/lib/Basic/Targets/AMDGPU.h | 2 + clang/lib/Basic/Targets/NVPTX.h | 2 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 28 +- clang/lib/Driver/ToolChains/Clang.cpp | 27 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 36 + clang/lib/Driver/ToolChains/CommonArgs.h | 4 + clang/lib/Driver/ToolChains/Cuda.cpp | 2 +- clang/lib/Driver/ToolChains/Flang.cpp | 14 +- clang/lib/Driver/ToolChains/Flang.h | 9 + clang/lib/Driver/ToolChains/ROCm.h | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 901 ++----------- clang/lib/Parse/ParseDecl.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 16 +- clang/lib/Sema/SemaInit.cpp | 14 +- clang/lib/Sema/SemaType.cpp | 113 +- clang/lib/Serialization/ASTReader.cpp | 159 --- clang/lib/Serialization/ASTWriter.cpp | 138 -- .../Checkers/FuchsiaHandleChecker.cpp | 115 +- clang/test/AST/pr47636.cpp | 26 + clang/test/Analysis/fuchsia_handle.cpp | 21 + clang/test/CodeGenCXX/pr47636.cpp | 12 + ...vector_literals_valid.cl => vector_literals.cl} | 0 ...fflevector_valid.cl => vector_shufflevector.cl} | 0 clang/test/Driver/Inputs/rocm/bin/.hipVersion | 4 +- clang/test/Driver/arm-machine-outliner.c | 9 + clang/test/Driver/clang-offload-bundler.c | 59 +- clang/test/Misc/amdgcn.languageOptsOpenCL.cl | 12 +- clang/test/Misc/nvptx.languageOptsOpenCL.cl | 12 +- clang/test/Misc/r600.languageOptsOpenCL.cl | 12 +- clang/test/Parser/opencl-cxx-virtual.cl | 23 +- clang/test/Profile/c-generate.c | 2 +- clang/test/SemaOpenCL/extension-version.cl | 12 +- clang/test/SemaOpenCL/func.cl | 38 +- ...ipes-1.2-negative.cl => invalid-pipes-cl1.2.cl} | 0 ...erals_invalid.cl => invalid-vector-literals.cl} | 0 .../{vector_conv_invalid.cl => vector-conv.cl} | 0 .../{kernel_invalid.cl => invalid-kernel.cl} | 0 clang/test/SemaOpenCLCXX/members.cl | 29 +- .../clang-offload-bundler/ClangOffloadBundler.cpp | 174 ++- .../unittests/Frontend/CompilerInvocationTest.cpp | 84 +- clang/utils/TableGen/ClangASTPropertiesEmitter.cpp | 12 +- compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 + compiler-rt/lib/asan/asan_interceptors.h | 6 +- compiler-rt/lib/asan/tests/asan_test.cpp | 4 +- .../lib/interception/interception_linux.cpp | 6 +- compiler-rt/lib/interception/interception_linux.h | 6 +- compiler-rt/lib/msan/tests/msan_test.cpp | 36 +- .../sanitizer_common_interceptors_ioctl.inc | 6 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 11 +- .../lib/sanitizer_common/sanitizer_platform.h | 13 + .../sanitizer_platform_interceptors.h | 90 +- .../sanitizer_platform_limits_posix.cpp | 84 +- .../sanitizer_platform_limits_posix.h | 2 + .../sanitizer_procmaps_solaris.cpp | 4 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 8 +- flang/include/flang/Frontend/CompilerInstance.h | 8 + flang/include/flang/Frontend/CompilerInvocation.h | 13 + flang/include/flang/Frontend/PreprocessorOptions.h | 42 + flang/lib/Frontend/CompilerInstance.cpp | 2 + flang/lib/Frontend/CompilerInvocation.cpp | 69 +- flang/test/Flang-Driver/driver-help-hidden.f90 | 2 + flang/test/Flang-Driver/driver-help.f90 | 12 +- flang/test/Flang-Driver/macro_def_undef.f90 | 38 + flang/test/Flang-Driver/macro_multiline.f90 | 22 + flang/test/Semantics/acc-clause-validity.f90 | 28 + libc/benchmarks/LibcBenchmark.h | 8 +- libc/config/linux/aarch64/entrypoints.txt | 1 + libc/config/linux/x86_64/entrypoints.txt | 1 + libc/spec/stdc.td | 2 + libc/src/math/CMakeLists.txt | 11 + libc/src/math/fmaf.cpp | 64 + libc/src/math/fmaf.h | 18 + libc/src/string/memory_utils/memcpy_utils.h | 2 +- libc/test/src/math/CMakeLists.txt | 13 + libc/test/src/math/FmaTest.h | 94 ++ libc/test/src/math/fmaf_test.cpp | 19 + .../src/string/memory_utils/memcpy_utils_test.cpp | 22 +- libc/utils/FPUtil/FPBits.h | 12 +- libc/utils/MPFRWrapper/MPFRUtils.cpp | 121 +- libc/utils/MPFRWrapper/MPFRUtils.h | 24 +- libc/utils/testutils/CMakeLists.txt | 2 + libc/utils/testutils/RandUtils.cpp | 19 + libc/utils/testutils/RandUtils.h | 16 + libcxx/include/__bit_reference | 28 +- libcxx/include/__mutex_base | 8 +- libcxx/include/__tree | 90 +- libcxx/include/array | 6 +- libcxx/include/bitset | 2 +- libcxx/include/functional | 2 +- libcxx/include/future | 12 +- libcxx/include/iomanip | 2 +- libcxx/include/mutex | 2 +- .../sequences/vector/robust_against_adl.pass.cpp | 7 +- lld/MachO/SyntheticSections.cpp | 1 + lldb/include/lldb/Utility/Timer.h | 1 + lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp | 17 + lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h | 1 + .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp | 94 +- .../ScriptInterpreter/Lua/ScriptInterpreterLua.h | 4 + lldb/source/Utility/Timer.cpp | 8 + .../register/register_command/TestRegisters.py | 8 +- lldb/test/API/python_api/type/TestTypeList.py | 45 +- .../tools/lldb-server/TestGdbRemoteAuxvSupport.py | 81 +- .../TestGdbRemoteLibrariesSvr4Support.py | 6 - .../TestGdbRemoteMemoryAllocation.py | 7 +- .../register-reading/TestGdbRemoteGPacket.py | 18 +- .../thread-name/TestGdbRemoteThreadName.py | 3 - lldb/test/CMakeLists.txt | 1 + .../test/Shell/Register/x86-multithread-write.test | 2 +- .../ScriptInterpreter/Lua/breakpoint_callback.test | 12 +- .../ScriptInterpreter/Lua/partial_statements.test | 15 + lldb/test/Shell/lit.cfg.py | 3 + lldb/test/Shell/lit.site.cfg.py.in | 1 + .../source/MacOSX/i386/DNBArchImplI386.cpp | 48 +- .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 48 +- llvm/docs/ReleaseNotes.rst | 3 + llvm/include/llvm/ADT/DirectedGraph.h | 2 +- llvm/include/llvm/Analysis/AliasAnalysis.h | 16 +- llvm/include/llvm/Analysis/BasicAliasAnalysis.h | 14 + llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/include/llvm/Analysis/LazyCallGraph.h | 33 +- llvm/include/llvm/Analysis/MemorySSAUpdater.h | 7 +- llvm/include/llvm/CodeGen/CodeGenPassBuilder.h | 1 - .../llvm/ExecutionEngine/JITEventListener.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 2 +- llvm/include/llvm/Option/OptParser.td | 18 +- llvm/include/llvm/ProfileData/SampleProfReader.h | 4 +- llvm/include/llvm/Support/CFGDiff.h | 2 +- llvm/include/llvm/Support/GenericDomTree.h | 18 +- llvm/include/llvm/Support/Signposts.h | 11 +- .../llvm/Transforms/Utils/CallGraphUpdater.h | 2 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 122 +- llvm/lib/Analysis/CGSCCPassManager.cpp | 16 +- llvm/lib/Analysis/InstructionSimplify.cpp | 34 +- llvm/lib/Analysis/LazyCallGraph.cpp | 260 +++- llvm/lib/Analysis/MemorySSAUpdater.cpp | 17 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 4 +- llvm/lib/Bitstream/Reader/BitstreamReader.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 41 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 2 +- .../Interpreter/ExternalFunctions.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 3 +- llvm/lib/IR/Attributes.cpp | 2 +- llvm/lib/IR/BasicBlock.cpp | 8 +- llvm/lib/IR/Constants.cpp | 5 +- llvm/lib/IR/IRBuilder.cpp | 9 +- llvm/lib/MC/MCParser/AsmParser.cpp | 2 +- llvm/lib/MC/MCParser/MasmParser.cpp | 5 +- llvm/lib/MC/WasmObjectWriter.cpp | 4 +- llvm/lib/MCA/HardwareUnits/Scheduler.cpp | 2 +- llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 3 +- llvm/lib/ProfileData/SampleProfReader.cpp | 4 +- llvm/lib/Support/Signposts.cpp | 38 +- llvm/lib/Support/Timer.cpp | 4 +- llvm/lib/Support/Windows/Program.inc | 2 +- llvm/lib/Support/YAMLParser.cpp | 10 +- llvm/lib/TableGen/Record.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 143 ++ llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 17 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 30 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 7 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 8 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 2 - llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 - llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 41 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 34 +- llvm/lib/Target/X86/X86CallingConv.td | 9 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 56 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 7 - llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 8 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 20 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 5 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 5 +- llvm/lib/Transforms/Utils/CallGraphUpdater.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 8 +- llvm/lib/Transforms/Utils/Local.cpp | 16 +- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 47 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 70 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 6 +- llvm/lib/Transforms/Vectorize/VPlan.h | 11 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 3 +- llvm/test/Analysis/BasicAA/phi-speculation.ll | 11 +- .../CostModel/AArch64/cost-scalable-vector-gep.ll | 2 +- .../gep-induction-operand-typesize-warning.ll | 2 +- .../runtime-pointer-checking-insert-typesize.ll | 2 +- .../CodeGen/AArch64/aarch64-dup-ext-scalable.ll | 327 +++++ llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll | 185 +++ .../dag-combine-lifetime-end-store-typesize.ll | 2 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 222 ++++ llvm/test/CodeGen/AArch64/sve-redundant-store.ll | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll | 1249 ++++++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll | 979 ++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll | 990 ++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 139 +- llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll | 12 +- llvm/test/CodeGen/AMDGPU/lds-alignment.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll | 6 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 4 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll | 2 +- .../AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll | 4 +- .../AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll | 6 +- .../llvm.amdgcn.raw.buffer.store.format.d16.ll | 4 +- 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mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td | 10 +- .../mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td | 14 +- .../mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td | 8 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h | 30 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h | 1 + mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td | 10 +- mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td | 8 +- .../include/mlir/Dialect/Vector/VectorTransforms.h | 11 +- mlir/include/mlir/Dialect/Vector/VectorUtils.h | 6 + mlir/include/mlir/IR/OpBase.td | 173 ++- mlir/include/mlir/TableGen/Constraint.h | 2 +- mlir/include/mlir/TableGen/OpTrait.h | 2 +- mlir/include/mlir/TableGen/Type.h | 4 +- mlir/include/mlir/TableGen/TypeDef.h | 4 +- .../AffineToStandard/AffineToStandard.cpp | 2 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.cpp | 35 +- mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp | 139 ++ .../Dialect/Vector/VectorTransferOpTransforms.cpp | 83 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 54 +- mlir/lib/Dialect/Vector/VectorUtils.cpp | 13 +- mlir/lib/TableGen/Constraint.cpp | 10 +- mlir/lib/TableGen/OpTrait.cpp | 4 +- mlir/lib/TableGen/Type.cpp | 21 +- mlir/lib/TableGen/TypeDef.cpp | 6 +- .../lower-alloc-to-gpu-runtime-calls.mlir | 2 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 4 +- .../lower-memcpy-to-gpu-runtime-calls.mlir | 2 +- .../GPUCommon/lower-wait-to-gpu-runtime-calls.mlir | 2 +- .../Async/async-ref-counting-optimization.mlir | 2 +- mlir/test/Dialect/GPU/async-region.mlir | 2 +- mlir/test/Dialect/Linalg/hoisting.mlir | 166 +++ .../Dialect/Vector/vector-transfer-unroll.mlir | 62 + .../test/Dialect/Vector/vector-transferop-opt.mlir | 63 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 57 +- mlir/test/Transforms/buffer-deallocation.mlir | 2 +- mlir/test/Transforms/normalize-memrefs-ops.mlir | 2 +- mlir/test/Transforms/promote-buffers-to-stack.mlir | 2 +- mlir/test/lib/Dialect/Shape/TestShapeFunctions.cpp | 2 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- mlir/test/lib/Dialect/Test/TestTypeDefs.td | 3 - mlir/test/lib/Transforms/TestLinalgHoisting.cpp | 1 + mlir/test/lib/Transforms/TestSparsification.cpp | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 11 +- mlir/test/mlir-tblgen/op-attribute.td | 2 +- mlir/test/mlir-tblgen/op-decl.td | 17 + .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 2 +- mlir/tools/mlir-tblgen/EnumsGen.cpp | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 14 +- mlir/tools/mlir-tblgen/OpDocGen.cpp | 12 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 2 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 10 +- mlir/tools/mlir-tblgen/StructsGen.cpp | 2 +- mlir/tools/mlir-tblgen/TypeDefGen.cpp | 48 +- mlir/unittests/TableGen/structs.td | 2 +- openmp/libomptarget/CMakeLists.txt | 22 +- openmp/libomptarget/src/CMakeLists.txt | 8 + openmp/runtime/src/include/omp_lib.f90.var | 68 +- openmp/runtime/src/include/omp_lib.h.var | 97 +- 435 files changed, 11047 insertions(+), 3954 deletions(-) create mode 100644 clang/test/AST/pr47636.cpp rename clang/test/CodeGenOpenCL/{vector_literals_valid.cl => vector_literals.cl} (100%) rename clang/test/CodeGenOpenCL/{vector_shufflevector_valid.cl => vector_shuffleve [...] create mode 100644 clang/test/Driver/arm-machine-outliner.c rename clang/test/SemaOpenCL/{pipes-1.2-negative.cl => invalid-pipes-cl1.2.cl} (100%) rename clang/test/SemaOpenCL/{vector_literals_invalid.cl => invalid-vector-literal [...] rename clang/test/SemaOpenCL/{vector_conv_invalid.cl => vector-conv.cl} (100%) rename clang/test/SemaOpenCLCXX/{kernel_invalid.cl => invalid-kernel.cl} (100%) create mode 100644 flang/include/flang/Frontend/PreprocessorOptions.h create mode 100644 flang/test/Flang-Driver/macro_def_undef.f90 create mode 100644 flang/test/Flang-Driver/macro_multiline.f90 create mode 100644 libc/src/math/fmaf.cpp create mode 100644 libc/src/math/fmaf.h create mode 100644 libc/test/src/math/FmaTest.h create mode 100644 libc/test/src/math/fmaf_test.cpp create mode 100644 libc/utils/testutils/RandUtils.cpp create mode 100644 libc/utils/testutils/RandUtils.h create mode 100644 lldb/test/Shell/ScriptInterpreter/Lua/partial_statements.test create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll create mode 100644 llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll create mode 100644 llvm/test/CodeGen/X86/cmp-concat.ll create mode 100644 llvm/test/CodeGen/X86/lzcnt-cmp.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-split-recursive.ll create mode 100644 llvm/test/Transforms/InstCombine/debuginfo-scalable-typesize.ll create mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h -- To stop receiving notification emails like this one, please contact the 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4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig updated (bbafba7b9 -> 33f2befe0)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. from bbafba7b9 2: update: qemu-470dd6bd360782f5137f7e3376af6a44658eb1d3: 21253 new 33f2befe0 3: reset: llvm-9b228f107d43341ef73af92865f73a9a076c5a76: 21243 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 86 +- 02-prepare_abe/console.log | 338 +- 03-build_llvm/console.log | 13639 ++++++++++++++------------- 04-build_linux/console.log | 863 +- 07-check_regression/console.log | 80 +- 07-check_regression/results.regressions | 11 +- 07-check_regression/trigger-bisect | 3 + 08-update_baseline/console.log | 82 +- 08-update_baseline/results.regressions | 11 +- console.log | 15088 ++++++++++++++++-------------- jenkins/manifest.sh | 12 +- reset-baseline | 0 results | 13 +- 13 files changed, 15671 insertions(+), 14555 deletions(-) create mode 100644 07-check_regression/trigger-bisect create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (aadac5b3d9 -> 470dd6bd36)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/qemu. from aadac5b3d9 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds d2427956e1 tests/docker: Include 'ccache' in Debian base image adds f4c6557bfe tests/iotests: drop test 312 from auto group adds 93eaabde61 tests/acceptance: bound the size of readline in s390_ccw_virtio adds af229fc367 cirrus: don't run full qtest on macOS adds 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 14 ++++++++++---- tests/acceptance/machine_s390_ccw_virtio.py | 2 +- tests/docker/dockerfiles/debian10.docker | 1 + tests/qemu-iotests/group | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (be6c485b24f -> 01d92cfd798)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/gcc. from be6c485b24f analyzer: fix false leak reports when merging states [PR97074] adds 1b566975242 Adjust testcase for PR 92658 adds d02a8b63e5a bswap: Fix up recent vector CONSTRUCTOR optimization [PR98568] adds d54be5ad210 i386: Merge various insn name mapping code attributes adds 78595e918ee gimple-isel: Fall back to using vcond_mask [PR98560] adds 298e76e6562 gimple-isel: Check whether IFN_VCONDEQ is supported [PR98560] adds 0f9d2c1a318 aarch64: Support conditional unpacked integer unary arithme [...] adds 6bca2ebf106 i386: Optimize blsi followed by comparison [PR98567] adds d54029179cb fix GIMPLE parser for loops adds dddea6d4d81 d: Merge upstream dmd 9038e64c5. adds 85fb1d7d5f4 Fortran: Improve resolution of associate variables. [PR93701]. adds 19f3c433cdc libstdc++: Fix long double to_chars testcase [PR98384] adds c8d2ed112e7 Update cpplib es.po. adds b87ec922c40 test: add new Go tests from source repo adds 0677759f753 analyzer: fix ICE when DECL_INITIAL is error_mark_node [PR98580] adds b7c3f201be5 libstdc++: Add support for C++20 barriers adds 4d65a07d54b c++: Add some conversion sanity checking. adds 6c59b8a93cf c++: Add TARGET_EXPR comments adds 2f359597e49 c++: Fix thinko in auto return type checking [PR98441] adds 178f0afce36 PR middle-end/98578 - ICE warning on uninitialized VLA access adds aa4db31dd2a c++: Fix up tsubst of BIT_CAST_EXPR [PR98329] adds 7d187e4f6f5 Daily bump. adds 0b7b4710111 RISC-V: Move class riscv_subset_list and riscv_subset_t to [...] adds e3354b6de7a RISC-V: Implement new style of architecture extension test macros. adds 01d92cfd798 Fix array-quals-1.c for RISC-V No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 54 +++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 27 +++ gcc/analyzer/region.cc | 5 + gcc/c-family/ChangeLog | 7 + gcc/c-family/c-pretty-print.c | 29 +-- gcc/c/ChangeLog | 5 + gcc/c/gimple-parser.c | 5 +- gcc/common/config/riscv/riscv-common.c | 72 +----- gcc/config/aarch64/aarch64-sve.md | 28 +-- gcc/config/i386/i386.md | 126 ++++++----- gcc/config/i386/mmx.md | 14 +- gcc/config/i386/sse.md | 82 +++---- gcc/config/riscv/riscv-c.c | 32 +++ gcc/config/riscv/riscv-subset.h | 95 ++++++++ gcc/config/riscv/t-riscv | 4 +- gcc/cp/ChangeLog | 29 +++ gcc/cp/call.c | 37 +-- gcc/cp/constexpr.c | 6 + gcc/cp/decl.c | 8 +- gcc/cp/pt.c | 11 +- gcc/d/ChangeLog | 6 + gcc/d/d-builtins.cc | 2 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/arrayop.c | 8 +- gcc/d/dmd/clone.c | 16 +- gcc/d/dmd/cond.c | 2 +- gcc/d/dmd/declaration.c | 2 +- gcc/d/dmd/dtemplate.c | 2 +- gcc/d/dmd/expression.c | 2 +- gcc/d/dmd/expressionsem.c | 5 +- gcc/d/dmd/func.c | 24 +- gcc/d/dmd/hdrgen.c | 12 + gcc/d/dmd/mtype.c | 30 +-- gcc/d/dmd/mtype.h | 7 +- gcc/d/dmd/parse.c | 113 ++++++++-- gcc/d/dmd/statementsem.c | 24 +- gcc/d/dmd/traits.c | 39 +++- gcc/fortran/ChangeLog | 7 + gcc/fortran/resolve.c | 9 + gcc/gimple-isel.cc | 32 ++- gcc/gimple-ssa-store-merging.c | 25 ++- gcc/internal-fn.c | 22 +- gcc/internal-fn.def | 4 +- gcc/testsuite/ChangeLog | 78 +++++++ gcc/testsuite/g++.dg/cpp0x/auto55.C | 13 ++ gcc/testsuite/g++.dg/cpp2a/bit-cast10.C | 42 ++++ gcc/testsuite/g++.dg/torture/pr98568.C | 37 +++ gcc/testsuite/gcc.dg/analyzer/pr98580-a.c | 9 + gcc/testsuite/gcc.dg/analyzer/pr98580-b.c | 2 + gcc/testsuite/gcc.dg/array-quals-1.c | 40 ++-- gcc/testsuite/gcc.dg/plugin/gil-1.c | 4 +- gcc/testsuite/gcc.dg/uninit-pr98578.c | 110 +++++++++ gcc/testsuite/gcc.dg/vect/pr98560-1.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr98560-2.c | 17 ++ .../gcc.target/aarch64/sve/cond_unary_5.c | 49 ++++ .../gcc.target/aarch64/sve/cond_unary_5_run.c | 26 +++ .../gcc.target/aarch64/sve/cond_unary_6.c | 53 +++++ .../gcc.target/aarch64/sve/cond_unary_6_run.c | 27 +++ .../gcc.target/aarch64/sve/cond_unary_7.c | 48 ++++ .../gcc.target/aarch64/sve/cond_unary_7_run.c | 26 +++ .../gcc.target/aarch64/sve/cond_unary_8.c | 50 +++++ .../gcc.target/aarch64/sve/cond_unary_8_run.c | 28 +++ gcc/testsuite/gcc.target/i386/pr92658-avx512bw-2.c | 2 +- gcc/testsuite/gcc.target/i386/pr92658-avx512bw.c | 2 +- gcc/testsuite/gcc.target/i386/pr98567-1.c | 31 +++ gcc/testsuite/gcc.target/i386/pr98567-2.c | 31 +++ gcc/testsuite/gcc.target/riscv/predef-10.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-11.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-12.c | 43 ++++ gcc/testsuite/gcc.target/riscv/predef-13.c | 43 ++++ .../gdc.test/compilable/extra-files/header1.d | 18 ++ .../gdc.test/compilable/testheaderudamodule.d | 2 + .../gdc.test/fail_compilation/fail10207.d | 2 +- gcc/testsuite/gdc.test/runnable/uda.d | 194 ++++++++++++++++ gcc/testsuite/gfortran.dg/associate_54.f90 | 34 +++ gcc/testsuite/gfortran.dg/associate_55.f90 | 35 +++ gcc/testsuite/gfortran.dg/associate_56.f90 | 36 +++ .../test/fixedbugs/issue27836.dir/\303\204foo.go" | 13 ++ .../test/fixedbugs/issue27836.dir/\303\204main.go" | 13 ++ .../fixedbugs/{issue23311.go => issue27836.go} | 0 libcpp/po/ChangeLog | 4 + libcpp/po/es.po | 89 ++++---- libstdc++-v3/ChangeLog | 21 ++ libstdc++-v3/doc/doxygen/user.cfg.in | 1 + libstdc++-v3/include/Makefile.am | 1 + libstdc++-v3/include/Makefile.in | 1 + libstdc++-v3/include/precompiled/stdc++.h | 1 + libstdc++-v3/include/std/barrier | 247 +++++++++++++++++++++ libstdc++-v3/include/std/version | 3 + .../testsuite/20_util/to_chars/long_double.cc | 25 ++- libstdc++-v3/testsuite/30_threads/barrier/1.cc | 30 +++ libstdc++-v3/testsuite/30_threads/barrier/2.cc | 28 +++ .../testsuite/30_threads/barrier/arrive.cc | 48 ++++ .../30_threads/barrier/arrive_and_drop.cc | 46 ++++ .../30_threads/barrier/arrive_and_wait.cc | 46 ++++ .../testsuite/30_threads/barrier/completion.cc | 53 +++++ 97 files changed, 2579 insertions(+), 399 deletions(-) create mode 100644 gcc/config/riscv/riscv-subset.h create mode 100644 gcc/testsuite/g++.dg/cpp0x/auto55.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/bit-cast10.C create mode 100644 gcc/testsuite/g++.dg/torture/pr98568.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-a.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr98580-b.c create mode 100644 gcc/testsuite/gcc.dg/uninit-pr98578.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr98560-1.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr98560-2.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_unary_8_run.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98567-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr98567-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/predef-13.c create mode 100644 gcc/testsuite/gfortran.dg/associate_54.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_55.f90 create mode 100644 gcc/testsuite/gfortran.dg/associate_56.f90 create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204foo.go" create mode 100644 "gcc/testsuite/go.test/test/fixedbugs/issue27836.dir/\303\204main.go" copy gcc/testsuite/go.test/test/fixedbugs/{issue23311.go => issue27836.go} (100%) create mode 100644 libstdc++-v3/include/std/barrier create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/1.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/2.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_drop.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/arrive_and_wait.cc create mode 100644 libstdc++-v3/testsuite/30_threads/barrier/completion.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (2652cfad8d -> 9a50f40e82)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 2652cfad8d RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructio [...] adds 1861f7cfbf sim: cris: fix C tests with newer toolchains adds 9446bcf6be fix paths in ChangeLog adds 4d4490b8d7 ld: xfail riscv64*-*-* for ld-scripts/empty-address-2 tests. adds aa881ecde4 RISC-V: Add pause hint instruction. adds 78e4948694 [gdb/build] Fix gdbserver build with -fsanitize=address adds 17d60030ae Fix another path length problem opening files on Win32 systems. adds d4813f1046 Fix regression in Ada aggregate assignment adds 8e604ff077 xfail more cases of complaints about relocs in read-only sections adds dc20061339 sh-pe ld XPASSes adds 959d6a673e Fix regression in Ada do_full_match adds 3b288c8e2e m68k: Require m68020up rather than m68000up for CHK.L instruction. adds d1bcae833b ELF: Don't generate unused section symbols adds 1b0927db3c Updated French translation for the opcodes/ subdirectory. adds f478212851 libtool.m4: update GNU/Hurd test from upstream. In upstream [...] adds e904f56d02 gdb/sim: add support for exporting memory map adds bfc7d04afb sim: h8300: delete opcode caching adds a39487c668 sim: cris: use -sim with C tests for cris-elf targets adds e6c1dbbfe8 sim: cris: disable test that crashes the linker adds 0f8e278da2 sim: ChangeLog: move arch-specific entries into the arch dir adds 9a50f40e82 Automatic date update in version.in No new revisions were added by this update. Summary of changes: ChangeLog | 4 + bfd/ChangeLog | 90 ++++ bfd/aix386-core.c | 1 + bfd/aout-target.h | 1 + bfd/bfd-in2.h | 17 + bfd/bfdio.c | 23 +- bfd/binary.c | 1 + bfd/cisco-core.c | 2 + bfd/coff-alpha.c | 1 + bfd/coff-i386.c | 4 +- bfd/coff-ia64.c | 1 + bfd/coff-mips.c | 3 + bfd/coff-rs6000.c | 2 + bfd/coff-sh.c | 2 + bfd/coff-tic30.c | 1 + bfd/coff-tic54x.c | 26 + bfd/coff-x86_64.c | 2 + bfd/coff64-rs6000.c | 2 + bfd/coffcode.h | 3 + bfd/configure | 12 +- bfd/elf.c | 15 +- bfd/elfcode.h | 8 +- bfd/elflink.c | 61 ++- bfd/elfxx-riscv.c | 2 +- bfd/elfxx-target.h | 6 + bfd/elfxx-x86.h | 3 + bfd/hppabsd-core.c | 1 + bfd/hpux-core.c | 1 + bfd/i386msdos.c | 1 + bfd/ihex.c | 1 + bfd/irix-core.c | 1 + bfd/mach-o-target.c | 1 + bfd/mmo.c | 1 + bfd/netbsd-core.c | 1 + bfd/osf-core.c | 1 + bfd/pdp11.c | 1 + bfd/pef.c | 2 + bfd/plugin.c | 1 + bfd/ppcboot.c | 1 + bfd/ptrace-core.c | 1 + bfd/sco5-core.c | 1 + bfd/som.c | 1 + bfd/srec.c | 2 + bfd/syms.c | 3 + bfd/targets.c | 14 + bfd/tekhex.c | 1 + bfd/trad-core.c | 1 + bfd/verilog.c | 1 + bfd/version.h | 2 +- bfd/vms-alpha.c | 1 + bfd/vms-lib.c | 1 + bfd/wasm-module.c | 1 + bfd/xsym.c | 1 + binutils/ChangeLog | 20 + binutils/configure | 12 +- binutils/objcopy.c | 24 + binutils/testsuite/binutils-all/readelf.exp | 6 +- binutils/testsuite/binutils-all/readelf.s-64 | 2 +- .../{readelf.s-64 => readelf.s-64-unused} | 0 binutils/testsuite/binutils-all/readelf.ss | 5 +- binutils/testsuite/binutils-all/readelf.ss-64 | 5 +- .../{readelf.ss-64 => readelf.ss-64-unused} | 0 .../binutils-all/{readelf.ss => readelf.ss-unused} | 0 binutils/testsuite/lib/binutils-common.exp | 31 ++ gas/ChangeLog | 45 ++ gas/config/obj-elf.c | 3 + gas/config/tc-riscv.c | 2 + gas/configure | 12 +- gas/read.c | 3 + gas/subsegs.c | 4 + gas/testsuite/gas/cfi/cfi-label.d | 4 +- gas/testsuite/gas/elf/elf.exp | 6 +- gas/testsuite/gas/elf/section2.e | 7 - .../gas/elf/{section2.e => section2.e-unused} | 0 gas/testsuite/gas/elf/symver.d | 4 - gas/testsuite/gas/i386/ilp32/elf/symver.d | 4 - gas/testsuite/gas/i386/ilp32/x86-64-size-1.d | 24 +- gas/testsuite/gas/i386/ilp32/x86-64-size-3.d | 16 +- gas/testsuite/gas/i386/ilp32/x86-64-size-5.d | 12 +- gas/testsuite/gas/i386/ilp32/x86-64-unwind.d | 6 +- gas/testsuite/gas/i386/size-1.d | 24 +- gas/testsuite/gas/i386/size-3.d | 16 +- gas/testsuite/gas/i386/svr4.d | 3 - gas/testsuite/gas/i386/x86-64-size-1.d | 24 +- gas/testsuite/gas/i386/x86-64-size-3.d | 16 +- gas/testsuite/gas/i386/x86-64-size-5.d | 12 +- gas/testsuite/gas/i386/x86-64-unwind.d | 10 +- gas/testsuite/gas/riscv/pause.d | 10 + gas/testsuite/gas/riscv/pause.s | 2 + gas/write.c | 43 +- gdb/ChangeLog | 15 + gdb/ada-lang.c | 12 +- gdb/remote-sim.c | 18 + gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.ada/assign_arr.exp | 3 + gdbserver/ChangeLog | 7 + gdbserver/Makefile.in | 13 +- gprof/ChangeLog | 4 + gprof/configure | 12 +- include/ChangeLog | 6 + include/gdb/ChangeLog | 4 + include/gdb/remote-sim.h | 9 + include/opcode/riscv-opc.h | 3 + include/opcode/riscv.h | 1 + ld/ChangeLog | 112 +++++ ld/configure | 12 +- ld/testsuite/ld-elf/comm-data5.d | 2 +- ld/testsuite/ld-elf/ehdr_start-shared.d | 2 +- ld/testsuite/ld-elf/ehdr_start.d | 2 +- ld/testsuite/ld-elf/export-class.sd | 2 - ld/testsuite/ld-elf/loadaddr3b.d | 3 - ld/testsuite/ld-elf/sec64k.exp | 16 +- ld/testsuite/ld-elf/shared.exp | 6 +- ld/testsuite/ld-i386/ibt-plt-1.d | 4 +- ld/testsuite/ld-i386/ibt-plt-2a.d | 4 +- ld/testsuite/ld-i386/ibt-plt-2c.d | 4 +- ld/testsuite/ld-i386/ibt-plt-3a.d | 4 +- ld/testsuite/ld-i386/ibt-plt-3c.d | 4 +- ld/testsuite/ld-i386/plt-pic.pd | 6 +- ld/testsuite/ld-i386/plt-pic2.dd | 6 +- ld/testsuite/ld-i386/plt.pd | 6 +- ld/testsuite/ld-i386/plt2.dd | 6 +- ld/testsuite/ld-i386/pr19636-1d.d | 2 +- ld/testsuite/ld-i386/pr19636-1l.d | 2 +- ld/testsuite/ld-i386/pr19636-2c.d | 2 +- ld/testsuite/ld-i386/tlsbin.rd | 13 - ld/testsuite/ld-i386/tlsbin2.rd | 11 - ld/testsuite/ld-i386/tlsbindesc.rd | 11 - ld/testsuite/ld-i386/tlsdesc.rd | 11 - ld/testsuite/ld-i386/tlsgdesc.rd | 10 - ld/testsuite/ld-i386/tlsnopic.rd | 9 - ld/testsuite/ld-i386/tlspic.rd | 12 - ld/testsuite/ld-i386/tlspic2.rd | 10 - ld/testsuite/ld-ifunc/ifunc-2-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-i386-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-2-x86-64-now.d | 4 +- ld/testsuite/ld-ifunc/ifunc-21-x86-64.d | 10 +- ld/testsuite/ld-ifunc/ifunc-22-x86-64.d | 10 +- ld/testsuite/ld-ifunc/pr17154-i386-now.d | 10 +- ld/testsuite/ld-ifunc/pr17154-i386.d | 8 +- ld/testsuite/ld-ifunc/pr17154-x86-64-now.d | 10 +- ld/testsuite/ld-ifunc/pr17154-x86-64.d | 8 +- ld/testsuite/ld-scripts/empty-address-2a.d | 2 +- ld/testsuite/ld-scripts/empty-address-2b.d | 2 +- ld/testsuite/ld-scripts/fill.d | 4 +- ld/testsuite/ld-scripts/fill16.d | 2 +- ld/testsuite/ld-scripts/pr22267.d | 1 + ld/testsuite/ld-scripts/segment-start.d | 2 +- ld/testsuite/ld-x86-64/bnd-branch-1-now.d | 10 +- ld/testsuite/ld-x86-64/bnd-ifunc-1-now.d | 2 +- ld/testsuite/ld-x86-64/bnd-ifunc-2-now.d | 8 +- ld/testsuite/ld-x86-64/bnd-ifunc-2.d | 8 +- ld/testsuite/ld-x86-64/bnd-plt-1-now.d | 8 +- ld/testsuite/ld-x86-64/bnd-plt-1.d | 8 +- ld/testsuite/ld-x86-64/ibt-plt-1-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-1.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2a-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2a.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2c-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-2c.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3a-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3a.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3c-x32.d | 4 +- ld/testsuite/ld-x86-64/ibt-plt-3c.d | 4 +- ld/testsuite/ld-x86-64/mpx3.dd | 2 +- ld/testsuite/ld-x86-64/mpx3n.dd | 2 +- ld/testsuite/ld-x86-64/mpx4.dd | 2 +- ld/testsuite/ld-x86-64/mpx4n.dd | 2 +- ld/testsuite/ld-x86-64/pe-x86-64-1.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-2.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-3.od | 5 - ld/testsuite/ld-x86-64/pe-x86-64-4.od | 6 - ld/testsuite/ld-x86-64/plt.pd | 6 +- ld/testsuite/ld-x86-64/plt2.dd | 6 +- ld/testsuite/ld-x86-64/pr19609-4e.d | 4 +- ld/testsuite/ld-x86-64/pr19609-6a.d | 2 +- ld/testsuite/ld-x86-64/pr19609-6b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7b.d | 2 +- ld/testsuite/ld-x86-64/pr19609-7d.d | 2 +- ld/testsuite/ld-x86-64/pr19636-2l.d | 6 +- ld/testsuite/ld-x86-64/pr20253-1d.d | 12 +- ld/testsuite/ld-x86-64/pr20253-1h.d | 12 +- ld/testsuite/ld-x86-64/pr21038b-now.d | 2 +- ld/testsuite/ld-x86-64/pr21038b.d | 2 +- ld/testsuite/ld-x86-64/pr21038c-now.d | 2 +- ld/testsuite/ld-x86-64/pr21038c.d | 2 +- ld/testsuite/ld-x86-64/pr23854.d | 36 +- ld/testsuite/ld-x86-64/pr25416-3.d | 4 +- ld/testsuite/ld-x86-64/pr25416-4.d | 4 +- ld/testsuite/ld-x86-64/tlsbin.rd | 13 - ld/testsuite/ld-x86-64/tlsbin2.rd | 11 - ld/testsuite/ld-x86-64/tlsbindesc.rd | 11 - ld/testsuite/ld-x86-64/tlsdesc.rd | 12 - ld/testsuite/ld-x86-64/tlsgdesc.rd | 10 - ld/testsuite/ld-x86-64/tlspic.rd | 12 - ld/testsuite/ld-x86-64/tlspic2.rd | 12 - libctf/ChangeLog | 4 + libctf/configure | 12 +- libtool.m4 | 12 +- opcodes/ChangeLog | 17 + opcodes/configure | 12 +- opcodes/m68k-opc.c | 2 +- opcodes/po/fr.po | 555 ++++++++++++--------- opcodes/riscv-opc.c | 3 + sim/ChangeLog | 490 ------------------ sim/avr/ChangeLog | 23 + sim/bpf/ChangeLog | 54 ++ sim/common/ChangeLog | 4 + sim/common/sim-core.c | 57 +++ sim/cris/ChangeLog | 355 +++++++++++++ sim/ft32/ChangeLog | 8 + sim/h8300/ChangeLog | 16 + sim/h8300/compile.c | 135 +---- sim/h8300/sim-main.h | 5 - sim/m32c/ChangeLog | 9 +- sim/or1k/ChangeLog | 52 ++ sim/ppc/ChangeLog | 4 + sim/testsuite/ChangeLog | 18 +- sim/testsuite/sim/bpf/ChangeLog | 20 + sim/testsuite/sim/cris/ChangeLog | 17 + sim/testsuite/sim/cris/c/c.exp | 4 + sim/testsuite/sim/cris/c/helloaout.c | 6 +- sim/testsuite/sim/cris/c/kill2.c | 2 + sim/testsuite/sim/cris/c/openpf1.c | 2 +- sim/testsuite/sim/cris/c/openpf2.c | 2 +- sim/testsuite/sim/cris/c/pipe1.c | 1 + sim/testsuite/sim/cris/c/sched1.c | 1 + sim/testsuite/sim/cris/c/sched2.c | 1 + sim/testsuite/sim/cris/c/sched3.c | 1 + sim/testsuite/sim/cris/c/sched4.c | 1 + sim/testsuite/sim/cris/c/sig5.c | 2 + sim/testsuite/sim/cris/c/sig8.c | 2 + zlib/configure | 12 +- 234 files changed, 1934 insertions(+), 1532 deletions(-) copy binutils/testsuite/binutils-all/{readelf.s-64 => readelf.s-64-unused} (100%) copy binutils/testsuite/binutils-all/{readelf.ss-64 => readelf.ss-64-unused} (100%) copy binutils/testsuite/binutils-all/{readelf.ss => readelf.ss-unused} (100%) copy gas/testsuite/gas/elf/{section2.e => section2.e-unused} (100%) create mode 100644 gas/testsuite/gas/riscv/pause.d create mode 100644 gas/testsuite/gas/riscv/pause.s create mode 100644 sim/bpf/ChangeLog create mode 100644 sim/or1k/ChangeLog create mode 100644 sim/testsuite/sim/bpf/ChangeLog -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig updated (89bcbb8b7 -> 85b95ed74)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 89bcbb8b7 0: update: binutils-gcc-linux-qemu: all new 85b95ed74 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (89bcbb8b7) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-lt [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 137 +- 02-prepare_abe/console.log | 170 +- 03-build_abe-binutils/console.log | 11430 +++++---- 04-build_abe-stage1/console.log | 20489 ++++++++------- 05-build_linux/console.log | 802 +- 06-build_abe-qemu/console.log | 6712 +++-- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 2 +- console.log | 39746 +++++++++++++++--------------- jenkins/manifest.sh | 16 +- 13 files changed, 39654 insertions(+), 39858 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (aadac5b3d9 -> 470dd6bd36)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/qemu. from aadac5b3d9 Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds d2427956e1 tests/docker: Include 'ccache' in Debian base image adds f4c6557bfe tests/iotests: drop test 312 from auto group adds 93eaabde61 tests/acceptance: bound the size of readline in s390_ccw_virtio adds af229fc367 cirrus: don't run full qtest on macOS adds 470dd6bd36 Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] No new revisions were added by this update. Summary of changes: .cirrus.yml | 14 ++++++++++---- tests/acceptance/machine_s390_ccw_virtio.py | 2 +- tests/docker/dockerfiles/debian10.docker | 1 + tests/qemu-iotests/group | 2 +- 4 files changed, 13 insertions(+), 6 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig updated (7510c1152f0 -> b934160aaa3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from 7510c1152f0 Update for review feedback: Inline var declaration and expa [...] adds 01a2508aa58 [PowerPC] Delete remnant isOSDarwin references adds bfa6ca07a8c [PowerPC] Delete remnant Darwin ISelLowering code adds 022cc6e3434 [PowerPC] Delete dead Lower* adds 3bfc9bb8ef2 [VE][NFC] Update comments to match the generated instructions adds dbfc1ac4d86 [X86] Update tests for znver3 adds 238dbeb1e7b [mlir][ODS] Fix missed rename of TypeParameter 'description [...] adds 7ddbe0cb905 [LV] Merge tests into a single file (NFC) adds 248e3450fb8 [LLD] [MinGW] Pass the --demangle and --no-demangle options [...] adds f4485240a21 [libcxx] Handle backslash as path separator on windows adds c3529a5b080 [mlir] Mark methods from mlir::OpState that just forward to [...] adds d2ddc694ff9 Revert "Revert "[analyzer] NFC: Move path diagnostic consum [...] adds 5471b1fa401 [gn build] Port d2ddc694ff9 adds 77db83ae997 [clang][cli] Allow users to specify a conditional to preven [...] adds c6ea4d5b2c0 [clang][cli] Implement ContainsN Google Test matcher adds d0fa7a05be9 Revert "[clang][cli] Allow users to specify a conditional t [...] adds 76f6b125cef Revert "[llvm] Use BasicBlock::phis() (NFC)" adds c9154e8fa37 [RISCV] Add vector mask arithmetic ISel patterns adds 67a4c672b02 Reapply "[clang][cli] Allow users to specify a conditional [...] adds 0877b963ef2 [clang][ASTImporter] Fix a possible assertion failure `Need [...] adds 801c7866e6d [lldb][ARM/AArch64] Update disasm flags to latest v8.7a ISA adds a828fb463ed [clang][cli] Port a CommaJoined option to the marshalling i [...] adds e5cdb6c56ed [flang][driver] Add support for `-c` and `-emit-obj` adds b6ba5983079 [clang][cli] Port getAllArgumentValues to the marshalling i [...] adds b6fb0209b6d [libc++] [CI] Install Tip-of-Trunk clang. adds 33f90f38e11 [clang][cli] Report the actual argument parsing result adds 350ab7aa1c6 [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' st [...] adds 7da3e3a8983 [libcxx] Mark a test as unsupported for C++03 adds 044b892c79b [libc++] Use c++20 instead of c++2a consistently. adds 10164a2e50b [mlir] Refactor translation of OpenMP dialect ops to LLVM IR adds 213329d7c64 [clangd] Add server capability advertising hot-reloading of CDBs. adds 4284afdf943 [SLP]Need shrink the load vector after reordering. adds 236129fb446 [CompilationDatabase] Pass Twine by const reference instead [...] adds 028091195d7 [DWARF] DWARFDebugLoc::dumpRawEntry - remove dead stores. NFCI. adds a9a8caf2ce2 [llvm-objdump] Pass Twine by const reference instead of by [...] adds c1d58c2b002 [mlir] Add fastmath flags support to some LLVM dialect ops adds e72cdc5ba1e [clang][cli] NFC: Ensure non-null DiagnosticsEngine in Pars [...] adds 75d63630ebb [clang][cli] NFC: Move parseSimpleArgs adds a7cbc32a916 [mlir] remove a use of deprecated OpState::setAttr adds fcd1e35e4cc [clang][cli] NFC: Make parsing macro reusable adds 01c190e907c [AArch64][CostModel]Fix gather scatter cost model adds a2957f80f87 [flang][driver] Rename driver tests (nfc) adds fa6d8977999 [Analysis] MemoryDepChecker::couldPreventStoreLoadForward - [...] adds 037b058e419 [AArch64] SVEIntrinsicOpts - use range loop and cast<> inst [...] adds b73736a4048 [flang][openacc] Enforce delcare directive restriction adds aa7968a87b6 [TableGen] Add field kind to the RecordVal class. adds 048f184ee48 [SplitEdge] Add new parameter to SplitEdge to name the newl [...] adds 8dee0b4bd63 [llvm-reduce] ReduceGlobalVarInitializers delta pass: fix h [...] adds 6be1fd6b20f [SimplifyCFG] FoldValueComparisonIntoPredecessors(): drop r [...] adds ebfe4de2c04 [DDG] Fix duplicate edge removal during pi-block formation adds 6b7d5a928f5 AMDGPU/GlobalISel: Start cleaning up calling convention lowering adds 573d5782482 [DDG] Data Dependence Graph - DOT printer tests adds f4013359b3d [SVE] Add unpacked scalable floating point ZIP/UZP/TRN patterns adds e881a25f1e1 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds db33f85c712 [IR] Use LLVM_ENABLE_ABI_BREAKING_CHECKS to guard ABI changes. adds 82f5ee3c3e6 Adds argument attributes for using LLVM's sret and byval at [...] adds 59fce6b0661 [NFC] make clang/test/CodeGen/arm_neon_intrinsics.c resiste [...] adds f88fab50068 [mlir] NFC: fix trivial typos adds acbb3652931 [AST][NFC] Silence GCC warning about multiline comments adds 43043adcfbc Add element-type to the Vector TypeLoc types. adds ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC. adds 696775d96ec Fix subprogram_ranges.test by explicitly using lld adds 4a3c2ba8904 Fix print-dot-ddg.ll so it doesn't try to write to the sour [...] adds 2ff36e79291 lldb subprogram_ranges.test - remove dependence on temp file name adds 6b0ee02747e Revert "Revert "Revert "Revert "[analyzer] NFC: Move path d [...] adds 495b301de6e [gn build] Port 6b0ee02747e adds 8febb2e0f56 [CodeGen] Remove unused function isCallerPreservedOrConstPh [...] adds 33bf1cad759 [llvm] Use *Set::contains (NFC) adds b934160aaa3 [Target] Use llvm::find_if (NFC) No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 6 +- .../clangd/test/initialize-params.test | 3 + clang/docs/OpenMPSupport.rst | 4 +- clang/include/clang/AST/DeclOpenMP.h | 2 +- clang/include/clang/AST/TypeLoc.h | 77 +- .../include/clang/Analysis/CrossTUAnalysisHelper.h | 41 ++ .../PathDiagnosticConsumers.def} | 53 +- .../Core => Analysis}/PathDiagnosticConsumers.h | 13 +- clang/include/clang/CrossTU/CrossTranslationUnit.h | 21 +- clang/include/clang/Driver/Options.td | 88 ++- .../include/clang/StaticAnalyzer/Core/Analyses.def | 37 - .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 2 +- .../Core/PathSensitive/AnalysisManager.h | 2 +- clang/include/clang/Tooling/CompilationDatabase.h | 15 +- clang/include/clang/module.modulemap | 1 + clang/lib/AST/ASTImporter.cpp | 8 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/Analysis/CMakeLists.txt | 7 + .../HTMLPathDiagnosticConsumer.cpp} | 111 ++- .../Analysis/PlistHTMLPathDiagnosticConsumer.cpp | 35 + .../PlistPathDiagnosticConsumer.cpp} | 62 +- .../SarifPathDiagnosticConsumer.cpp} | 30 +- .../TextPathDiagnosticConsumer.cpp} | 42 +- clang/lib/CodeGen/TargetInfo.cpp | 62 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 13 +- clang/lib/Driver/Driver.cpp | 16 +- clang/lib/Driver/ToolChains/Flang.cpp | 19 +- clang/lib/Driver/ToolChains/Gnu.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 231 +++--- clang/lib/Headers/__clang_hip_cmath.h | 28 + clang/lib/Sema/SemaType.cpp | 11 + clang/lib/Sema/TreeTransform.h | 8 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 4 - .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 4 +- clang/lib/Tooling/CompilationDatabase.cpp | 6 +- clang/test/CodeGen/arm_neon_intrinsics.c | 60 +- clang/test/CodeGen/object-size.c | 10 +- clang/test/Driver/cl-options.c | 5 + clang/test/Driver/x86-march.c | 4 + clang/test/Frontend/x86-target-cpu.c | 1 + clang/test/OpenMP/begin_declare_variant_messages.c | 2 +- clang/test/OpenMP/declare_variant_ast_x86_64.c | 10 + clang/test/OpenMP/declare_variant_messages.c | 10 +- clang/test/OpenMP/declare_variant_messages.cpp | 4 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 10 +- clang/test/OpenMP/target_codegen.cpp | 2 +- clang/test/SemaCXX/vector.cpp | 17 + clang/unittests/AST/ASTImporterTest.cpp | 35 + clang/unittests/Basic/FileEntryTest.cpp | 2 +- .../unittests/Frontend/CompilerInvocationTest.cpp | 298 +++++--- compiler-rt/lib/builtins/CMakeLists.txt | 7 +- debuginfo-tests/CMakeLists.txt | 4 +- .../llvm-prettyprinters/gdb/mlir-support.cpp | 4 +- flang/include/flang/Frontend/FrontendActions.h | 4 + flang/include/flang/Frontend/FrontendOptions.h | 3 + flang/lib/Frontend/CompilerInvocation.cpp | 4 +- flang/lib/Frontend/FrontendActions.cpp | 7 + .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 2 + flang/lib/Semantics/check-acc-structure.cpp | 23 +- flang/lib/Semantics/resolve-directives.cpp | 80 +++ flang/test/Driver/{no_files.f90 => no-files.f90} | 0 .../Driver/{version_test.f90 => version-test.f90} | 0 flang/test/Flang-Driver/code-gen.f90 | 15 + flang/test/Flang-Driver/driver-help-hidden.f90 | 1 + flang/test/Flang-Driver/driver-help.f90 | 2 + flang/test/Flang-Driver/emit-obj.f90 | 14 - .../{macro_def_undef.f90 => macro-def-undef.f90} | 0 .../{macro_multiline.f90 => macro-multiline.f90} | 0 flang/test/Flang-Driver/phases.f90 | 20 + flang/test/Semantics/acc-clause-validity.f90 | 3 - flang/test/Semantics/acc-declare-validity.f90 | 57 ++ .../{Generic-cxx2a.cmake => Generic-cxx20.cmake} | 0 libcxx/docs/DesignDocs/FeatureTestMacros.rst | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 +- libcxx/docs/UsingLibcxx.rst | 2 +- libcxx/include/__config | 4 +- libcxx/include/filesystem | 7 +- libcxx/include/new | 20 +- libcxx/include/string | 12 +- libcxx/include/string_view | 12 +- libcxx/include/version | 22 +- libcxx/src/filesystem/operations.cpp | 25 +- .../algorithm.version.pass.cpp | 44 +- .../support.limits.general/any.version.pass.cpp | 8 +- .../support.limits.general/array.version.pass.cpp | 26 +- .../support.limits.general/atomic.version.pass.cpp | 104 +-- .../support.limits.general/bit.version.pass.cpp | 40 +- .../support.limits.general/chrono.version.pass.cpp | 12 +- .../support.limits.general/cmath.version.pass.cpp | 12 +- .../compare.version.pass.cpp | 16 +- .../complex.version.pass.cpp | 8 +- .../concepts.version.pass.cpp | 16 +- .../cstddef.version.pass.cpp | 8 +- .../support.limits.general/deque.version.pass.cpp | 24 +- .../exception.version.pass.cpp | 8 +- .../execution.version.pass.cpp | 8 +- .../filesystem.version.pass.cpp | 20 +- .../forward_list.version.pass.cpp | 40 +- .../functional.version.pass.cpp | 60 +- .../iomanip.version.pass.cpp | 8 +- .../istream.version.pass.cpp | 16 +- .../iterator.version.pass.cpp | 34 +- .../support.limits.general/limits.version.pass.cpp | 16 +- .../support.limits.general/list.version.pass.cpp | 40 +- .../support.limits.general/locale.version.pass.cpp | 16 +- .../support.limits.general/map.version.pass.cpp | 36 +- .../support.limits.general/memory.version.pass.cpp | 68 +- .../support.limits.general/mutex.version.pass.cpp | 8 +- .../support.limits.general/new.version.pass.cpp | 24 +- .../numbers.version.pass.cpp | 16 +- .../numeric.version.pass.cpp | 36 +- .../optional.version.pass.cpp | 8 +- .../ostream.version.pass.cpp | 16 +- .../support.limits.general/regex.version.pass.cpp | 8 +- .../scoped_allocator.version.pass.cpp | 8 +- .../support.limits.general/set.version.pass.cpp | 32 +- .../shared_mutex.version.pass.cpp | 12 +- .../support.limits.general/span.version.pass.cpp | 16 +- .../support.limits.general/string.version.pass.cpp | 44 +- .../string_view.version.pass.cpp | 20 +- .../support.limits.general/tuple.version.pass.cpp | 20 +- .../type_traits.version.pass.cpp | 68 +- .../unordered_map.version.pass.cpp | 44 +- .../unordered_set.version.pass.cpp | 40 +- .../utility.version.pass.cpp | 36 +- .../variant.version.pass.cpp | 8 +- .../support.limits.general/vector.version.pass.cpp | 28 +- .../version.version.pass.cpp | 626 ++++++++-------- .../support.types/nullptr_t_integral_cast.pass.cpp | 6 +- libcxx/test/support/test_macros.h | 2 + libcxx/utils/ci/Dockerfile | 25 +- libcxx/utils/ci/buildkite-pipeline.yml | 4 +- libcxx/utils/ci/run-buildbot | 6 +- .../generate_feature_test_macro_components.py | 700 +++++++++--------- libcxxabi/src/cxa_personality.cpp | 105 +-- lld/COFF/DebugTypes.cpp | 18 +- lld/COFF/DebugTypes.h | 3 +- lld/MinGW/Driver.cpp | 5 + lld/MinGW/Options.td | 3 + lld/test/COFF/Inputs/precomp-ghash-obj1.obj | Bin 0 -> 3263 bytes lld/test/COFF/Inputs/precomp-ghash-obj2.obj | Bin 0 -> 2413 bytes lld/test/COFF/Inputs/precomp-ghash-precomp.obj | Bin 0 -> 64047 bytes lld/test/COFF/precomp-ghash.test | 53 ++ lld/test/MinGW/driver.test | 9 + lld/test/wasm/debuginfo.test | 6 +- lldb/include/lldb/Utility/ArchSpec.h | 9 + .../Disassembler/LLVMC/DisassemblerLLVMC.cpp | 19 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 14 + .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 12 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 2 +- lldb/source/Utility/ArchSpec.cpp | 9 + lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml | 24 + .../SymbolFile/DWARF/Inputs/subprogram_ranges.s | 159 +++++ .../Shell/SymbolFile/DWARF/subprogram_ranges.test | 19 + .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 6 + llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 4 - llvm/include/llvm/CodeGen/TargetPassConfig.h | 6 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 20 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 22 +- llvm/include/llvm/IR/ValueHandle.h | 20 +- llvm/include/llvm/Option/OptParser.td | 2 + llvm/include/llvm/TableGen/Record.h | 26 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 9 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 6 +- llvm/lib/Analysis/DependenceGraphBuilder.cpp | 131 ++-- llvm/lib/Analysis/LoopAccessAnalysis.cpp | 2 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 22 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 7 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 61 ++ llvm/lib/CodeGen/TargetPassConfig.cpp | 20 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLoc.cpp | 1 - llvm/lib/Frontend/OpenMP/OMPContext.cpp | 10 +- llvm/lib/IR/BasicBlock.cpp | 8 +- llvm/lib/Support/AMDGPUMetadata.cpp | 1 - llvm/lib/TableGen/JSONBackend.cpp | 2 +- llvm/lib/TableGen/Record.cpp | 16 +- llvm/lib/TableGen/TGParser.cpp | 15 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 16 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 2 + llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 15 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 15 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 19 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 23 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 228 +++--- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 16 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 3 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 8 - .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 9 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 5 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 23 +- .../Target/AMDGPU/AMDGPULowerKernelAttributes.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 - .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h | 4 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h | 3 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h | 1 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 7 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 15 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 39 - .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 8 - llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 37 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 9 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 59 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 35 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp | 5 - llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 26 - llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 29 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 31 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 - llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 13 - llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 17 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 20 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 5 - llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 6 - llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 22 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 8 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 5 - .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 - .../AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 12 - .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 18 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 9 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 14 - llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 10 - .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 26 - llvm/lib/Target/AMDGPU/R600Defines.h | 2 - llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 17 - llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 13 - llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 4 - llvm/lib/Target/AMDGPU/R600FrameLowering.h | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 24 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 6 - .../AMDGPU/R600OpenCLImageTypeLoweringPass.cpp | 15 - .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 20 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 - llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 7 - llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 27 - llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp | 2 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 - llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 6 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 62 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 14 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 - llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 38 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 17 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 18 - llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 8 - llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 18 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 13 - llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 17 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 19 - llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 8 +- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 21 +- llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 12 - llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 6 - .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 - llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 27 - llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 4 - llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 7 - llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 3 - llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 19 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 2 - llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 10 - llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 19 - llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 14 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- .../Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp | 6 +- .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 1 - llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 789 +-------------------- llvm/lib/Target/PowerPC/PPCISelLowering.h | 20 +- llvm/lib/Target/PowerPC/PPCSubtarget.h | 3 - llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 15 +- 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.../utils/gn/secondary/clang/lib/Analysis/BUILD.gn | 5 + .../clang/lib/StaticAnalyzer/Core/BUILD.gn | 4 - llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 53 +- mlir/docs/ConversionToLLVMDialect.md | 2 +- mlir/docs/Dialects/LLVM.md | 12 +- mlir/docs/LLVMDialectMemRefConvention.md | 56 +- mlir/docs/SPIRVToLLVMDialectConversion.md | 140 ++-- mlir/docs/Tutorials/Toy/Ch-6.md | 26 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 12 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 12 +- mlir/include/mlir-c/Support.h | 2 +- .../mlir/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.h | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 18 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 4 +- mlir/include/mlir/Dialect/Async/IR/AsyncOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt | 2 + mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 16 + mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 6 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 105 ++- .../mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td | 30 + mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 52 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 4 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 +- .../mlir/Dialect/StandardOps/Transforms/Passes.td | 2 +- mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h | 2 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/IR/ImplicitLocOpBuilder.h | 4 +- mlir/include/mlir/IR/OpDefinition.h | 85 ++- mlir/include/mlir/Pass/PassRegistry.h | 6 +- mlir/include/mlir/Support/IndentedOstream.h | 2 +- .../include/mlir/Target/LLVMIR/ModuleTranslation.h | 16 +- mlir/include/mlir/Target/LLVMIR/TypeTranslation.h | 2 +- mlir/include/mlir/Transforms/Bufferize.h | 2 +- .../Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir | 8 +- .../LLVMIR/CPU/test-vector-reductions-fp.mlir | 16 +- .../LLVMIR/CPU/test-vector-reductions-int.mlir | 62 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Bindings/Python/IRModules.cpp | 2 +- mlir/lib/CAPI/Transforms/Passes.cpp | 2 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 34 +- .../GPUCommon/ConvertKernelFuncToBlob.cpp | 2 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 18 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h | 4 +- .../GPUCommon/IndexIntrinsicsOpLowering.h | 13 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 27 +- mlir/lib/Conversion/PDLToPDLInterp/Predicate.h | 2 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 11 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 49 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 16 +- .../Dialect/Async/Transforms/AsyncParallelFor.cpp | 2 +- mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 1 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 189 ++++- mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp | 50 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 59 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 7 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/TypeDetail.h | 25 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 5 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 2 +- mlir/lib/Dialect/PDL/IR/PDL.cpp | 2 +- mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp | 2 +- .../Linking/ModuleCombiner/ModuleCombiner.cpp | 10 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 3 +- .../Dialect/StandardOps/Transforms/ExpandOps.cpp | 4 +- .../Tosa/Transforms/TosaMakeBroadcastable.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 8 +- mlir/lib/IR/AsmPrinter.cpp | 4 +- mlir/lib/IR/Operation.cpp | 24 + mlir/lib/Rewrite/ByteCode.h | 2 +- mlir/lib/TableGen/TypeDef.cpp | 2 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 8 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 202 +++--- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 14 +- mlir/lib/Target/SPIRV/Serialization.cpp | 2 +- mlir/lib/Transforms/BufferUtils.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 3 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 2 +- mlir/test/Bindings/Python/ir_attributes.py | 2 +- mlir/test/Bindings/Python/ir_operation.py | 6 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 10 +- .../Conversion/GPUCommon/memory-attrbution.mlir | 76 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 70 +- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 58 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 40 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 18 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 14 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 222 +++--- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 20 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 10 +- .../SPIRVToLLVM/control-flow-ops-to-llvm.mlir | 32 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 8 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 4 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../SPIRVToLLVM/lower-host-to-llvm-calls.mlir | 8 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 40 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 22 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../StandardToLLVM/calling-convention.mlir | 14 +- .../StandardToLLVM/convert-argattrs.mlir | 4 +- .../StandardToLLVM/convert-dynamic-memref-ops.mlir | 284 ++++---- .../Conversion/StandardToLLVM/convert-funcs.mlir | 14 +- .../StandardToLLVM/convert-static-memref-ops.mlir | 220 +++--- .../StandardToLLVM/convert-to-llvmir.mlir | 622 ++++++++-------- .../StandardToLLVM/standard-to-llvm.mlir | 42 +- .../VectorToLLVM/vector-mask-to-llvm.mlir | 14 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 378 +++++----- mlir/test/Dialect/GPU/outlining.mlir | 4 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 14 +- mlir/test/Dialect/LLVMIR/func.mlir | 56 +- mlir/test/Dialect/LLVMIR/global.mlir | 78 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 220 +++--- mlir/test/Dialect/LLVMIR/legalize-for-export.mlir | 12 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 74 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 150 ++-- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 286 ++++---- mlir/test/Dialect/LLVMIR/terminator.mlir | 2 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 13 +- mlir/test/Dialect/LLVMIR/types.mlir | 32 +- mlir/test/Dialect/Linalg/llvm.mlir | 62 +- mlir/test/Dialect/OpenMP/ops.mlir | 12 +- mlir/test/Dialect/SPIRV/IR/types.mlir | 4 +- mlir/test/Target/arm-sve.mlir | 6 +- mlir/test/Target/avx512.mlir | 16 +- mlir/test/Target/import.ll | 84 +-- mlir/test/Target/llvmir-intrinsics.mlir | 84 +-- mlir/test/Target/llvmir-invalid.mlir | 13 + mlir/test/Target/llvmir-types.mlir | 24 +- mlir/test/Target/llvmir.mlir | 716 ++++++++++--------- mlir/test/Target/nvvmir.mlir | 50 +- mlir/test/Target/openmp-llvm.mlir | 60 +- mlir/test/Target/rocdl.mlir | 86 +-- mlir/test/Transforms/test-convert-call-op.mlir | 6 +- mlir/test/lib/Transforms/TestConvertCallOp.cpp | 3 +- mlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir | 2 +- mlir/test/mlir-cpu-runner/simple.mlir | 24 +- mlir/test/mlir-tblgen/rewriter-indexing.td | 3 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- openmp/docs/design/Runtimes.rst | 79 +++ openmp/docs/remarks/OptimizationRemarks.rst | 25 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 123 ++-- 633 files changed, 11271 insertions(+), 9307 deletions(-) create mode 100644 clang/include/clang/Analysis/CrossTUAnalysisHelper.h copy clang/include/clang/{StaticAnalyzer/Core/Analyses.def => Analysis/PathDiagnos [...] rename clang/include/clang/{StaticAnalyzer/Core => Analysis}/PathDiagnosticConsume [...] rename clang/lib/{StaticAnalyzer/Core/HTMLDiagnostics.cpp => Analysis/HTMLPathDiag [...] create mode 100644 clang/lib/Analysis/PlistHTMLPathDiagnosticConsumer.cpp rename clang/lib/{StaticAnalyzer/Core/PlistDiagnostics.cpp => Analysis/PlistPathDi [...] rename clang/lib/{StaticAnalyzer/Core/SarifDiagnostics.cpp => Analysis/SarifPathDi [...] rename clang/lib/{StaticAnalyzer/Core/TextDiagnostics.cpp => Analysis/TextPathDiag [...] create mode 100644 clang/test/OpenMP/declare_variant_ast_x86_64.c rename flang/test/Driver/{no_files.f90 => no-files.f90} (100%) rename flang/test/Driver/{version_test.f90 => version-test.f90} (100%) create mode 100644 flang/test/Flang-Driver/code-gen.f90 delete mode 100644 flang/test/Flang-Driver/emit-obj.f90 rename flang/test/Flang-Driver/{macro_def_undef.f90 => macro-def-undef.f90} (100%) rename flang/test/Flang-Driver/{macro_multiline.f90 => macro-multiline.f90} (100%) create mode 100644 flang/test/Flang-Driver/phases.f90 create mode 100644 flang/test/Semantics/acc-declare-validity.f90 rename libcxx/cmake/caches/{Generic-cxx2a.cmake => Generic-cxx20.cmake} (100%) create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj1.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj2.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-precomp.obj create mode 100644 lld/test/COFF/precomp-ghash.test create mode 100644 lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml create mode 100644 lldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s create mode 100644 lldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test create mode 100644 llvm/test/Analysis/DDG/print-dot-ddg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll create mode 100644 llvm/test/MC/WebAssembly/debug-byval-struct.ll create mode 100644 llvm/test/Other/copy-metadata-of-declaration.ll rename {clang/test/CodeGenCoroutines => llvm/test/Transforms/Coroutines}/coro-retc [...] delete mode 100644 llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-assumed-d [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/FoldValueComparisonIntoPredece [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll create mode 100644 llvm/test/tools/llvm-cov/Inputs/branch-c-general.c delete mode 100644 llvm/test/tools/llvm-cov/branch-c-general.c create mode 100644 llvm/test/tools/llvm-cov/branch-c-general.test create mode 100644 llvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj create mode 100644 llvm/test/tools/llvm-pdbutil/unknown-records.test create mode 100644 mlir/include/mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits January 2021