Tcwg-commits December 2020

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig updated (65599015 -> 6bc598ae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 65599015 0: update: qemu-75ee62ac606bfc9eb59310b9446df3434bf6e8c2: boot new 6bc598ae 0: update: linux-2c16816abfdf41e510c7208bf746dcb655345030: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (65599015) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 430 +- 03-build_llvm/console.log | 13105 +++++++++++------------ 04-build_linux/console.log | 774 +- 05-build_abe-qemu/console.log | 6570 ++++++------ 06-boot_linux/console.log | 484 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 12 +- console.log | 21568 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 21633 insertions(+), 21513 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (af3f37319c -> a05f8ecd88)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/qemu. from af3f37319c Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/fo [...] adds a9dc68d9b2 i386: move kvm accel files into kvm/ adds 1fc33bb9f0 i386: move whpx accel files into whpx/ adds 7fdef0d4f2 i386: move hax accel files into hax/ adds dbe59a1991 i386: hvf: remove stale MAINTAINERS entry for old hvf stubs adds 1b248f147e i386: move TCG accel files into tcg/ adds 0c36af8ce8 i386: move cpu dump out of helper.c into cpu-dump.c adds 088567713f i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() adds 735db465b0 i386: move hyperv_interface_id initialization to x86_cpu_rea [...] adds fb7e31aa4f i386: move hyperv_version_id initialization to x86_cpu_realizefn() adds 23eb5d032f i386: move hyperv_limits initialization to x86_cpu_realizefn() adds 40399ecb69 x86/cpu: Add AVX512_FP16 cpu feature adds ed69e8314d i386: move TCG cpu class initialization to tcg/ adds 69483f3115 i386: tcg: remove inline from cpu_load_eflags adds 035ba06c2e tcg: cpu_exec_{enter,exit} helpers adds 80c4750ba8 tcg: make CPUClass.cpu_exec_* optional adds 710384d042 tcg: Make CPUClass.debug_excp_handler optional adds 9fb75013d8 cpu: Remove unnecessary noop methods adds 75ee62ac60 Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-n [...] adds 10b43754cf hw/riscv: sifive_u: Add UART1 DT node in the generated DTB adds dfc973ecc1 hw/riscv: microchip_pfsoc: add QSPI NOR flash adds b3d2a4296f hw/core/register.c: Don't use '#' flag of printf format adds c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV adds 529577457c target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR adds 54a581c228 intc/ibex_plic: Clear interrupts that occur during claim process adds 617448a46b hw/riscv: Expand the is 32-bit check to support more CPUs adds c0a635f397 target/riscv: Add a TYPE_RISCV_CPU_BASE CPU adds dc4d4aaee3 riscv: spike: Remove target macro conditionals adds 09fe17125e riscv: virt: Remove target macro conditionals adds 7893677184 hw/riscv: boot: Remove compile time XLEN checks adds 9d01143063 hw/riscv: virt: Remove compile time XLEN checks adds bd62c13ea8 hw/riscv: spike: Remove compile time XLEN checks adds 2206ffa68f hw/riscv: sifive_u: Remove compile time XLEN checks adds 5b6c291b8d target/riscv: fpu_helper: Match function defs in HELPER macros adds 51ae0cabc6 target/riscv: Add a riscv_cpu_is_32bit() helper function adds 114baaca51 target/riscv: Specify the XLEN for CPUs adds 5c5a47f10c target/riscv: cpu: Remove compile time XLEN checks adds f08c7ff3dc target/riscv: cpu_helper: Remove compile time XLEN checks adds 8987cdc481 target/riscv: csr: Remove compile time XLEN checks adds 094b072c68 target/riscv: cpu: Set XLEN independently from target adds 3ed2b8ac2d hw/riscv: Use the CPU to determine if 32-bit adds d31e970a01 riscv/opentitan: Update the OpenTitan memory layout adds a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] No new revisions were added by this update. Summary of changes: MAINTAINERS | 11 +- accel/tcg/cpu-exec.c | 34 +- hw/core/cpu.c | 13 - hw/core/register.c | 16 +- hw/i386/fw_cfg.c | 2 +- hw/i386/intel_iommu.c | 2 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/clock.c | 2 +- hw/i386/microvm.c | 2 +- hw/i386/pc.c | 2 +- hw/i386/x86.c | 2 +- hw/intc/ibex_plic.c | 13 +- hw/riscv/boot.c | 70 ++-- hw/riscv/microchip_pfsoc.c | 21 ++ hw/riscv/opentitan.c | 81 +++-- hw/riscv/sifive_u.c | 74 ++-- hw/riscv/spike.c | 52 +-- hw/riscv/virt.c | 39 ++- include/hw/riscv/boot.h | 14 +- include/hw/riscv/microchip_pfsoc.h | 3 + include/hw/riscv/opentitan.h | 23 +- include/hw/riscv/spike.h | 6 - include/hw/riscv/virt.h | 6 - meson.build | 1 + target/i386/cpu-dump.c | 537 ++++++++++++++++++++++++++++ target/i386/cpu.c | 75 ++-- target/i386/cpu.h | 97 +----- target/i386/{ => hax}/hax-all.c | 0 target/i386/{ => hax}/hax-cpus.c | 0 target/i386/{ => hax}/hax-cpus.h | 0 target/i386/{ => hax}/hax-i386.h | 6 +- target/i386/{ => hax}/hax-interface.h | 0 target/i386/{ => hax}/hax-mem.c | 0 target/i386/{ => hax}/hax-posix.c | 0 target/i386/{ => hax}/hax-posix.h | 0 target/i386/{ => hax}/hax-windows.c | 0 target/i386/{ => hax}/hax-windows.h | 0 target/i386/hax/meson.build | 7 + target/i386/helper.c | 539 +---------------------------- target/i386/{ => kvm}/hyperv-proto.h | 0 target/i386/{ => kvm}/hyperv-stub.c | 0 target/i386/{ => kvm}/hyperv.c | 0 target/i386/{ => kvm}/hyperv.h | 0 target/i386/{ => kvm}/kvm-stub.c | 0 target/i386/{ => kvm}/kvm.c | 70 ++-- target/i386/{ => kvm}/kvm_i386.h | 0 target/i386/kvm/meson.build | 3 + target/i386/kvm/trace-events | 7 + target/i386/kvm/trace.h | 1 + target/i386/machine.c | 4 +- target/i386/meson.build | 33 +- target/i386/{ => tcg}/bpt_helper.c | 1 + target/i386/{ => tcg}/cc_helper.c | 1 + target/i386/{ => tcg}/cc_helper_template.h | 0 target/i386/{ => tcg}/excp_helper.c | 1 + target/i386/{ => tcg}/fpu_helper.c | 39 ++- target/i386/tcg/helper-tcg.h | 95 +++++ target/i386/{ => tcg}/int_helper.c | 1 + target/i386/{ => tcg}/mem_helper.c | 1 + target/i386/tcg/meson.build | 14 + target/i386/{ => tcg}/misc_helper.c | 14 + target/i386/{ => tcg}/mpx_helper.c | 1 + target/i386/{ => tcg}/seg_helper.c | 1 + target/i386/{ => tcg}/smm_helper.c | 2 + target/i386/{ => tcg}/svm_helper.c | 1 + target/i386/tcg/tcg-cpu.c | 71 ++++ target/i386/tcg/tcg-cpu.h | 15 + target/i386/{ => tcg}/tcg-stub.c | 0 target/i386/{ => tcg}/translate.c | 1 + target/i386/trace-events | 6 - target/i386/whpx/meson.build | 5 + target/i386/{ => whpx}/whp-dispatch.h | 0 target/i386/{ => whpx}/whpx-all.c | 0 target/i386/{ => whpx}/whpx-apic.c | 0 target/i386/{ => whpx}/whpx-cpus.c | 0 target/i386/{ => whpx}/whpx-cpus.h | 0 target/riscv/cpu.c | 84 +++-- target/riscv/cpu.h | 8 + target/riscv/cpu_bits.h | 8 +- target/riscv/cpu_helper.c | 15 +- target/riscv/csr.c | 176 +++++----- target/riscv/fpu_helper.c | 8 - target/riscv/helper.h | 24 +- 83 files changed, 1390 insertions(+), 1073 deletions(-) create mode 100644 target/i386/cpu-dump.c rename target/i386/{ => hax}/hax-all.c (100%) rename target/i386/{ => hax}/hax-cpus.c (100%) rename target/i386/{ => hax}/hax-cpus.h (100%) rename target/i386/{ => hax}/hax-i386.h (95%) rename target/i386/{ => hax}/hax-interface.h (100%) rename target/i386/{ => hax}/hax-mem.c (100%) rename target/i386/{ => hax}/hax-posix.c (100%) rename target/i386/{ => hax}/hax-posix.h (100%) rename target/i386/{ => hax}/hax-windows.c (100%) rename target/i386/{ => hax}/hax-windows.h (100%) create mode 100644 target/i386/hax/meson.build rename target/i386/{ => kvm}/hyperv-proto.h (100%) rename target/i386/{ => kvm}/hyperv-stub.c (100%) rename target/i386/{ => kvm}/hyperv.c (100%) rename target/i386/{ => kvm}/hyperv.h (100%) rename target/i386/{ => kvm}/kvm-stub.c (100%) rename target/i386/{ => kvm}/kvm.c (98%) rename target/i386/{ => kvm}/kvm_i386.h (100%) create mode 100644 target/i386/kvm/meson.build create mode 100644 target/i386/kvm/trace-events create mode 100644 target/i386/kvm/trace.h rename target/i386/{ => tcg}/bpt_helper.c (99%) rename target/i386/{ => tcg}/cc_helper.c (99%) rename target/i386/{ => tcg}/cc_helper_template.h (100%) rename target/i386/{ => tcg}/excp_helper.c (99%) rename target/i386/{ => tcg}/fpu_helper.c (99%) create mode 100644 target/i386/tcg/helper-tcg.h rename target/i386/{ => tcg}/int_helper.c (99%) rename target/i386/{ => tcg}/mem_helper.c (99%) create mode 100644 target/i386/tcg/meson.build rename target/i386/{ => tcg}/misc_helper.c (97%) rename target/i386/{ => tcg}/mpx_helper.c (99%) rename target/i386/{ => tcg}/seg_helper.c (99%) rename target/i386/{ => tcg}/smm_helper.c (99%) rename target/i386/{ => tcg}/svm_helper.c (99%) create mode 100644 target/i386/tcg/tcg-cpu.c create mode 100644 target/i386/tcg/tcg-cpu.h rename target/i386/{ => tcg}/tcg-stub.c (100%) rename target/i386/{ => tcg}/translate.c (99%) create mode 100644 target/i386/whpx/meson.build rename target/i386/{ => whpx}/whp-dispatch.h (100%) rename target/i386/{ => whpx}/whpx-all.c (100%) rename target/i386/{ => whpx}/whpx-apic.c (100%) rename target/i386/{ => whpx}/whpx-cpus.c (100%) rename target/i386/{ => whpx}/whpx-cpus.h (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (09d0e7a7c15 -> 7fef551cb12)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/llvm-project. from 09d0e7a7c15 [X86] Avoid %fs:(%eax) references in x32 mode adds 8a3c41be94c [IR] Fixed the typo in attributes test adds f31e9bcd73e Test commit: add valid punctuation to a comment. NFC. adds 1844ab770cb [ASTImporter] Add support for importing GenericSelectionExp [...] adds 35ec3ff76de Disable Jump Threading for the targets with divergent control flow adds 687e80be7fc [MBP] Add whole chain to BlockFilterSet instead of individual BB adds ac068e014b2 [CSSPGO] Consume pseudo-probe-based AutoFDO profile adds 907886cc5b3 [OpenMP][Libomptarget][NFC] Use CMake Variables adds 672cdc84d20 [gn build] Port ac068e014b2 adds b17a1815636 [mlir] Modify linalg loops test to have nested regions adds ddffcdf0a66 [clang-tidy] Add a diagnostic callback to parseConfiguration adds 4c8c6368710 [test] Cleanup some CGSCCPassManager tests adds f48dae31086 [gn build] (manually) port ddffcdf0a66 adds 2e6e4e6aeef [OpenMP] Add initial support for `omp [begin/end] assumes` adds 50aaa8c2749 [Debugify] Support checking Machine IR debug info Add mir-c [...] adds c1d6d461aa7 [RISCV] Define vle/vse intrinsics. adds f333736757e AMDGPU: Remove SGPRSpillVGPRDefinedSet hack adds f03609b5c75 [RISCV] V does not imply F. adds dd5281e7cce [RISCV] Define vector mul/div/rem intrinsics. adds a5e4a513b04 [RISCV] Define vector widening mul intrinsics. adds 1e42ad9d629 Revert "[Debugify] Support checking Machine IR debug info" adds 0d7dd026c89 [RISCV] Infer mask type for vector intrinsics from the data type adds fce9dd6b252 [mlir][NFC] Remove StandardTypes.h now that all usages poin [...] adds 541e476fc06 [RISCV] Infer mask type from data type for vector vle and v [...] adds ed1e565aaff [NFC] factor update test function test builder as a class adds 5501b929576 [IR, CodeGen] Use llvm::is_contained (NFC) adds 4ad5b634f68 [GCN] Remove unused function handleNewInstruction (NFC) adds 39584ae5b5c [Debugify] Support checking Machine IR debug info Add mir-c [...] adds a906e3eccd1 [NFC][SampleFDO] Preparation to support multiple sections w [...] adds c70f36865e0 Use basic_string::find(char) instead of basic_string::find( [...] adds ebdd20f430c Expand the fp_to_int/int_to_fp/fp_round/fp_extend as libcal [...] adds 96076a2edbd [mlir] Support index and memref types in llvm.mlir.cast adds 8666b9057f2 [lldb] [POSIX-DYLD] Add libraries from initial rendezvous b [...] adds dbfdb139f75 [lldb] [POSIX-DYLD] Update the cached exe path after attach adds 7f19712a6a9 [clang][nfc] Update comment to match the opening `{` adds eba09a2db9e [InstCombine] Preserve !annotation for newly created instructions. adds 7f8779e4e66 [llvm][AArch64] Actually check expected FPU for CPUs adds db41c0b357d [clang-format] PR35514 brace-init member initializers in fu [...] adds a4e47cd1857 [Flang][openmp]Fix crash in OpenMP semantic check( bug 48308) adds 722247c8124 [lldb] Unify the two CreateTypedef implementations in TypeS [...] adds 352cba2441c [libc] add back math.h #include utils/FPUtil/ManipulationFu [...] adds cdb692ee0c6 [X86] Add X86ISD::SUBV_BROADCAST_LOAD and begin removing X8 [...] adds 92310454bf0 Make LLVM build in C++20 mode adds b8338983e6f [lldb] Add std::array to the supported template list of the [...] adds e71a4cc2078 fix a -Wunused-variable warning in release build adds 931e66bd899 [X86] Remove extract_subvector(subv_broadcast_load()) fold. adds 9ed8e0caab9 [NFC] Reduce include files dependency and AA header cleanup [...] adds 6d2a78996be [SVE][CodeGen] Add bfloat16 support to scalable masked gather adds c2751250f33 [mlir] partially update LLVM dialect documentation adds ccdd8c77594 [mlir] Move LLVM Dialect Op documentation to ODS adds 08a00c6f43c [libcxx] Remove ifdefs in the message to static_assert. NFC. adds 7c504b6dd06 [AArch64] Renamed sve-masked-scatter-legalise.ll. NFC. adds 894c4761c67 [clangd] Add llvm:: qualifier to work around GCC bug. NFC adds 2d6b1e9b5f3 [DebugInfo] Fix MSVC build by adding back necessary reverse [...] adds 1fd3a047759 [LV] Disable epilogue vectorization for scalable VFs adds 56440359d09 [lldb] [unittests] Add tests for NetBSD register offsets/sizes adds 37f99a56065 [lldb] [unittests] Filter FreeBSD through CMake rather than #ifdef adds eb4917d121e [mlir] Fix syntax error in markdown documentation adds e7a3c4c11e8 [lldb-vscode] Speculative fix for raciness in TestVSCode_attach adds deae7e982a3 [libc] revamp memory function benchmark adds 29077ae860b [IRBuilder] Generalize debug loc handling for arbitrary metadata. adds b5bbb4b2b75 [NFC][AArch64] Move AArch64 MSR/MRS into a new decoder namespace adds 83ea17fc5f7 [NFC][AArch64] Capturing multiple feature requirements in A [...] adds 42b92b31b8b [ARM][AArch64] Adding basic support for the v8.7-A architecture adds 97c006aabb6 [AArch64] Add a GPR64x8 register class adds 313889191ea [AArch64] Adding the v8.7-A LD64B/ST64B Accelerator extension adds c4d851b0790 [ARM][AAarch64] Initial command-line support for v8.7-A adds c5046ebdf6e [ARM] Adding v8.7-A command-line support for the ARM target adds 811444d7a17 [lld-macho] Add support for weak references adds 4c8276cdc12 [lld-macho] Use LC_LOAD_WEAK_DYLIB for dylibs with only weakrefs adds 01383999037 [InstCombine] Remove scalable vector restriction in InstCom [...] adds 75c04bfc61d [SimplifyCFG] Preserve !annotation in FoldBranchToCommonDest. adds 64badecd447 [clang-tidy][NFC] Reduce copies of Intrusive..FileSystem adds ef9dc51cd4a [obj2yaml][yaml2obj] - Add AArch64 STO_AARCH64_VARIANT_PCS support adds e04dc5f557c [llvm-readobj/elf] - AArch64: Handle AARCH64_VARIANT_PCS fo [...] adds 978eb3b87bc [lld] [ELF] AArch64: Handle DT_AARCH64_VARIANT_PCS adds 5e31e226b5b Remove Python2 fallback and only advertise Python3 in the doc adds cfe096d1f68 Fix dead link adds b9890ae1976 [TableGen] Make InstrMap::getFilterClass() const. NFCI. adds 923ca0b411f [ARM][MachineOutliner] Fix costs model. adds 01089c876bf [InstCombine] Preserve !annotation on newly created instructions. adds bd343d26814 [TableGen] Return const std::string& in InstrMap getName()/ [...] adds fb0f7288051 [Clang] Make nomerge attribute a function attribute as well [...] adds 36bf2de8d86 [flang][openacc] Update serial construct clauses for OpenACC 3.1 adds 4bb10be9a6e [SampleFDO] Fix uninitialized field warnings. NFCI. adds 7e13694ac74 [llvm-symbolizer][Windows] Add start line when searching in [...] adds d20e0c3444a Ensure SplitEdge to return the new block between the two gi [...] adds 01178654121 [mlir][spirv] NFC: Shuffle code around to better follow convention adds daf39e3f2db [amdgpu] Default to code object v3 adds ab6cb31642f [PowerPC][NFC] Cleanup PPCCTRLoopsVerify pass adds df2b9a3e02c [DebugInfo] Avoid re-ordering assignments in LCSSA adds 71699a998d4 [flang][openacc] Enforce restriction on routine directive a [...] adds f5006629247 Detect section type conflicts between functions and variables adds 122a4ebde3f Revert "[lldb] Make CommandInterpreter's execution context [...] adds bf03eba1f99 [libc] Refactor WrapperGen to make the flow cleaner. adds 17b3ff511c0 [libc] Add python3 to libc buildbot depedencies. adds 9ead4e7b4a6 [lldb] [Process/FreeBSDRemote] Replace GetRegisterSetCount() adds 835f8de8508 [lldb] [Process/FreeBSDRemote] Use RegSetKind consistently [NFC] adds e1a5b234ef9 [libc][Obvious] Fix typo is wrappergen unittest. adds 780741107e6 [LangRef] Update new ssp/sspstrong/sspreq semantics after D91816 adds c1f30e58179 [gn build] Add symbol_level to adjust debug info level adds dae34463e3e [IRSim][IROutliner] Adding the extraction basics for the IR [...] adds 23d183f1905 [gn build] Port dae34463e3e adds 4a327bd2528 Add call site location getter to C API adds 1dbf2c96bce [scudo][standalone] Allow the release of smaller sizes adds c2892978e91 [PowerPC] Rename the vector pair intrinsics and builtins to [...] adds a48172cf1c1 Add brief description of dialects doc section. adds e22d802e587 scudo: Adjust test to use correct check for primary allocations. adds e1fd202489e [OpenMP] Add definitions for 5.1 interop to omp.h adds cb77e877f81 [WebAssembly][lld] Don't mark a file live from an undefine symbol adds f4c8b803180 [openmp] Remove clause from OMPKinds.def and use OMP.td info adds 14f24155a59 [mlir][LLVMIR] Add 'llvm.switch' op adds 8c6d516286d [NFC][AMDGPU] Reorganize description of scratch handling adds 58f2b765ebe Fix NDEBUG build after https://reviews.llvm.org/D93005. adds 7529fab602c [test] Factor out creation of copy of SCC Nodes into function adds 1b84934f908 [DSE] Add more tests for read clobber location (NFC) adds 85ffbe5d6a0 [gn build] (manually) merge f4c8b8031800 adds 106e66f3f55 [mlir][ArmSVE] Add documentation generation adds e75fec2b238 [AttrDocs] document always_inline adds 994bb6eb7d0 [OpenMP][NFC] Provide a new remark and documentation adds 7e33fd9ce2d [gn build] Link with -Wl,--gdb-index when linking with LLD adds 49c248bd62a clang-cl: Remove /Zd flag adds 0efb0dd9780 [mlir] Partially update the conversion-to-llvm document adds 511cfe94419 Revert "Ensure SplitEdge to return the new block between th [...] adds 1b97cdf885d [mlir][IR][NFC] Move context/location parameters of builtin [...] adds f710bb7063b lld: Replace some lld::outs()s with message() adds 6340f890bb8 [libc++] Fix extern C for __sanitizer_annotate_contiguous_c [...] adds c755e41c336 Fix -Wno-error= parsing in clang-format. adds 164e0847a59 [SimplifyCFG] DeleteDeadBlock() already knows how to preser [...] adds 2ee724863e9 [SimplifyCFG] ConstantFoldTerminator() already knows how to [...] adds 2d07414ee5f [SimplifyCFG] Teach simplifyUnreachable() to preserve DomTree adds 71a1b9fe76a [VectorCombine] add tests for gep load with cast; NFC adds 3203143f135 CodeGen: Improve generated IR for __builtin_mul_overflow(ui [...] adds 3d56644f18e [DSE] Add test for potential caching bug (NFC) adds de031216bf1 [mlir] Add canonicalization from `tensor_cast` to `dim` op. adds 118a7156546 [mlir][Linalg] Define a linalg.init_tensor operation. adds a555ca8b3d6 Workaround around clang 5.0 bug by including SmallVector.h [...] adds 129d6e554e7 [mlir] Move `std.tensor_cast` -> `tensor.cast`. adds 9887097d802 Remove unneeded header include (NFC) adds 14da25b4b2e [mlir][sparse] scalarize reductions in for-loops during spa [...] adds ab1a05d57f6 Revert "[sanitizer-common] Pickup llvm-symbolizer from $OUT [...] adds 13261f4c034 Revert "[sanitizer-common] Force pickup of llvm-symbolizer [...] adds 4b07c515ef4 [RISCV] Define vlse/vsse intrinsics. adds fc5cf50e892 [mlir] Remove the MutableDictionaryAttr class adds cea807602a2 [IRSim][IROutliner] Adding InstVisitor to disallow certain [...] adds cc1cf6332a3 [lld-macho] Implement option: -undefined TREATMENT adds 2808f597f87 [clangd] Print .clang-tidy configuration parsing errors usi [...] adds 385e9a2a047 [DAGCombiner] Improve shift by select of constant adds ee2cb90e3bb [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics. adds 3733463dbb5 [IR][PGO] Add hot func attribute and use hot/cold attribute [...] adds f6b577ed5bf [flang] Fix -intrinsic-module-directory in flang script adds 31c0b8700b4 Fix clang-ppc64le-rhel buildbot build error adds 7087ae7be9f [RISCV] Remove NoVReg to avoid compile warning messages. adds b6211167161 [Transforms] Use llvm::erase_if (NFC) adds ed6a135246f [IVDescriptors] Remove getConsecutiveDirection (NFC) adds d4ec3346b1b [lld-macho][nfc] Refactor to accommodate paired relocs adds d3bf0bb1895 PR24076, PR33655, C++ CWG 1558: Consider the instantiation- [...] adds f0e3d1d6ca8 [IndVars] Fix adding trunc instructions to unwind blocks adds 93fd52329fe [NFC][utils] Factor remaining APIs under FunctionTestBuilder adds fdd6ed8e934 [LLD] Rename lld port driver entry function to a consistent name adds d599ed49b35 [libc][NFC] Use ASSERT_FP_EQ to comapre NaN values in tests. adds 638867afd4b DR2064: decltype(E) is only a dependent type if E is type-d [...] adds 71886c56f33 Where possible, don't try to ask whether a template argumen [...] adds 4b388859f52 Ensure that we transform types into the current instantiati [...] adds 477b6505fa1 [PowerPC] Select the D-Form load if we know its offset meet [...] adds 8c1f2d15b82 Following up on PR48517, fix handling of template arguments [...] adds caeb56503ec [clang][cli] Convert Analyzer option string based options t [...] adds 2d9ae1d2178 [libc][NFC] Use `#include <math.h>` in utils/FPUtil/Manipul [...] adds f4511aec2bf [clang][cli] Port HeaderSearch simple string options to new [...] adds 9895c7012d6 [InlineCost] Implement cost-benefit-based inliner adds ff4b76d74f3 [clang][cli] Port TargetOpts simple string based options to [...] adds aec2991d083 [clang][cli] Port LangOpts simple string based options to n [...] adds d1b3f82e513 [clang][cli] Port PreprocessorOpts simple string based opti [...] adds 333d41e9eb8 [clang][cli] Port FrontendOpts simple string based options [...] adds 9e08e51a20d [c++20] P1907R1: Support for generalized non-type template [...] adds 569676c0572 Make Expr::HasSideEffect more precise for instantiation-dep [...] adds e83e0cac041 [libcxx] Make filesystem::path::value_type wchar_t on windows adds 48c6500b5bf [libcxx] Reorder the two u8path functions, to make the foll [...] adds de698ae7344 [libcxx] Convert paths to/from the right narrow code page f [...] adds 156180727d6 [libcxx] Fix the preexisting directory_iterator code for windows adds 95d3cc67caa [clang][cli] Port CodeGenOpts simple string flags to new op [...] adds 7d246cb19db [flang][driver] Add support for `-fsyntax-only` adds 324d96b6375 [IndVars] A test for adding trunc instructions to unwind blocks adds a89d751fb40 Add intrinsics for saturating float to int casts adds 98993193e90 [clangd] Add hot-reload of compile_commands.json and compil [...] adds 7c8796f9db2 [TTI] Add supportsScalableVectors target hook adds b58b440d19c [AMDGPU][NFC] Document high parameter of f16 interp intrinsics adds da21f7ec146 [AArch64] Add support for the Branch Record Buffer extension adds 51fe17b0471 [AArch64] Add support for the SPE-EEF feature adds 7722494834a [AMDGPU][NFC] Remove unused Hi16Elt definition adds 992fad03e27 [X86][AVX] Replace extract_subvector(broadcast(), 0) folds [...] adds 52e4084d9c3 [SVE][CodeGen] Vector + immediate addressing mode for maske [...] adds c15c2965211 [lldb/test] Reduce boilerplate in lldb-server tests adds e35f9229dcb [clangd] Ignore the static index refs from the dynamic inde [...] adds e69e551e0e5 new altera single work item barrier check adds 430d5d84294 [LLDB] Unbreak the build after recent clang changes adds 2d2498ec6c4 No longer reject tag declarations in the clause-1 of a for loop. adds 07622b696f3 [gn build] Port e69e551e0e5 adds c0bc169cb17 [NFC][SVE] Clean up bfloat isel patterns that emit non-bflo [...] adds fc712eb7aa0 [AArch64] Fix Copy Elemination for negative values adds 6e913e44519 Revert "[ARM] Match dual lane vmovs from insert_vector_elt" adds 8590b5ccd56 [libObject, llvm-readobj] - Reimplement `ELFFile<ELFT>::getEntry`. adds 0336ff0a17e [clangd] Fix broken JSON test on windows adds 47aaa99c0e1 [VectorCombine] allow peeking through GEPs when creating a [...] adds c46c7c9bcf9 [clangd] Smarter hover on auto and decltype adds 95c7b6cadbc [clangd] zap a few warnings adds db2195bc5b3 [flang][driver] Rename unittest file (nfc) adds 8767f3bb972 [X86][AVX] Remove X86ISD::SUBV_BROADCAST (PR38969) adds 1a9577bde1d [AArch64] Add support for ls64 to the .arch_extension asm d [...] adds 91593e461a2 [AArch64] Updating .arch_extension negative tests adds 94da2cf650d [X86] Avoid std::string creation in RecognizableInstr const [...] adds fd0f5fb8de2 PEI: Only call updateLiveness once per function adds 4652718ee38 Cleanup coro-inline.ll adds e1c1adf9dc1 [ARM] Match dual lane vmovs from insert_vector_elt adds b88ed4ec8e7 [mlir][Linlag] Reflow Linalg.md - NFC adds 22c1bd57bf3 [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC adds 06d5b1c9ad5 [SROA] Remove Dead Instructions while creating speculative [...] adds 698ae90f306 [RegisterScavenging] Fix assert in scavengeRegisterBackwards adds ce94e7d867a [MCA, ExecutionEngine, Object] Use llvm::is_contained (NFC) adds 2a814cd9e1e Ensure SplitEdge to return the new block between the two gi [...] adds 7fef551cb12 Revert "Revert "[FPEnv] Teach the IRBuilder about invoke's [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clang-tidy/ClangTidy.cpp | 20 +- clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 17 + clang-tools-extra/clang-tidy/ClangTidyOptions.h | 6 + .../clang-tidy/altera/AlteraTidyModule.cpp | 3 + clang-tools-extra/clang-tidy/altera/CMakeLists.txt | 1 + .../altera/SingleWorkItemBarrierCheck.cpp | 84 + .../clang-tidy/altera/SingleWorkItemBarrierCheck.h | 40 + .../clang-tidy/modernize/MakeSmartPtrCheck.cpp | 2 +- .../clang-tidy/tool/ClangTidyMain.cpp | 2 +- clang-tools-extra/clangd/AST.cpp | 3 +- clang-tools-extra/clangd/AST.h | 1 + clang-tools-extra/clangd/ClangdLSPServer.cpp | 10 +- clang-tools-extra/clangd/DumpAST.cpp | 1 + clang-tools-extra/clangd/FindTarget.cpp | 1 + .../clangd/GlobalCompilationDatabase.cpp | 297 +- .../clangd/GlobalCompilationDatabase.h | 28 +- clang-tools-extra/clangd/Headers.h | 2 +- clang-tools-extra/clangd/Hover.cpp | 92 +- clang-tools-extra/clangd/TidyProvider.cpp | 22 +- clang-tools-extra/clangd/index/FileIndex.cpp | 9 +- clang-tools-extra/clangd/index/Index.cpp | 5 + clang-tools-extra/clangd/index/Index.h | 9 + clang-tools-extra/clangd/index/MemIndex.cpp | 12 + clang-tools-extra/clangd/index/MemIndex.h | 17 + clang-tools-extra/clangd/index/Merge.cpp | 19 +- clang-tools-extra/clangd/index/Merge.h | 2 + clang-tools-extra/clangd/index/ProjectAware.cpp | 11 + clang-tools-extra/clangd/index/dex/Dex.cpp | 11 + clang-tools-extra/clangd/index/dex/Dex.h | 15 + clang-tools-extra/clangd/index/remote/Client.cpp | 9 + .../clangd/refactor/tweaks/ExpandAutoType.cpp | 2 +- clang-tools-extra/clangd/tool/Check.cpp | 10 +- .../clangd/unittests/CodeCompleteTests.cpp | 5 + clang-tools-extra/clangd/unittests/DexTests.cpp | 14 + .../unittests/GlobalCompilationDatabaseTests.cpp | 141 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 374 +- clang-tools-extra/clangd/unittests/IndexTests.cpp | 65 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 12 + clang-tools-extra/clangd/unittests/TestFS.cpp | 5 +- clang-tools-extra/docs/ReleaseNotes.rst | 6 + .../checks/altera-single-work-item-barrier.rst | 58 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../checkers/altera-single-work-item-barrier.cpp | 300 ++ .../unittests/clang-tidy/CMakeLists.txt | 1 + .../unittests/clang-tidy/ClangTidyOptionsTest.cpp | 97 + clang/CMakeLists.txt | 15 +- clang/docs/ClangFormat.rst | 13 +- clang/docs/LibASTMatchersReference.html | 5 + clang/docs/ReleaseNotes.rst | 8 + clang/include/clang/AST/ASTContext.h | 5 +- clang/include/clang/AST/ASTFwd.h | 6 +- clang/include/clang/AST/ASTTypeTraits.h | 10 +- clang/include/clang/AST/Attr.h | 15 + clang/include/clang/AST/DependenceFlags.h | 6 + clang/include/clang/AST/Expr.h | 14 +- clang/include/clang/AST/OpenMPClause.h | 22 +- clang/include/clang/AST/PropertiesBase.td | 12 + clang/include/clang/AST/RecursiveASTVisitor.h | 16 +- clang/include/clang/AST/StmtIterator.h | 9 +- clang/include/clang/AST/TemplateArgumentVisitor.h | 2 + clang/include/clang/AST/TemplateBase.h | 53 +- clang/include/clang/AST/Type.h | 27 +- clang/include/clang/ASTMatchers/ASTMatchers.h | 4 + clang/include/clang/Basic/Attr.td | 10 +- clang/include/clang/Basic/AttrDocs.td | 25 +- clang/include/clang/Basic/BuiltinsPPC.def | 165 +- clang/include/clang/Basic/CodeGenOptions.h | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 - .../include/clang/Basic/DiagnosticFrontendKinds.td | 2 - clang/include/clang/Basic/DiagnosticParseKinds.td | 10 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 5 - clang/include/clang/Driver/Options.td | 341 +- clang/include/clang/Parse/Parser.h | 7 + clang/include/clang/Sema/Sema.h | 42 +- .../include/clang/Serialization/ASTRecordWriter.h | 1 + .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 3 +- clang/lib/AST/ASTContext.cpp | 13 +- clang/lib/AST/ASTImporter.cpp | 48 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 22 + clang/lib/AST/ASTTypeTraits.cpp | 42 +- clang/lib/AST/ComputeDependence.cpp | 13 +- clang/lib/AST/Decl.cpp | 4 + clang/lib/AST/Expr.cpp | 41 +- clang/lib/AST/ExprCXX.cpp | 11 +- clang/lib/AST/ExprConstant.cpp | 101 +- clang/lib/AST/ItaniumMangle.cpp | 52 +- clang/lib/AST/MicrosoftMangle.cpp | 11 + clang/lib/AST/ODRHash.cpp | 2 + clang/lib/AST/OpenMPClause.cpp | 19 +- clang/lib/AST/StmtProfile.cpp | 11 +- clang/lib/AST/TemplateBase.cpp | 126 +- clang/lib/AST/Type.cpp | 46 +- clang/lib/AST/TypeLoc.cpp | 1 + clang/lib/ASTMatchers/ASTMatchersInternal.cpp | 2 + clang/lib/ASTMatchers/Dynamic/Marshallers.cpp | 5 +- clang/lib/ASTMatchers/Dynamic/Marshallers.h | 5 +- clang/lib/ASTMatchers/Dynamic/Registry.cpp | 1 + clang/lib/Analysis/ExprMutationAnalyzer.cpp | 4 - clang/lib/Basic/Module.cpp | 2 +- clang/lib/Basic/Targets/AArch64.cpp | 14 + clang/lib/Basic/Targets/AArch64.h | 3 + clang/lib/Basic/Targets/ARM.cpp | 2 + clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/CodeGen/CGBuiltin.cpp | 67 +- clang/lib/CodeGen/CGCall.cpp | 16 +- clang/lib/CodeGen/CGDebugInfo.cpp | 8 + clang/lib/CodeGen/CGExprConstant.cpp | 10 +- clang/lib/CodeGen/CodeGenModule.cpp | 6 +- clang/lib/CodeGen/TargetInfo.cpp | 2 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 2 +- clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 5 +- clang/lib/Driver/ToolChains/Clang.cpp | 7 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 2 +- clang/lib/Driver/ToolChains/MSVC.cpp | 3 +- clang/lib/Format/UnwrappedLineParser.cpp | 7 + clang/lib/Frontend/CompilerInvocation.cpp | 545 +-- clang/lib/Index/USRGeneration.cpp | 4 + clang/lib/Parse/ParseOpenMP.cpp | 121 + clang/lib/Sema/SemaAttr.cpp | 5 +- clang/lib/Sema/SemaChecking.cpp | 4 +- clang/lib/Sema/SemaConcept.cpp | 23 +- clang/lib/Sema/SemaDecl.cpp | 11 +- clang/lib/Sema/SemaDeclAttr.cpp | 11 +- clang/lib/Sema/SemaExpr.cpp | 4 + clang/lib/Sema/SemaExprCXX.cpp | 3 +- clang/lib/Sema/SemaLambda.cpp | 4 + clang/lib/Sema/SemaLookup.cpp | 1 + clang/lib/Sema/SemaOpenMP.cpp | 80 + clang/lib/Sema/SemaOverload.cpp | 19 +- clang/lib/Sema/SemaStmt.cpp | 24 +- clang/lib/Sema/SemaTemplate.cpp | 277 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 94 +- clang/lib/Sema/SemaTemplateInstantiate.cpp | 16 +- clang/lib/Sema/SemaTemplateVariadic.cpp | 2 + clang/lib/Sema/SemaType.cpp | 4 +- clang/lib/Sema/TreeTransform.h | 28 +- clang/lib/Serialization/ASTReader.cpp | 7 +- clang/lib/Serialization/ASTWriter.cpp | 6 +- .../Checkers/GenericTaintChecker.cpp | 5 +- .../generic-selection-expr/Inputs/generic.c | 6 + .../generic-selection-expr/Inputs/generic.cpp | 5 + clang/test/ASTMerge/generic-selection-expr/test.c | 3 + .../test/ASTMerge/generic-selection-expr/test.cpp | 3 + clang/test/CXX/drs/dr15xx.cpp | 14 + clang/test/CXX/drs/dr20xx.cpp | 12 + clang/test/CodeGen/attr-nomerge.cpp | 98 +- clang/test/CodeGen/attributes.c | 21 +- clang/test/CodeGen/builtins-overflow.c | 51 +- clang/test/CodeGen/builtins-ppc-mma.c | 1197 ----- clang/test/CodeGen/builtins-ppc-pair-mma.c | 1197 +++++ clang/test/CodeGen/exceptions-strictfp.c | 37 + clang/test/CodeGenCXX/auto-var-init.cpp | 108 +- clang/test/CodeGenCXX/mangle-ms-templates.cpp | 10 + clang/test/CodeGenCXX/mangle-template.cpp | 60 +- clang/test/CodeGenCXX/template-arguments.cpp | 81 + clang/test/Driver/aarch64-cpus.c | 22 + clang/test/Driver/aarch64-ls64.c | 12 + clang/test/Driver/arm-cortex-cpus.c | 17 + clang/test/Driver/cl-options.c | 4 - clang/test/Driver/hip-code-object-version.hip | 2 +- clang/test/Format/error-config.cpp | 11 + ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/OpenMP/assumes_codegen.cpp | 165 + clang/test/OpenMP/assumes_include_nvptx.cpp | 70 + clang/test/OpenMP/assumes_messages.c | 69 + clang/test/OpenMP/assumes_print.cpp | 44 + clang/test/OpenMP/assumes_template_print.cpp | 91 + .../OpenMP/distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- .../distribute_simd_dist_schedule_messages.cpp | 2 +- ...ks_parallel_in_multiple_target_state_machines.c | 4 +- .../remarks_parallel_in_target_state_machine.c | 2 +- .../target_parallel_for_simd_collapse_messages.cpp | 2 +- .../target_parallel_for_simd_ordered_messages.cpp | 2 +- .../test/OpenMP/target_simd_collapse_messages.cpp | 2 +- ...get_teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/OpenMP/target_update_from_messages.cpp | 2 +- clang/test/OpenMP/target_update_to_messages.cpp | 2 +- clang/test/OpenMP/task_messages.cpp | 4 +- .../teams_distribute_dist_schedule_messages.cpp | 2 +- ...tribute_parallel_for_dist_schedule_messages.cpp | 2 +- ...te_parallel_for_simd_dist_schedule_messages.cpp | 2 +- ...eams_distribute_simd_dist_schedule_messages.cpp | 2 +- clang/test/Preprocessor/arm-target-features.c | 5 + clang/test/Profile/c-generate.c | 2 +- clang/test/Sema/attr-nomerge.cpp | 6 +- clang/test/Sema/attr-section.c | 20 +- clang/test/Sema/for.c | 10 +- clang/test/Sema/invalid-bitwidth-expr.mm | 1 + clang/test/Sema/ppc-mma-types.c | 335 -- clang/test/Sema/ppc-pair-mma-types.c | 335 ++ clang/test/SemaCXX/attr-section.cpp | 6 + .../SemaCXX/invalid-template-base-specifier.cpp | 4 +- clang/test/SemaCXX/ppc-mma-types.cpp | 384 -- clang/test/SemaCXX/ppc-pair-mma-types.cpp | 384 ++ clang/test/SemaCXX/warn-unused-lambda-capture.cpp | 2 +- clang/test/SemaObjC/method-attributes.m | 15 + clang/test/SemaTemplate/class-template-decl.cpp | 14 + clang/test/SemaTemplate/dependent-expr.cpp | 7 +- .../test/SemaTemplate/instantiate-static-local.cpp | 27 + .../test/SemaTemplate/instantiation-dependence.cpp | 74 + .../test/SemaTemplate/partial-spec-instantiate.cpp | 18 +- clang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp | 513 +++ clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp | 505 --- clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp | 80 +- .../test/SemaTemplate/temp_arg_template_cxx1z.cpp | 8 +- clang/tools/clang-format/ClangFormat.cpp | 31 +- clang/tools/libclang/CIndex.cpp | 10 +- clang/tools/libclang/CXCursor.cpp | 3 + clang/tools/scan-build-py/README.md | 2 +- clang/tools/scan-build/bin/set-xcode-analyzer | 4 +- clang/unittests/AST/ASTImporterTest.cpp | 39 + clang/unittests/AST/StructuralEquivalenceTest.cpp | 66 + .../unittests/ASTMatchers/ASTMatchersNodeTest.cpp | 5 + clang/unittests/Format/FormatTest.cpp | 27 +- clang/utils/TableGen/ClangAttrEmitter.cpp | 4 +- clang/utils/TableGen/NeonEmitter.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 8 +- clang/www/cxx_dr_status.html | 4 +- compiler-rt/lib/scudo/standalone/primary32.h | 12 +- compiler-rt/lib/scudo/standalone/primary64.h | 19 +- compiler-rt/lib/scudo/standalone/release.h | 61 +- .../lib/scudo/standalone/tests/combined_test.cpp | 24 +- .../test/sanitizer_common/lit.common.cfg.py | 7 - .../test/sanitizer_common/lit.site.cfg.py.in | 1 - flang/include/flang/Frontend/CompilerInstance.h | 25 + flang/include/flang/Frontend/FrontendActions.h | 4 + flang/include/flang/Frontend/FrontendOptions.h | 10 +- flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- flang/include/flang/Parser/dump-parse-tree.h | 3 +- flang/include/flang/Parser/parse-tree.h | 17 +- flang/lib/Frontend/CMakeLists.txt | 2 + flang/lib/Frontend/CompilerInstance.cpp | 14 +- flang/lib/Frontend/CompilerInvocation.cpp | 3 + flang/lib/Frontend/FrontendActions.cpp | 32 + .../lib/FrontendTool/ExecuteCompilerInvocation.cpp | 3 + flang/lib/Lower/ConvertType.cpp | 4 +- flang/lib/Lower/IntrinsicCall.cpp | 18 +- flang/lib/Lower/RTBuilder.h | 22 +- flang/lib/Optimizer/Dialect/FIROps.cpp | 7 +- flang/lib/Parser/openacc-parsers.cpp | 15 +- flang/lib/Parser/unparse.cpp | 11 +- flang/lib/Semantics/check-acc-structure.cpp | 12 + flang/lib/Semantics/check-omp-structure.h | 4 +- flang/lib/Semantics/resolve-directives.cpp | 77 +- flang/test/Flang-Driver/syntax-only.f90 | 9 + flang/test/Semantics/acc-clause-validity.f90 | 182 +- flang/test/Semantics/acc-routine-validity.f90 | 79 + .../test/Semantics/omp-no-dowhile-in-parallel.f90 | 28 + flang/tools/f18/CMakeLists.txt | 24 +- flang/tools/f18/flang | 15 + flang/tools/f18/flang.sh.in | 29 - flang/unittests/Frontend/CMakeLists.txt | 2 +- flang/unittests/Frontend/FrontendActionTest.cpp | 135 + flang/unittests/Frontend/PrintPreprocessedTest.cpp | 79 - libc/benchmarks/CMakeLists.txt | 62 +- libc/benchmarks/JSON.cpp | 179 +- libc/benchmarks/JSON.h | 4 +- libc/benchmarks/JSONTest.cpp | 139 +- libc/benchmarks/LibcBenchmark.h | 8 +- libc/benchmarks/LibcMemoryBenchmark.cpp | 36 +- libc/benchmarks/LibcMemoryBenchmark.h | 147 +- libc/benchmarks/LibcMemoryBenchmarkMain.cpp | 359 +- libc/benchmarks/LibcMemoryBenchmarkMain.h | 36 - libc/benchmarks/LibcMemoryBenchmarkTest.cpp | 53 +- libc/benchmarks/Memcmp.cpp | 87 - libc/benchmarks/Memcpy.cpp | 73 - libc/benchmarks/MemorySizeDistributions.cpp | 14 +- libc/benchmarks/Memset.cpp | 70 - libc/benchmarks/RATIONALE.md | 4 +- libc/benchmarks/README.md | 123 +- libc/benchmarks/configuration_big.json | 24 - libc/benchmarks/configuration_small.json | 24 - libc/benchmarks/libc-benchmark-analysis.py3 | 128 + libc/benchmarks/render.py3 | 194 - libc/test/src/math/FDimTest.h | 2 +- libc/test/src/math/RemQuoTest.h | 14 +- libc/test/src/math/fmax_test.cpp | 2 +- libc/test/src/math/fmaxf_test.cpp | 2 +- libc/test/src/math/fmaxl_test.cpp | 2 +- libc/test/src/math/fmin_test.cpp | 2 +- libc/test/src/math/fminf_test.cpp | 2 +- libc/test/src/math/fminl_test.cpp | 2 +- .../utils/tools/WrapperGen/wrappergen_test.cpp | 124 +- libc/utils/buildbot/Dockerfile | 7 +- libc/utils/tools/WrapperGen/Main.cpp | 152 +- libcxx/include/__config | 2 +- libcxx/include/filesystem | 297 +- libcxx/src/filesystem/directory_iterator.cpp | 63 +- libcxx/src/filesystem/filesystem_common.h | 40 +- libcxx/src/filesystem/operations.cpp | 166 +- lld/CMakeLists.txt | 15 +- lld/COFF/Driver.cpp | 6 +- lld/COFF/Driver.h | 2 +- lld/ELF/Arch/AArch64.cpp | 2 +- lld/ELF/Arch/ARM.cpp | 2 +- lld/ELF/Arch/Hexagon.cpp | 2 +- lld/ELF/Arch/Mips.cpp | 2 +- lld/ELF/Arch/PPC.cpp | 2 +- lld/ELF/Arch/PPC64.cpp | 2 +- lld/ELF/Arch/RISCV.cpp | 2 +- lld/ELF/Arch/SPARCV9.cpp | 2 +- lld/ELF/Arch/X86.cpp | 4 +- lld/ELF/Arch/X86_64.cpp | 2 +- lld/ELF/Driver.cpp | 4 +- lld/ELF/Driver.h | 2 +- lld/ELF/InputSection.cpp | 4 +- lld/ELF/Relocations.cpp | 2 +- lld/ELF/Relocations.h | 4 +- lld/ELF/SyntheticSections.cpp | 11 + lld/MachO/Arch/X86_64.cpp | 20 +- lld/MachO/Config.h | 10 + lld/MachO/Driver.cpp | 27 +- lld/MachO/DriverUtils.cpp | 4 +- lld/MachO/InputFiles.cpp | 59 +- lld/MachO/InputFiles.h | 2 + lld/MachO/Options.td | 1 - lld/MachO/SymbolTable.cpp | 50 +- lld/MachO/SymbolTable.h | 4 +- lld/MachO/Symbols.h | 37 +- lld/MachO/SyntheticSections.cpp | 35 +- lld/MachO/Target.h | 8 +- lld/MachO/Writer.cpp | 27 +- lld/test/COFF/symbolizer-line-numbers.s | 322 ++ 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.../tools/lldb-vscode/attach/TestVSCode_attach.py | 2 +- .../Unwind/thread-step-out-ret-addr-check.test | 1 - lldb/unittests/Process/Utility/CMakeLists.txt | 18 +- .../Process/Utility/RegisterContextFreeBSDTest.cpp | 4 - .../Utility/RegisterContextNetBSDTest_i386.cpp | 118 + .../Utility/RegisterContextNetBSDTest_x86_64.cpp | 139 + lldb/unittests/Symbol/TestTypeSystemClang.cpp | 5 +- llvm/CMakeLists.txt | 15 +- llvm/docs/AMDGPUUsage.rst | 624 ++- llvm/docs/GettingStarted.rst | 2 +- llvm/docs/GettingStartedVS.rst | 2 +- llvm/docs/HowToBuildOnARM.rst | 1 - llvm/docs/HowToUpdateDebugInfo.rst | 28 +- llvm/docs/LangRef.rst | 174 +- llvm/docs/TestingGuide.rst | 2 +- llvm/examples/Bye/Bye.cpp | 1 + llvm/include/llvm/ADT/AllocatorList.h | 7 - llvm/include/llvm/ADT/DenseMap.h | 20 +- llvm/include/llvm/ADT/DenseSet.h | 16 +- llvm/include/llvm/ADT/DirectedGraph.h | 14 +- llvm/include/llvm/ADT/STLExtras.h | 8 +- llvm/include/llvm/ADT/StringMap.h | 4 +- llvm/include/llvm/ADT/Triple.h | 1 + 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mlir/include/mlir/Dialect/SPIRV/SPIRVMatrixOps.td | 191 - mlir/include/mlir/Dialect/SPIRV/SPIRVModule.h | 30 - .../mlir/Dialect/SPIRV/SPIRVNonUniformOps.td | 733 --- mlir/include/mlir/Dialect/SPIRV/SPIRVOCLOps.td | 169 - mlir/include/mlir/Dialect/SPIRV/SPIRVOps.h | 87 - mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 532 --- .../mlir/Dialect/SPIRV/SPIRVStructureOps.td | 737 --- mlir/include/mlir/Dialect/SPIRV/SPIRVTypes.h | 468 -- mlir/include/mlir/Dialect/SPIRV/TargetAndABI.h | 135 - mlir/include/mlir/Dialect/SPIRV/TargetAndABI.td | 91 - .../mlir/Dialect/SPIRV/Transforms/CMakeLists.txt | 7 + .../include/mlir/Dialect/SPIRV/Transforms/Passes.h | 69 + .../mlir/Dialect/SPIRV/Transforms/Passes.td | 37 + .../Dialect/SPIRV/Transforms/SPIRVConversion.h | 138 + .../include/mlir/Dialect/SPIRV/Utils/LayoutUtils.h | 80 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 25 - mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 52 +- mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 34 + 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mlir/lib/CAPI/IR/IR.cpp | 7 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 28 +- mlir/lib/Conversion/GPUToSPIRV/CMakeLists.txt | 1 + .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 8 +- .../GPUToSPIRV/ConvertGPUToSPIRVPass.cpp | 6 +- mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.td | 8 +- .../ConvertGPULaunchFuncToVulkanLaunchFunc.cpp | 6 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 2 +- mlir/lib/Conversion/LinalgToSPIRV/CMakeLists.txt | 1 + .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 6 +- .../Conversion/LinalgToSPIRV/LinalgToSPIRVPass.cpp | 4 +- .../LinalgToStandard/LinalgToStandard.cpp | 2 +- mlir/lib/Conversion/SCFToSPIRV/CMakeLists.txt | 1 + mlir/lib/Conversion/SCFToSPIRV/SCFToSPIRV.cpp | 6 +- mlir/lib/Conversion/SPIRVToLLVM/CMakeLists.txt | 1 + .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 2 +- .../Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp | 9 +- .../SPIRVToLLVM/ConvertSPIRVToLLVMPass.cpp | 2 +- .../Conversion/ShapeToStandard/ShapeToStandard.cpp | 18 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 4 +- mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 2 +- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 8 +- .../StandardToSPIRV/ConvertStandardToSPIRVPass.cpp | 4 +- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 2 +- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 4 +- mlir/lib/Conversion/VectorToSPIRV/CMakeLists.txt | 1 + .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 8 +- mlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp | 1 - mlir/lib/Dialect/Async/IR/Async.cpp | 2 +- .../Dialect/Async/Transforms/AsyncRefCounting.cpp | 2 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 2 +- .../Dialect/GPU/Transforms/AsyncRegionRewriter.cpp | 2 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 2 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 366 +- mlir/lib/Dialect/Linalg/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 147 +- mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp | 1 + mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 1 + mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 5 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 10 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 326 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 3 +- mlir/lib/Dialect/Quant/Utils/FakeQuantSupport.cpp | 6 +- mlir/lib/Dialect/Quant/Utils/UniformSupport.cpp | 2 +- mlir/lib/Dialect/SCF/Transforms/Utils.cpp | 2 +- mlir/lib/Dialect/SPIRV/CMakeLists.txt | 38 +- mlir/lib/Dialect/SPIRV/IR/CMakeLists.txt | 33 + mlir/lib/Dialect/SPIRV/IR/SPIRVAttributes.cpp | 349 ++ .../lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp | 421 ++ mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.td | 40 + mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp | 1236 +++++ mlir/lib/Dialect/SPIRV/IR/SPIRVEnums.cpp | 94 + mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 3488 +++++++++++++++ mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp | 1109 +++++ mlir/lib/Dialect/SPIRV/IR/TargetAndABI.cpp | 230 + mlir/lib/Dialect/SPIRV/LayoutUtils.cpp | 179 - .../Linking/ModuleCombiner/ModuleCombiner.cpp | 6 +- mlir/lib/Dialect/SPIRV/SPIRVAttributes.cpp | 339 -- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 422 -- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.td | 40 - mlir/lib/Dialect/SPIRV/SPIRVDialect.cpp | 1242 ------ mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 749 ---- mlir/lib/Dialect/SPIRV/SPIRVOps.cpp | 3488 --------------- mlir/lib/Dialect/SPIRV/SPIRVTypes.cpp | 1176 ----- mlir/lib/Dialect/SPIRV/TargetAndABI.cpp | 230 - mlir/lib/Dialect/SPIRV/Transforms/CMakeLists.txt | 26 +- .../Transforms/DecorateCompositeTypeLayoutPass.cpp | 119 + .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 119 - .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 10 +- mlir/lib/Dialect/SPIRV/Transforms/PassDetail.h | 2 +- .../SPIRV/Transforms/RewriteInsertsPass.cpp | 4 +- .../Dialect/SPIRV/Transforms/SPIRVConversion.cpp | 748 ++++ .../lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp | 10 +- mlir/lib/Dialect/SPIRV/Utils/CMakeLists.txt | 10 + mlir/lib/Dialect/SPIRV/Utils/LayoutUtils.cpp | 180 + mlir/lib/Dialect/Shape/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Shape/IR/Shape.cpp | 1 + mlir/lib/Dialect/Shape/IR/ShapeCanonicalization.td | 5 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 203 +- .../Dialect/StandardOps/Transforms/Bufferize.cpp | 18 +- mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 153 + mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp | 18 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 4 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 2 +- mlir/lib/IR/Attributes.cpp | 2 +- mlir/lib/IR/Builders.cpp | 14 +- mlir/lib/IR/BuiltinAttributes.cpp | 104 - mlir/lib/IR/BuiltinDialect.cpp | 8 +- mlir/lib/IR/BuiltinTypes.cpp | 47 +- mlir/lib/IR/Dialect.cpp | 2 +- mlir/lib/IR/FunctionSupport.cpp | 18 +- mlir/lib/IR/MLIRContext.cpp | 18 +- mlir/lib/IR/Operation.cpp | 35 +- mlir/lib/IR/OperationSupport.cpp | 52 +- mlir/lib/IR/SymbolTable.cpp | 4 +- mlir/lib/IR/Value.cpp | 2 +- mlir/lib/Interfaces/ViewLikeInterface.cpp | 60 +- mlir/lib/Parser/DialectSymbolParser.cpp | 4 +- mlir/lib/Parser/TypeParser.cpp | 4 +- mlir/lib/Pass/IRPrinting.cpp | 2 +- mlir/lib/Support/MlirOptMain.cpp | 1 - mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 2 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 67 +- mlir/lib/Target/SPIRV/Deserialization.cpp | 16 +- mlir/lib/Target/SPIRV/SPIRVBinaryUtils.cpp | 2 +- mlir/lib/Target/SPIRV/Serialization.cpp | 12 +- mlir/lib/Target/SPIRV/TranslateRegistration.cpp | 6 +- mlir/lib/Transforms/BufferResultsToOutParams.cpp | 4 +- mlir/lib/Transforms/NormalizeMemRefs.cpp | 11 +- mlir/lib/Transforms/SCCP.cpp | 2 +- mlir/lib/Transforms/Utils/DialectConversion.cpp | 8 +- mlir/test/CAPI/ir.c | 24 +- .../ShapeToStandard/shape-to-standard.mlir | 24 +- mlir/test/Conversion/StandardToLLVM/invalid.mlir | 32 - mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 258 ++ mlir/test/Dialect/LLVMIR/invalid.mlir | 15 + mlir/test/Dialect/LLVMIR/roundtrip.mlir | 38 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 51 +- mlir/test/Dialect/Linalg/loops.mlir | 20 +- mlir/test/Dialect/Linalg/roundtrip.mlir | 42 +- mlir/test/Dialect/Linalg/sparse_1d.mlir | 439 +- mlir/test/Dialect/Linalg/sparse_2d.mlir | 284 +- mlir/test/Dialect/Linalg/sparse_3d.mlir | 89 +- .../Dialect/SPIRV/{ => IR}/arithmetic-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/atomic-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/availability.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/bit-ops.mlir | 0 .../test/Dialect/SPIRV/{ => IR}/composite-ops.mlir | 0 .../Dialect/SPIRV/{ => IR}/control-flow-ops.mlir | 0 .../cooperative-matrix-ops.mlir} | 0 .../SPIRV/{glslops.mlir => IR/glsl-ops.mlir} | 0 mlir/test/Dialect/SPIRV/{ => IR}/group-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/logical-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/matrix-ops.mlir | 0 .../Dialect/SPIRV/{ => IR}/non-uniform-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/ocl-ops.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/ops.mlir | 0 .../test/Dialect/SPIRV/{ => IR}/structure-ops.mlir | 0 .../Dialect/SPIRV/{ => IR}/target-and-abi.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/target-env.mlir | 0 mlir/test/Dialect/SPIRV/{ => IR}/types.mlir | 0 ...ct_resolution.mlir => conflict-resolution.mlir} | 0 ...deduplication_basic.mlir => deduplication.mlir} | 0 .../SPIRV/{ => Transforms}/canonicalize.mlir | 0 mlir/test/Dialect/Shape/canonicalize.mlir | 20 +- mlir/test/Dialect/Standard/bufferize.mlir | 33 - mlir/test/Dialect/Standard/canonicalize.mlir | 16 + mlir/test/Dialect/Tensor/bufferize.mlir | 33 + mlir/test/Dialect/Tensor/canonicalize.mlir | 78 +- mlir/test/Dialect/Tensor/invalid.mlir | 8 +- mlir/test/Dialect/Tensor/ops.mlir | 13 + mlir/test/EDSC/builder-api-test.cpp | 14 +- mlir/test/IR/core-ops.mlir | 17 - .../SPIRV}/arithmetic-ops.mlir | 0 .../Serialization => Target/SPIRV}/array.mlir | 0 .../Serialization => Target/SPIRV}/atomic-ops.mlir | 0 .../Serialization => Target/SPIRV}/barrier.mlir | 0 .../Serialization => Target/SPIRV}/bit-ops.mlir | 0 .../Serialization => Target/SPIRV}/cast-ops.mlir | 0 .../SPIRV}/composite-op.mlir | 0 .../Serialization => Target/SPIRV}/constant.mlir | 0 .../SPIRV/cooperative-matrix-ops.mlir} | 0 .../Serialization => Target/SPIRV}/debug.mlir | 0 .../SPIRV}/decorations.mlir | 0 .../SPIRV}/entry-point.mlir | 0 .../SPIRV}/execution-mode.mlir | 0 .../SPIRV}/function-call.mlir | 0 .../SPIRV}/global-variable.mlir | 0 .../Serialization => Target/SPIRV}/glsl-ops.mlir | 0 .../Serialization => Target/SPIRV}/group-ops.mlir | 0 .../SPIRV}/logical-ops.mlir | 0 .../SPIRV/Serialization => Target/SPIRV}/loop.mlir | 0 .../Serialization => Target/SPIRV}/matrix.mlir | 0 .../Serialization => Target/SPIRV}/memory-ops.mlir | 0 .../Serialization => Target/SPIRV}/module.mlir | 0 .../SPIRV}/non-uniform-ops.mlir | 0 .../Serialization => Target/SPIRV}/ocl-ops.mlir | 0 .../SPIRV/Serialization => Target/SPIRV}/phi.mlir | 0 .../Serialization => Target/SPIRV}/selection.mlir | 0 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mlir/test/Dialect/SPIRV/Linking/ModuleCombiner/{conflict_resolution.mlir => [...] rename mlir/test/Dialect/SPIRV/Linking/ModuleCombiner/{deduplication_basic.mlir => [...] rename mlir/test/Dialect/SPIRV/{ => Transforms}/canonicalize.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/arithmetic-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/array.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/atomic-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/barrier.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/bit-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/cast-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/composite-op.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/constant.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization/cooperative-matrix.mlir => Target/SP [...] rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/debug.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/decorations.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/entry-point.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/execution-mode.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/function-call.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/global-variable.mli [...] rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/glsl-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/group-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/logical-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/loop.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/matrix.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/memory-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/module.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/non-uniform-ops.mli [...] rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/ocl-ops.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/phi.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/selection.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/spec-constant.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/struct.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/terminator.mlir (100%) rename mlir/test/{Dialect/SPIRV/Serialization => Target/SPIRV}/undef.mlir (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig updated (67a0eb5b -> 5ce946e5)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allmodconfig in repository toolchain/ci/base-artifacts. discards 67a0eb5b 2: update: linux-a409ed156a90093a03fe6a93721ddf4c591eac87: 21151 new 5ce946e5 2: update: llvm-qemu: 21151 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (67a0eb5b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 183 +- 02-prepare_abe/console.log | 194 +- 03-build_llvm/console.log | 13612 +++++++++++++-------------- 04-build_linux/console.log | 694 +- 07-check_regression/console.log | 18 +- 07-check_regression/results.regressions | 10 +- 08-update_baseline/console.log | 38 +- 08-update_baseline/results.regressions | 10 +- console.log | 14739 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 10 files changed, 14882 insertions(+), 14630 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross updated (27a2ffea558 -> 77211d6899b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross in repository toolchain/ci/gcc. from 27a2ffea558 c++: Fix template parm ICE [PR 98297] adds 7cbb07d2fcc Daily bump. adds 77211d6899b Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 5 +++++ gcc/testsuite/ChangeLog | 4 ++++ 3 files changed, 10 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross updated (6828c0c676 -> 4611585313)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross in repository toolchain/ci/binutils-gdb. from 6828c0c676 Automatic date update in version.in adds 4611585313 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross updated (0e6b37f9 -> 8d8ceb5d)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-release-aarch64-build_cross in repository toolchain/ci/base-artifacts. discards 0e6b37f9 0: update: binutils-gcc-glibc-qemu: 6 new 8d8ceb5d 0: update: binutils-gcc-glibc-qemu: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0e6b37f9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_cross/gnu-release-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 221 +- 02-prepare_abe/console.log | 260 +- 04-build_abe-binutils/console.log | 11591 ++-- 05-build_abe-stage1/console.log | 13978 +++-- 06-build_abe-linux/console.log | 306 +- 07-build_abe-glibc/console.log | 39410 ++++++------- 08-build_abe-stage2/console.log | 39964 +++++++------ 09-build_abe-qemu/console.log | 4653 +- 10-check_regression/console.log | 36 +- 11-update_baseline/console.log | 16 +- console.log | 111193 +++++++++++++++++------------------ jenkins/manifest.sh | 16 +- 12 files changed, 110780 insertions(+), 110864 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (75ee62ac60 -> a05f8ecd88)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/qemu. from 75ee62ac60 Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-n [...] adds 10b43754cf hw/riscv: sifive_u: Add UART1 DT node in the generated DTB adds dfc973ecc1 hw/riscv: microchip_pfsoc: add QSPI NOR flash adds b3d2a4296f hw/core/register.c: Don't use '#' flag of printf format adds c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV adds 529577457c target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR adds 54a581c228 intc/ibex_plic: Clear interrupts that occur during claim process adds 617448a46b hw/riscv: Expand the is 32-bit check to support more CPUs adds c0a635f397 target/riscv: Add a TYPE_RISCV_CPU_BASE CPU adds dc4d4aaee3 riscv: spike: Remove target macro conditionals adds 09fe17125e riscv: virt: Remove target macro conditionals adds 7893677184 hw/riscv: boot: Remove compile time XLEN checks adds 9d01143063 hw/riscv: virt: Remove compile time XLEN checks adds bd62c13ea8 hw/riscv: spike: Remove compile time XLEN checks adds 2206ffa68f hw/riscv: sifive_u: Remove compile time XLEN checks adds 5b6c291b8d target/riscv: fpu_helper: Match function defs in HELPER macros adds 51ae0cabc6 target/riscv: Add a riscv_cpu_is_32bit() helper function adds 114baaca51 target/riscv: Specify the XLEN for CPUs adds 5c5a47f10c target/riscv: cpu: Remove compile time XLEN checks adds f08c7ff3dc target/riscv: cpu_helper: Remove compile time XLEN checks adds 8987cdc481 target/riscv: csr: Remove compile time XLEN checks adds 094b072c68 target/riscv: cpu: Set XLEN independently from target adds 3ed2b8ac2d hw/riscv: Use the CPU to determine if 32-bit adds d31e970a01 riscv/opentitan: Update the OpenTitan memory layout adds a05f8ecd88 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] No new revisions were added by this update. Summary of changes: hw/core/register.c | 16 ++-- hw/intc/ibex_plic.c | 13 ++- hw/riscv/boot.c | 70 ++++++++------- hw/riscv/microchip_pfsoc.c | 21 +++++ hw/riscv/opentitan.c | 81 ++++++++++++----- hw/riscv/sifive_u.c | 74 ++++++++++------ hw/riscv/spike.c | 52 ++++++----- hw/riscv/virt.c | 39 ++++---- include/hw/riscv/boot.h | 14 +-- include/hw/riscv/microchip_pfsoc.h | 3 + include/hw/riscv/opentitan.h | 23 +++-- include/hw/riscv/spike.h | 6 -- include/hw/riscv/virt.h | 6 -- target/riscv/cpu.c | 84 ++++++++++++------ target/riscv/cpu.h | 8 ++ target/riscv/cpu_bits.h | 8 +- target/riscv/cpu_helper.c | 15 ++-- target/riscv/csr.c | 176 +++++++++++++++++++------------------ target/riscv/fpu_helper.c | 8 -- target/riscv/helper.h | 24 ++--- 20 files changed, 434 insertions(+), 307 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (5d5abe9f -> a192b0a0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 5d5abe9f 0: update: qemu-75ee62ac606bfc9eb59310b9446df3434bf6e8c2: 18043 new a192b0a0 0: update: llvm-linux-qemu: 18043 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5d5abe9f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 109 +- 02-prepare_abe/console.log | 440 +- 03-build_llvm/console.log | 13504 +++++++++++++------------- 04-build_linux/console.log | 1571 +-- 07-check_regression/console.log | 12 +- 07-check_regression/results.regressions | 2 +- 08-update_baseline/console.log | 14 +- 08-update_baseline/results.regressions | 2 +- console.log | 15650 ++++++++++++++++-------------- jenkins/manifest.sh | 16 +- 10 files changed, 16260 insertions(+), 15060 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig updated (7cbb07d2fcc -> 77211d6899b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-lts-defconfig in repository toolchain/ci/gcc. from 7cbb07d2fcc Daily bump. adds 77211d6899b Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 10 months

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