Tcwg-commits December 2020

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11568 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig updated (4611585313 -> e7f46bfe0b)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig in repository toolchain/ci/binutils-gdb. from 4611585313 Automatic date update in version.in adds e7f46bfe0b Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig updated (610ca03d -> 589c9357)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-aarch64-stable-defconfig in repository toolchain/ci/base-artifacts. discards 610ca03d 0: update: binutils-gcc-linux-qemu: boot new 589c9357 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (610ca03d) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-prepare_abe/console.log | 430 +- 03-build_abe-binutils/console.log | 10457 +++++----- 04-build_abe-stage1/console.log | 13825 +++++++------ 05-build_linux/console.log | 826 +- 06-build_abe-qemu/console.log | 4660 ++--- 07-boot_linux/console.log | 486 +- 08-check_regression/console.log | 18 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 18 +- 09-update_baseline/results.regressions | 2 +- console.log | 30922 +++++++++++++++--------------- jenkins/manifest.sh | 12 +- 13 files changed, 30917 insertions(+), 30925 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 updated (62cb9680e59 -> 9032d2b2414)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 in repository toolchain/ci/gcc. from 62cb9680e59 shrink-wrap: Don't put on incoming EDGE_CROSSING [PR98289] adds 4e7e7c13261 c++tools: Fix up c++tools for --with-gcc-major-version-only adds 5357b1620c5 libcody: Remove nop asm adds 096164229a4 bootstrap: Fix some windows issues [PR 98300] adds f5feee6adc8 libstdc++: Regenerate autoconf files adds 8cdca5f9c70 libstdc++: Move std::hash<std::thread::id> to <bits/std_thread.h> adds 8dc63f13f03 libstdc++: Fix preprocessor condition [PR 98344] adds 9f9dbc8e09c libstdc++: Fix -Wunused warning adds b429f53eba8 bootstrap: Don't use strsignal [PR 98300] adds d592ee3ada8 rtl-ssa: Include memmodel.h before tm_p.h adds c25b504636f Fix trap in pointer conversion in op1_range. adds ec2a58a36ae arm: Fix bootstrap adds b2bc1bb6cab libstdc++: Fix condition for gthreads-timed effective-target adds 217d5beaff9 libstdc++: Test errno macros directly for all targets [PR 93151] adds d1ad55c4e08 libcody: Allow PIC [PR 98324] adds 2d7a40fa60f c++: Fix clang problem [PR 98340] adds 64432b680ea vect, aarch64: Extend SVE vs Advanced SIMD costing decision [...] adds b79ce6e1aa4 doc: Standard library header units adds 4a7a3110c70 Update default_estimated_poly_value prototype in targhooks.h adds 00bad763dcb rtl-ssa: Fix reg_raw_mode thinko [PR98347] adds 35b8d268746 arm: Add support for Cortex-A78C adds cd69e3d5cd6 Daily bump. adds 20f292863f6 c++: Diagnose unstable satisfaction adds 79f57d5cb07 c++: Diagnose self-recursive satisfaction adds 731a32b3fa7 c++: More precise tracking of potentially unstable satisfaction adds e3f0eaa2829 libstdc++: Import parts of the Ryu library adds 5033506993e libstdc++: Apply modifications to our local copy of Ryu adds 3c57e692357 libstdc++: Add floating-point std::to_chars implementation adds ddb9c661c2f libstdc++: Import MSVC floating-point std::to_chars testcases adds dc00689332f Go testsuite: handle +build lines correctly adds 11f07ef3778 c++: Fix PCH ICE with __builtin_source_location [PR98343] adds ce8dcc9105c As well as the PR this patch fixes problems in handling cla [...] adds 785b49434d2 c++: Fix windows binary files [PR 98362] adds bcac28716bb Arm: MVE: Add missing complex mul iterators adds 7ff5706fcd7 aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE adds 3af02d32cce openmp: Implicitly add 'declare target' directives for dyna [...] adds 266d7464756 libstdc++: Check FE_TONEAREST is defined before using it adds d7bab388b81 libstdc++: Fix build failure due to missing <langinfo.h> [PR98374] adds 22a7e82c200 libstdc++: Fix build failure on AArch64 ILP32 [PR98370] adds 60cecb2b83f libstdc++: Fix mistake in PR98374 change [PR98377] adds d44d47b4926 aarch64: SVE: ICE in expand_direct_optab_fn [PR98177] adds 5dc998933e7 libcc1: Fix up libcc1 configure [PR98330] adds bfb37fa4dd4 openmp: Fix g++.dg/gomp/declare-target-3.C testcase when of [...] adds 8b604594652 openmp: Don't optimize shared to firstprivate on task with [...] adds 0e9f2b2dc8d Re: [r11-6232 Regression] FAIL: gcc.dg/pr97750.c adds 5128f8d0d99 compiler: check for floating-point exponent overflow adds b1a2242e24f Daily bump. adds 9032d2b2414 bswap: Fix up a thinko with empty CONSTRUCTORs [PR98378] No new revisions were added by this update. Summary of changes: ChangeLog | 4 + c++tools/ChangeLog | 21 + c++tools/Makefile.in | 4 +- c++tools/config.h.in | 33 + c++tools/configure | 676 +- c++tools/configure.ac | 5 + c++tools/resolver.cc | 41 +- c++tools/server.cc | 3 +- contrib/ChangeLog | 5 + contrib/gcc_update | 4 +- gcc/ChangeLog | 111 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 370 + gcc/config/aarch64/aarch64.c | 44 +- gcc/config/arm/arm-cpus.in | 11 + gcc/config/arm/arm-tables.opt | 3 + gcc/config/arm/arm-tune.md | 10 +- gcc/config/arm/arm_neon.h | 2 +- gcc/config/arm/iterators.md | 4 + gcc/cp/ChangeLog | 94 + gcc/cp/constraint.cc | 336 +- gcc/cp/cp-gimplify.c | 15 + gcc/cp/cp-lang.c | 32 + gcc/cp/cp-tree.h | 6 + gcc/cp/decl.c | 5 + gcc/cp/decl2.c | 7 + gcc/cp/module.cc | 42 +- gcc/cp/pt.c | 9 +- gcc/cp/typeck.c | 1 + gcc/doc/invoke.texi | 9 +- gcc/doc/tm.texi | 7 +- gcc/fortran/ChangeLog | 57 + gcc/fortran/resolve.c | 2 +- gcc/fortran/trans-array.c | 448 +- gcc/fortran/trans-expr.c | 264 +- gcc/fortran/trans.c | 16 +- gcc/fortran/trans.h | 1 + gcc/gimple-ssa-store-merging.c | 2 + gcc/gimplify.c | 12 + gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/lex.cc | 4 + gcc/langhooks-def.h | 8 +- gcc/langhooks.c | 16 + gcc/langhooks.h | 10 + gcc/omp-offload.c | 11 +- gcc/range-op.cc | 25 + gcc/rtl-ssa.h | 2 +- gcc/rtl-ssa/access-utils.h | 2 +- gcc/target.def | 7 +- gcc/target.h | 12 +- gcc/targhooks.c | 2 +- gcc/targhooks.h | 3 +- gcc/testsuite/ChangeLog | 90 + gcc/testsuite/g++.dg/cpp2a/concepts-complete1.C | 18 + gcc/testsuite/g++.dg/cpp2a/concepts-complete2.C | 23 + gcc/testsuite/g++.dg/cpp2a/concepts-complete3.C | 16 + gcc/testsuite/g++.dg/cpp2a/concepts-pr88395.C | 8 +- .../g++.dg/cpp2a/concepts-recursive-sat2.C | 6 +- .../g++.dg/cpp2a/concepts-recursive-sat4.C | 13 + gcc/testsuite/g++.dg/gomp/declare-target-3.C | 31 + gcc/testsuite/g++.dg/pch/pr98343.C | 6 + gcc/testsuite/g++.dg/pch/pr98343.Hs | 18 + gcc/testsuite/g++.target/aarch64/sve/pr98177-1.C | 10 + gcc/testsuite/g++.target/aarch64/sve/pr98177-2.C | 10 + gcc/testsuite/gcc.dg/pr97750.c | 21 + gcc/testsuite/gcc.target/aarch64/sve/pr98177-1.c | 10 + gcc/testsuite/gcc.target/aarch64/sve/pr98177-2.c | 10 + gcc/testsuite/gfortran.dg/class_allocate_25.f90 | 58 + gcc/testsuite/gfortran.dg/class_assign_4.f90 | 183 + gcc/testsuite/gfortran.dg/dependency_60.f90 | 19 + .../gfortran.dg/unlimited_polymorphic_32.f03 | 59 + gcc/testsuite/go.test/go-test.exp | 147 +- gcc/testsuite/go.test/test/fixedbugs/bug302.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/bug369.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue10607.go | 2 +- .../go.test/test/fixedbugs/issue11326b.go | 4 + gcc/testsuite/go.test/test/fixedbugs/issue11771.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue13268.go | 1 + gcc/testsuite/go.test/test/fixedbugs/issue13471.go | 22 +- gcc/testsuite/go.test/test/fixedbugs/issue14636.go | 2 +- .../go.test/test/fixedbugs/issue16037_run.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue19658.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue21317.go | 6 +- gcc/testsuite/go.test/test/fixedbugs/issue21576.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue22660.go | 6 +- .../go.test/test/fixedbugs/issue33275_run.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue33555.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue36437.go | 2 +- gcc/testsuite/go.test/test/fixedbugs/issue9355.go | 6 +- .../go.test/test/fixedbugs/issue9862_run.go | 2 +- gcc/testsuite/go.test/test/run.go | 2 +- gcc/tree-vect-loop.c | 91 +- libcc1/ChangeLog | 7 + libcc1/configure | 2 +- libcc1/configure.ac | 2 +- libcody/ChangeLog | 10 + libcody/Makefile.in | 2 +- libcody/configure | 12 + libcody/configure.ac | 6 + libcody/fatal.cc | 3 +- libgo/mkrsysinfo.sh | 1 + libgo/mksysinfo.sh | 1 + libgomp/ChangeLog | 4 + libgomp/testsuite/libgomp.c/task-6.c | 47 + libstdc++-v3/ChangeLog | 97 + libstdc++-v3/config.h.in | 57 - libstdc++-v3/config/abi/pre/gnu.ver | 7 + libstdc++-v3/config/os/djgpp/error_constants.h | 28 +- .../config/os/mingw32-w64/error_constants.h | 36 +- libstdc++-v3/config/os/mingw32/error_constants.h | 14 +- libstdc++-v3/configure | 631 - libstdc++-v3/include/bits/semaphore_base.h | 2 +- libstdc++-v3/include/bits/std_thread.h | 12 + libstdc++-v3/include/std/charconv | 24 + libstdc++-v3/include/std/thread | 12 - libstdc++-v3/src/c++11/mutex.cc | 3 +- libstdc++-v3/src/c++17/Makefile.am | 1 + libstdc++-v3/src/c++17/Makefile.in | 3 +- libstdc++-v3/src/c++17/floating_from_chars.cc | 4 +- libstdc++-v3/src/c++17/floating_to_chars.cc | 1567 + libstdc++-v3/src/c++17/ryu/MERGE | 4 + libstdc++-v3/src/c++17/ryu/common.h | 95 + libstdc++-v3/src/c++17/ryu/d2fixed.c | 737 + libstdc++-v3/src/c++17/ryu/d2fixed_full_table.h | 4419 ++ libstdc++-v3/src/c++17/ryu/d2s.c | 485 + libstdc++-v3/src/c++17/ryu/d2s_full_table.h | 367 + libstdc++-v3/src/c++17/ryu/d2s_intrinsics.h | 354 + libstdc++-v3/src/c++17/ryu/digit_table.h | 35 + libstdc++-v3/src/c++17/ryu/f2s.c | 321 + libstdc++-v3/src/c++17/ryu/f2s_intrinsics.h | 124 + libstdc++-v3/src/c++17/ryu/generic_128.c | 305 + libstdc++-v3/src/c++17/ryu/generic_128.h | 517 + libstdc++-v3/src/c++17/ryu/ryu_generic_128.h | 70 + libstdc++-v3/testsuite/20_util/to_chars/double.cc | 57000 +++++++++++++++++++ libstdc++-v3/testsuite/20_util/to_chars/float.cc | 4142 ++ .../testsuite/20_util/to_chars/long_double.cc | 199 + libstdc++-v3/testsuite/lib/libstdc++.exp | 2 +- 137 files changed, 74333 insertions(+), 1178 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-complete1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-complete2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-complete3.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-recursive-sat4.C create mode 100644 gcc/testsuite/g++.dg/gomp/declare-target-3.C create mode 100644 gcc/testsuite/g++.dg/pch/pr98343.C create mode 100644 gcc/testsuite/g++.dg/pch/pr98343.Hs create mode 100644 gcc/testsuite/g++.target/aarch64/sve/pr98177-1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/pr98177-2.C create mode 100644 gcc/testsuite/gcc.dg/pr97750.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr98177-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr98177-2.c create mode 100644 gcc/testsuite/gfortran.dg/class_allocate_25.f90 create mode 100644 gcc/testsuite/gfortran.dg/class_assign_4.f90 create mode 100644 gcc/testsuite/gfortran.dg/dependency_60.f90 create mode 100644 gcc/testsuite/gfortran.dg/unlimited_polymorphic_32.f03 create mode 100644 libgomp/testsuite/libgomp.c/task-6.c create mode 100644 libstdc++-v3/src/c++17/floating_to_chars.cc create mode 100644 libstdc++-v3/src/c++17/ryu/MERGE create mode 100644 libstdc++-v3/src/c++17/ryu/common.h create mode 100644 libstdc++-v3/src/c++17/ryu/d2fixed.c create mode 100644 libstdc++-v3/src/c++17/ryu/d2fixed_full_table.h create mode 100644 libstdc++-v3/src/c++17/ryu/d2s.c create mode 100644 libstdc++-v3/src/c++17/ryu/d2s_full_table.h create mode 100644 libstdc++-v3/src/c++17/ryu/d2s_intrinsics.h create mode 100644 libstdc++-v3/src/c++17/ryu/digit_table.h create mode 100644 libstdc++-v3/src/c++17/ryu/f2s.c create mode 100644 libstdc++-v3/src/c++17/ryu/f2s_intrinsics.h create mode 100644 libstdc++-v3/src/c++17/ryu/generic_128.c create mode 100644 libstdc++-v3/src/c++17/ryu/generic_128.h create mode 100644 libstdc++-v3/src/c++17/ryu/ryu_generic_128.h create mode 100644 libstdc++-v3/testsuite/20_util/to_chars/double.cc create mode 100644 libstdc++-v3/testsuite/20_util/to_chars/float.cc create mode 100644 libstdc++-v3/testsuite/20_util/to_chars/long_double.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 updated (76d82c7f -> 96c78dbd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap_O3 in repository toolchain/ci/base-artifacts. discards 76d82c7f 0: update: gcc-62cb9680e592057a49de66eac34da679338932f9: 1 new 96c78dbd 0: update: gcc-9032d2b2414ed22e53a9980a51b835d3caf83c48: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (76d82c7f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-aarch64-b [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 132 +- 02-prepare_abe/console.log | 436 +- 04-build_abe-bootstrap_O3/console.log | 67767 ++++++++++++++++--------------- 05-check_regression/console.log | 2 +- 06-update_baseline/console.log | 4 +- console.log | 68341 ++++++++++++++++---------------- jenkins/manifest.sh | 10 +- 7 files changed, 68237 insertions(+), 68455 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (4652718ee38 -> 1e785e92624)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project. from 4652718ee38 Cleanup coro-inline.ll adds e1c1adf9dc1 [ARM] Match dual lane vmovs from insert_vector_elt adds b88ed4ec8e7 [mlir][Linlag] Reflow Linalg.md - NFC adds 22c1bd57bf3 [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC adds 06d5b1c9ad5 [SROA] Remove Dead Instructions while creating speculative [...] adds 698ae90f306 [RegisterScavenging] Fix assert in scavengeRegisterBackwards adds ce94e7d867a [MCA, ExecutionEngine, Object] Use llvm::is_contained (NFC) adds 2a814cd9e1e Ensure SplitEdge to return the new block between the two gi [...] adds 7fef551cb12 Revert "Revert "[FPEnv] Teach the IRBuilder about invoke's [...] adds fc7b7fc0669 [RISCV] Add intrinsics for vmv.v.v, vmv.v.x, and vmv.x.i adds a74941da716 Revert "[BasicAA] Handle two unknown sizes for GEPs" adds d551e40f1cf [AIX] Change the code based on https://lists.llvm.org/piper [...] adds 5e5ef535974 [clang-format][NFC] Expand BreakBeforeBraces examples adds 5f75dcf5719 [DebugInfo] Support Fortran 'use <external module>' statement. adds 9b183a1452c [NFC][InstSimplify] Add miscompiled testcase from D87188/D87197 adds e9289dc25f7 [InstSimplify] Don't miscompile `X == 0 ? abs(X) : -abs(X) [...] adds 897c985e1e2 [InstCombine] Canonicalize SPF to abs intrinsic adds 5ac37725df3 [GVNHoist] Remove successorDominate (NFC) adds 86d282baede [RISCV] Add intrinsics for vmv.x.s and vmv.s.x adds 0e94ba9d40d [NFC][InstCombine] Fixup check lines for prof md in select_ [...] adds 46a40c4bc10 [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f adds cd3e8118648 Revert "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1c3a6671c25 Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1f1145006b3 [DSE] Use correct memory location for read clobber check adds 09468a91482 [RISCV] Sign extend constant arguments to V intrinsics when [...] adds 2af2f58ec09 [InstCombine] Regenerate test checks (NFC) adds 9c978dd6e12 [TableGen] Fix D90844 introduced non-determinism due to ite [...] adds 69c8d121f7f [RISCV] Add intrinsics for vsetvli instruction adds 08c4b4054b3 Rename files with same (case insensitive) name adds d4ed253d0b8 [RISCV] Assume no-op addrspacecasts by default adds b4c63ef6dd9 [c++20] Mark class type NTTPs as done and start defining th [...] adds 939ba0b501b Add tests for the absence of feature test macros for featur [...] adds 72d8f79f0c3 [c++2b] Add tests for feature test macros. adds ed13d8c6678 Fix memory leak complicated non-type template arguments. adds 37d0dda739a [SLP] fix typo; NFC adds 7948cd11d17 [RISCV] Address clang-tidy warnings in RISCVTargetMachine. NFC. adds f5cef870d11 [www] Remove '$Date$' marker from cxx_dr_status. adds adc55b5a5ae [X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations adds b0615642f64 [clangd] Make our printing policies for Hover more consiste [...] adds af83b74dc2e [VE] Support copy of vector mask registers adds ffd982f7db5 [ObjC][ARC] Fix a bug where the inline-asm retain/claim RV [...] adds 2fced5a07b4 [clangd] Don't cancel requests based on "updates" with same [...] adds 1ab4db0f847 [HotColdSplit] Reflect full cost of parameters in split penalty adds 2b62e623288 [clangd] Fix windows path handling in .clang-tidy parsing adds 44f399ccc12 [FileCheck] Add a literal check directive modifier adds bf0870d8640 [flang] Fix bug in IMPLICIT NONE(EXTERNAL) adds a913a583f00 [lldb] Simplify the is_finalized logic in process and make [...] adds 805d59593f5 [Analysis, CodeGen, IR] Use contains (NFC) adds 195f44278c4 [ARM] Implement harden-sls-retbr for ARM mode adds c061cb521b9 [gn build] Port 195f44278c4 adds 320fd3314e3 [ARM] Implement harden-sls-retbr for Thumb mode adds a4c1f5160e6 [ARM] Harden indirect calls against SLS adds df8ed392837 [ARM] harden-sls-blr: avoid r12 and lr in indirect calls. adds 9c895aea118 [ARM] Add clang command line support for -mharden-sls= adds 9cf3b1b6665 [RISCV] Define vlxe/vsxe/vsuxe intrinsics. adds 5740f96d8ee [NFC][libc++] Fixes swapped comments. new 1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/Hover.cpp | 107 +- clang-tools-extra/clangd/TUScheduler.cpp | 63 +- clang-tools-extra/clangd/TidyProvider.cpp | 11 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 12 +- .../clangd/unittests/TUSchedulerTests.cpp | 32 + clang/docs/ClangFormatStyleOptions.rst | 446 +- clang/include/clang/AST/ASTContext.h | 4 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Format/Format.h | 446 +- clang/lib/AST/TemplateBase.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 45 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Frontend/InitPreprocessor.cpp | 2 +- clang/test/CodeGen/builtins-wasm.c | 18 +- clang/test/CodeGen/exceptions-strictfp.c | 37 + clang/test/Driver/aarch64-sls-hardening-options.c | 45 - clang/test/Driver/sls-hardening-options.c | 97 + clang/test/Lexer/cxx-features.cpp | 170 +- clang/www/cxx_dr_status.html | 1 - clang/www/cxx_status.html | 2 +- clang/www/make_cxx_dr_status | 1 - flang/lib/Semantics/resolve-names.cpp | 19 +- flang/test/Semantics/implicit07.f90 | 3 + .../libcxx/iterators/trivial_iterators.pass.cpp | 4 +- lld/ELF/Arch/AArch64.cpp | 2 +- lld/ELF/Arch/ARM.cpp | 2 +- lld/ELF/Arch/Hexagon.cpp | 2 +- lld/ELF/Arch/Mips.cpp | 2 +- lld/ELF/Arch/PPC.cpp | 2 +- lld/ELF/Arch/PPC64.cpp | 2 +- lld/ELF/Arch/RISCV.cpp | 2 +- lld/ELF/Arch/SPARCV9.cpp | 2 +- lld/ELF/Arch/X86.cpp | 4 +- lld/ELF/Arch/X86_64.cpp | 2 +- lld/ELF/InputSection.cpp | 4 +- lld/ELF/Relocations.cpp | 2 +- lld/ELF/Relocations.h | 4 +- lld/test/ELF/x86-64-gotpc-relax-nopic.s | 4 +- lldb/include/lldb/Target/Process.h | 13 +- lldb/source/Target/Process.cpp | 21 +- llvm/docs/CommandGuide/FileCheck.rst | 24 + llvm/include/llvm/FileCheck/FileCheck.h | 25 +- llvm/include/llvm/IR/BasicBlock.h | 49 +- llvm/include/llvm/IR/DIBuilder.h | 12 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 26 +- llvm/include/llvm/IR/IRBuilder.h | 17 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 87 +- llvm/include/llvm/MCA/HardwareUnits/Scheduler.h | 6 +- llvm/include/llvm/Transforms/Scalar/SROA.h | 5 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 26 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 20 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 3 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 6 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 10 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 +- llvm/lib/AsmParser/LLParser.cpp | 7 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 2 + .../CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp | 2 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 5 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 3 +- llvm/lib/FileCheck/FileCheck.cpp | 118 +- llvm/lib/IR/AsmWriter.cpp | 1 + llvm/lib/IR/BasicBlock.cpp | 40 +- llvm/lib/IR/DIBuilder.cpp | 5 +- llvm/lib/IR/DebugInfoMetadata.cpp | 6 +- llvm/lib/IR/LLVMContextImpl.h | 11 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 2 +- llvm/lib/Object/MachOObjectFile.cpp | 2 +- llvm/lib/Target/ARM/ARM.h | 3 + llvm/lib/Target/ARM/ARM.td | 14 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 42 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 59 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 65 + llvm/lib/Target/ARM/ARMCallLowering.cpp | 9 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 5 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 14 +- llvm/lib/Target/ARM/ARMFeatures.h | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 35 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 35 + llvm/lib/Target/ARM/ARMInstrThumb.td | 13 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 + llvm/lib/Target/ARM/ARMPredicates.td | 3 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 12 +- llvm/lib/Target/ARM/ARMRegisterInfo.td | 17 + llvm/lib/Target/ARM/ARMSLSHardening.cpp | 416 ++ llvm/lib/Target/ARM/ARMSubtarget.h | 10 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 4 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 65 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 69 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 5 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 10 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 348 ++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 21 +- llvm/lib/Target/RISCV/RISCVTargetMachine.h | 5 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 2 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 3 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 15 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 13 +- llvm/lib/Transforms/IPO/HotColdSplitting.cpp | 61 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 79 +- llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 2 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 79 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 9 - llvm/lib/Transforms/Scalar/SROA.cpp | 35 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- llvm/test/Analysis/BasicAA/phi-aa.ll | 3 +- llvm/test/Analysis/BasicAA/recphi.ll | 3 +- llvm/test/Assembler/dimodule.ll | 7 +- .../Bitcode/DIModule-fortran-external-module.ll | 59 + llvm/test/CodeGen/AMDGPU/call-constexpr.ll | 2 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 4 + llvm/test/CodeGen/ARM/speculation-hardening-sls.ll | 246 + llvm/test/CodeGen/RISCV/addrspacecast.ll | 49 + .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 33 + .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 51 + llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 204 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll | 3281 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll | 5361 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/Thumb2/active_lane_mask.ll | 137 +- llvm/test/CodeGen/Thumb2/mve-abs.ll | 23 +- llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 192 +- llvm/test/CodeGen/Thumb2/mve-gather-increment.ll | 148 +- .../CodeGen/Thumb2/mve-gather-ind32-unscaled.ll | 14 +- .../CodeGen/Thumb2/mve-gather-ind8-unscaled.ll | 10 +- llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll | 310 +- llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll | 328 +- llvm/test/CodeGen/Thumb2/mve-minmax.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-neg.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-phireg.ll | 52 +- llvm/test/CodeGen/Thumb2/mve-pred-and.ll | 112 +- llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-pred-ext.ll | 21 +- llvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-pred-not.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-pred-or.ll | 92 +- llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll | 20 +- llvm/test/CodeGen/Thumb2/mve-pred-xor.ll | 92 +- llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 570 +- llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll | 244 +- .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 3 +- llvm/test/CodeGen/Thumb2/mve-sext.ll | 178 +- llvm/test/CodeGen/Thumb2/mve-shifts.ll | 157 +- llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 34 +- llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vabdus.ll | 308 +- llvm/test/CodeGen/Thumb2/mve-vcmp.ll | 172 +- llvm/test/CodeGen/Thumb2/mve-vcmpr.ll | 284 +- llvm/test/CodeGen/Thumb2/mve-vcmpz.ll | 104 +- llvm/test/CodeGen/Thumb2/mve-vcreate.ll | 161 +- llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 74 +- llvm/test/CodeGen/Thumb2/mve-vdup.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll | 660 ++- llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll | 2138 ++++---- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 998 ++-- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2350 ++++---- llvm/test/CodeGen/Thumb2/mve-vld2-post.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vld2.ll | 98 +- llvm/test/CodeGen/Thumb2/mve-vld3.ll | 1130 ++-- llvm/test/CodeGen/Thumb2/mve-vld4-post.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vld4.ll | 233 +- llvm/test/CodeGen/Thumb2/mve-vmulh.ll | 122 +- llvm/test/CodeGen/Thumb2/mve-vmull-loop.ll | 41 +- llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-vqmovn.ll | 144 +- llvm/test/CodeGen/Thumb2/mve-vqshrn.ll | 292 +- llvm/test/CodeGen/Thumb2/mve-vst2.ll | 46 +- llvm/test/CodeGen/Thumb2/mve-vst3.ll | 47 +- llvm/test/CodeGen/Thumb2/mve-vst4.ll | 101 +- llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll | 46 +- llvm/test/CodeGen/VE/Vector/fastcc_callee.ll | 17 + .../DebugInfo/X86/dimodule-external-fortran.ll | 91 + llvm/test/FileCheck/check-literal.txt | 62 + llvm/test/MC/ELF/got-relaxed-rex.s | 36 - llvm/test/MC/X86/gotpcrelx.s | 65 + .../Transforms/CodeExtractor/extract-assume.ll | 2 +- .../MSSA/multiblock-memintrinsics.ll | 4 +- .../MSSA/out-of-bounds-stores.ll | 2 + .../DeadStoreElimination/MSSA/overlap.ll | 6 +- .../DeadStoreElimination/MSSA/scoped-noalias.ll | 4 +- .../HotColdSplit/apply-penalty-for-inputs.ll | 21 +- .../HotColdSplit/apply-penalty-for-outputs.ll | 8 +- .../HotColdSplit/apply-successor-penalty.ll | 13 +- .../HotColdSplit/assumption-cache-invalidation.ll | 7 +- llvm/test/Transforms/InstCombine/CPP_min_max.ll | 54 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- llvm/test/Transforms/InstCombine/abs-1.ll | 232 +- llvm/test/Transforms/InstCombine/abs_abs.ll | 496 +- llvm/test/Transforms/InstCombine/bitcast.ll | 12 +- llvm/test/Transforms/InstCombine/call-callconv.ll | 12 +- .../test/Transforms/InstCombine/clamp-to-minmax.ll | 102 +- llvm/test/Transforms/InstCombine/cttz-abs.ll | 11 +- llvm/test/Transforms/InstCombine/icmp.ll | 18 +- .../Transforms/InstCombine/insert-const-shuf.ll | 20 +- llvm/test/Transforms/InstCombine/max-of-nots.ll | 10 +- llvm/test/Transforms/InstCombine/minmax-fp.ll | 68 +- llvm/test/Transforms/InstCombine/pr21199.ll | 19 +- .../Transforms/InstCombine/preserve-sminmax.ll | 24 +- llvm/test/Transforms/InstCombine/select_meta.ll | 102 +- llvm/test/Transforms/InstCombine/smax-icmp.ll | 48 +- llvm/test/Transforms/InstCombine/smin-icmp.ll | 48 +- .../Transforms/InstCombine/sub-of-negatible.ll | 8 +- llvm/test/Transforms/InstCombine/umax-icmp.ll | 48 +- llvm/test/Transforms/InstCombine/umin-icmp.ll | 48 +- llvm/test/Transforms/InstSimplify/abs_intrinsic.ll | 32 + .../LoopUnswitch/2011-11-18-SimpleSwitch.ll | 14 +- .../Transforms/LoopVectorize/ARM/pointer_iv.ll | 59 +- .../exit-block-dominates-rt-check-block.ll | 6 +- llvm/test/Transforms/ObjCARC/contract-marker.ll | 20 + .../PhaseOrdering/X86/vector-reductions.ll | 8 +- .../Transforms/PhaseOrdering/min-max-abs-cse.ll | 11 +- llvm/unittests/IR/MetadataTest.cpp | 22 +- .../Transforms/Utils/BasicBlockUtilsTest.cpp | 230 + llvm/utils/TableGen/CodeGenSchedule.cpp | 3 + llvm/utils/TableGen/CodeGenSchedule.h | 2 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 1 + mlir/docs/Dialects/Linalg.md | 402 +- 245 files changed, 41465 insertions(+), 8937 deletions(-) create mode 100644 clang/test/CodeGen/exceptions-strictfp.c delete mode 100644 clang/test/Driver/aarch64-sls-hardening-options.c create mode 100644 clang/test/Driver/sls-hardening-options.c create mode 100644 llvm/lib/Target/ARM/ARMSLSHardening.cpp create mode 100644 llvm/test/Bitcode/DIModule-fortran-external-module.ll create mode 100644 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll create mode 100644 llvm/test/CodeGen/RISCV/addrspacecast.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll create mode 100644 llvm/test/DebugInfo/X86/dimodule-external-fortran.ll create mode 100644 llvm/test/FileCheck/check-literal.txt delete mode 100644 llvm/test/MC/ELF/got-relaxed-rex.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (9cd42bde -> b5600202)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 9cd42bde 0: update: llvm-linux-qemu: all new b5600202 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9cd42bde) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-n [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 102 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13816 ++++++++++++------------ 04-build_linux/console.log | 652 +- 05-build_abe-qemu/console.log | 6738 ++++++------ 06-boot_linux/console.log | 6 +- 07-check_regression/console.log | 14 +- 08-update_baseline/console.log | 24 +- console.log | 21788 +++++++++++++++++++------------------- jenkins/manifest.sh | 8 +- 10 files changed, 21794 insertions(+), 21790 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO updated (954c8c3e969 -> 80ffeaec54d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO in repository toolchain/ci/gcc. from 954c8c3e969 Daily bump. adds a199f82b3e4 Daily bump. adds e074841107e disable --with-{cpu,arch,tune}-32 adds a356432379b AArch64: Add support for --with-tune adds 0a143997d86 Daily bump. adds 85b55ae6e87 d: Fix ICE in gimplify_expr, at gimplify.c (PR98277) adds 1be9347b815 Daily bump. adds 9894ea94114 c++: Fix template parm ICE [PR 98297] adds b8301e0973f Daily bump. adds 34f70625ce5 Daily bump. adds 80ffeaec54d Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 9 +++++ gcc/DATESTAMP | 2 +- gcc/config.gcc | 26 +++++++------ gcc/config/aarch64/aarch64.h | 10 +++-- gcc/cp/ChangeLog | 5 +++ gcc/cp/parser.c | 4 +- gcc/d/ChangeLog | 10 +++++ gcc/d/decl.cc | 43 +++++++++++----------- gcc/testsuite/ChangeLog | 21 +++++++++++ gcc/testsuite/g++.dg/template/pr98297.C | 6 +++ .../gcc.target/aarch64/with-tune-config.c | 7 ++++ gcc/testsuite/gcc.target/aarch64/with-tune-march.c | 8 ++++ gcc/testsuite/gcc.target/aarch64/with-tune-mcpu.c | 8 ++++ gcc/testsuite/gcc.target/aarch64/with-tune-mtune.c | 7 ++++ gcc/testsuite/gdc.dg/pr98277.d | 13 +++++++ gcc/testsuite/lib/target-supports.exp | 5 +++ 16 files changed, 145 insertions(+), 39 deletions(-) create mode 100644 gcc/testsuite/g++.dg/template/pr98297.C create mode 100644 gcc/testsuite/gcc.target/aarch64/with-tune-config.c create mode 100644 gcc/testsuite/gcc.target/aarch64/with-tune-march.c create mode 100644 gcc/testsuite/gcc.target/aarch64/with-tune-mcpu.c create mode 100644 gcc/testsuite/gcc.target/aarch64/with-tune-mtune.c create mode 100644 gcc/testsuite/gdc.dg/pr98277.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO updated (c22fe03a -> 547beea1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm-spec2k6-O3_LTO in repository toolchain/ci/base-artifacts. discards c22fe03a 0: update: binutils-gcc-glibc-llvm: 1 new 547beea1 0: update: binutils-gcc-glibc-llvm: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c22fe03a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_tk1/llvm-release-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 181 +- 02-prepare_abe/console.log | 408 +- 03-build_abe-binutils/console.log | 10554 +- 04-build_abe-stage1/console.log | 18128 ++-- 05-build_abe-linux/console.log | 298 +- 06-build_abe-glibc/console.log | 39130 +++---- 07-build_abe-stage2/console.log | 44106 ++++---- 08-build_llvm-true/console.log | 12627 +-- 10-benchmark--O3_LTO_marm/benchmark-start.log | 2 +- 10-benchmark--O3_LTO_marm/benchmark.log | 15 +- 10-benchmark--O3_LTO_marm/console.log | 159 +- 11-check_regression/console.log | 764 +- 11-check_regression/results-0.csv | 116 +- 11-check_regression/results-1.csv | 113 +- 11-check_regression/results-brief.csv | 38 +- 11-check_regression/results-full.csv | 119 +- 11-check_regression/results.csv | 48 +- 11-check_regression/results.log | 2640 +- 12-update_baseline/console.log | 774 +- 12-update_baseline/results-0.csv | 116 +- 12-update_baseline/results-1.csv | 113 +- 12-update_baseline/results-brief.csv | 38 +- 12-update_baseline/results-full.csv | 119 +- 12-update_baseline/results.csv | 48 +- 12-update_baseline/results.log | 2630 +- console.log | 127679 ++++++++++++----------- jenkins/manifest.sh | 12 +- results_id | 2 +- 28 files changed, 130511 insertions(+), 130466 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (db2195bc5b3 -> 5740f96d8ee)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project. from db2195bc5b3 [flang][driver] Rename unittest file (nfc) adds 8767f3bb972 [X86][AVX] Remove X86ISD::SUBV_BROADCAST (PR38969) adds 1a9577bde1d [AArch64] Add support for ls64 to the .arch_extension asm d [...] adds 91593e461a2 [AArch64] Updating .arch_extension negative tests adds 94da2cf650d [X86] Avoid std::string creation in RecognizableInstr const [...] adds fd0f5fb8de2 PEI: Only call updateLiveness once per function adds 4652718ee38 Cleanup coro-inline.ll adds e1c1adf9dc1 [ARM] Match dual lane vmovs from insert_vector_elt adds b88ed4ec8e7 [mlir][Linlag] Reflow Linalg.md - NFC adds 22c1bd57bf3 [ELF] Rename R_TLS to R_TPREL and R_NEG_TLS to R_TPREL_NEG. NFC adds 06d5b1c9ad5 [SROA] Remove Dead Instructions while creating speculative [...] adds 698ae90f306 [RegisterScavenging] Fix assert in scavengeRegisterBackwards adds ce94e7d867a [MCA, ExecutionEngine, Object] Use llvm::is_contained (NFC) adds 2a814cd9e1e Ensure SplitEdge to return the new block between the two gi [...] adds 7fef551cb12 Revert "Revert "[FPEnv] Teach the IRBuilder about invoke's [...] adds fc7b7fc0669 [RISCV] Add intrinsics for vmv.v.v, vmv.v.x, and vmv.x.i adds a74941da716 Revert "[BasicAA] Handle two unknown sizes for GEPs" adds d551e40f1cf [AIX] Change the code based on https://lists.llvm.org/piper [...] adds 5e5ef535974 [clang-format][NFC] Expand BreakBeforeBraces examples adds 5f75dcf5719 [DebugInfo] Support Fortran 'use <external module>' statement. adds 9b183a1452c [NFC][InstSimplify] Add miscompiled testcase from D87188/D87197 adds e9289dc25f7 [InstSimplify] Don't miscompile `X == 0 ? abs(X) : -abs(X) [...] adds 897c985e1e2 [InstCombine] Canonicalize SPF to abs intrinsic adds 5ac37725df3 [GVNHoist] Remove successorDominate (NFC) adds 86d282baede [RISCV] Add intrinsics for vmv.x.s and vmv.s.x adds 0e94ba9d40d [NFC][InstCombine] Fixup check lines for prof md in select_ [...] adds 46a40c4bc10 [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f adds cd3e8118648 Revert "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1c3a6671c25 Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1f1145006b3 [DSE] Use correct memory location for read clobber check adds 09468a91482 [RISCV] Sign extend constant arguments to V intrinsics when [...] adds 2af2f58ec09 [InstCombine] Regenerate test checks (NFC) adds 9c978dd6e12 [TableGen] Fix D90844 introduced non-determinism due to ite [...] adds 69c8d121f7f [RISCV] Add intrinsics for vsetvli instruction adds 08c4b4054b3 Rename files with same (case insensitive) name adds d4ed253d0b8 [RISCV] Assume no-op addrspacecasts by default adds b4c63ef6dd9 [c++20] Mark class type NTTPs as done and start defining th [...] adds 939ba0b501b Add tests for the absence of feature test macros for featur [...] adds 72d8f79f0c3 [c++2b] Add tests for feature test macros. adds ed13d8c6678 Fix memory leak complicated non-type template arguments. adds 37d0dda739a [SLP] fix typo; NFC adds 7948cd11d17 [RISCV] Address clang-tidy warnings in RISCVTargetMachine. NFC. adds f5cef870d11 [www] Remove '$Date$' marker from cxx_dr_status. adds adc55b5a5ae [X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations adds b0615642f64 [clangd] Make our printing policies for Hover more consiste [...] adds af83b74dc2e [VE] Support copy of vector mask registers adds ffd982f7db5 [ObjC][ARC] Fix a bug where the inline-asm retain/claim RV [...] adds 2fced5a07b4 [clangd] Don't cancel requests based on "updates" with same [...] adds 1ab4db0f847 [HotColdSplit] Reflect full cost of parameters in split penalty adds 2b62e623288 [clangd] Fix windows path handling in .clang-tidy parsing adds 44f399ccc12 [FileCheck] Add a literal check directive modifier adds bf0870d8640 [flang] Fix bug in IMPLICIT NONE(EXTERNAL) adds a913a583f00 [lldb] Simplify the is_finalized logic in process and make [...] adds 805d59593f5 [Analysis, CodeGen, IR] Use contains (NFC) adds 195f44278c4 [ARM] Implement harden-sls-retbr for ARM mode adds c061cb521b9 [gn build] Port 195f44278c4 adds 320fd3314e3 [ARM] Implement harden-sls-retbr for Thumb mode adds a4c1f5160e6 [ARM] Harden indirect calls against SLS adds df8ed392837 [ARM] harden-sls-blr: avoid r12 and lr in indirect calls. adds 9c895aea118 [ARM] Add clang command line support for -mharden-sls= new 9cf3b1b6665 [RISCV] Define vlxe/vsxe/vsuxe intrinsics. new 5740f96d8ee [NFC][libc++] Fixes swapped comments. The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: clang-tools-extra/clangd/Hover.cpp | 107 +- clang-tools-extra/clangd/TUScheduler.cpp | 63 +- clang-tools-extra/clangd/TidyProvider.cpp | 11 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 12 +- .../clangd/unittests/TUSchedulerTests.cpp | 32 + clang/docs/ClangFormatStyleOptions.rst | 446 +- clang/include/clang/AST/ASTContext.h | 4 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Format/Format.h | 446 +- clang/lib/AST/TemplateBase.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 45 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Frontend/InitPreprocessor.cpp | 2 +- clang/test/CodeGen/builtins-wasm.c | 18 +- clang/test/CodeGen/exceptions-strictfp.c | 37 + clang/test/Driver/aarch64-sls-hardening-options.c | 45 - clang/test/Driver/sls-hardening-options.c | 97 + clang/test/Lexer/cxx-features.cpp | 170 +- clang/www/cxx_dr_status.html | 1 - clang/www/cxx_status.html | 2 +- clang/www/make_cxx_dr_status | 1 - flang/lib/Semantics/resolve-names.cpp | 19 +- flang/test/Semantics/implicit07.f90 | 3 + .../libcxx/iterators/trivial_iterators.pass.cpp | 4 +- lld/ELF/Arch/AArch64.cpp | 2 +- lld/ELF/Arch/ARM.cpp | 2 +- lld/ELF/Arch/Hexagon.cpp | 2 +- lld/ELF/Arch/Mips.cpp | 2 +- lld/ELF/Arch/PPC.cpp | 2 +- lld/ELF/Arch/PPC64.cpp | 2 +- lld/ELF/Arch/RISCV.cpp | 2 +- lld/ELF/Arch/SPARCV9.cpp | 2 +- lld/ELF/Arch/X86.cpp | 4 +- lld/ELF/Arch/X86_64.cpp | 2 +- lld/ELF/InputSection.cpp | 4 +- lld/ELF/Relocations.cpp | 2 +- lld/ELF/Relocations.h | 4 +- lld/test/ELF/x86-64-gotpc-relax-nopic.s | 4 +- lldb/include/lldb/Target/Process.h | 13 +- lldb/source/Target/Process.cpp | 21 +- llvm/docs/CommandGuide/FileCheck.rst | 24 + llvm/include/llvm/FileCheck/FileCheck.h | 25 +- llvm/include/llvm/IR/BasicBlock.h | 49 +- llvm/include/llvm/IR/DIBuilder.h | 12 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 26 +- llvm/include/llvm/IR/IRBuilder.h | 17 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 87 +- llvm/include/llvm/MCA/HardwareUnits/Scheduler.h | 6 +- llvm/include/llvm/Transforms/Scalar/SROA.h | 5 +- .../llvm/Transforms/Utils/BasicBlockUtils.h | 26 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 20 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 3 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 6 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 10 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 +- llvm/lib/AsmParser/LLParser.cpp | 7 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 2 + .../CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp | 2 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 10 +- llvm/lib/CodeGen/RegisterScavenging.cpp | 5 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 3 +- llvm/lib/FileCheck/FileCheck.cpp | 118 +- llvm/lib/IR/AsmWriter.cpp | 1 + llvm/lib/IR/BasicBlock.cpp | 40 +- llvm/lib/IR/DIBuilder.cpp | 5 +- llvm/lib/IR/DebugInfoMetadata.cpp | 6 +- llvm/lib/IR/LLVMContextImpl.h | 11 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 2 +- llvm/lib/Object/MachOObjectFile.cpp | 2 +- .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 1 + llvm/lib/Target/ARM/ARM.h | 3 + llvm/lib/Target/ARM/ARM.td | 14 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 42 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 59 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 65 + llvm/lib/Target/ARM/ARMCallLowering.cpp | 9 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 5 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 14 +- llvm/lib/Target/ARM/ARMFeatures.h | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 35 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 35 + llvm/lib/Target/ARM/ARMInstrThumb.td | 13 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 + llvm/lib/Target/ARM/ARMPredicates.td | 3 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 12 +- llvm/lib/Target/ARM/ARMRegisterInfo.td | 17 + llvm/lib/Target/ARM/ARMSLSHardening.cpp | 416 ++ llvm/lib/Target/ARM/ARMSubtarget.h | 10 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 4 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 65 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 69 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 5 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 10 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 348 ++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 21 +- llvm/lib/Target/RISCV/RISCVTargetMachine.h | 5 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 2 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 3 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 15 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 101 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 - llvm/lib/Target/X86/X86InstrAVX512.td | 189 +- llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 4 - llvm/lib/Target/X86/X86InstrSSE.td | 48 - llvm/lib/Transforms/IPO/HotColdSplitting.cpp | 61 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 79 +- llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 2 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 79 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 9 - llvm/lib/Transforms/Scalar/SROA.cpp | 35 +- llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 52 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- llvm/test/Analysis/BasicAA/phi-aa.ll | 3 +- llvm/test/Analysis/BasicAA/recphi.ll | 3 +- llvm/test/Assembler/dimodule.ll | 7 +- .../Bitcode/DIModule-fortran-external-module.ll | 59 + llvm/test/CodeGen/AMDGPU/call-constexpr.ll | 2 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 4 + llvm/test/CodeGen/ARM/speculation-hardening-sls.ll | 246 + llvm/test/CodeGen/RISCV/addrspacecast.ll | 49 + .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 33 + .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 51 + llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 204 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll | 3281 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll | 5361 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/Thumb2/active_lane_mask.ll | 137 +- llvm/test/CodeGen/Thumb2/mve-abs.ll | 23 +- llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 192 +- llvm/test/CodeGen/Thumb2/mve-gather-increment.ll | 148 +- .../CodeGen/Thumb2/mve-gather-ind32-unscaled.ll | 14 +- .../CodeGen/Thumb2/mve-gather-ind8-unscaled.ll | 10 +- llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll | 310 +- llvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll | 328 +- llvm/test/CodeGen/Thumb2/mve-minmax.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-neg.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-phireg.ll | 52 +- llvm/test/CodeGen/Thumb2/mve-pred-and.ll | 112 +- llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-pred-ext.ll | 21 +- llvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-pred-not.ll | 40 +- llvm/test/CodeGen/Thumb2/mve-pred-or.ll | 92 +- llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll | 20 +- llvm/test/CodeGen/Thumb2/mve-pred-xor.ll | 92 +- llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll | 570 +- llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll | 244 +- .../CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll | 3 +- llvm/test/CodeGen/Thumb2/mve-sext.ll | 178 +- llvm/test/CodeGen/Thumb2/mve-shifts.ll | 157 +- llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 34 +- llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vabdus.ll | 308 +- llvm/test/CodeGen/Thumb2/mve-vcmp.ll | 172 +- llvm/test/CodeGen/Thumb2/mve-vcmpr.ll | 284 +- llvm/test/CodeGen/Thumb2/mve-vcmpz.ll | 104 +- llvm/test/CodeGen/Thumb2/mve-vcreate.ll | 161 +- llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 74 +- llvm/test/CodeGen/Thumb2/mve-vdup.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll | 660 ++- llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll | 2138 ++++---- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 998 ++-- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2350 ++++---- llvm/test/CodeGen/Thumb2/mve-vld2-post.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vld2.ll | 98 +- llvm/test/CodeGen/Thumb2/mve-vld3.ll | 1130 ++-- llvm/test/CodeGen/Thumb2/mve-vld4-post.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-vld4.ll | 233 +- llvm/test/CodeGen/Thumb2/mve-vmulh.ll | 122 +- llvm/test/CodeGen/Thumb2/mve-vmull-loop.ll | 41 +- llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll | 42 +- llvm/test/CodeGen/Thumb2/mve-vqmovn.ll | 144 +- llvm/test/CodeGen/Thumb2/mve-vqshrn.ll | 292 +- llvm/test/CodeGen/Thumb2/mve-vst2.ll | 46 +- llvm/test/CodeGen/Thumb2/mve-vst3.ll | 47 +- llvm/test/CodeGen/Thumb2/mve-vst4.ll | 101 +- llvm/test/CodeGen/Thumb2/mve-widen-narrow.ll | 46 +- llvm/test/CodeGen/VE/Vector/fastcc_callee.ll | 17 + llvm/test/CodeGen/X86/avx-vbroadcastf128.ll | 60 +- llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll | 60 +- llvm/test/CodeGen/X86/oddshuffles.ll | 20 +- llvm/test/CodeGen/X86/oddsubvector.ll | 2 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 240 +- .../CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll | 3 +- .../DebugInfo/X86/dimodule-external-fortran.ll | 91 + llvm/test/FileCheck/check-literal.txt | 62 + .../MC/AArch64/directive-arch_extension-negative.s | 75 +- llvm/test/MC/AArch64/directive-arch_extension.s | 4 + llvm/test/MC/ELF/got-relaxed-rex.s | 36 - llvm/test/MC/X86/gotpcrelx.s | 65 + .../Transforms/CodeExtractor/extract-assume.ll | 2 +- llvm/test/Transforms/Coroutines/coro-inline.ll | 14 +- .../MSSA/multiblock-memintrinsics.ll | 4 +- .../MSSA/out-of-bounds-stores.ll | 2 + .../DeadStoreElimination/MSSA/overlap.ll | 6 +- .../DeadStoreElimination/MSSA/scoped-noalias.ll | 4 +- .../HotColdSplit/apply-penalty-for-inputs.ll | 21 +- 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create mode 100644 clang/test/Driver/sls-hardening-options.c create mode 100644 llvm/lib/Target/ARM/ARMSLSHardening.cpp create mode 100644 llvm/test/Bitcode/DIModule-fortran-external-module.ll create mode 100644 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll create mode 100644 llvm/test/CodeGen/RISCV/addrspacecast.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll create mode 100644 llvm/test/DebugInfo/X86/dimodule-external-fortran.ll create mode 100644 llvm/test/FileCheck/check-literal.txt delete mode 100644 llvm/test/MC/ELF/got-relaxed-rex.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (87527213 -> e9f48737)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/base-artifacts. discards 87527213 0: update: llvm-linux-qemu: boot new e9f48737 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (87527213) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 172 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13842 +++++++++++------------ 04-build_linux/console.log | 950 +- 05-build_abe-qemu/console.log | 6506 ++++++----- 06-boot_linux/console.log | 488 +- 07-check_regression/console.log | 2 +- 08-update_baseline/console.log | 10 +- console.log | 22406 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 22415 insertions(+), 22407 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

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