Tcwg-commits December 2020

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (22a7e82c200 -> 9032d2b2414)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/gcc. from 22a7e82c200 libstdc++: Fix build failure on AArch64 ILP32 [PR98370] adds 60cecb2b83f libstdc++: Fix mistake in PR98374 change [PR98377] adds d44d47b4926 aarch64: SVE: ICE in expand_direct_optab_fn [PR98177] adds 5dc998933e7 libcc1: Fix up libcc1 configure [PR98330] adds bfb37fa4dd4 openmp: Fix g++.dg/gomp/declare-target-3.C testcase when of [...] adds 8b604594652 openmp: Don't optimize shared to firstprivate on task with [...] adds 0e9f2b2dc8d Re: [r11-6232 Regression] FAIL: gcc.dg/pr97750.c adds 5128f8d0d99 compiler: check for floating-point exponent overflow adds b1a2242e24f Daily bump. adds 9032d2b2414 bswap: Fix up a thinko with empty CONSTRUCTORs [PR98378] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 42 +++++++++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 83 ++++++++++++++++++++++ gcc/fortran/ChangeLog | 45 ++++++++++++ gcc/gimple-ssa-store-merging.c | 2 + gcc/gimplify.c | 12 ++++ gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/lex.cc | 4 ++ gcc/testsuite/ChangeLog | 57 +++++++++++++++ gcc/testsuite/g++.dg/gomp/declare-target-3.C | 14 ++-- gcc/testsuite/g++.target/aarch64/sve/pr98177-1.C | 10 +++ gcc/testsuite/g++.target/aarch64/sve/pr98177-2.C | 10 +++ gcc/testsuite/gcc.dg/pr97750.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/pr98177-1.c | 10 +++ gcc/testsuite/gcc.target/aarch64/sve/pr98177-2.c | 10 +++ .../go.test/test/fixedbugs/issue11326b.go | 4 ++ gcc/testsuite/go.test/test/fixedbugs/issue13471.go | 22 +++--- gcc/tree-vect-loop.c | 8 +-- libcc1/ChangeLog | 7 ++ libcc1/configure | 2 +- libcc1/configure.ac | 2 +- libgo/mkrsysinfo.sh | 1 + libgo/mksysinfo.sh | 1 + libgomp/ChangeLog | 4 ++ libgomp/testsuite/libgomp.c/task-6.c | 47 ++++++++++++ libstdc++-v3/ChangeLog | 64 +++++++++++++++++ libstdc++-v3/src/c++17/floating_to_chars.cc | 2 +- 27 files changed, 442 insertions(+), 29 deletions(-) create mode 100644 gcc/testsuite/g++.target/aarch64/sve/pr98177-1.C create mode 100644 gcc/testsuite/g++.target/aarch64/sve/pr98177-2.C create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr98177-1.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr98177-2.c create mode 100644 libgomp/testsuite/libgomp.c/task-6.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (86ef42bd73 -> 60108e47b5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 86ef42bd73 Run fixed_points.exp with -fgnat-encodings=minimal adds a9e48095a8 gdb: define COFF file offsets with file_ptr adds b3f9469bfa Fix accessing a method's fields from Python adds 4aea001fd8 Add address keyword to Value.format_string adds e846045952 Remove erroneous 'a' in gdb.register_window_type documentation adds e51765f932 Fix name of main_type field type in pretty printer adds a24e049847 Automatic date update in version.in adds 0455b7d325 Warn about static libs vs. source-highlight only when necessary adds fa639f555a Don't compare types of enum fields adds 60108e47b5 [gdb/testsuite] Introduce supports_scalar_storage_order_attribute No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 33 ++++++++++++++++ gdb/coffread.c | 30 +++++++------- gdb/configure | 12 +++--- gdb/configure.ac | 12 +++--- gdb/doc/ChangeLog | 8 ++++ gdb/doc/python.texi | 7 +++- gdb/gdb-gdb.py.in | 2 +- gdb/gdbtypes.c | 4 +- gdb/python/py-type.c | 1 + gdb/python/py-value.c | 7 +++- gdb/testsuite/ChangeLog | 24 +++++++++++ gdb/testsuite/gdb.base/endianity.c | 2 +- gdb/testsuite/gdb.base/endianity.exp | 11 ++++-- .../compare-enum-type-a.c} | 11 +++--- .../compare-enum-type-b.c} | 9 +++-- .../compare-enum-type.exp} | 16 ++++---- .../compare-enum-type.h} | 5 ++- gdb/testsuite/gdb.python/py-format-string.exp | 43 ++++++++++++++++++++ gdb/testsuite/gdb.python/py-type.exp | 3 ++ gdb/testsuite/lib/gdb.exp | 46 ++++++++++++++++++++++ 21 files changed, 232 insertions(+), 56 deletions(-) copy gdb/testsuite/{gdb.base/share-psymtabs-bt.c => gdb.python/compare-enum-type-a [...] copy gdb/testsuite/{gdb.base/psym-external-decl.c => gdb.python/compare-enum-type- [...] copy gdb/testsuite/{gdb.cp/breakpoint-locs.exp => gdb.python/compare-enum-type.exp} (67%) copy gdb/testsuite/{gdb.cp/stub-array-size.h => gdb.python/compare-enum-type.h} (96%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig updated (4179a450 -> 9df36b4c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 4179a450 0: update: binutils-gcc-linux-qemu: boot new 9df36b4c 0: update: binutils-gcc-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (4179a450) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 436 +- 03-build_abe-binutils/console.log | 11985 +++++----- 04-build_abe-stage1/console.log | 16360 +++++++------- 05-build_linux/console.log | 816 +- 06-build_abe-qemu/console.log | 6346 +++--- 07-boot_linux/console.log | 8 +- 08-check_regression/console.log | 12 +- 08-check_regression/results.regressions | 2 +- 09-update_baseline/console.log | 12 +- 09-update_baseline/results.regressions | 2 +- console.log | 36125 +++++++++++++++--------------- jenkins/manifest.sh | 14 +- 13 files changed, 36137 insertions(+), 36111 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig updated (d104e582838 -> 43ff75f2c3f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig in repository toolchain/ci/llvm-project. from d104e582838 [CMake] Avoid __FakeVCSRevision.h with no git repository adds 9caca7241d4 [AArch64][GlobalISel] Use the look-through constant helper [...] adds 43ff75f2c3f [AArch64][GlobalISel] Promote scalar G_SHL constant shift a [...] No new revisions were added by this update. Summary of changes: .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 38 +++++++++++++--------- .../AArch64/GlobalISel/legalize-merge-values.mir | 5 +-- .../GlobalISel/legalize-non-pow2-load-store.mir | 7 ++-- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 4 +-- .../AArch64/GlobalISel/legalize-unmerge-values.mir | 5 +-- llvm/test/CodeGen/AArch64/arm64-clrsb.ll | 4 +-- 6 files changed, 35 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig updated (fce6f1a9 -> 7384b998)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards fce6f1a9 0: update: llvm-linux-qemu: boot new 7384b998 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fce6f1a9) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 180 +- 02-prepare_abe/console.log | 78 +- 03-build_llvm/console.log | 13226 +++++++++++++++--------------- 04-build_linux/console.log | 814 +- 05-build_abe-qemu/console.log | 1898 ++--- 06-boot_linux/console.log | 484 +- 07-check_regression/console.log | 12 +- 08-update_baseline/console.log | 12 +- console.log | 16730 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 16743 insertions(+), 16701 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (d104e582838 -> 43ff75f2c3f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/llvm-project. from d104e582838 [CMake] Avoid __FakeVCSRevision.h with no git repository adds 9caca7241d4 [AArch64][GlobalISel] Use the look-through constant helper [...] adds 43ff75f2c3f [AArch64][GlobalISel] Promote scalar G_SHL constant shift a [...] No new revisions were added by this update. Summary of changes: .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 38 +++++++++++++--------- .../AArch64/GlobalISel/legalize-merge-values.mir | 5 +-- .../GlobalISel/legalize-non-pow2-load-store.mir | 7 ++-- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 4 +-- .../AArch64/GlobalISel/legalize-unmerge-values.mir | 5 +-- llvm/test/CodeGen/AArch64/arm64-clrsb.ll | 4 +-- 6 files changed, 35 insertions(+), 28 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig updated (7ad628e3 -> b29ab3ad)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards 7ad628e3 0: update: llvm-linux-qemu: all new b29ab3ad 0: update: llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7ad628e3) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-arm- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 172 +- 02-prepare_abe/console.log | 436 +- 03-build_llvm/console.log | 13204 +++++++++++++------------- 04-build_linux/console.log | 806 +- 05-build_abe-qemu/console.log | 4621 ++++----- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 2 +- console.log | 19251 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 19259 insertions(+), 19253 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (7fef551cb12 -> 1e785e92624)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/llvm-project. from 7fef551cb12 Revert "Revert "[FPEnv] Teach the IRBuilder about invoke's [...] adds fc7b7fc0669 [RISCV] Add intrinsics for vmv.v.v, vmv.v.x, and vmv.x.i adds a74941da716 Revert "[BasicAA] Handle two unknown sizes for GEPs" adds d551e40f1cf [AIX] Change the code based on https://lists.llvm.org/piper [...] adds 5e5ef535974 [clang-format][NFC] Expand BreakBeforeBraces examples adds 5f75dcf5719 [DebugInfo] Support Fortran 'use <external module>' statement. adds 9b183a1452c [NFC][InstSimplify] Add miscompiled testcase from D87188/D87197 adds e9289dc25f7 [InstSimplify] Don't miscompile `X == 0 ? abs(X) : -abs(X) [...] adds 897c985e1e2 [InstCombine] Canonicalize SPF to abs intrinsic adds 5ac37725df3 [GVNHoist] Remove successorDominate (NFC) adds 86d282baede [RISCV] Add intrinsics for vmv.x.s and vmv.s.x adds 0e94ba9d40d [NFC][InstCombine] Fixup check lines for prof md in select_ [...] adds 46a40c4bc10 [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f adds cd3e8118648 Revert "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1c3a6671c25 Recommit "[RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f" adds 1f1145006b3 [DSE] Use correct memory location for read clobber check adds 09468a91482 [RISCV] Sign extend constant arguments to V intrinsics when [...] adds 2af2f58ec09 [InstCombine] Regenerate test checks (NFC) adds 9c978dd6e12 [TableGen] Fix D90844 introduced non-determinism due to ite [...] adds 69c8d121f7f [RISCV] Add intrinsics for vsetvli instruction adds 08c4b4054b3 Rename files with same (case insensitive) name adds d4ed253d0b8 [RISCV] Assume no-op addrspacecasts by default adds b4c63ef6dd9 [c++20] Mark class type NTTPs as done and start defining th [...] adds 939ba0b501b Add tests for the absence of feature test macros for featur [...] adds 72d8f79f0c3 [c++2b] Add tests for feature test macros. adds ed13d8c6678 Fix memory leak complicated non-type template arguments. adds 37d0dda739a [SLP] fix typo; NFC adds 7948cd11d17 [RISCV] Address clang-tidy warnings in RISCVTargetMachine. NFC. adds f5cef870d11 [www] Remove '$Date$' marker from cxx_dr_status. adds adc55b5a5ae [X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations adds b0615642f64 [clangd] Make our printing policies for Hover more consiste [...] adds af83b74dc2e [VE] Support copy of vector mask registers adds ffd982f7db5 [ObjC][ARC] Fix a bug where the inline-asm retain/claim RV [...] adds 2fced5a07b4 [clangd] Don't cancel requests based on "updates" with same [...] adds 1ab4db0f847 [HotColdSplit] Reflect full cost of parameters in split penalty adds 2b62e623288 [clangd] Fix windows path handling in .clang-tidy parsing adds 44f399ccc12 [FileCheck] Add a literal check directive modifier adds bf0870d8640 [flang] Fix bug in IMPLICIT NONE(EXTERNAL) adds a913a583f00 [lldb] Simplify the is_finalized logic in process and make [...] adds 805d59593f5 [Analysis, CodeGen, IR] Use contains (NFC) adds 195f44278c4 [ARM] Implement harden-sls-retbr for ARM mode adds c061cb521b9 [gn build] Port 195f44278c4 adds 320fd3314e3 [ARM] Implement harden-sls-retbr for Thumb mode adds a4c1f5160e6 [ARM] Harden indirect calls against SLS adds df8ed392837 [ARM] harden-sls-blr: avoid r12 and lr in indirect calls. adds 9c895aea118 [ARM] Add clang command line support for -mharden-sls= adds 9cf3b1b6665 [RISCV] Define vlxe/vsxe/vsuxe intrinsics. adds 5740f96d8ee [NFC][libc++] Fixes swapped comments. adds 1e785e92624 apply update_test_checks.py to a few files in llvm/test/Tra [...] No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/Hover.cpp | 107 +- clang-tools-extra/clangd/TUScheduler.cpp | 63 +- clang-tools-extra/clangd/TidyProvider.cpp | 11 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 12 +- .../clangd/unittests/TUSchedulerTests.cpp | 32 + clang/docs/ClangFormatStyleOptions.rst | 446 +- clang/include/clang/AST/ASTContext.h | 4 +- clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Format/Format.h | 446 +- clang/lib/AST/TemplateBase.cpp | 1 + clang/lib/Driver/ToolChains/Arch/ARM.cpp | 45 + clang/lib/Driver/ToolChains/Arch/ARM.h | 1 + clang/lib/Frontend/InitPreprocessor.cpp | 2 +- clang/test/CodeGen/builtins-wasm.c | 18 +- clang/test/Driver/aarch64-sls-hardening-options.c | 45 - clang/test/Driver/sls-hardening-options.c | 97 + clang/test/Lexer/cxx-features.cpp | 170 +- clang/www/cxx_dr_status.html | 1 - clang/www/cxx_status.html | 2 +- clang/www/make_cxx_dr_status | 1 - flang/lib/Semantics/resolve-names.cpp | 19 +- flang/test/Semantics/implicit07.f90 | 3 + .../libcxx/iterators/trivial_iterators.pass.cpp | 4 +- lld/test/ELF/x86-64-gotpc-relax-nopic.s | 4 +- lldb/include/lldb/Target/Process.h | 13 +- lldb/source/Target/Process.cpp | 21 +- llvm/docs/CommandGuide/FileCheck.rst | 24 + llvm/include/llvm/FileCheck/FileCheck.h | 25 +- llvm/include/llvm/IR/DIBuilder.h | 12 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 26 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 87 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 20 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 3 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 6 +- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 10 +- llvm/lib/Analysis/InstructionSimplify.cpp | 9 +- llvm/lib/AsmParser/LLParser.cpp | 7 +- llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 1 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 2 + .../CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp | 2 +- llvm/lib/FileCheck/FileCheck.cpp | 118 +- llvm/lib/IR/AsmWriter.cpp | 1 + llvm/lib/IR/DIBuilder.cpp | 5 +- llvm/lib/IR/DebugInfoMetadata.cpp | 6 +- llvm/lib/IR/LLVMContextImpl.h | 11 +- llvm/lib/IR/ModuleSummaryIndex.cpp | 2 +- llvm/lib/Target/ARM/ARM.h | 3 + llvm/lib/Target/ARM/ARM.td | 14 + llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 42 + llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 51 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 65 + llvm/lib/Target/ARM/ARMCallLowering.cpp | 9 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 11 + llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 5 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 14 +- llvm/lib/Target/ARM/ARMFeatures.h | 1 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 35 +- llvm/lib/Target/ARM/ARMInstrThumb.td | 13 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 9 + llvm/lib/Target/ARM/ARMPredicates.td | 3 + llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp | 12 +- llvm/lib/Target/ARM/ARMRegisterInfo.td | 17 + llvm/lib/Target/ARM/ARMSLSHardening.cpp | 416 ++ llvm/lib/Target/ARM/ARMSubtarget.h | 10 + llvm/lib/Target/ARM/ARMTargetMachine.cpp | 4 + llvm/lib/Target/ARM/CMakeLists.txt | 1 + llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 65 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 69 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 5 + llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 10 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 348 ++ llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 21 +- llvm/lib/Target/RISCV/RISCVTargetMachine.h | 5 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 2 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 3 +- llvm/lib/Target/VE/VEInstrInfo.cpp | 15 + .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 13 +- llvm/lib/Transforms/IPO/HotColdSplitting.cpp | 61 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 79 +- llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 2 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 79 +- llvm/lib/Transforms/Scalar/GVNHoist.cpp | 9 - llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- llvm/test/Analysis/BasicAA/phi-aa.ll | 3 +- llvm/test/Analysis/BasicAA/recphi.ll | 3 +- llvm/test/Assembler/dimodule.ll | 7 +- .../Bitcode/DIModule-fortran-external-module.ll | 59 + llvm/test/CodeGen/ARM/O3-pipeline.ll | 4 + llvm/test/CodeGen/ARM/speculation-hardening-sls.ll | 246 + llvm/test/CodeGen/RISCV/addrspacecast.ll | 49 + .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 33 + .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 51 + llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 204 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 203 + llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll | 3281 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll | 5361 +++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 505 ++ llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 617 +++ llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 236 + llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 288 + llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll | 3445 ++++++++++++ llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll | 5629 ++++++++++++++++++++ llvm/test/CodeGen/VE/Vector/fastcc_callee.ll | 17 + .../DebugInfo/X86/dimodule-external-fortran.ll | 91 + llvm/test/FileCheck/check-literal.txt | 62 + llvm/test/MC/ELF/got-relaxed-rex.s | 36 - llvm/test/MC/X86/gotpcrelx.s | 65 + .../Transforms/CodeExtractor/extract-assume.ll | 2 +- .../MSSA/multiblock-memintrinsics.ll | 4 +- .../MSSA/out-of-bounds-stores.ll | 2 + .../DeadStoreElimination/MSSA/overlap.ll | 6 +- .../DeadStoreElimination/MSSA/scoped-noalias.ll | 4 +- .../HotColdSplit/apply-penalty-for-inputs.ll | 21 +- .../HotColdSplit/apply-penalty-for-outputs.ll | 8 +- .../HotColdSplit/apply-successor-penalty.ll | 13 +- .../HotColdSplit/assumption-cache-invalidation.ll | 7 +- llvm/test/Transforms/InstCombine/CPP_min_max.ll | 54 +- llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll | 18 +- llvm/test/Transforms/InstCombine/abs-1.ll | 232 +- llvm/test/Transforms/InstCombine/abs_abs.ll | 496 +- llvm/test/Transforms/InstCombine/bitcast.ll | 12 +- llvm/test/Transforms/InstCombine/call-callconv.ll | 12 +- .../test/Transforms/InstCombine/clamp-to-minmax.ll | 102 +- llvm/test/Transforms/InstCombine/cttz-abs.ll | 11 +- llvm/test/Transforms/InstCombine/icmp.ll | 18 +- .../Transforms/InstCombine/insert-const-shuf.ll | 20 +- llvm/test/Transforms/InstCombine/max-of-nots.ll | 10 +- llvm/test/Transforms/InstCombine/minmax-fp.ll | 68 +- llvm/test/Transforms/InstCombine/pr21199.ll | 19 +- .../Transforms/InstCombine/preserve-sminmax.ll | 24 +- llvm/test/Transforms/InstCombine/select_meta.ll | 102 +- llvm/test/Transforms/InstCombine/smax-icmp.ll | 48 +- llvm/test/Transforms/InstCombine/smin-icmp.ll | 48 +- .../Transforms/InstCombine/sub-of-negatible.ll | 8 +- llvm/test/Transforms/InstCombine/umax-icmp.ll | 48 +- llvm/test/Transforms/InstCombine/umin-icmp.ll | 48 +- llvm/test/Transforms/InstSimplify/abs_intrinsic.ll | 32 + .../Transforms/LoopVectorize/ARM/pointer_iv.ll | 59 +- .../exit-block-dominates-rt-check-block.ll | 6 +- llvm/test/Transforms/ObjCARC/contract-marker.ll | 20 + .../PhaseOrdering/X86/vector-reductions.ll | 8 +- .../Transforms/PhaseOrdering/min-max-abs-cse.ll | 11 +- llvm/unittests/IR/MetadataTest.cpp | 22 +- llvm/utils/TableGen/CodeGenSchedule.cpp | 3 + llvm/utils/TableGen/CodeGenSchedule.h | 2 +- .../gn/secondary/llvm/lib/Target/ARM/BUILD.gn | 1 + 163 files changed, 35080 insertions(+), 1798 deletions(-) delete mode 100644 clang/test/Driver/aarch64-sls-hardening-options.c create mode 100644 clang/test/Driver/sls-hardening-options.c create mode 100644 llvm/lib/Target/ARM/ARMSLSHardening.cpp create mode 100644 llvm/test/Bitcode/DIModule-fortran-external-module.ll create mode 100644 llvm/test/CodeGen/ARM/speculation-hardening-sls.ll create mode 100644 llvm/test/CodeGen/RISCV/addrspacecast.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll create mode 100644 llvm/test/DebugInfo/X86/dimodule-external-fortran.ll create mode 100644 llvm/test/FileCheck/check-literal.txt delete mode 100644 llvm/test/MC/ELF/got-relaxed-rex.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig updated (ca9a5e15 -> 940e9d9c)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-defconfig in repository toolchain/ci/base-artifacts. discards ca9a5e15 0: update: llvm-linux-qemu: boot new 940e9d9c 0: update: llvm-linux-qemu: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ca9a5e15) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 126 +- 02-prepare_abe/console.log | 446 +- 03-build_llvm/console.log | 13786 +++++++++++------------ 04-build_linux/console.log | 1004 +- 05-build_abe-qemu/console.log | 6784 ++++++------ 06-boot_linux/console.log | 448 +- 07-check_regression/console.log | 32 +- 08-update_baseline/console.log | 12 +- console.log | 22638 +++++++++++++++++++------------------- jenkins/manifest.sh | 10 +- 10 files changed, 22647 insertions(+), 22639 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

4 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig updated (4d4f82959aa -> 9032d2b2414)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allmodconfig in repository toolchain/ci/gcc. from 4d4f82959aa libstdc++: Simplify built-in detection in <utility> adds 3f78c8cb7f0 c++tools: fix install-strip [PR 98328] adds 8d8bb85b486 c++: Fix template parm ICE [PR 98297] adds b7b6879f0b5 c++: Another solaris header use [PR 98315] adds cdb1c276560 testsuite: Adjust expected instruction count for PPC fold t [...] adds 84747acf8da AArch64: Add NEON, SVE and SVE2 RTL patterns for Complex Addition. adds 9732dc855e5 Arm: Add NEON and MVE RTL patterns for Complex Addition. adds db253e8b1db Arm: MVE: Split refactoring of remaining complex instrinsics adds 64a54505ec8 gcc: xtensa: rearrange DI mode constant loading adds ec13758ed41 C: Avoid incorrect warning for volatile in compound express [...] adds 58a45ce44a9 C: Drop qualifiers of assignment expressions. [PR98047] adds e38c912700f test: add new Go tests from source repo adds 2a4183234a4 rs6000: Add support for powerpc64le-unknown-freebsd adds f4ae1f2c43d maintainer-scripts: Use /sourceware/snapshot-tmp/gcc as tem [...] adds 7c1e7eed891 libstdc++: Add C++ runtime support for new 128-bit long dou [...] adds 900846cda69 reginfo: Add a global_reg_set adds 4187be442f5 Add more iterator utilities adds 0dd48296433 Add an RAII class for managing obstacks adds ac62dce5e5f Add a class that multiplexes two pointer types adds 9a0882ef6a2 Add an alternative splay tree implementation adds d4b520d88ee Add a cut-down version of std::span (array_slice) adds 21335c48576 Split update_cfg_for_uncondjump out of combine adds d6c9781e073 Export print-rtl.c:print_insn_with_notes adds b665081f577 recog: Split out a register_asm_p function adds f48b51496d0 simplify-rtx: Put simplify routines into a class adds 6059a3dd084 recog: Add a validate_change_xveclen function adds eb74135dd35 recog: Add a way of temporarily undoing changes adds 0d74260a1f6 recog: Add a class for propagating into insns adds a240ea024dd recog: Add an RAII class for undoing insn changes adds 04ee46ed1c0 rtlanal: Add some new helper classes adds a20cc016790 rtlanal: Add simple_regno_set adds 47d52e17adf doc: Add documentation for rtl-ssa adds 73b75827752 Add rtl-ssa adds 0b76990a9d7 fwprop: Rewrite to use RTL SSA adds eefe499fdf7 Daily bump. adds 40bf68bbe0b gcc: xtensa: add optimizations for shift operations adds ba74e74ac66 test: add new Go tests from source repo adds 6f8486523f6 test: add new Go tests from source repo adds c09deceb534 PR fortran/98307 - Dependency check fails when using "allocatable" adds ba9fa684053 Fortran: Delay vtab generation until after parsing [PR92587] adds 2f49508599f MAINTAINERS: Add myself for write after approval. adds 33f925094d0 IBM Z: Detect libc's float_t behavior on cross compiles adds 337cbb9f9ed [Ada] Style cleanups in Parse_Aspect_Stable_Properties adds 043d1379211 [Ada] Spurious error on Type'Access and <> adds 9ed2b86d1b3 [Ada] Fixes for GNAT error/warning messages adds 148039493e6 [Ada] Compiler crash on protected component of controlled type adds 7fbcb0c72e4 [Ada] Assert failure on b38105a in -gnat95 mode adds 11ad366da5e [Ada] Spurious discriminant check on bounded synchronized queue adds 38381453711 [Ada] Better diagnostic for new language features adds f6219730a1a [Ada] Crash on discriminant check with current instance adds 211d0b4f036 [Ada] Do not generate encodings for fixed-point types by default adds 5957283fa49 [Ada] Fix small typo in comments. adds 97919732a8e [Ada] Do not use exponentiation for common bases in floatin [...] adds 4d3a70f2d1f [Ada] Move folding of unchecked conversions from expansion [...] adds 84be0369c8d [Ada] Remove discriminant checks processing in gigi adds 81392ae7baf [Ada] Consistent wording for missing -gnat2020 switch adds b7e68e7de0f [Ada] Crash on if expression inside declare expression adds 3e05da6849f [Ada] Ada2020: AI12-0400 Ambiguities associated with Vector adds 2f29ceb054a [Ada] Prevent In_Check_Node routine from going too far in t [...] adds 7948214670c [Ada] Refine type of a multi unit index number adds 445032728dd [Ada] Reduce scopes of local variables for case and if statements adds 96c1f71463d [Ada] Prevent early exits without restoring a global variable adds e2ff35b910f [Ada] Minor comment fix in System.Val_Real adds 98032cd46ff [Ada] Code cleanup: remove Old_Requires_Transient_Scope adds acf190b208a [Ada] Remove unused files adds 68dd6649129 [Ada] Remove unused subprograms in validsw adds 6a6926635c3 [Ada] Performance of CW_Membership adds 62cb9680e59 shrink-wrap: Don't put on incoming EDGE_CROSSING [PR98289] adds 4e7e7c13261 c++tools: Fix up c++tools for --with-gcc-major-version-only adds 5357b1620c5 libcody: Remove nop asm adds 096164229a4 bootstrap: Fix some windows issues [PR 98300] adds f5feee6adc8 libstdc++: Regenerate autoconf files adds 8cdca5f9c70 libstdc++: Move std::hash<std::thread::id> to <bits/std_thread.h> adds 8dc63f13f03 libstdc++: Fix preprocessor condition [PR 98344] adds 9f9dbc8e09c libstdc++: Fix -Wunused warning adds b429f53eba8 bootstrap: Don't use strsignal [PR 98300] adds d592ee3ada8 rtl-ssa: Include memmodel.h before tm_p.h adds c25b504636f Fix trap in pointer conversion in op1_range. adds ec2a58a36ae arm: Fix bootstrap adds b2bc1bb6cab libstdc++: Fix condition for gthreads-timed effective-target adds 217d5beaff9 libstdc++: Test errno macros directly for all targets [PR 93151] adds d1ad55c4e08 libcody: Allow PIC [PR 98324] adds 2d7a40fa60f c++: Fix clang problem [PR 98340] adds 64432b680ea vect, aarch64: Extend SVE vs Advanced SIMD costing decision [...] adds b79ce6e1aa4 doc: Standard library header units adds 4a7a3110c70 Update default_estimated_poly_value prototype in targhooks.h adds 00bad763dcb rtl-ssa: Fix reg_raw_mode thinko [PR98347] adds 35b8d268746 arm: Add support for Cortex-A78C adds cd69e3d5cd6 Daily bump. adds 20f292863f6 c++: Diagnose unstable satisfaction adds 79f57d5cb07 c++: Diagnose self-recursive satisfaction adds 731a32b3fa7 c++: More precise tracking of potentially unstable satisfaction adds e3f0eaa2829 libstdc++: Import parts of the Ryu library adds 5033506993e libstdc++: Apply modifications to our local copy of Ryu adds 3c57e692357 libstdc++: Add floating-point std::to_chars implementation adds ddb9c661c2f libstdc++: Import MSVC floating-point std::to_chars testcases adds dc00689332f Go testsuite: handle +build lines correctly adds 11f07ef3778 c++: Fix PCH ICE with __builtin_source_location [PR98343] adds ce8dcc9105c As well as the PR this patch fixes problems in handling cla [...] adds 785b49434d2 c++: Fix windows binary files [PR 98362] adds bcac28716bb Arm: MVE: Add missing complex mul iterators adds 7ff5706fcd7 aarch64: Extend aarch64-autovec-preference==2 to 128-bit SVE adds 3af02d32cce openmp: Implicitly add 'declare target' directives for dyna [...] adds 266d7464756 libstdc++: Check FE_TONEAREST is defined before using it adds d7bab388b81 libstdc++: Fix build failure due to missing <langinfo.h> [PR98374] adds 22a7e82c200 libstdc++: Fix build failure on AArch64 ILP32 [PR98370] adds 60cecb2b83f libstdc++: Fix mistake in PR98374 change [PR98377] adds d44d47b4926 aarch64: SVE: ICE in expand_direct_optab_fn [PR98177] adds 5dc998933e7 libcc1: Fix up libcc1 configure [PR98330] adds bfb37fa4dd4 openmp: Fix g++.dg/gomp/declare-target-3.C testcase when of [...] adds 8b604594652 openmp: Don't optimize shared to firstprivate on task with [...] adds 0e9f2b2dc8d Re: [r11-6232 Regression] FAIL: gcc.dg/pr97750.c adds 5128f8d0d99 compiler: check for floating-point exponent overflow adds b1a2242e24f Daily bump. adds 9032d2b2414 bswap: Fix up a thinko with empty CONSTRUCTORs [PR98378] No new revisions were added by this update. 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Tcwg-commits December 2020