Tcwg-commits July 2019

tcwg-commits@lists.linaro.org

6 participants
14175 discussions

[llvm] branch master updated (65c12193d04 -> 81598fb771c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 65c12193d04 AMDGPU/GlobalISel: Select G_SHL new aae61649ecd [PowerPC][HTM] Fix impossible reg-to-reg copy assert with t [...] new 81598fb771c AMDGPU/GlobalISel: Select G_LSHR The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/SOPInstructions.td | 4 +- lib/Target/AMDGPU/VOP2Instructions.td | 2 +- lib/Target/AMDGPU/VOP3Instructions.td | 2 +- lib/Target/PowerPC/PPCInstrHTM.td | 4 +- .../{inst-select-shl.mir => inst-select-lshr.mir} | 272 ++++++++++----------- ...select-shl.s16.mir => inst-select-lshr.s16.mir} | 152 ++++++------ .../AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir | 169 +++++++++++++ test/CodeGen/PowerPC/htm-ttest.ll | 30 +++ 8 files changed, 418 insertions(+), 217 deletions(-) copy test/CodeGen/AMDGPU/GlobalISel/{inst-select-shl.mir => inst-select-lshr.mir} (56%) copy test/CodeGen/AMDGPU/GlobalISel/{inst-select-shl.s16.mir => inst-select-lshr.s [...] create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir create mode 100644 test/CodeGen/PowerPC/htm-ttest.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (fff5dc0b173 -> 1d58c1d9d6b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/llvm-project. from fff5dc0b173 Support __seg_fs and __seg_gs on x86 adds 8111807a03c Fix uninitialized variable analyzer warning. NFCI. adds 9428d95ce7f [LV] Exclude loop-invariant inputs from scalar cost computation. adds 951bb68ce26 [TargetParser][ARM] Account dependencies when processing ta [...] adds 3c0e2bb0cba Add test for variant construction with duplicate types. adds 4066978cb7a Improve compile time of variant. adds 635d103e0be [X86] Separate the memory size of vzext_load/vextract_store [...] adds 2d63fbb7b1f [ValueTracking] Look through constant Int2Ptr/Ptr2Int expressions adds 776ac79e88d [NFC][PowerPC] Add the test block-placement.mir adds c3805d761ea [BPF] add unit tests for preserve_{array,union,struct}_acce [...] adds 335f955dc49 [PowerPC] Support fp128 libcalls adds f1ee04c42a4 [LoopInfo] Introduce getUniqueNonLatchExitBlocks utility function adds 796ed134ccc Remove set but unused variable. adds 45c43e7d04d [LoopUtils] Extend the scope of getLoopEstimatedTripCount adds 54869ec907f [Attributor] Deduce "nonnull" attribute adds 6bd02a442c0 [PowerPC] Support -mabi=ieeelongdouble and -mabi=ibmlongdouble adds d02f17daed3 [clangd] Added highlighting to enum constants. adds ea36cdcec31 DeveloperPolicy: fix a typo adds 17b4a932fae [clangd] Added highlighting for members and methods. adds 3ed93b4673b [Loop Peeling] Enable peeling for loops with multiple exits adds 1d554b74412 [LoopVectorize] Pass unfiltered list of arguments to getInt [...] adds d021ad9fbeb [Loop Peeling] Fix the bug with IDom setting for exit loops adds da750b1688f [ARM] Adjust how NEON shifts are lowered adds 309246e4e2f [obj2yaml] - Rework tool's error reporting logic for ELF target. adds b91403d4670 Revert r366052 "[obj2yaml] - Rework tool's error reporting [...] adds f059147a108 [ARM] Move Shifts after Bits. NFC adds 0bf0b8ff7c7 [libFuzzer] Disable fork.test on AArch64 adds 6e89887642f [ARM] MVE Vector Shifts adds 8d9b9f6bf2c [LLD][ELF] - Minor simplification. NFC. adds 224816ba169 Recommit r366052 "[obj2yaml] - Rework tool's error reportin [...] adds 960ff0810da [OpenCL][PR41727] Prevent ICE on global dtors adds 7d5100115af PDB HashTable: Make iterator key type const adds 14d115ff98a [ASTImporter] Using Lang_CXX14 in ASTImporterVisibilityTest. adds 130df2c7e8f Fix uninitialized variable analyzer warning. NFCI. adds d6f34bf4d4a [OpenCL] Deduce addr space for pointee of dependent types i [...] adds 83ae0b5eb4f [mips] Remove "else-after-return". NFC adds 12400b97838 [Testing] Add missing "REQUIRES: asserts" adds 60fb5e97a0d [X86] isTargetShuffleEquivalent - assert the expected mask [...] adds 8d879c8d954 [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions adds 63d00b19e5c [OPENMP]Add support for analysis of if clauses. adds cb238de456b [PatternMatch] Implement matching code for LibFunc adds 4e34a85aa2e [clangd] Fix duplicate highlighting tokens appearing in ini [...] adds 5153b1723a6 [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message adds 62cc16dac20 gn build: Add a note on how to locally tell git to ignore b [...] adds 1d91f94f095 [clangd] Fix doc adds fd08dcb9db0 [AMDGPU] fixed scheduler crash in gfx908 adds a13cca41c5c [ORC] Start adding ORCv1 to ORCv2 transition tips to the OR [...] adds e5086481b65 fix unnamed fiefield issue and add tests for __builtin_pres [...] adds 838c8e30c2f [X86][SSE] Add PACKSS with zero shuffle masks. adds 5a07a614c0f [X86][SSE] Regenerated packss.ll test file. adds 73e33368090 [docs][llvm-nm] Fix inconsistent grammar adds 7284d443c3b Revert "r366069: [PatternMatch] Implement matching code for [...] adds a53e779edc8 [x86] add tests for reductions that might be better with mo [...] adds 3329721e644 [lldb][doc] Document how our LLDB table gen initialized options adds 0e5f9157576 Use unique_ptr instead of manual delete in one place. No be [...] adds 05489f09522 Use a unique_ptr instead of manual memory management for Cu [...] adds cc02b170823 AMDGPU/GlobalISel: RegBankSelect for G_CONCAT_VECTORS adds a65913e752e AMDGPU/GlobalISel: Select easy cases for G_BUILD_VECTOR adds a2dcbd36439 Use a unique_ptr instead of manual memory management for LineTable adds 8e7eee617a0 [ARM] Minor formatting in ARMInstrMVE.td. NFC adds 3dcd7996f11 [FunctionAttrs] Remove readonly and writeonly assertion adds 56799837a41 Update __VERSION__ to remove the hardcoded 4.2.1 version adds 7938424eb92 [AMDGPU] Copy missing predicate from pseudo to real adds 269e4e1b601 Add some release notes for 9.0 release adds 49169a963e8 AMDGPU: Add 24-bit mul intrinsics adds 3e7c314b039 Reland "[COFF] Add null check in case of symbols defined in [...] adds 81971b2b79c [X86] Return UNDEF from LowerScalarImmediateShift when the [...] adds 032e3c468fa [llvm-lib] Add a dependency to intrinsics_gen to the LLVMLi [...] adds eb99165b97b [x86] try to keep FP casted+truncated+extracted vector elem [...] adds b390121efb3 AMDGPU/GlobalISel: Select llvm.amdgcn.end.cf adds ff1c5288cb6 AMDGPU: Remove reserved value accidentally left in for gfx908 adds 53fa759ff5a AMDGPU/GlobalISel: Handle llvm.amdgcn.if.break adds 90bdfb3daf7 AMDGPU/GlobalISel: Widen vector extracts adds b2a0745e2d5 [WebAssembly] Assembler: recognize .init_array as data section. adds 4885978e231 [sanitizers][windows][mingw32] Mingw32 RTL fixes RTL interc [...] adds dc56995c574 [ARM] MVE vector for 64bit types adds ac6375d99d1 Expand comment about how StringsToBuckets was computed, and [...] adds 42e90ed7717 [cmake] Don't set install rules for tblgen if building util [...] adds 99f2a108707 [FileCheck] Store line numbers as optional values adds ba4373ea7d9 AMDGPU: Fix missing immarg from interp intrinsics adds 434d664095b GlobalISel: Implement narrowScalar for vector extract/inser [...] adds 5dfd4660329 AMDGPU/GlobalISel: Fix G_ICMP for wave32 adds b0e04c018c3 AMDGPU/GlobalISel: Custom legalize G_EXTRACT_VECTOR_ELT adds 6ed315f89be AMDGPU/GlobalISel: Custom legalize G_INSERT_VECTOR_ELT adds 18b7133843b AMDGPU/GlobalISel: Fix handling of sgpr (not scc bank) s1 to VCC adds 3bfdb54d88d AMDGPU/GlobalISel: Fix not constraining result reg of copie [...] adds e1b52f41803 AMDGPU/GlobalISel: Fix selecting vcc->vcc bank copies adds ad19b50c000 AMDGPU/GlobalISel: Don't constrain source register of VCC copies adds c8291c94f83 AMDGPU/GlobalISel: Select G_AND/G_OR/G_XOR adds c5d7b0c4547 Constrain workaround to avoid affecting other buildbots adds c5e7f562496 ARM MTE stack sanitizer. adds dfcd4384cbc [libc++] Implement P0433: deduction guides for <unordered_map> adds 66ee934440c AMDGPU/GlobalISel: Allow scalar s1 and/or/xor adds 39d888c1e42 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds 794346460af [clang] allow -fthinlto-index= without -x ir adds d00d8578016 TableGen: Add address space to matchers adds 02772499551 TableGen/GlobalISel: Fix handling of truncstore patterns adds c4f245b40aa [LoopUnroll+LoopUnswitch] do not transform loops containing callbr adds 228f80d92dc [TSan] Fix asm token error adds b082f1055b0 AMDGPU: Use standalone MUBUF load patterns adds becae2b2324 [mips] Print BEQZL and BNEZL pseudo instructions adds 46b84fa231c [ScopInfo][NFC] Add dot at the end of comment statement. adds 423b4a18a49 [AMDGPU] Enable merging m0 initializations. adds 8528b1951cc [ASan] Fix >80 character line. adds 5076038bb00 [DirectoryWatcher][NFC][test] Add typedef for enum adds c5e7a3d7100 [DirectoryWatcher][test] Relax test assumptions adds 292e21d8bce [WebAssembly] Assembler: support special floats: infinity / nan adds 474009eaea7 [WebAssembly] Simplify regcopy.mir adds 853813293ac [clang-fuzzer] Remove 'setUseOrcMCJITReplacement(false)' call. adds 67cee1dc7ee [llvm-lipo] Implement -create (with hardcoded alignments) adds 4422cc4f1a9 [OpenCL] Make TableGen'd builtin tables and helper function [...] adds c9e3c830144 Revert [llvm-lipo] Implement -create (with hardcoded alignments) adds 9f96a58cccb [WebAssembly] Rename except_ref type to exnref adds 199f8721e6a add -fthinlto-index= option to clang-cl adds a28dcf693d1 [llvm-readelf] Print "File: lib.a(file.o)" info when dumpin [...] adds b5701710a42 [LanguageRuntime] Move ObjCLanguageRuntime into a plugin adds 1cf69226601 [WebAssembly] Add missing utility methods for exnref type adds c48162db994 [TSan] Fix asm token error (again) adds 51193871daf [X86] Teach convertToThreeAddress to handle SUB with immediate adds 60a0d49e77c [DirectoryWatcher][linux] Fix for older kernels adds bb147aabc68 Revert "[NewPM] Port Sancov" adds 93dfb93ad68 Temporarily Revert "[SLP] Recommit: Look-ahead operand reor [...] adds fdcbd5fa486 Temporarily Revert "fix unnamed fiefield issue and add test [...] adds c245249b7bd Update some file changes, but there's a dependency loop so [...] adds bf20b2ace68 Temporarily revert "add -fthinlto-index= option to clang-cl" adds 509903e8872 [DebugInfo] Move function from line table to the prologue (NFC) adds 50f0c824532 Allow for vendor prefixes in a list test adds 01ee172e9e4 Revert "[DebugInfo] Move function from line table to the pr [...] adds 0d121273181 [Target] Remove unused method Target::GetDefaultClangModule [...] adds 543ba4e9e0c [InstructionSimplify] Apply sext/trunc after pointer stripping adds fa52e00c85c [Sema] Suppress additional warnings for C's zero initializer adds ca16d280f7e Re-land "[DebugInfo] Move function from line table to the p [...] adds 492ce8cc8b0 reland "add -fthinlto-index= option to clang-cl" adds 49e14cefbe4 Change a lit test to permit vendor specific clang version adds 1739b700b17 AMDGPU: Avoid code predicates for extload PatFrags adds e7e8789a632 Revert "[OPENMP]Add support for analysis of if clauses." adds a17b1aed6ab Add contains method to associative containers. This patch i [...] adds e5c4b468f06 hwasan: Pad arrays with non-1 size correctly. adds 4ac0b9be230 [RISCV] Make RISCVELFObjectWriter::getRelocType check IsPCRel adds a3c7b27419a [RISCV][NFC] Fix HasStedExtA -> HasStdExtA typo in comment adds ef8577ef987 [RISCV][NFC] Split PseudoCALL pattern out from instruction adds e9ad0cf6cf7 [RISCV] Fix a potential issue in shouldInsertFixupForCodeAlign() adds bb479ca3119 [RISCV] Avoid overflow when determining number of nops for [...] adds 49a3ad21d60 Fix parameter name comments using clang-tidy. NFC. adds 1ffceaa5436 [RISCV] Match GNU tools canonical JALR and add aliases adds 47cfe8f3215 [ELF] Fix variable names in comments after VariableName -> [...] adds c0b2ed664bc [X86] In combineStore, don't convert v2f32 load/store pairs [...] adds 3e10905c49f [NFC][test] Fix for riscv tests. adds e215996a293 Finish "Adapt -fsanitize=function to SANITIZER_NON_UNIQUE_T [...] adds d0ac1888aab [lldb] Handle EOF from `lldb-vscode` adds 860f7ec0587 [DWARF] Simplify DWARFAttribute. NFC. adds 74c350af218 [DWARF] Fix an incorrect format specifier. adds f48bc018123 [DWARF] Fix the reserved values for unit length in DWARFDebugLine. adds a54c46674ef [NFC][PowerPC] Add test case for D64195 adds 33fdf82dda0 [WebAssembly] Rename variale references in comments after V [...] adds 2e2038b6470 [COFF] Rename variale references in comments after Variable [...] adds a3077526277 [clang-scan-view] Force utf-8 when handling report (python2 only) adds a3e26d1a6cd [NFC] Test commit: add full stop at end of comment adds c5a2d7470e1 [lldb] Rename Options.inc to CommandOptions.inc [NFC] adds eb72138340c [AArch64] Implement __jcvt intrinsic from Armv8.3-A adds 1781c28a0d3 Remove username from git-llvm script, erroneously added in 366197 adds 06377ae2e58 [clangd] Don't rebuild background index until we indexed on [...] adds 0afffab0d1e [SemaTemplate] Fix uncorrected typos after pack expansion adds 971ac4ca2cb Reapply [llvm-ar][test] Add to MRI test coverage adds a5dc9c98352 [Driver] Don't pass --dynamic-linker to ld on Solaris adds a1370877d7f [Object/llvm-readelf/llvm-readobj] - Improve error reportin [...] adds eea828054d3 Document the LLVM_ENABLE_BINDINGS option adds 116e58e2929 remove a duplicate declaration adds 3a6aaa4391f Reapply [llvm-ar][test] Increase llvm-ar test coverage adds aae7553b346 [clangd] Added highlighting for the targets in typedefs and using. adds 58864fad39b [pstl] Fix compilation with TBB backend adds 8e482eb5cbb [llvm-ar][test] Add to llvm-ar test coverage adds 22c4a147a96 AMDGPU/GlobalISel: Fix test failures in release build adds 655cb4a2d70 [OPENMP]Add support for analysis of if clauses. adds 8ece3b67199 [OpenCL] Fixing sampler initialisations for C++ mode. adds d3941e66306 [SWIG] Deprecate SWIG 1.x adds f34a69c2e27 [DAGCombiner] fold (addcarry (xor a, -1), b, c) -> (subcarr [...] adds 228a7b4f2a3 [ADCE] Fix non-deterministic behaviour due to iterating ove [...] adds cc909812a39 [Remarks][NFC] Combine ParserFormat and SerializerFormat adds 94bad22c2c6 [Remarks] Simplify and refactor the RemarkParser interface adds 88ed076e447 Add missing test for r366215 adds 2eacf698802 Revert [tools] [llvm-nm] Default to reading from stdin not a.out adds 42816107f78 [OPENMP]Fix threadid in __kmpc_omp_taskwait call for depend [...] adds 63a0c2bce8e Revert "[swig] Add workaround for old swig" adds 450c62e33ea [Strict FP] Allow more relaxed scheduling adds b3f967d4113 [AMDGPU] Add the adjusted FP as a livein register. adds 85b9651edd5 [OPENMP][NVPTX]Fixed checks for cuda versions. adds e6e33cf9f56 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds e8ced86debe [CMake] Add Apple-lldb-Xcode.cmake cache that avoids instal [...] adds 97b4d7a8e14 Removed -mno-omit-leaf-frame-pointer from flags. adds 1ff55357855 [OpenMP] Move header inclusion out of 'extern "C"' adds c65a9db43e1 AMDGPU: Fix missing immarg for mfma intrinsics adds 4754814c5a6 fix unnamed fiefield issue and add tests for __builtin_pres [...] adds c26e27d802c [NFC] Fix -Wreorder warning in TBB backend adds 3559fcd1149 [pstl] Use std::transform_reduce instead of hand-rolled imp [...] adds c6fd5abecc4 AMDGPU: Redefine load PatFrags adds 17060f0a54b [AMDGPU] Optimize atomic max/min adds d100b5dd019 Teach `llvm-pdbutil pretty -native` about `-injected-sources` adds 35c96598b12 AMDGPU/GlobalISel: Select flat loads adds fe44a531e0e [COFF] Implement /safeseh:no and check @feat.00 flags by default adds 8f8d07e93bf AMDGPU: Replace store PatFrags adds 6e1c3bb181b [IndVars] Speculative fix for an assertion failure seen in bots adds 7eb1902cd54 AMDGPU: Add register classes to flat store patterns adds 5826ab6b0c9 [CMake] Fail when Python interpreter doesn't match Python l [...] adds 4b6f69fe906 Fix linkrepro.test after safeseh:no change adds 11dc3d37112 Mark new test as requiring an x86 backend for LTO native ob [...] adds dad1f89210b AMDGPU/GlobalISel: Select flat stores adds 1d58c1d9d6b Fix LLDB Windows build Python version logic after r366243 No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/SemanticHighlighting.cpp | 54 +- clang-tools-extra/clangd/SemanticHighlighting.h | 3 + clang-tools-extra/clangd/index/Background.cpp | 2 +- clang-tools-extra/clangd/index/BackgroundRebuild.h | 14 +- .../clangd/test/semantic-highlighting.test | 11 +- .../clangd/unittests/BackgroundIndexTests.cpp | 10 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 82 +- clang-tools-extra/docs/clangd/Installation.rst | 2 +- clang/docs/LanguageExtensions.rst | 2 + clang/docs/ReleaseNotes.rst | 6 + clang/docs/UndefinedBehaviorSanitizer.rst | 4 +- clang/include/clang/AST/OpenMPClause.h | 7 +- clang/include/clang/Basic/BuiltinsAArch64.def | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Basic/DiagnosticIDs.h | 2 +- clang/include/clang/Basic/Features.def | 1 + clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Basic/Sanitizers.def | 3 + clang/include/clang/Basic/SourceManager.h | 2 +- clang/include/clang/Driver/CC1Options.td | 2 + clang/include/clang/Driver/Options.td | 2 +- clang/lib/ARCMigrate/ARCMT.cpp | 2 +- clang/lib/ARCMigrate/ObjCMT.cpp | 4 +- clang/lib/ARCMigrate/TransGCAttrs.cpp | 2 +- clang/lib/AST/ASTImporter.cpp | 2 +- clang/lib/AST/Expr.cpp | 6 +- clang/lib/AST/ItaniumMangle.cpp | 2 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/AST/OpenMPClause.cpp | 19 + clang/lib/AST/ScanfFormatString.cpp | 2 +- clang/lib/AST/Type.cpp | 4 +- clang/lib/AST/VTableBuilder.cpp | 4 +- clang/lib/Analysis/BodyFarm.cpp | 24 +- clang/lib/Analysis/CFG.cpp | 9 +- clang/lib/Basic/DiagnosticIDs.cpp | 8 +- clang/lib/Basic/FixedPoint.cpp | 4 +- clang/lib/Basic/SourceManager.cpp | 4 +- clang/lib/Basic/Targets/AArch64.cpp | 37 + clang/lib/Basic/Targets/AArch64.h | 6 + clang/lib/Basic/Targets/PPC.cpp | 4 +- clang/lib/CodeGen/BackendUtil.cpp | 47 +- clang/lib/CodeGen/CGBuilder.h | 2 +- clang/lib/CodeGen/CGBuiltin.cpp | 20 +- clang/lib/CodeGen/CGCXX.cpp | 2 +- clang/lib/CodeGen/CGCXXABI.cpp | 2 +- clang/lib/CodeGen/CGCall.cpp | 6 +- clang/lib/CodeGen/CGCoroutine.cpp | 2 +- clang/lib/CodeGen/CGDecl.cpp | 2 +- clang/lib/CodeGen/CGDeclCXX.cpp | 24 +- clang/lib/CodeGen/CGException.cpp | 8 +- clang/lib/CodeGen/CGExpr.cpp | 35 +- clang/lib/CodeGen/CGExprCXX.cpp | 2 +- clang/lib/CodeGen/CGExprConstant.cpp | 2 +- clang/lib/CodeGen/CGObjC.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 26 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 4 +- clang/lib/CodeGen/CodeGenABITypes.cpp | 2 +- clang/lib/CodeGen/CodeGenFunction.cpp | 2 + clang/lib/CodeGen/CodeGenFunction.h | 5 +- clang/lib/CodeGen/CodeGenModule.cpp | 16 +- clang/lib/CodeGen/CoverageMappingGen.cpp | 2 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 43 +- clang/lib/CodeGen/MicrosoftCXXABI.cpp | 32 +- clang/lib/CodeGen/SanitizerMetadata.cpp | 21 +- clang/lib/CodeGen/TargetInfo.cpp | 2 +- clang/lib/CodeGen/TargetInfo.h | 5 + .../linux/DirectoryWatcher-linux.cpp | 9 +- clang/lib/Driver/Compilation.cpp | 12 +- clang/lib/Driver/Driver.cpp | 10 +- clang/lib/Driver/SanitizerArgs.cpp | 13 +- clang/lib/Driver/ToolChains/Clang.cpp | 30 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 + clang/lib/Driver/ToolChains/MSVC.cpp | 4 +- clang/lib/Driver/ToolChains/Solaris.cpp | 4 - clang/lib/Format/UnwrappedLineFormatter.cpp | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Frontend/FrontendActions.cpp | 4 +- clang/lib/Frontend/InitPreprocessor.cpp | 7 +- clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp | 10 +- clang/lib/Frontend/Rewrite/RewriteObjC.cpp | 10 +- clang/lib/Headers/arm_acle.h | 8 + clang/lib/Index/IndexDecl.cpp | 4 +- clang/lib/Lex/HeaderSearch.cpp | 8 +- clang/lib/Lex/PPDirectives.cpp | 6 +- clang/lib/Lex/PPMacroExpansion.cpp | 2 +- clang/lib/Lex/Pragma.cpp | 10 +- clang/lib/Lex/Preprocessor.cpp | 2 +- clang/lib/Parse/ParseCXXInlineMethods.cpp | 2 +- clang/lib/Parse/ParseDecl.cpp | 2 +- clang/lib/Parse/ParseDeclCXX.cpp | 4 +- clang/lib/Parse/ParseExpr.cpp | 8 +- clang/lib/Parse/ParseExprCXX.cpp | 16 +- clang/lib/Parse/ParseObjc.cpp | 12 +- clang/lib/Parse/ParsePragma.cpp | 6 +- clang/lib/Parse/ParseTemplate.cpp | 2 +- clang/lib/Sema/SemaCast.cpp | 6 +- clang/lib/Sema/SemaChecking.cpp | 2 +- clang/lib/Sema/SemaCodeComplete.cpp | 10 +- clang/lib/Sema/SemaDecl.cpp | 4 +- clang/lib/Sema/SemaDeclAttr.cpp | 6 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaDeclObjC.cpp | 2 +- clang/lib/Sema/SemaExpr.cpp | 30 +- clang/lib/Sema/SemaExprCXX.cpp | 2 +- clang/lib/Sema/SemaExprMember.cpp | 14 +- clang/lib/Sema/SemaInit.cpp | 12 +- clang/lib/Sema/SemaLambda.cpp | 10 +- clang/lib/Sema/SemaLookup.cpp | 2 +- clang/lib/Sema/SemaModule.cpp | 4 +- clang/lib/Sema/SemaObjCProperty.cpp | 2 +- clang/lib/Sema/SemaOpenMP.cpp | 4 +- clang/lib/Sema/SemaOverload.cpp | 48 +- clang/lib/Sema/SemaStmt.cpp | 4 +- clang/lib/Sema/SemaStmtAsm.cpp | 2 +- clang/lib/Sema/SemaTemplate.cpp | 6 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 6 +- clang/lib/Sema/SemaTemplateVariadic.cpp | 1 + clang/lib/Sema/SemaType.cpp | 2 +- clang/lib/Sema/TreeTransform.h | 17 + clang/lib/Serialization/ASTReader.cpp | 2 +- clang/lib/Serialization/ASTReaderStmt.cpp | 2 +- clang/lib/Serialization/ASTWriter.cpp | 2 +- clang/lib/Serialization/GlobalModuleIndex.cpp | 4 +- clang/lib/Serialization/ModuleManager.cpp | 12 +- .../Checkers/DynamicTypePropagation.cpp | 6 +- .../Checkers/GCDAntipatternChecker.cpp | 2 +- .../Checkers/IdenticalExprChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 2 +- .../StaticAnalyzer/Checkers/NullabilityChecker.cpp | 2 +- .../StaticAnalyzer/Checkers/OSObjectCStyleCast.cpp | 2 +- .../Checkers/ObjCAutoreleaseWriteChecker.cpp | 2 +- .../RetainCountChecker/RetainCountChecker.cpp | 2 +- .../RetainCountChecker/RetainCountDiagnostics.cpp | 2 +- .../Checkers/RunLoopAutoreleaseLeakChecker.cpp | 2 +- .../Checkers/TrustNonnullChecker.cpp | 4 +- clang/lib/StaticAnalyzer/Core/AnalysisManager.cpp | 2 +- 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73 +- llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 4 +- llvm/lib/DebugInfo/PDB/CMakeLists.txt | 2 + .../DebugInfo/PDB/Native/InjectedSourceStream.cpp | 65 + .../PDB/Native/NativeEnumInjectedSources.cpp | 121 + llvm/lib/DebugInfo/PDB/Native/NativeSession.cpp | 13 +- llvm/lib/DebugInfo/PDB/Native/PDBFile.cpp | 57 +- .../DebugInfo/PDB/Native/PDBStringTableBuilder.cpp | 15 +- llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/LegacyPassManager.cpp | 2 +- llvm/lib/IR/RemarkStreamer.cpp | 36 +- llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/MC/MCParser/WasmAsmParser.cpp | 3 + llvm/lib/Passes/PassBuilder.cpp | 3 +- llvm/lib/Passes/PassRegistry.def | 2 - llvm/lib/Remarks/CMakeLists.txt | 1 + llvm/lib/Remarks/Remark.cpp | 4 + llvm/lib/Remarks/RemarkFormat.cpp | 30 + llvm/lib/Remarks/RemarkParser.cpp | 138 +- llvm/lib/Remarks/RemarkParserImpl.h | 33 - llvm/lib/Remarks/YAMLRemarkParser.cpp | 429 ++-- llvm/lib/Remarks/YAMLRemarkParser.h | 130 +- llvm/lib/Support/APSInt.cpp | 6 +- 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llvm/lib/Target/ARM/ARMInstrVFP.td | 2 +- .../Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp | 2 +- llvm/lib/Target/Mips/MipsISelLowering.h | 2 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 8 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 15 +- .../RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp | 61 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 29 +- llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 2 +- .../SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp | 4 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 31 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 6 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 4 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 26 +- .../Target/WebAssembly/WebAssemblyCFGStackify.cpp | 21 +- .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 4 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 20 +- .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 28 +- .../lib/Target/WebAssembly/WebAssemblyInstrCall.td | 12 +- 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llvm/lib/Transforms/Coroutines/CoroEarly.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 2 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 284 +++ llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp | 1 + llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 7 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 2 +- .../InstCombine/InstCombineMulDivRem.cpp | 8 +- .../Instrumentation/HWAddressSanitizer.cpp | 16 +- .../Transforms/Instrumentation/Instrumentation.cpp | 2 +- .../Instrumentation/SanitizerCoverage.cpp | 359 +-- llvm/lib/Transforms/Scalar/ADCE.cpp | 11 +- .../Scalar/CorrelatedValuePropagation.cpp | 2 +- llvm/lib/Transforms/Scalar/Float2Int.cpp | 2 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 2 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 1 + llvm/lib/Transforms/Utils/LoopUnroll.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 41 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 20 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 20 +- llvm/lib/Transforms/Utils/LowerSwitch.cpp | 2 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 57 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 294 +-- llvm/test/Bitcode/attributes.ll | 11 +- llvm/test/CodeGen/AArch64/fjcvtzs.ll | 10 + .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 590 +++++ .../AMDGPU/GlobalISel/inst-select-build-vector.mir | 152 ++ .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 144 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 13 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 1709 ++++++++++++++- .../AMDGPU/GlobalISel/inst-select-load-global.mir | 1657 ++++++++++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 597 ++++- .../AMDGPU/GlobalISel/inst-select-store-flat.mir | 837 ++++++- .../AMDGPU/GlobalISel/inst-select-store-global.mir | 817 +++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 590 +++++ .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 52 +- .../GlobalISel/legalize-extract-vector-elt.mir | 478 +++- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 246 +-- .../GlobalISel/legalize-insert-vector-elt.mir | 87 +- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 48 +- .../AMDGPU/GlobalISel/legalize-merge-values.mir | 286 ++- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 20 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 62 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 20 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 35 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 34 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 25 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 26 + .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 527 +++++ .../AMDGPU/GlobalISel/regbankselect-and.mir | 145 +- .../GlobalISel/regbankselect-concat-vector.mir | 69 + .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 15 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 1333 +++++++++++ .../AMDGPU/GlobalISel/regbankselect-xor.mir | 15 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll | 494 +++++ .../AMDGPU/atomic_optimizations_local_pointer.ll | 108 + .../CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir | 50 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll | 14 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll | 14 + llvm/test/CodeGen/AMDGPU/mad_uint24.ll | 76 + llvm/test/CodeGen/AMDGPU/merge-m0.mir | 108 +- llvm/test/CodeGen/AMDGPU/mul.i16.ll | 18 +- llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 4 +- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 22 + llvm/test/CodeGen/ARM/vpadd.ll | 47 +- llvm/test/CodeGen/ARM/vuzp.ll | 46 +- llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll | 80 + llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll | 77 + llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll | 76 + llvm/test/CodeGen/PowerPC/block-placement.mir | 217 ++ llvm/test/CodeGen/PowerPC/float-load-store-pair.ll | 106 + llvm/test/CodeGen/PowerPC/fp128-libcalls.ll | 164 ++ llvm/test/CodeGen/RISCV/branch-relaxation.ll | 3 +- llvm/test/CodeGen/RISCV/indirectbr.ll | 2 +- llvm/test/CodeGen/RISCV/option-rvc.ll | 2 +- llvm/test/CodeGen/SystemZ/fp-strict-alias.ll | 222 +- .../SystemZ/vector-constrained-fp-intrinsics.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-abs.ll | 47 + llvm/test/CodeGen/Thumb2/mve-bitarith.ll | 65 + llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 194 ++ llvm/test/CodeGen/Thumb2/mve-fmath.ll | 250 +++ llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll | 57 + llvm/test/CodeGen/Thumb2/mve-frint.ll | 150 ++ llvm/test/CodeGen/Thumb2/mve-minmax.ll | 215 ++ llvm/test/CodeGen/Thumb2/mve-neg.ll | 23 + llvm/test/CodeGen/Thumb2/mve-sext.ll | 47 + llvm/test/CodeGen/Thumb2/mve-shifts.ll | 584 +++++ llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 146 +- llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 166 ++ llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll | 68 + llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 108 + llvm/test/CodeGen/Thumb2/mve-vdup.ll | 49 + llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 89 +- llvm/test/CodeGen/Thumb2/mve-vmvnimm.ll | 16 +- llvm/test/CodeGen/WebAssembly/exception.ll | 12 +- llvm/test/CodeGen/WebAssembly/reg-argument.mir | 59 + .../WebAssembly/{regcopy.mir => reg-copy.mir} | 44 +- llvm/test/CodeGen/X86/add.ll | 14 +- llvm/test/CodeGen/X86/addcarry.ll | 5 +- .../CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll | 12 +- llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll | 28 +- llvm/test/CodeGen/X86/cgp-usubo.ll | 4 +- llvm/test/CodeGen/X86/haddsub.ll | 204 ++ llvm/test/CodeGen/X86/known-bits-vector.ll | 5 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 29 +- llvm/test/CodeGen/X86/packss.ll | 61 + llvm/test/CodeGen/X86/phaddsub-extract.ll | 363 +++ llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 73 +- llvm/test/CodeGen/X86/subcarry.ll | 30 +- .../CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll | 3 +- llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll | 7 +- llvm/test/CodeGen/X86/vector-shuffle-sse1.ll | 19 +- .../HWAddressSanitizer/alloca-array.ll | 15 + .../HWAddressSanitizer/alloca-with-calls.ll | 4 +- .../Instrumentation/HWAddressSanitizer/alloca.ll | 10 +- .../HWAddressSanitizer/kernel-alloca.ll | 4 +- .../SanitizerCoverage/abort-in-entry-block.ll | 1 - .../SanitizerCoverage/backedge-pruning.ll | 2 - .../Instrumentation/SanitizerCoverage/chains.ll | 1 - .../SanitizerCoverage/cmp-tracing-api-x86_32.ll | 25 +- .../SanitizerCoverage/cmp-tracing-api-x86_64.ll | 25 +- .../SanitizerCoverage/cmp-tracing.ll | 1 - .../SanitizerCoverage/coff-comdat.ll | 1 - .../coff-pc-table-inline-8bit-counters.ll | 1 - .../SanitizerCoverage/coff-used-ctor.ll | 3 +- .../SanitizerCoverage/const-cmp-tracing.ll | 1 - .../SanitizerCoverage/coverage-dbg.ll | 1 - .../Instrumentation/SanitizerCoverage/coverage.ll | 4 +- .../SanitizerCoverage/coverage2-dbg.ll | 1 - .../SanitizerCoverage/div-tracing.ll | 1 - .../SanitizerCoverage/gep-tracing.ll | 1 - .../SanitizerCoverage/inline-8bit-counters.ll | 1 - .../interposable-symbol-nocomdat.ll | 2 - .../Instrumentation/SanitizerCoverage/no-func.ll | 1 - .../Instrumentation/SanitizerCoverage/pc-table.ll | 2 - .../SanitizerCoverage/postdominator_check.ll | 2 - llvm/test/Instrumentation/SanitizerCoverage/seh.ll | 3 - .../stack-depth-variable-declared-by-user.ll | 2 - .../SanitizerCoverage/stack-depth.ll | 5 - .../SanitizerCoverage/switch-tracing.ll | 1 - .../SanitizerCoverage/trace-pc-guard-comdat.ll | 1 - .../trace-pc-guard-inline-8bit-counters.ll | 1 - .../SanitizerCoverage/trace-pc-guard-nocomdat.ll | 1 - .../SanitizerCoverage/tracing-comdat.ll | 3 - .../Instrumentation/SanitizerCoverage/tracing.ll | 4 - .../SanitizerCoverage/unreachable-critedge.ll | 1 - .../Instrumentation/SanitizerCoverage/wineh.ll | 1 - llvm/test/MC/AMDGPU/ds.s | 16 +- llvm/test/MC/AMDGPU/expressions.s | 2 +- llvm/test/MC/AMDGPU/gfx10_asm_all.s | 24 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 30 +- llvm/test/MC/AMDGPU/gfx8_asm_all.s | 30 +- llvm/test/MC/AMDGPU/gfx9_asm_all.s | 30 +- llvm/test/MC/AMDGPU/sopp-gfx10.s | 17 + llvm/test/MC/AMDGPU/sopp-gfx9.s | 12 +- llvm/test/MC/Disassembler/AMDGPU/ds_vi.txt | 16 +- .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 36 +- llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 48 +- llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt | 48 +- llvm/test/MC/Disassembler/WebAssembly/wasm.txt | 2 +- llvm/test/MC/Mips/branch-pseudos.s | 32 +- llvm/test/MC/Mips/macro-bcc-imm.s | 16 +- llvm/test/MC/Mips/mips-jump-delay-slots.s | 4 +- llvm/test/MC/RISCV/align.s | 7 + llvm/test/MC/RISCV/compress-rv32i.s | 4 +- llvm/test/MC/RISCV/fixups.s | 6 +- llvm/test/MC/RISCV/rv32e-valid.s | 2 +- llvm/test/MC/RISCV/rv32i-valid.s | 24 +- llvm/test/MC/RISCV/rvi-aliases-valid.s | 28 +- llvm/test/MC/WebAssembly/basic-assembly.s | 23 +- llvm/test/MC/WebAssembly/objdump.s | 4 +- llvm/test/Object/invalid.test | 16 + llvm/test/TableGen/address-space-patfrags.td | 123 ++ .../ADCE/blocks-with-dead-term-nondeterministic.ll | 71 + llvm/test/Transforms/FunctionAttrs/nonnull.ll | 323 ++- llvm/test/Transforms/FunctionAttrs/nosync.ll | 2 +- .../Transforms/FunctionAttrs/read-write-scc.ll | 20 + llvm/test/Transforms/Inline/attributes.ll | 30 + llvm/test/Transforms/InstSimplify/compare.ll | 11 +- llvm/test/Transforms/LoopUnroll/callbr.ll | 51 + .../LoopUnroll/peel-loop-pgo-deopt-idom.ll | 55 + .../Transforms/LoopUnroll/peel-loop-pgo-deopt.ll | 81 + llvm/test/Transforms/LoopUnswitch/callbr.ll | 66 + .../extractvalue-no-scalarization-required.ll | 109 + .../LoopVectorize/vector-intrinsic-call-cost.ll | 30 + .../test/Transforms/SLPVectorizer/X86/lookahead.ll | 208 +- llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll | 119 + llvm/test/tools/llvm-ar/create.test | 14 + llvm/test/tools/llvm-ar/dash-before-letter.test | 12 + llvm/test/tools/llvm-ar/default-add.test | 22 +- llvm/test/tools/llvm-ar/delete.test | 67 + llvm/test/tools/llvm-ar/insert-after.test | 59 + llvm/test/tools/llvm-ar/insert-before.test | 59 + llvm/test/tools/llvm-ar/move-after.test | 59 + llvm/test/tools/llvm-ar/move-before.test | 69 + llvm/test/tools/llvm-ar/move.test | 129 ++ llvm/test/tools/llvm-ar/mri-addlib.test | 45 + llvm/test/tools/llvm-ar/mri-addmod.test | 27 + llvm/test/tools/llvm-ar/mri-comments.test | 19 + llvm/test/tools/llvm-ar/mri-end.test | 48 + llvm/test/tools/llvm-ar/quick-append.test | 93 + llvm/test/tools/llvm-ar/read-only-archive.test | 30 + llvm/test/tools/llvm-ar/symtab.test | 70 + llvm/test/tools/llvm-nm/stdin.test | 33 - .../llvm-pdbutil/injected-sources-native.test | 30 + llvm/test/tools/llvm-readobj/archive.test | 25 +- .../tools/llvm-readobj/elf-dynamic-malformed.test | 1 + .../tools/llvm-readobj/elf-invalid-shstrndx.test | 26 + .../llvm-readobj/macho-universal-x86_64.i386.test | 18 +- .../tools/llvm-readobj/thin-archive-paths.test | 8 +- llvm/test/tools/obj2yaml/section-group.test | 24 +- .../tools/obj2yaml/special-symbol-indices.yaml | 2 +- llvm/tools/llvm-nm/llvm-nm.cpp | 9 +- llvm/tools/llvm-opt-report/OptReport.cpp | 26 +- llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp | 9 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 16 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 30 +- llvm/tools/llvm-readobj/llvm-readobj.h | 1 + llvm/tools/obj2yaml/elf2yaml.cpp | 319 ++- llvm/tools/obj2yaml/obj2yaml.cpp | 13 +- llvm/tools/obj2yaml/obj2yaml.h | 2 +- llvm/tools/remarks-shlib/Remarks.exports | 1 + llvm/unittests/Analysis/LoopInfoTest.cpp | 46 + .../DebugInfo/DWARF/DWARFDebugLineTest.cpp | 12 +- llvm/unittests/Remarks/YAMLRemarksParsingTest.cpp | 103 +- llvm/unittests/Support/FileCheckTest.cpp | 14 +- .../WebAssembly/WebAssemblyExceptionInfoTest.cpp | 16 +- llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 34 +- llvm/utils/TableGen/CodeGenDAGPatterns.h | 2 + llvm/utils/TableGen/CodeGenTarget.cpp | 2 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 90 +- llvm/utils/emacs/llvm-mode.el | 2 +- llvm/utils/gn/README.rst | 2 + .../gn/secondary/llvm/lib/DebugInfo/PDB/BUILD.gn | 2 + .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 6 +- openmp/libomptarget/src/interface.cpp | 10 +- .../test/offloading/target_depend_nowait.cpp | 62 + openmp/runtime/src/include/omp.h.var | 5 +- polly/include/polly/ScopInfo.h | 2 +- pstl/include/pstl/internal/numeric_impl.h | 6 +- pstl/include/pstl/internal/parallel_backend_tbb.h | 20 +- 767 files changed, 26847 insertions(+), 6700 deletions(-) create mode 100644 clang/test/CodeGen/builtin-preserve-access-index.c create mode 100644 clang/test/CodeGen/memtag-attr.cpp delete mode 100644 clang/test/CodeGen/sancov-new-pm.c create mode 100644 clang/test/CodeGen/ubsan-function.cpp create mode 100644 clang/test/CodeGenOpenCLCXX/atexit.cl delete mode 100644 clang/test/Driver/Inputs/solaris_sparc_tree/usr/lib/ld.so.1 delete mode 100644 clang/test/Driver/Inputs/solaris_sparc_tree/usr/lib/sparcv9/ld.so.1 delete mode 100644 clang/test/Driver/Inputs/solaris_x86_tree/usr/lib/amd64/ld.so.1 delete mode 100644 clang/test/Driver/Inputs/solaris_x86_tree/usr/lib/ld.so.1 create mode 100644 clang/test/Driver/cl-thinlto-backend.c create mode 100644 clang/test/Lexer/has_feature_memtag_sanitizer.cpp create mode 100644 clang/test/Sema/builtin-preserve-access-index.c create mode 100644 clang/test/SemaTemplate/typo-variadic.cpp create mode 100644 libcxx/test/libcxx/utilities/meta/stress_tests/stress_test_vari [...] create mode 100644 libcxx/test/std/containers/associative/map/contains.pass.cpp create mode 100644 libcxx/test/std/containers/associative/set/contains.pass.cpp create mode 100644 libcxx/test/std/containers/unord/unord.map/contains.pass.cpp create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/contains.pass.cpp create mode 100644 lld/test/COFF/Inputs/undefined-symbol-lto-a.ll create mode 100644 lld/test/COFF/Inputs/undefined-symbol-lto-b.ll create mode 100644 lld/test/COFF/safeseh-no.s create mode 100644 lld/test/COFF/undefined-symbol-lto.test create mode 100644 lldb/cmake/caches/Apple-lldb-Xcode.cmake rename lldb/source/{Target => Plugins/LanguageRuntime/ObjC}/ObjCLanguageRuntime.cpp (99%) rename lldb/{include/lldb/Target => source/Plugins/LanguageRuntime/ObjC}/ObjCLangu [...] rename llvm/docs/{ORCv2DesignAndImplementation.rst => ORCv2.rst} (64%) create mode 100644 llvm/include/llvm/DebugInfo/PDB/Native/InjectedSourceStream.h create mode 100644 llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumInjectedSources.h create mode 100644 llvm/include/llvm/Remarks/RemarkFormat.h delete mode 100644 llvm/include/llvm/Transforms/Instrumentation/SanitizerCoverage.h create mode 100644 llvm/lib/DebugInfo/PDB/Native/InjectedSourceStream.cpp create mode 100644 llvm/lib/DebugInfo/PDB/Native/NativeEnumInjectedSources.cpp create mode 100644 llvm/lib/Remarks/RemarkFormat.cpp delete mode 100644 llvm/lib/Remarks/RemarkParserImpl.h delete mode 100644 llvm/lib/Target/WebAssembly/WebAssemblyInstrExceptRef.td create mode 100644 llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td create mode 100644 llvm/test/CodeGen/AArch64/fjcvtzs.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir create mode 100644 llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll create mode 100644 llvm/test/CodeGen/PowerPC/block-placement.mir create mode 100644 llvm/test/CodeGen/PowerPC/float-load-store-pair.ll create mode 100644 llvm/test/CodeGen/PowerPC/fp128-libcalls.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-shifts.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reg-argument.mir rename llvm/test/CodeGen/WebAssembly/{regcopy.mir => reg-copy.mir} (69%) create mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll create mode 100644 llvm/test/MC/AMDGPU/sopp-gfx10.s create mode 100644 llvm/test/TableGen/address-space-patfrags.td create mode 100644 llvm/test/Transforms/ADCE/blocks-with-dead-term-nondeterministic.ll create mode 100644 llvm/test/Transforms/FunctionAttrs/read-write-scc.ll create mode 100644 llvm/test/Transforms/LoopUnroll/callbr.ll create mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom.ll create mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll create mode 100644 llvm/test/Transforms/LoopUnswitch/callbr.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scal [...] create mode 100644 llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll create mode 100644 llvm/test/tools/llvm-ar/create.test create mode 100644 llvm/test/tools/llvm-ar/dash-before-letter.test create mode 100644 llvm/test/tools/llvm-ar/delete.test create mode 100644 llvm/test/tools/llvm-ar/insert-after.test create mode 100644 llvm/test/tools/llvm-ar/insert-before.test create mode 100644 llvm/test/tools/llvm-ar/move-after.test create mode 100644 llvm/test/tools/llvm-ar/move-before.test create mode 100644 llvm/test/tools/llvm-ar/move.test create mode 100644 llvm/test/tools/llvm-ar/mri-addlib.test create mode 100644 llvm/test/tools/llvm-ar/mri-addmod.test create mode 100644 llvm/test/tools/llvm-ar/mri-comments.test create mode 100644 llvm/test/tools/llvm-ar/mri-end.test create mode 100644 llvm/test/tools/llvm-ar/quick-append.test create mode 100644 llvm/test/tools/llvm-ar/read-only-archive.test create mode 100644 llvm/test/tools/llvm-ar/symtab.test delete mode 100644 llvm/test/tools/llvm-nm/stdin.test create mode 100644 llvm/test/tools/llvm-pdbutil/injected-sources-native.test create mode 100644 llvm/test/tools/llvm-readobj/elf-invalid-shstrndx.test create mode 100644 openmp/libomptarget/test/offloading/target_depend_nowait.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (a008c76b56 -> 1ff1373b33)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/glibc. from a008c76b56 posix: Fix large mmap64 offset for mips64n32 (BZ#24699) adds 99d01ffcc3 nptl: Add clockid parameter to futex timed wait calls adds 6615f77978 nptl: Add POSIX-proposed sem_clockwait adds afe4de7d28 nptl: Add POSIX-proposed pthread_cond_clockwait adds 600b4be4d9 nptl: pthread_rwlock: Move timeout validation into _full functions adds e996fa72a9 nptl: Add POSIX-proposed pthread_rwlock_clockrdlock & pthrea [...] adds 59213094c8 nptl: Rename lll_timedlock to lll_clocklock and add clockid [...] adds 9d20e22e46 nptl: Add POSIX-proposed pthread_mutex_clocklock adds 65dd7e9ce3 Update NEWS for new _clockwait and _clocklock functions adds 1ff1373b33 nptl: Remove futex_supports_exact_relative_timeouts No new revisions were added by this update. Summary of changes: ChangeLog | 392 +++++++++++++++++++++ NEWS | 9 + manual/threads.texi | 58 +++ nptl/DESIGN-systemtap-probes.txt | 3 + nptl/Makefile | 10 +- nptl/Versions | 6 + nptl/forward.c | 5 + nptl/lll_timedlock_wait.c | 15 +- nptl/nptl-init.c | 1 + nptl/pthreadP.h | 5 + nptl/pthread_cond_wait.c | 64 ++-- nptl/pthread_condattr_setclock.c | 5 - nptl/pthread_mutex_timedlock.c | 50 ++- ...lowlevellock.c => pthread_rwlock_clockrdlock.c} | 16 +- ...lowlevellock.c => pthread_rwlock_clockwrlock.c} | 16 +- nptl/pthread_rwlock_common.c | 32 +- nptl/pthread_rwlock_rdlock.c | 2 +- nptl/pthread_rwlock_timedrdlock.c | 12 +- nptl/pthread_rwlock_timedwrlock.c | 12 +- nptl/pthread_rwlock_wrlock.c | 2 +- nptl/{sem_timedwait.c => sem_clockwait.c} | 25 +- nptl/sem_timedwait.c | 3 +- nptl/sem_wait.c | 3 +- nptl/sem_waitcommon.c | 15 +- nptl/tst-abstime.c | 10 + nptl/tst-cond11.c | 38 +- nptl/tst-cond26.c | 77 ++++ nptl/{tst-eintr5.c => tst-cond27.c} | 51 +-- nptl/tst-mutex11.c | 69 ++++ nptl/tst-mutex5.c | 37 +- nptl/tst-mutex9.c | 24 +- nptl/tst-rwlock14.c | 12 + nptl/tst-rwlock6.c | 95 +++-- nptl/tst-rwlock7.c | 83 +++-- nptl/tst-rwlock9.c | 102 ++++-- nptl/tst-sem13.c | 39 +- nptl/tst-sem17.c | 76 ++++ nptl/tst-sem5.c | 23 +- sysdeps/nptl/futex-internal.h | 18 +- sysdeps/nptl/lowlevellock-futex.h | 13 +- sysdeps/nptl/lowlevellock.h | 16 +- sysdeps/nptl/pthread-functions.h | 4 + sysdeps/nptl/pthread.h | 36 ++ sysdeps/pthread/semaphore.h | 7 + sysdeps/sparc/sparc32/lll_timedlock_wait.c | 2 +- sysdeps/sparc/sparc32/lowlevellock.c | 15 +- sysdeps/unix/sysv/linux/aarch64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/alpha/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/arm/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/csky/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/futex-internal.h | 32 +- sysdeps/unix/sysv/linux/hppa/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/i386/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/ia64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/lowlevellock-futex.h | 32 +- .../sysv/linux/m68k/coldfire/libpthread.abilist | 5 + .../unix/sysv/linux/m68k/m680x0/libpthread.abilist | 5 + .../unix/sysv/linux/microblaze/libpthread.abilist | 5 + .../unix/sysv/linux/mips/mips32/libpthread.abilist | 5 + .../unix/sysv/linux/mips/mips64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/nios2/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/powerpc/elision-timed.c | 6 +- sysdeps/unix/sysv/linux/powerpc/lowlevellock.h | 9 +- .../linux/powerpc/powerpc32/libpthread.abilist | 5 + .../linux/powerpc/powerpc64/be/libpthread.abilist | 5 + .../linux/powerpc/powerpc64/le/libpthread.abilist | 5 + .../unix/sysv/linux/riscv/rv64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/s390/elision-timed.c | 6 +- sysdeps/unix/sysv/linux/s390/lowlevellock.h | 9 +- .../sysv/linux/s390/s390-32/libpthread.abilist | 5 + .../sysv/linux/s390/s390-64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/sh/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/sparc/lowlevellock.h | 11 +- .../sysv/linux/sparc/sparc32/libpthread.abilist | 5 + .../sysv/linux/sparc/sparc64/libpthread.abilist | 5 + sysdeps/unix/sysv/linux/x86/elision-timed.c | 6 +- sysdeps/unix/sysv/linux/x86/lowlevellock.h | 11 +- .../unix/sysv/linux/x86_64/64/libpthread.abilist | 5 + .../unix/sysv/linux/x86_64/x32/libpthread.abilist | 5 + 79 files changed, 1532 insertions(+), 318 deletions(-) copy nptl/{libc-lowlevellock.c => pthread_rwlock_clockrdlock.c} (67%) copy nptl/{libc-lowlevellock.c => pthread_rwlock_clockwrlock.c} (67%) copy nptl/{sem_timedwait.c => sem_clockwait.c} (65%) create mode 100644 nptl/tst-cond26.c copy nptl/{tst-eintr5.c => tst-cond27.c} (51%) create mode 100644 nptl/tst-mutex11.c create mode 100644 nptl/tst-sem17.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (fe3276ba0ca -> a999b7673ab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/gcc. from fe3276ba0ca * config/i386/i386.md (nonmemory_szext_operand): New mode [...] adds a0145d06803 * gcc.dg/tree-ssa/pr84512.c (dg-final): Remove XFAIL on al [...] adds 7e9d3e53280 2019-07-14 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds f2d38fd9733 Daily bump. adds ae63312f5f2 gcc/ChangeLog adds 7b0d7c79224 2019-07-15 Richard Biener <rguenther(a)suse.de> adds 54ee6600bc5 * tree-ssa-alias.c (aliasing_component_refs_walk): Initial [...] adds 65645bd5042 * config/i386/i386.md (@test<mode>_ccno_1): Rename from t [...] adds 258517c160d rs6000: Always output .machine adds 0571a99556c runtime: expose the g variable adds 5b381f2bb44 * config/i386/i386.md (*testdi_1): Put back "%" constraint [...] adds c9c57a24a44 Daily bump. adds 2692ae3aaf1 Remove trailing space. adds 772269dd674 PR91176: Skip debug insns when computing inline costs adds 7d5a42f199a [mips] Fix ambiguous .md attribute uses adds 97114c27b61 [rs6000] Fix ambiguous .md attribute uses adds 385114ecd42 Use file_location for md_reader's ptr_loc adds 48db11b0846 Report ambiguous uses of .md attributes adds ae08adfad0f Fix g++.dg/template/pr84789.C on new concepts branch. adds 56e35b0b149 Simplify type-specifier parsing. adds 315f00e3689 Add parens around constraint in <memory>. adds 7d42682d488 Simplify range location creation in C++ parser. adds a235884df3c Require int128 support in gcc.dg/autopar/pr91162.c adds 05cc36a13ba Don't xfail gcc.dg/tree-ssa/pr84512.c on 64-bit SPARC adds 02a11c1dc6f * g++.dg/lto/alias-1_0.C: Use -O3. * g++.dg/lto/alias-2_0 [...] adds 150ceef9d7d PR rtl-optimization/91164 * dse.c (rest_of_handle_dse): I [...] adds 1882a9e1187 Add missing testcase for PR89190 adds a0efaa5c118 PR rtl-optimization/91173 * tree-ssa-address.c (addr_for_ [...] adds 6a8750b4eca PR rtl-optimization/91173 * g++.dg/pr91173.C: New test. adds a999b7673ab * config/i386/i386.md (*testdi_1): Match CCZmode for cons [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 121 +++++++++- gcc/DATESTAMP | 2 +- gcc/config/i386/i386-expand.c | 21 +- gcc/config/i386/i386.md | 54 +++-- gcc/config/mips/micromips.md | 2 +- gcc/config/rs6000/rs6000.c | 4 +- gcc/config/rs6000/rs6000.md | 38 ++-- gcc/config/rs6000/vsx.md | 4 +- gcc/cp/ChangeLog | 11 + gcc/cp/parser.c | 134 +++++------ gcc/dse.c | 5 +- gcc/fortran/ChangeLog | 6 + gcc/fortran/expr.c | 10 +- gcc/go/gofrontend/MERGE | 2 +- gcc/ipa-fnsummary.c | 4 +- gcc/read-md.c | 27 +-- gcc/read-md.h | 13 +- gcc/read-rtl.c | 67 ++++-- gcc/testsuite/ChangeLog | 60 +++++ gcc/testsuite/g++.dg/lto/alias-1_0.C | 2 +- gcc/testsuite/g++.dg/lto/alias-2_0.C | 2 +- gcc/testsuite/g++.dg/lto/alias-3_0.C | 4 +- gcc/testsuite/g++.dg/lto/alias-3_1.c | 2 - gcc/testsuite/g++.dg/opt/pr91164.C | 89 ++++++++ gcc/testsuite/g++.dg/pr91173.C | 45 ++++ gcc/testsuite/gcc.dg/autopar/pr91162.c | 25 +++ gcc/testsuite/gcc.dg/tree-ssa/pr84512.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c | 60 +++++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-6.c | 65 ++++++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-7.c | 77 +++++++ gcc/testsuite/gcc.target/arm/pr89190.c | 15 ++ gcc/testsuite/gfortran.dg/initialization_14.f90 | 6 +- gcc/testsuite/gfortran.dg/initialization_30.f90 | 21 ++ gcc/tree-cfg.c | 9 +- gcc/tree-ssa-address.c | 14 ++ gcc/tree-ssa-alias.c | 2 +- gcc/tree-ssa-reassoc.c | 285 +++++++++++++++++++++++- libgo/runtime/proc.c | 4 +- libstdc++-v3/ChangeLog | 5 + libstdc++-v3/include/std/memory | 2 +- 44 files changed, 1259 insertions(+), 210 deletions(-) create mode 100644 gcc/testsuite/g++.dg/opt/pr91164.C create mode 100644 gcc/testsuite/g++.dg/pr91173.C create mode 100644 gcc/testsuite/gcc.dg/autopar/pr91162.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-6.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-7.c create mode 100644 gcc/testsuite/gcc.target/arm/pr89190.c create mode 100644 gcc/testsuite/gfortran.dg/initialization_30.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (92434a14b9 -> dfd6917457)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/binutils-gdb. from 92434a14b9 cpu,opcodes,gas: fix arguments to ldabs and ldind eBPF instructions adds 03181f1c38 Automatic date update in version.in adds 5b9d7a9a64 Fix __bss_start assertion failure in _bfd_elf_fix_symbol_flags adds 3719fd55b6 cpu,opcodes,gas: fix explicit arguments to eBPF ldabs instructions adds ca8d69beb1 Use field_core_addr in more places adds 33eca68072 Use field_string in more places adds 1f77b012e6 Introduce field_unsigned adds 07128006d6 Fix a FIXME in mi-out.c adds 7e24fb63e7 Automatic date update in version.in adds cbde90f25e Add include of gdbarch.h. adds 206e6c58a7 Fix build for aarch64, arm, and riscv FreeBSD native targets. adds 21df382b91 x86: fold SReg{2,3} adds dfd6917457 x86: make RegMem an opcode modifier No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 5 + bfd/elflink.c | 13 +- bfd/version.h | 2 +- cpu/ChangeLog | 5 + cpu/bpf.cpu | 63 +- gas/ChangeLog | 30 + gas/config/tc-i386-intel.c | 5 +- gas/config/tc-i386.c | 70 +- gas/doc/c-bpf.texi | 16 +- gas/testsuite/gas/bpf/mem-be.d | 8 +- gas/testsuite/gas/bpf/mem.d | 8 +- gas/testsuite/gas/bpf/mem.s | 8 +- gas/testsuite/gas/i386/ilp32/x86-64-opcode.d | 306 +- gas/testsuite/gas/i386/x86-64-opcode.d | 4 + gas/testsuite/gas/i386/x86-64-opcode.s | 4 + gdb/ChangeLog | 55 + gdb/aarch64-fbsd-nat.c | 15 +- gdb/ada-tasks.c | 10 +- gdb/arm-fbsd-nat.c | 14 +- gdb/breakpoint.c | 4 +- gdb/cli-out.c | 13 + gdb/cli-out.h | 3 + gdb/disasm.c | 2 +- gdb/fbsd-nat.c | 1 + gdb/i386-linux-tdep.c | 6 +- gdb/i386-tdep.c | 2 +- gdb/infrun.c | 4 +- gdb/mi/mi-interp.c | 2 +- gdb/mi/mi-main.c | 2 +- gdb/mi/mi-out.c | 13 +- gdb/mi/mi-out.h | 3 + gdb/record-btrace.c | 14 +- gdb/riscv-fbsd-nat.c | 15 +- gdb/sparc64-linux-tdep.c | 6 +- gdb/symfile.c | 14 +- gdb/target.c | 4 +- gdb/ui-out.c | 14 + gdb/ui-out.h | 4 + include/ChangeLog | 4 + include/opcode/i386.h | 1 + opcodes/ChangeLog | 42 + opcodes/bpf-desc.c | 44 +- opcodes/bpf-opc.c | 72 +- opcodes/bpf-opc.h | 7 +- opcodes/i386-gen.c | 11 +- opcodes/i386-init.h | 195 +- opcodes/i386-opc.h | 22 +- opcodes/i386-opc.tbl | 85 +- opcodes/i386-reg.tbl | 14 +- opcodes/i386-tbl.h | 54549 +++++++++++-------------- 50 files changed, 24789 insertions(+), 31024 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig updated (8958f1e9a81 -> 838a5d8f400)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/gcc. from 8958f1e9a81 S/390: Fix vector shift count operand adds 3240bb8a565 Daily bump. adds abf83a28b0d [ARM] Fix Thumb-1 ldm (PR89190) adds 838a5d8f400 [ARM] Fix PR89222 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 19 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 35 ++++++++++++++--------- gcc/config/arm/arm.md | 51 ++++++++++------------------------ gcc/testsuite/ChangeLog | 13 +++++++++ gcc/testsuite/gcc.target/arm/pr89190.c | 15 ++++++++++ gcc/testsuite/gcc.target/arm/pr89222.c | 32 +++++++++++++++++++++ 7 files changed, 116 insertions(+), 51 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr89190.c create mode 100644 gcc/testsuite/gcc.target/arm/pr89222.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO updated (a51f1b4f -> 4f16bd10)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-master-arm-spec2k6-Oz_LTO in repository toolchain/ci/base-artifacts. discards a51f1b4f 0: update: binutils-gcc-glibc-llvm: -1 new 4f16bd10 0: update: binutils-gcc-glibc-llvm: -1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a51f1b4f) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-master-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 282 +- 02-prepare_abe/console.log | 438 +- 03-build_abe-binutils/console.log | 11457 ++- 04-build_abe-stage1/console.log | 19991 +++--- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 38344 +++++----- 07-build_abe-stage2/console.log | 46748 +++++++------ 08-build_llvm-true/console.log | 12051 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 4 +- 09-benchmark/console.log | 106 +- 10-check_regression/console.log | 6 +- 11-update_baseline/console.log | 8 +- console.log | 131509 ++++++++++++++++++----------------- jenkins/manifest.sh | 22 +- 15 files changed, 130633 insertions(+), 130627 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig updated (f83492cd36 -> 47069bb706)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/binutils-gdb. from f83492cd36 Automatic date update in version.in adds 47069bb706 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig updated (34e230ef -> 7ba75d44)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-defconfig in repository toolchain/ci/base-artifacts. discards 34e230ef 0: update: binutils-gcc-linux: boot new 7ba75d44 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (34e230ef) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 122 +- 02-prepare_abe/console.log | 310 +- 03-build_abe-binutils/console.log | 10732 ++++++------- 04-build_abe-stage1/console.log | 16821 +++++++++++---------- 05-build_linux/console.log | 584 +- 06-boot_linux/console.log | 470 +- console.log | 29085 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 29059 insertions(+), 29077 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (10f786ca0ff -> 65c12193d04)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 10f786ca0ff [AMDGPU] Change register type for v32 vectors new 65c12193d04 AMDGPU/GlobalISel: Select G_SHL The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/SOPInstructions.td | 4 +- lib/Target/AMDGPU/VOP2Instructions.td | 2 +- lib/Target/AMDGPU/VOP3Instructions.td | 2 +- test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 327 +++++++++++++++++++++ .../AMDGPU/GlobalISel/inst-select-shl.s16.mir | 203 +++++++++++++ .../AMDGPU/GlobalISel/inst-select-shl.v2s16.mir | 168 +++++++++++ 6 files changed, 702 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir create mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

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Tcwg-commits July 2019