Tcwg-commits July 2019

tcwg-commits@lists.linaro.org

6 participants
14175 discussions

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap updated (991bdaf9787 -> a999b7673ab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap in repository toolchain/ci/gcc. from 991bdaf9787 Fix inaccurate comment in new test adds aedc5ca1341 2019-07-12 Jiangning Liu <jiangning.liu(a)amperecomputing.com> adds aaba90b8aa4 * tree-ssa-alias.c (same_tmr_indexing_p): Break out from . [...] adds d02dc46725c gcc/ChangeLog: adds 1c6526fff10 [Darwin, testsuite] Remove unused test. adds 3bdacff31e1 [PATCH] Fix typo in test case. adds b2293739d52 Daily bump. adds 3ab58307455 * gimplify.c (struct gimplify_omp_ctx): Add order_concurre [...] adds 7815bda7cbe PR c/91149 * c-omp.c (c_omp_split_clauses): Fix a pasto i [...] adds 92f0e07c367 2019-07-15 Prathamesh Kulkarni <prathamesh.kulkarni(a)linaro.org> adds 0e972d45052 * Makefile.rtl: Use g-sercom__linux.adb for all linuxes. adds eb99301c9d1 rs6000: Shut up -Wformat-diag somewhat adds 2bb8562d730 * tree-ssa-alias.c (component_ref_to_zero_sized_trailing_a [...] adds a5049ce076b [Darwin, PPC, testsuite] Require stabs support for a test. adds 30b9d0adff7 Daily bump. adds a6837531f5e rs6000: Shut up -Wformat-diag a little more adds 3b04dbff80f * ipa-fnsummary.c (ipa_dump_hints): Do not dump array_inde [...] adds a05c4b902a4 gdbhooks.py: dump-fn, dot-fn: cast ret values of fopen/fclose adds fe3276ba0ca * config/i386/i386.md (nonmemory_szext_operand): New mode [...] adds a0145d06803 * gcc.dg/tree-ssa/pr84512.c (dg-final): Remove XFAIL on al [...] adds 7e9d3e53280 2019-07-14 Jerry DeLisle <jvdelisle(a)gcc.gnu.org> adds f2d38fd9733 Daily bump. adds ae63312f5f2 gcc/ChangeLog adds 7b0d7c79224 2019-07-15 Richard Biener <rguenther(a)suse.de> adds 54ee6600bc5 * tree-ssa-alias.c (aliasing_component_refs_walk): Initial [...] adds 65645bd5042 * config/i386/i386.md (@test<mode>_ccno_1): Rename from t [...] adds 258517c160d rs6000: Always output .machine adds 0571a99556c runtime: expose the g variable adds 5b381f2bb44 * config/i386/i386.md (*testdi_1): Put back "%" constraint [...] adds c9c57a24a44 Daily bump. adds 2692ae3aaf1 Remove trailing space. adds 772269dd674 PR91176: Skip debug insns when computing inline costs adds 7d5a42f199a [mips] Fix ambiguous .md attribute uses adds 97114c27b61 [rs6000] Fix ambiguous .md attribute uses adds 385114ecd42 Use file_location for md_reader's ptr_loc adds 48db11b0846 Report ambiguous uses of .md attributes adds ae08adfad0f Fix g++.dg/template/pr84789.C on new concepts branch. adds 56e35b0b149 Simplify type-specifier parsing. adds 315f00e3689 Add parens around constraint in <memory>. adds 7d42682d488 Simplify range location creation in C++ parser. adds a235884df3c Require int128 support in gcc.dg/autopar/pr91162.c adds 05cc36a13ba Don't xfail gcc.dg/tree-ssa/pr84512.c on 64-bit SPARC adds 02a11c1dc6f * g++.dg/lto/alias-1_0.C: Use -O3. * g++.dg/lto/alias-2_0 [...] adds 150ceef9d7d PR rtl-optimization/91164 * dse.c (rest_of_handle_dse): I [...] adds 1882a9e1187 Add missing testcase for PR89190 adds a0efaa5c118 PR rtl-optimization/91173 * tree-ssa-address.c (addr_for_ [...] adds 6a8750b4eca PR rtl-optimization/91173 * g++.dg/pr91173.C: New test. adds a999b7673ab * config/i386/i386.md (*testdi_1): Match CCZmode for cons [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 227 +++++++++++++++- gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 4 + gcc/ada/Makefile.rtl | 1 - gcc/c-family/ChangeLog | 6 + gcc/c-family/c-omp.c | 2 +- gcc/config/aarch64/aarch64.c | 1 + gcc/config/i386/i386-expand.c | 21 +- gcc/config/i386/i386.md | 83 +++--- gcc/config/mips/micromips.md | 2 +- gcc/config/rs6000/rs6000-c.c | 3 +- gcc/config/rs6000/rs6000.c | 55 ++-- gcc/config/rs6000/rs6000.md | 38 +-- gcc/config/rs6000/vsx.md | 4 +- gcc/cp/ChangeLog | 11 + gcc/cp/parser.c | 134 +++++----- gcc/doc/invoke.texi | 13 +- gcc/dse.c | 5 +- gcc/expr.c | 10 +- gcc/fortran/ChangeLog | 6 + gcc/fortran/expr.c | 10 +- gcc/gdbhooks.py | 10 +- gcc/gimplify.c | 24 +- gcc/go/gofrontend/MERGE | 2 +- gcc/ipa-cp.c | 2 - gcc/ipa-fnsummary.c | 113 +++----- gcc/ipa-fnsummary.h | 11 +- gcc/ipa-inline.c | 3 - gcc/omp-low.c | 165 +++++++++++- gcc/optabs.c | 10 +- gcc/params.def | 12 +- gcc/read-md.c | 27 +- gcc/read-md.h | 13 +- gcc/read-rtl.c | 67 +++-- gcc/recog.h | 17 ++ gcc/testsuite/ChangeLog | 184 +++++++++++++ gcc/testsuite/c-c++-common/gomp/order-3.c | 212 +++++++++++++++ gcc/testsuite/c-c++-common/gomp/order-4.c | 29 +++ gcc/testsuite/c-c++-common/gomp/reduction-task-3.c | 12 + gcc/testsuite/g++.dg/lto/alias-1_0.C | 2 +- gcc/testsuite/g++.dg/lto/alias-2_0.C | 2 +- gcc/testsuite/g++.dg/lto/alias-3_0.C | 4 +- gcc/testsuite/g++.dg/lto/alias-3_1.c | 2 - gcc/testsuite/g++.dg/opt/pr91164.C | 89 +++++++ gcc/testsuite/g++.dg/pr91173.C | 45 ++++ gcc/testsuite/gcc.dg/Warray-bounds-43.c | 133 ++++++++++ gcc/testsuite/gcc.dg/autopar/pr91162.c | 25 ++ gcc/testsuite/gcc.dg/pr57438-2.c | 23 -- .../gcc.dg/tree-ssa/alias-access-path-9.c | 44 ++++ gcc/testsuite/gcc.dg/tree-ssa/pr84512.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c | 60 +++++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c | 37 +++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-6.c | 65 +++++ gcc/testsuite/gcc.dg/tree-ssa/pr88497-7.c | 77 ++++++ gcc/testsuite/gcc.dg/tree-ssa/pr89430-1.c | 12 + gcc/testsuite/gcc.dg/tree-ssa/pr89430-2.c | 14 + gcc/testsuite/gcc.dg/tree-ssa/pr89430-3.c | 12 + gcc/testsuite/gcc.dg/tree-ssa/pr89430-4.c | 14 + gcc/testsuite/gcc.dg/tree-ssa/pr89430-5.c | 16 ++ gcc/testsuite/gcc.dg/tree-ssa/pr89430-6.c | 19 ++ gcc/testsuite/gcc.dg/tree-ssa/vector-7.c | 2 +- gcc/testsuite/gcc.target/arm/pr89190.c | 15 ++ .../gcc.target/powerpc/bfp/scalar-cmp-exp-eq-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-cmp-exp-gt-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-cmp-exp-lt-2.c | 2 +- .../powerpc/bfp/scalar-cmp-exp-unordered-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-exp-1.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-exp-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-exp-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-1.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-extract-sig-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-1.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-10.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-4.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-5.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-7.c | 2 +- .../gcc.target/powerpc/bfp/scalar-insert-exp-8.c | 2 +- .../powerpc/bfp/scalar-test-data-class-11.c | 2 +- .../powerpc/bfp/scalar-test-data-class-6.c | 2 +- .../powerpc/bfp/scalar-test-data-class-7.c | 2 +- .../gcc.target/powerpc/bfp/scalar-test-neg-2.c | 2 +- .../gcc.target/powerpc/bfp/scalar-test-neg-3.c | 2 +- .../gcc.target/powerpc/bfp/scalar-test-neg-5.c | 2 +- .../gcc.target/powerpc/bfp/vec-extract-exp-2.c | 2 +- .../gcc.target/powerpc/bfp/vec-extract-exp-3.c | 2 +- .../gcc.target/powerpc/bfp/vec-extract-sig-2.c | 2 +- .../gcc.target/powerpc/bfp/vec-extract-sig-3.c | 2 +- .../gcc.target/powerpc/bfp/vec-insert-exp-2.c | 2 +- .../gcc.target/powerpc/bfp/vec-insert-exp-3.c | 2 +- .../gcc.target/powerpc/bfp/vec-insert-exp-6.c | 2 +- .../gcc.target/powerpc/bfp/vec-insert-exp-7.c | 2 +- .../gcc.target/powerpc/bfp/vec-test-data-class-2.c | 2 +- .../gcc.target/powerpc/bfp/vec-test-data-class-3.c | 2 +- .../gcc.target/powerpc/byte-in-either-range-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/byte-in-range-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/byte-in-set-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/byte-in-set-2.c | 2 +- gcc/testsuite/gcc.target/powerpc/cmpb-3.c | 2 +- .../gcc.target/powerpc/crypto-builtin-2.c | 14 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-1.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-11.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-16.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-21.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-26.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-31.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-36.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-41.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-46.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-51.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-56.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-6.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-61.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-66.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-71.c | 2 +- gcc/testsuite/gcc.target/powerpc/dfp/dtstsfi-76.c | 2 +- .../gcc.target/powerpc/stabs-attrib-vect-darwin.c | 1 + .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-cmpnez-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-cntlz-lsbb-2.c | 2 +- .../gcc.target/powerpc/vsu/vec-cnttz-lsbb-2.c | 2 +- .../gcc.target/powerpc/vsu/vec-xl-len-12.c | 2 +- .../gcc.target/powerpc/vsu/vec-xl-len-13.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsu/vec-xlx-7.c | 2 +- gcc/testsuite/gcc.target/powerpc/vsu/vec-xrx-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-xst-len-12.c | 2 +- .../gcc.target/powerpc/vsu/vec-xst-len-13.c | 2 +- gcc/testsuite/gfortran.dg/initialization_14.f90 | 6 +- gcc/testsuite/gfortran.dg/initialization_30.f90 | 21 ++ gcc/tree-cfg.c | 9 +- gcc/tree-ssa-address.c | 14 + gcc/tree-ssa-alias.c | 248 +++++++++--------- gcc/tree-ssa-phiopt.c | 24 +- gcc/tree-ssa-reassoc.c | 285 ++++++++++++++++++++- gcc/tree-vrp.c | 3 +- libgo/runtime/proc.c | 4 +- libstdc++-v3/ChangeLog | 5 + libstdc++-v3/include/std/memory | 2 +- 143 files changed, 2526 insertions(+), 616 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/order-3.c create mode 100644 gcc/testsuite/c-c++-common/gomp/order-4.c create mode 100644 gcc/testsuite/c-c++-common/gomp/reduction-task-3.c create mode 100644 gcc/testsuite/g++.dg/opt/pr91164.C create mode 100644 gcc/testsuite/g++.dg/pr91173.C create mode 100644 gcc/testsuite/gcc.dg/Warray-bounds-43.c create mode 100644 gcc/testsuite/gcc.dg/autopar/pr91162.c delete mode 100644 gcc/testsuite/gcc.dg/pr57438-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/alias-access-path-9.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-4.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-5.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-6.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr88497-7.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-1.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-2.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-3.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-4.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-5.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr89430-6.c create mode 100644 gcc/testsuite/gcc.target/arm/pr89190.c create mode 100644 gcc/testsuite/gfortran.dg/initialization_30.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap updated (ae88b987 -> 096f4c2f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-master-aarch64-bootstrap in repository toolchain/ci/base-artifacts. discards ae88b987 0: update: gcc-991bdaf97870e2775a15314823759aec7fd79599: -5 new 096f4c2f 0: update: gcc-a999b7673ab4f1e04c2eff0a5a08b4a70bdd6c02: -5 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ae88b987) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu/gnu-master-aarch64-b [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 128 +- 02-prepare_abe/console.log | 172 +- 03-build_abe-bootstrap/console.log | 66673 +++++++++++++++++----------------- console.log | 66973 ++++++++++++++++++----------------- jenkins/manifest.sh | 8 +- 5 files changed, 66982 insertions(+), 66972 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os updated (8958f1e9a81 -> 838a5d8f400)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os in repository toolchain/ci/gcc. from 8958f1e9a81 S/390: Fix vector shift count operand adds 3240bb8a565 Daily bump. adds abf83a28b0d [ARM] Fix Thumb-1 ldm (PR89190) adds 838a5d8f400 [ARM] Fix PR89222 No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 19 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 35 ++++++++++++++--------- gcc/config/arm/arm.md | 51 ++++++++++------------------------ gcc/testsuite/ChangeLog | 13 +++++++++ gcc/testsuite/gcc.target/arm/pr89190.c | 15 ++++++++++ gcc/testsuite/gcc.target/arm/pr89222.c | 32 +++++++++++++++++++++ 7 files changed, 116 insertions(+), 51 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr89190.c create mode 100644 gcc/testsuite/gcc.target/arm/pr89222.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os updated (30e1820d02 -> 47069bb706)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os in repository toolchain/ci/binutils-gdb. from 30e1820d02 Automatic date update in version.in adds 9a7543e1c7 Automatic date update in version.in adds e07bdcfb0e Automatic date update in version.in adds 67fcb693d7 Automatic date update in version.in adds 88cd931f4b Automatic date update in version.in adds 8127c1fbe9 [AArch64] Fix bogus MOVPRFX warning for GPR form of CPY adds 989c1bd31c [AArch64] Add missing C_MAX_ELEM flags for SVE conversions adds 0c1d55b839 [AArch64] Allow MOVPRFX to be used with FMOV adds cd40594f59 Ensure that debug information for ARM security functions is [...] adds 2ab3145b4f Automatic date update in version.in adds 88fb66ef25 Automatic date update in version.in adds ec830e3c39 Automatic date update in version.in adds 13acf03468 aarch64: add STO_AARCH64_VARIANT_PCS and DT_AARCH64_VARIANT_PCS adds 5da3661e58 aarch64: handle .variant_pcs directive in gas adds e3e9513ae5 aarch64: override default elf .set handling in gas adds e85bbbe532 aarch64: handle STO_AARCH64_VARIANT_PCS in bfd adds ed1604e838 Automatic date update in version.in adds 6198971493 Automatic date update in version.in adds 7d284924fc Automatic date update in version.in adds b96b6262f5 PR24785, bfd crashes on empty .PPC.EMB.apuinfo section adds 16ba30dcfa aarch64: fix DT_AARCH64_VARIANT_PCS handling in readelf adds c3f9d95f92 Automatic date update in version.in adds 696fde8af3 Automatic date update in version.in adds 0e5ef89880 Automatic date update in version.in adds 13c724eec0 Automatic date update in version.in adds 473272f20c Automatic date update in version.in adds 74bfb66755 Automatic date update in version.in adds f83492cd36 Automatic date update in version.in adds 47069bb706 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 23 ++++ bfd/elf32-arm.c | 18 +++ bfd/elf32-ppc.c | 4 +- bfd/elfnn-aarch64.c | 41 +++++++ bfd/version.h | 2 +- binutils/ChangeLog | 9 ++ binutils/readelf.c | 33 ++++++ gas/ChangeLog | 42 +++++++ gas/config/tc-aarch64.c | 55 +++++++++ gas/config/tc-aarch64.h | 6 + gas/doc/c-aarch64.texi | 6 + gas/testsuite/gas/aarch64/sve-movprfx_25.d | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_25.l | 1 - gas/testsuite/gas/aarch64/sve-movprfx_25.s | 2 +- gas/testsuite/gas/aarch64/sve-movprfx_26.d | 40 +++++++ gas/testsuite/gas/aarch64/sve-movprfx_26.l | 12 +- gas/testsuite/gas/aarch64/sve-movprfx_26.s | 28 ++++- gas/testsuite/gas/aarch64/sve-movprfx_27.d | 14 +++ gas/testsuite/gas/aarch64/sve-movprfx_27.s | 11 ++ gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d | 10 ++ gas/testsuite/gas/aarch64/symbol-variant_pcs-1.s | 8 ++ gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d | 9 ++ gas/testsuite/gas/aarch64/symbol-variant_pcs-2.s | 4 + gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d | 12 ++ gas/testsuite/gas/aarch64/symbol-variant_pcs-3.s | 20 ++++ include/ChangeLog | 8 ++ include/elf/aarch64.h | 6 + ld/ChangeLog | 25 ++++ ld/testsuite/ld-aarch64/aarch64-elf.exp | 4 + ld/testsuite/ld-aarch64/variant_pcs-1.s | 59 ++++++++++ ld/testsuite/ld-aarch64/variant_pcs-2.s | 47 ++++++++ ld/testsuite/ld-aarch64/variant_pcs-now.d | 67 +++++++++++ ld/testsuite/ld-aarch64/variant_pcs-r.d | 60 ++++++++++ ld/testsuite/ld-aarch64/variant_pcs-shared.d | 67 +++++++++++ ld/testsuite/ld-aarch64/variant_pcs.ld | 23 ++++ ld/testsuite/ld-arm/arm-elf.exp | 6 + ld/testsuite/ld-arm/cmse_main.s | 21 ++++ ld/testsuite/ld-arm/cmse_main_sec_debug.d | 29 +++++ ld/testsuite/ld-arm/cmse_sec_debug.s | 142 +++++++++++++++++++++++ opcodes/ChangeLog | 15 +++ opcodes/aarch64-opc.c | 5 - opcodes/aarch64-tbl.h | 58 ++++----- 42 files changed, 1008 insertions(+), 46 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_27.d create mode 100644 gas/testsuite/gas/aarch64/sve-movprfx_27.s create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-1.d create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-1.s create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-2.d create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-2.s create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-3.d create mode 100644 gas/testsuite/gas/aarch64/symbol-variant_pcs-3.s create mode 100644 ld/testsuite/ld-aarch64/variant_pcs-1.s create mode 100644 ld/testsuite/ld-aarch64/variant_pcs-2.s create mode 100644 ld/testsuite/ld-aarch64/variant_pcs-now.d create mode 100644 ld/testsuite/ld-aarch64/variant_pcs-r.d create mode 100644 ld/testsuite/ld-aarch64/variant_pcs-shared.d create mode 100644 ld/testsuite/ld-aarch64/variant_pcs.ld create mode 100644 ld/testsuite/ld-arm/cmse_main.s create mode 100644 ld/testsuite/ld-arm/cmse_main_sec_debug.d create mode 100644 ld/testsuite/ld-arm/cmse_sec_debug.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os updated (5562edf0 -> e7dbcecf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/llvm-release-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 5562edf0 0: update: binutils-30e1820d023f37a717d6c319aa8556a05f35def5: 0 new e7dbcecf 0: update: binutils-gcc-glibc-llvm: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5562edf0) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/llvm-release-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 242 +- 02-prepare_abe/console.log | 454 +- 03-build_abe-binutils/console.log | 11230 ++-- 04-build_abe-stage1/console.log | 13578 ++-- 05-build_abe-linux/console.log | 290 +- 06-build_abe-glibc/console.log | 38687 +++++------ 07-build_abe-stage2/console.log | 40129 +++++------ 08-build_llvm-true/console.log | 11602 ++-- 09-benchmark/benchmark-start.log | 2 +- 09-benchmark/benchmark.log | 5 +- 09-benchmark/console.log | 245 +- 10-check_regression/console.log | 4061 +- 11-update_baseline/console.log | 3653 +- console.log | 124259 ++++++++++++++++++----------------- jenkins/manifest.sh | 17 +- results.csv | 172 +- results_id | 2 +- 17 files changed, 125592 insertions(+), 123036 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[libcxx] branch master updated (3f39fe31c -> 5f99b4ef1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from 3f39fe31c Add contains method to associative containers. This patch imp [...] new 5f99b4ef1 [libc++] Add missing UNSUPPORTED for CTAD tests The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../containers/unord/unord.multiset/unord.multiset.cnstr/deduct.pass.cpp | 1 + test/std/containers/unord/unord.set/unord.set.cnstr/deduct.pass.cpp | 1 + 2 files changed, 2 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[compiler-rt] branch master updated (48b8bfb2c -> 36ec38116)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository compiler-rt. from 48b8bfb2c [GWP-ASan] Add thread ID to PRNG seed. new 36ec38116 [TSan] Improve handling of stack pointer mangling in {set,lon [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/tsan/rtl/tsan_rtl_aarch64.S | 89 ++++++++++++++++++++--------------------- 1 file changed, 44 insertions(+), 45 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (2d63fbb7b1f -> e5c4b468f06)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project. from 2d63fbb7b1f [ValueTracking] Look through constant Int2Ptr/Ptr2Int expressions adds 776ac79e88d [NFC][PowerPC] Add the test block-placement.mir adds c3805d761ea [BPF] add unit tests for preserve_{array,union,struct}_acce [...] adds 335f955dc49 [PowerPC] Support fp128 libcalls adds f1ee04c42a4 [LoopInfo] Introduce getUniqueNonLatchExitBlocks utility function adds 796ed134ccc Remove set but unused variable. adds 45c43e7d04d [LoopUtils] Extend the scope of getLoopEstimatedTripCount adds 54869ec907f [Attributor] Deduce "nonnull" attribute adds 6bd02a442c0 [PowerPC] Support -mabi=ieeelongdouble and -mabi=ibmlongdouble adds d02f17daed3 [clangd] Added highlighting to enum constants. adds ea36cdcec31 DeveloperPolicy: fix a typo adds 17b4a932fae [clangd] Added highlighting for members and methods. adds 3ed93b4673b [Loop Peeling] Enable peeling for loops with multiple exits adds 1d554b74412 [LoopVectorize] Pass unfiltered list of arguments to getInt [...] adds d021ad9fbeb [Loop Peeling] Fix the bug with IDom setting for exit loops adds da750b1688f [ARM] Adjust how NEON shifts are lowered adds 309246e4e2f [obj2yaml] - Rework tool's error reporting logic for ELF target. adds b91403d4670 Revert r366052 "[obj2yaml] - Rework tool's error reporting [...] adds f059147a108 [ARM] Move Shifts after Bits. NFC adds 0bf0b8ff7c7 [libFuzzer] Disable fork.test on AArch64 adds 6e89887642f [ARM] MVE Vector Shifts adds 8d9b9f6bf2c [LLD][ELF] - Minor simplification. NFC. adds 224816ba169 Recommit r366052 "[obj2yaml] - Rework tool's error reportin [...] adds 960ff0810da [OpenCL][PR41727] Prevent ICE on global dtors adds 7d5100115af PDB HashTable: Make iterator key type const adds 14d115ff98a [ASTImporter] Using Lang_CXX14 in ASTImporterVisibilityTest. adds 130df2c7e8f Fix uninitialized variable analyzer warning. NFCI. adds d6f34bf4d4a [OpenCL] Deduce addr space for pointee of dependent types i [...] adds 83ae0b5eb4f [mips] Remove "else-after-return". NFC adds 12400b97838 [Testing] Add missing "REQUIRES: asserts" adds 60fb5e97a0d [X86] isTargetShuffleEquivalent - assert the expected mask [...] adds 8d879c8d954 [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions adds 63d00b19e5c [OPENMP]Add support for analysis of if clauses. adds cb238de456b [PatternMatch] Implement matching code for LibFunc adds 4e34a85aa2e [clangd] Fix duplicate highlighting tokens appearing in ini [...] adds 5153b1723a6 [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message adds 62cc16dac20 gn build: Add a note on how to locally tell git to ignore b [...] adds 1d91f94f095 [clangd] Fix doc adds fd08dcb9db0 [AMDGPU] fixed scheduler crash in gfx908 adds a13cca41c5c [ORC] Start adding ORCv1 to ORCv2 transition tips to the OR [...] adds e5086481b65 fix unnamed fiefield issue and add tests for __builtin_pres [...] adds 838c8e30c2f [X86][SSE] Add PACKSS with zero shuffle masks. adds 5a07a614c0f [X86][SSE] Regenerated packss.ll test file. adds 73e33368090 [docs][llvm-nm] Fix inconsistent grammar adds 7284d443c3b Revert "r366069: [PatternMatch] Implement matching code for [...] adds a53e779edc8 [x86] add tests for reductions that might be better with mo [...] adds 3329721e644 [lldb][doc] Document how our LLDB table gen initialized options adds 0e5f9157576 Use unique_ptr instead of manual delete in one place. No be [...] adds 05489f09522 Use a unique_ptr instead of manual memory management for Cu [...] adds cc02b170823 AMDGPU/GlobalISel: RegBankSelect for G_CONCAT_VECTORS adds a65913e752e AMDGPU/GlobalISel: Select easy cases for G_BUILD_VECTOR adds a2dcbd36439 Use a unique_ptr instead of manual memory management for LineTable adds 8e7eee617a0 [ARM] Minor formatting in ARMInstrMVE.td. NFC adds 3dcd7996f11 [FunctionAttrs] Remove readonly and writeonly assertion adds 56799837a41 Update __VERSION__ to remove the hardcoded 4.2.1 version adds 7938424eb92 [AMDGPU] Copy missing predicate from pseudo to real adds 269e4e1b601 Add some release notes for 9.0 release adds 49169a963e8 AMDGPU: Add 24-bit mul intrinsics adds 3e7c314b039 Reland "[COFF] Add null check in case of symbols defined in [...] adds 81971b2b79c [X86] Return UNDEF from LowerScalarImmediateShift when the [...] adds 032e3c468fa [llvm-lib] Add a dependency to intrinsics_gen to the LLVMLi [...] adds eb99165b97b [x86] try to keep FP casted+truncated+extracted vector elem [...] adds b390121efb3 AMDGPU/GlobalISel: Select llvm.amdgcn.end.cf adds ff1c5288cb6 AMDGPU: Remove reserved value accidentally left in for gfx908 adds 53fa759ff5a AMDGPU/GlobalISel: Handle llvm.amdgcn.if.break adds 90bdfb3daf7 AMDGPU/GlobalISel: Widen vector extracts adds b2a0745e2d5 [WebAssembly] Assembler: recognize .init_array as data section. adds 4885978e231 [sanitizers][windows][mingw32] Mingw32 RTL fixes RTL interc [...] adds dc56995c574 [ARM] MVE vector for 64bit types adds ac6375d99d1 Expand comment about how StringsToBuckets was computed, and [...] adds 42e90ed7717 [cmake] Don't set install rules for tblgen if building util [...] adds 99f2a108707 [FileCheck] Store line numbers as optional values adds ba4373ea7d9 AMDGPU: Fix missing immarg from interp intrinsics adds 434d664095b GlobalISel: Implement narrowScalar for vector extract/inser [...] adds 5dfd4660329 AMDGPU/GlobalISel: Fix G_ICMP for wave32 adds b0e04c018c3 AMDGPU/GlobalISel: Custom legalize G_EXTRACT_VECTOR_ELT adds 6ed315f89be AMDGPU/GlobalISel: Custom legalize G_INSERT_VECTOR_ELT adds 18b7133843b AMDGPU/GlobalISel: Fix handling of sgpr (not scc bank) s1 to VCC adds 3bfdb54d88d AMDGPU/GlobalISel: Fix not constraining result reg of copie [...] adds e1b52f41803 AMDGPU/GlobalISel: Fix selecting vcc->vcc bank copies adds ad19b50c000 AMDGPU/GlobalISel: Don't constrain source register of VCC copies adds c8291c94f83 AMDGPU/GlobalISel: Select G_AND/G_OR/G_XOR adds c5d7b0c4547 Constrain workaround to avoid affecting other buildbots adds c5e7f562496 ARM MTE stack sanitizer. adds dfcd4384cbc [libc++] Implement P0433: deduction guides for <unordered_map> adds 66ee934440c AMDGPU/GlobalISel: Allow scalar s1 and/or/xor adds 39d888c1e42 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds 794346460af [clang] allow -fthinlto-index= without -x ir adds d00d8578016 TableGen: Add address space to matchers adds 02772499551 TableGen/GlobalISel: Fix handling of truncstore patterns adds c4f245b40aa [LoopUnroll+LoopUnswitch] do not transform loops containing callbr adds 228f80d92dc [TSan] Fix asm token error adds b082f1055b0 AMDGPU: Use standalone MUBUF load patterns adds becae2b2324 [mips] Print BEQZL and BNEZL pseudo instructions adds 46b84fa231c [ScopInfo][NFC] Add dot at the end of comment statement. adds 423b4a18a49 [AMDGPU] Enable merging m0 initializations. adds 8528b1951cc [ASan] Fix >80 character line. adds 5076038bb00 [DirectoryWatcher][NFC][test] Add typedef for enum adds c5e7a3d7100 [DirectoryWatcher][test] Relax test assumptions adds 292e21d8bce [WebAssembly] Assembler: support special floats: infinity / nan adds 474009eaea7 [WebAssembly] Simplify regcopy.mir adds 853813293ac [clang-fuzzer] Remove 'setUseOrcMCJITReplacement(false)' call. adds 67cee1dc7ee [llvm-lipo] Implement -create (with hardcoded alignments) adds 4422cc4f1a9 [OpenCL] Make TableGen'd builtin tables and helper function [...] adds c9e3c830144 Revert [llvm-lipo] Implement -create (with hardcoded alignments) adds 9f96a58cccb [WebAssembly] Rename except_ref type to exnref adds 199f8721e6a add -fthinlto-index= option to clang-cl adds a28dcf693d1 [llvm-readelf] Print "File: lib.a(file.o)" info when dumpin [...] adds b5701710a42 [LanguageRuntime] Move ObjCLanguageRuntime into a plugin adds 1cf69226601 [WebAssembly] Add missing utility methods for exnref type adds c48162db994 [TSan] Fix asm token error (again) adds 51193871daf [X86] Teach convertToThreeAddress to handle SUB with immediate adds 60a0d49e77c [DirectoryWatcher][linux] Fix for older kernels adds bb147aabc68 Revert "[NewPM] Port Sancov" adds 93dfb93ad68 Temporarily Revert "[SLP] Recommit: Look-ahead operand reor [...] adds fdcbd5fa486 Temporarily Revert "fix unnamed fiefield issue and add test [...] adds c245249b7bd Update some file changes, but there's a dependency loop so [...] adds bf20b2ace68 Temporarily revert "add -fthinlto-index= option to clang-cl" adds 509903e8872 [DebugInfo] Move function from line table to the prologue (NFC) adds 50f0c824532 Allow for vendor prefixes in a list test adds 01ee172e9e4 Revert "[DebugInfo] Move function from line table to the pr [...] adds 0d121273181 [Target] Remove unused method Target::GetDefaultClangModule [...] adds 543ba4e9e0c [InstructionSimplify] Apply sext/trunc after pointer stripping adds fa52e00c85c [Sema] Suppress additional warnings for C's zero initializer adds ca16d280f7e Re-land "[DebugInfo] Move function from line table to the p [...] adds 492ce8cc8b0 reland "add -fthinlto-index= option to clang-cl" adds 49e14cefbe4 Change a lit test to permit vendor specific clang version adds 1739b700b17 AMDGPU: Avoid code predicates for extload PatFrags adds e7e8789a632 Revert "[OPENMP]Add support for analysis of if clauses." adds a17b1aed6ab Add contains method to associative containers. This patch i [...] adds e5c4b468f06 hwasan: Pad arrays with non-1 size correctly. No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/SemanticHighlighting.cpp | 38 +- clang-tools-extra/clangd/SemanticHighlighting.h | 3 + .../clangd/test/semantic-highlighting.test | 11 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 67 +- clang-tools-extra/docs/clangd/Installation.rst | 2 +- clang/docs/LanguageExtensions.rst | 2 + clang/docs/ReleaseNotes.rst | 6 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 + clang/include/clang/Basic/DiagnosticIDs.h | 2 +- clang/include/clang/Basic/Features.def | 1 + clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Basic/Sanitizers.def | 3 + clang/include/clang/Basic/SourceManager.h | 2 +- clang/include/clang/Driver/CC1Options.td | 2 + clang/include/clang/Driver/Options.td | 2 +- clang/lib/AST/ASTImporter.cpp | 2 +- clang/lib/AST/Expr.cpp | 4 +- clang/lib/Basic/DiagnosticIDs.cpp | 8 +- clang/lib/Basic/SourceManager.cpp | 4 +- clang/lib/Basic/Targets/PPC.cpp | 4 +- clang/lib/CodeGen/BackendUtil.cpp | 47 +- clang/lib/CodeGen/CGDeclCXX.cpp | 24 +- clang/lib/CodeGen/CodeGenFunction.cpp | 2 + clang/lib/CodeGen/CodeGenModule.cpp | 14 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 21 +- clang/lib/CodeGen/SanitizerMetadata.cpp | 21 +- clang/lib/CodeGen/TargetInfo.h | 5 + .../linux/DirectoryWatcher-linux.cpp | 9 +- clang/lib/Driver/Compilation.cpp | 12 +- clang/lib/Driver/Driver.cpp | 6 + clang/lib/Driver/SanitizerArgs.cpp | 10 +- clang/lib/Driver/ToolChains/Clang.cpp | 22 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 + clang/lib/Frontend/CompilerInvocation.cpp | 1 + clang/lib/Frontend/InitPreprocessor.cpp | 7 +- clang/lib/Sema/SemaLookup.cpp | 2 +- clang/lib/Sema/TreeTransform.h | 17 + clang/test/CodeGen/memtag-attr.cpp | 19 + clang/test/CodeGen/ppc64-long-double.cpp | 11 + clang/test/CodeGen/sancov-new-pm.c | 41 - clang/test/CodeGenOpenCLCXX/atexit.cl | 11 + clang/test/Driver/cl-thinlto-backend.c | 9 + clang/test/Driver/fsanitize.c | 10 + clang/test/Driver/ppc-abi.c | 18 + clang/test/Driver/thinlto_backend.c | 13 +- clang/test/Lexer/has_feature_memtag_sanitizer.cpp | 11 + clang/test/Preprocessor/init.c | 4 +- clang/test/Sema/zero-initializer.c | 7 + clang/test/SemaCXX/attr-no-sanitize.cpp | 5 + .../test/SemaOpenCLCXX/address-space-deduction.cl | 39 + .../tools/clang-fuzzer/handle-llvm/handle_llvm.cpp | 1 - clang/unittests/AST/ASTImporterVisibilityTest.cpp | 40 +- .../DirectoryWatcher/DirectoryWatcherTest.cpp | 107 +- clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp | 6 +- compiler-rt/lib/asan/asan_malloc_win.cc | 89 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 27 +- compiler-rt/test/fuzzer/fork.test | 2 +- libcxx/CMakeLists.txt | 6 +- libcxx/include/map | 16 +- libcxx/include/set | 19 +- libcxx/include/unordered_map | 156 +- libcxx/include/unordered_set | 10 + .../containers/associative/map/contains.pass.cpp | 62 + .../containers/associative/set/contains.pass.cpp | 44 + .../containers/unord/unord.map/contains.pass.cpp | 62 + .../unord.map/unord.map.cnstr/deduct.fail.cpp | 106 + .../unord.map/unord.map.cnstr/deduct.pass.cpp | 204 ++ .../unord.map.cnstr/deduct_const.pass.cpp | 172 ++ .../unord.multimap.cnstr/deduct.fail.cpp | 106 + .../unord.multimap.cnstr/deduct.pass.cpp | 204 ++ .../unord.multimap.cnstr/deduct_const.pass.cpp | 173 ++ .../containers/unord/unord.set/contains.pass.cpp | 44 + libcxx/www/cxx2a_status.html | 4 +- lld/COFF/SymbolTable.cpp | 2 +- lld/ELF/InputFiles.cpp | 12 +- lld/test/COFF/Inputs/undefined-symbol-lto-a.ll | 82 + lld/test/COFF/Inputs/undefined-symbol-lto-b.ll | 29 + lld/test/COFF/undefined-symbol-lto.test | 29 + lld/wasm/WriterUtils.cpp | 4 +- lldb/include/lldb/Target/Target.h | 2 - lldb/lldb.xcodeproj/project.pbxproj | 16 +- lldb/source/Commands/OptionsBase.td | 98 + .../MacOSX-DYLD/DynamicLoaderDarwin.cpp | 3 +- .../MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp | 3 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 3 +- .../Clang/ClangExpressionDeclMap.cpp | 2 +- .../Clang/ClangExpressionParser.cpp | 3 +- .../ExpressionParser/Clang/IRDynamicChecks.cpp | 3 +- lldb/source/Plugins/Language/ObjC/CF.cpp | 3 +- lldb/source/Plugins/Language/ObjC/Cocoa.cpp | 1 - lldb/source/Plugins/Language/ObjC/Cocoa.h | 3 +- lldb/source/Plugins/Language/ObjC/NSArray.cpp | 2 +- lldb/source/Plugins/Language/ObjC/NSDictionary.cpp | 1 - lldb/source/Plugins/Language/ObjC/NSError.cpp | 2 +- lldb/source/Plugins/Language/ObjC/NSException.cpp | 2 +- lldb/source/Plugins/Language/ObjC/NSIndexPath.cpp | 2 +- lldb/source/Plugins/Language/ObjC/NSSet.cpp | 1 - lldb/source/Plugins/Language/ObjC/NSString.h | 3 +- lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp | 3 +- .../AppleObjCRuntime/AppleObjCClassDescriptorV2.h | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.h | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntime.h | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h | 3 +- .../AppleObjCTrampolineHandler.cpp | 3 +- .../AppleObjCRuntime/AppleObjCTypeEncodingParser.h | 3 +- .../AppleThreadPlanStepThroughObjCTrampoline.cpp | 3 +- .../Plugins/LanguageRuntime/ObjC/CMakeLists.txt | 9 + .../LanguageRuntime/ObjC}/ObjCLanguageRuntime.cpp | 3 +- .../LanguageRuntime/ObjC}/ObjCLanguageRuntime.h | 0 lldb/source/Symbol/CMakeLists.txt | 1 + lldb/source/Symbol/ClangASTContext.cpp | 2 +- lldb/source/Target/CMakeLists.txt | 1 - lldb/source/Target/Target.cpp | 7 - llvm/cmake/modules/TableGen.cmake | 2 +- llvm/docs/AMDGPU/gfx10_msg.rst | 2 + llvm/docs/AMDGPU/gfx9_msg.rst | 2 + llvm/docs/BitCodeFormat.rst | 1 + llvm/docs/CommandGuide/llvm-nm.rst | 2 +- llvm/docs/DeveloperPolicy.rst | 2 +- llvm/docs/LangRef.rst | 16 +- ...{ORCv2DesignAndImplementation.rst => ORCv2.rst} | 159 +- llvm/docs/ReleaseNotes.rst | 12 +- llvm/docs/index.rst | 6 +- llvm/include/llvm/Analysis/LoopInfo.h | 8 + llvm/include/llvm/Analysis/LoopInfoImpl.h | 32 +- llvm/include/llvm/BinaryFormat/ELF.h | 3 +- llvm/include/llvm/BinaryFormat/Wasm.h | 4 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 3 +- .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 10 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 39 + llvm/include/llvm/CodeGen/ValueTypes.td | 2 +- llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 26 +- llvm/include/llvm/DebugInfo/PDB/Native/HashTable.h | 16 +- llvm/include/llvm/IR/Attributes.td | 4 + llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 20 +- llvm/include/llvm/InitializePasses.h | 4 +- llvm/include/llvm/Object/ELF.h | 23 +- llvm/include/llvm/Support/FileCheck.h | 46 +- llvm/include/llvm/Support/MachineValueType.h | 4 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 6 + llvm/include/llvm/Transforms/IPO/Attributor.h | 32 + llvm/include/llvm/Transforms/Instrumentation.h | 4 + .../Transforms/Instrumentation/SanitizerCoverage.h | 62 - llvm/lib/Analysis/InstructionSimplify.cpp | 4 + llvm/lib/Analysis/LoopInfo.cpp | 5 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 4 + llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 8 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 2 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 11 + llvm/lib/CodeGen/TargetLoweringBase.cpp | 28 + llvm/lib/CodeGen/ValueTypes.cpp | 2 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 67 +- .../DebugInfo/PDB/Native/PDBStringTableBuilder.cpp | 15 +- llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/MC/MCParser/WasmAsmParser.cpp | 3 + llvm/lib/Passes/PassBuilder.cpp | 3 +- llvm/lib/Passes/PassRegistry.def | 2 - llvm/lib/Support/FileCheck.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 127 ++ .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 162 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 1 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 45 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 78 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 4 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 112 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- llvm/lib/Target/AMDGPU/BUFInstructions.td | 80 +- llvm/lib/Target/AMDGPU/DSInstructions.td | 9 +- llvm/lib/Target/AMDGPU/EvergreenInstructions.td | 4 - llvm/lib/Target/AMDGPU/FLATInstructions.td | 18 +- llvm/lib/Target/AMDGPU/R600Instructions.td | 26 + llvm/lib/Target/AMDGPU/SIDefines.h | 1 + llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 47 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 5 + llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 11 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 262 ++- llvm/lib/Target/ARM/ARMISelLowering.h | 38 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 11 + llvm/lib/Target/ARM/ARMInstrMVE.td | 2316 ++++++++++---------- llvm/lib/Target/ARM/ARMInstrNEON.td | 194 +- llvm/lib/Target/Mips/MipsISelLowering.h | 2 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 8 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 31 +- .../MCTargetDesc/WebAssemblyInstPrinter.cpp | 4 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 4 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 26 +- .../Target/WebAssembly/WebAssemblyCFGStackify.cpp | 21 +- .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 4 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 20 +- .../lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 26 +- .../lib/Target/WebAssembly/WebAssemblyInstrCall.td | 12 +- .../Target/WebAssembly/WebAssemblyInstrControl.td | 14 +- .../WebAssembly/WebAssemblyInstrExceptRef.td | 26 - .../Target/WebAssembly/WebAssemblyInstrInfo.cpp | 6 +- .../lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 6 +- llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td | 25 + .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 27 +- .../Target/WebAssembly/WebAssemblyRegStackify.cpp | 6 +- .../Target/WebAssembly/WebAssemblyRegisterInfo.td | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 48 +- llvm/lib/Target/X86/X86InstrArithmetic.td | 15 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 45 + llvm/lib/ToolDrivers/llvm-lib/CMakeLists.txt | 3 + llvm/lib/Transforms/IPO/Attributor.cpp | 284 +++ llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp | 1 + llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 7 +- .../Instrumentation/HWAddressSanitizer.cpp | 14 +- .../Transforms/Instrumentation/Instrumentation.cpp | 2 +- .../Instrumentation/SanitizerCoverage.cpp | 359 +-- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 1 + llvm/lib/Transforms/Utils/LoopUnroll.cpp | 3 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 41 +- llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | 20 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 20 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 7 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 294 +-- llvm/test/Bitcode/attributes.ll | 11 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-and.mir | 593 +++++ .../AMDGPU/GlobalISel/inst-select-build-vector.mir | 152 ++ .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 128 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 13 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 600 ++++- .../CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir | 593 +++++ .../GlobalISel/legalize-extract-vector-elt.mir | 478 +++- .../GlobalISel/legalize-insert-vector-elt.mir | 87 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 39 + .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 36 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll | 27 + .../AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll | 26 + .../AMDGPU/GlobalISel/regbankselect-and-s1.mir | 527 +++++ .../AMDGPU/GlobalISel/regbankselect-and.mir | 145 +- .../GlobalISel/regbankselect-concat-vector.mir | 69 + .../CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir | 15 +- .../AMDGPU/GlobalISel/regbankselect-phi-s1.mir | 1333 +++++++++++ .../AMDGPU/GlobalISel/regbankselect-xor.mir | 15 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll | 494 +++++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll | 14 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll | 14 + llvm/test/CodeGen/AMDGPU/mad_uint24.ll | 76 + llvm/test/CodeGen/AMDGPU/merge-m0.mir | 108 +- llvm/test/CodeGen/AMDGPU/mul.i16.ll | 18 +- llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 4 +- .../CodeGen/AMDGPU/power-sched-no-instr-sunit.mir | 22 + llvm/test/CodeGen/ARM/vpadd.ll | 47 +- llvm/test/CodeGen/ARM/vuzp.ll | 46 +- llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll | 80 + llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll | 77 + llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll | 76 + llvm/test/CodeGen/PowerPC/block-placement.mir | 217 ++ llvm/test/CodeGen/PowerPC/fp128-libcalls.ll | 164 ++ llvm/test/CodeGen/Thumb2/mve-abs.ll | 47 + llvm/test/CodeGen/Thumb2/mve-bitarith.ll | 65 + llvm/test/CodeGen/Thumb2/mve-div-expand.ll | 194 ++ llvm/test/CodeGen/Thumb2/mve-fmath.ll | 250 +++ llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll | 57 + llvm/test/CodeGen/Thumb2/mve-frint.ll | 150 ++ llvm/test/CodeGen/Thumb2/mve-minmax.ll | 215 ++ llvm/test/CodeGen/Thumb2/mve-neg.ll | 23 + llvm/test/CodeGen/Thumb2/mve-sext.ll | 47 + llvm/test/CodeGen/Thumb2/mve-shifts.ll | 584 +++++ llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 146 +- llvm/test/CodeGen/Thumb2/mve-simple-arith.ll | 166 ++ llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll | 68 + llvm/test/CodeGen/Thumb2/mve-vcvt.ll | 108 + llvm/test/CodeGen/Thumb2/mve-vdup.ll | 49 + llvm/test/CodeGen/Thumb2/mve-vmovimm.ll | 89 +- llvm/test/CodeGen/Thumb2/mve-vmvnimm.ll | 16 +- llvm/test/CodeGen/WebAssembly/exception.ll | 12 +- llvm/test/CodeGen/WebAssembly/reg-argument.mir | 59 + .../WebAssembly/{regcopy.mir => reg-copy.mir} | 44 +- llvm/test/CodeGen/X86/add.ll | 14 +- .../CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll | 12 +- llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll | 28 +- llvm/test/CodeGen/X86/cgp-usubo.ll | 4 +- llvm/test/CodeGen/X86/haddsub.ll | 204 ++ llvm/test/CodeGen/X86/known-bits-vector.ll | 5 +- llvm/test/CodeGen/X86/known-signbits-vector.ll | 29 +- llvm/test/CodeGen/X86/packss.ll | 61 + llvm/test/CodeGen/X86/phaddsub-extract.ll | 363 +++ .../CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll | 3 +- llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll | 7 +- .../HWAddressSanitizer/alloca-array.ll | 15 + .../HWAddressSanitizer/alloca-with-calls.ll | 4 +- .../Instrumentation/HWAddressSanitizer/alloca.ll | 10 +- .../HWAddressSanitizer/kernel-alloca.ll | 4 +- .../SanitizerCoverage/abort-in-entry-block.ll | 1 - .../SanitizerCoverage/backedge-pruning.ll | 2 - .../Instrumentation/SanitizerCoverage/chains.ll | 1 - .../SanitizerCoverage/cmp-tracing-api-x86_32.ll | 25 +- .../SanitizerCoverage/cmp-tracing-api-x86_64.ll | 25 +- .../SanitizerCoverage/cmp-tracing.ll | 1 - .../SanitizerCoverage/coff-comdat.ll | 1 - .../coff-pc-table-inline-8bit-counters.ll | 1 - .../SanitizerCoverage/coff-used-ctor.ll | 3 +- .../SanitizerCoverage/const-cmp-tracing.ll | 1 - .../SanitizerCoverage/coverage-dbg.ll | 1 - .../Instrumentation/SanitizerCoverage/coverage.ll | 4 +- .../SanitizerCoverage/coverage2-dbg.ll | 1 - .../SanitizerCoverage/div-tracing.ll | 1 - .../SanitizerCoverage/gep-tracing.ll | 1 - .../SanitizerCoverage/inline-8bit-counters.ll | 1 - .../interposable-symbol-nocomdat.ll | 2 - .../Instrumentation/SanitizerCoverage/no-func.ll | 1 - .../Instrumentation/SanitizerCoverage/pc-table.ll | 2 - .../SanitizerCoverage/postdominator_check.ll | 2 - llvm/test/Instrumentation/SanitizerCoverage/seh.ll | 3 - .../stack-depth-variable-declared-by-user.ll | 2 - .../SanitizerCoverage/stack-depth.ll | 5 - .../SanitizerCoverage/switch-tracing.ll | 1 - .../SanitizerCoverage/trace-pc-guard-comdat.ll | 1 - .../trace-pc-guard-inline-8bit-counters.ll | 1 - .../SanitizerCoverage/trace-pc-guard-nocomdat.ll | 1 - .../SanitizerCoverage/tracing-comdat.ll | 3 - .../Instrumentation/SanitizerCoverage/tracing.ll | 4 - .../SanitizerCoverage/unreachable-critedge.ll | 1 - .../Instrumentation/SanitizerCoverage/wineh.ll | 1 - llvm/test/MC/AMDGPU/ds.s | 16 +- llvm/test/MC/AMDGPU/expressions.s | 2 +- llvm/test/MC/AMDGPU/gfx10_asm_all.s | 24 +- llvm/test/MC/AMDGPU/gfx7_asm_all.s | 30 +- llvm/test/MC/AMDGPU/gfx8_asm_all.s | 30 +- llvm/test/MC/AMDGPU/gfx9_asm_all.s | 30 +- llvm/test/MC/AMDGPU/sopp-gfx10.s | 17 + llvm/test/MC/AMDGPU/sopp-gfx9.s | 12 +- llvm/test/MC/Disassembler/AMDGPU/ds_vi.txt | 16 +- .../test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt | 36 +- llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 48 +- llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt | 48 +- llvm/test/MC/Disassembler/WebAssembly/wasm.txt | 2 +- llvm/test/MC/Mips/branch-pseudos.s | 32 +- llvm/test/MC/Mips/macro-bcc-imm.s | 16 +- llvm/test/MC/Mips/mips-jump-delay-slots.s | 4 +- llvm/test/MC/WebAssembly/basic-assembly.s | 23 +- llvm/test/MC/WebAssembly/objdump.s | 4 +- llvm/test/TableGen/address-space-patfrags.td | 123 ++ llvm/test/Transforms/FunctionAttrs/nonnull.ll | 321 ++- llvm/test/Transforms/FunctionAttrs/nosync.ll | 2 +- .../Transforms/FunctionAttrs/read-write-scc.ll | 20 + llvm/test/Transforms/Inline/attributes.ll | 30 + llvm/test/Transforms/InstSimplify/compare.ll | 11 +- llvm/test/Transforms/LoopUnroll/callbr.ll | 51 + .../LoopUnroll/peel-loop-pgo-deopt-idom.ll | 55 + .../Transforms/LoopUnroll/peel-loop-pgo-deopt.ll | 81 + llvm/test/Transforms/LoopUnswitch/callbr.ll | 66 + .../LoopVectorize/vector-intrinsic-call-cost.ll | 30 + .../test/Transforms/SLPVectorizer/X86/lookahead.ll | 208 +- llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll | 96 + llvm/test/tools/llvm-readobj/archive.test | 25 +- .../tools/llvm-readobj/elf-dynamic-malformed.test | 1 + .../llvm-readobj/macho-universal-x86_64.i386.test | 18 +- .../tools/llvm-readobj/thin-archive-paths.test | 8 +- llvm/test/tools/obj2yaml/section-group.test | 24 +- .../tools/obj2yaml/special-symbol-indices.yaml | 2 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 17 +- llvm/tools/obj2yaml/elf2yaml.cpp | 319 ++- llvm/tools/obj2yaml/obj2yaml.cpp | 13 +- llvm/tools/obj2yaml/obj2yaml.h | 2 +- llvm/unittests/Analysis/LoopInfoTest.cpp | 46 + llvm/unittests/Support/FileCheckTest.cpp | 14 +- .../WebAssembly/WebAssemblyExceptionInfoTest.cpp | 16 +- llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 34 +- llvm/utils/TableGen/CodeGenDAGPatterns.h | 2 + llvm/utils/TableGen/CodeGenTarget.cpp | 2 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 90 +- llvm/utils/emacs/llvm-mode.el | 2 +- llvm/utils/gn/README.rst | 2 + polly/include/polly/ScopInfo.h | 2 +- 375 files changed, 16191 insertions(+), 3873 deletions(-) create mode 100644 clang/test/CodeGen/memtag-attr.cpp delete mode 100644 clang/test/CodeGen/sancov-new-pm.c create mode 100644 clang/test/CodeGenOpenCLCXX/atexit.cl create mode 100644 clang/test/Driver/cl-thinlto-backend.c create mode 100644 clang/test/Lexer/has_feature_memtag_sanitizer.cpp create mode 100644 libcxx/test/std/containers/associative/map/contains.pass.cpp create mode 100644 libcxx/test/std/containers/associative/set/contains.pass.cpp create mode 100644 libcxx/test/std/containers/unord/unord.map/contains.pass.cpp create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/dedu [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.multimap/unord.multimap. [...] create mode 100644 libcxx/test/std/containers/unord/unord.set/contains.pass.cpp create mode 100644 lld/test/COFF/Inputs/undefined-symbol-lto-a.ll create mode 100644 lld/test/COFF/Inputs/undefined-symbol-lto-b.ll create mode 100644 lld/test/COFF/undefined-symbol-lto.test rename lldb/source/{Target => Plugins/LanguageRuntime/ObjC}/ObjCLanguageRuntime.cpp (99%) rename lldb/{include/lldb/Target => source/Plugins/LanguageRuntime/ObjC}/ObjCLangu [...] rename llvm/docs/{ORCv2DesignAndImplementation.rst => ORCv2.rst} (64%) delete mode 100644 llvm/include/llvm/Transforms/Instrumentation/SanitizerCoverage.h delete mode 100644 llvm/lib/Target/WebAssembly/WebAssemblyInstrExceptRef.td create mode 100644 llvm/lib/Target/WebAssembly/WebAssemblyInstrRef.td create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi-s1.mir create mode 100644 llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll create mode 100644 llvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll create mode 100644 llvm/test/CodeGen/PowerPC/block-placement.mir create mode 100644 llvm/test/CodeGen/PowerPC/fp128-libcalls.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-shifts.ll create mode 100644 llvm/test/CodeGen/WebAssembly/reg-argument.mir rename llvm/test/CodeGen/WebAssembly/{regcopy.mir => reg-copy.mir} (69%) create mode 100644 llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll create mode 100644 llvm/test/MC/AMDGPU/sopp-gfx10.s create mode 100644 llvm/test/TableGen/address-space-patfrags.td create mode 100644 llvm/test/Transforms/FunctionAttrs/read-write-scc.ll create mode 100644 llvm/test/Transforms/LoopUnroll/callbr.ll create mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom.ll create mode 100644 llvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll create mode 100644 llvm/test/Transforms/LoopUnswitch/callbr.ll create mode 100644 llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (fd4b2500 -> 3b568ba0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/base-artifacts. discards fd4b2500 2: update: llvm-linux: 17096 new 3b568ba0 2: update: llvm-e5c4b468f06307bc1b8341af9ccf9dd69fa890f4: 17096 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fd4b2500) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 139 +- 02-build_llvm/console.log | 11951 +++++++++++++++++---------------- 03-build_linux/console.log | 1845 +++--- 06-update_baseline/console.log | 36 +- console.log | 13971 +++++++++++++++++++-------------------- jenkins/manifest.sh | 11 +- 6 files changed, 13847 insertions(+), 14106 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

[llvm] branch master updated (81598fb771c -> c46779dac2b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 81598fb771c AMDGPU/GlobalISel: Select G_LSHR new c46779dac2b AMDGPU/GlobalISel: Select G_ASHR The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AMDGPU/AMDGPUGISel.td | 9 - lib/Target/AMDGPU/SOPInstructions.td | 4 +- lib/Target/AMDGPU/VOP2Instructions.td | 2 +- lib/Target/AMDGPU/VOP3Instructions.td | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 363 +++++++++++++++++---- ...elect-lshr.s16.mir => inst-select-ashr.s16.mir} | 152 ++++----- ...t-lshr.v2s16.mir => inst-select-ashr.v2s16.mir} | 144 ++++---- 7 files changed, 456 insertions(+), 220 deletions(-) copy test/CodeGen/AMDGPU/GlobalISel/{inst-select-lshr.s16.mir => inst-select-ashr. [...] copy test/CodeGen/AMDGPU/GlobalISel/{inst-select-lshr.v2s16.mir => inst-select-ash [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 2 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

Tcwg-commits July 2019