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unknown user pushed a change to branch master
in repository clang-tools-extra.
from 4f5f8d58 Summary: [Clangd] Added hidden command line option -tweaks to [...]
new 755975d9 Fixed two issues in clang-tidy -help.
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Summary of changes:
clang-tidy/tool/ClangTidyMain.cpp | 4 +-
docs/clang-tidy/index.rst | 210 +++++++++++++++++++-------------------
2 files changed, 107 insertions(+), 107 deletions(-)
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unknown user pushed a change to branch master
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from 643e4ad7f2f AMDGPU/GlobalISel: Custom lower control flow intrinsics
new fa7c34bbafe AMDGPU/GlobalISel: Legalize workitem ID intrinsics
new c087c304f7a AMDGPU/GlobalISel: Legalize workgroup ID intrinsics
new 51744f169f8 AMDGPU/GlobalISel: Lower kernarg segment ptr intrinsics
new d51fdec4e02 AMDGPU/GlobalISel: Handle more input argument intrinsics
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Summary of changes:
lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 161 +++++++++++++++------
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 20 ---
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 153 +++++++++++++++++++-
lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 14 ++
.../inst-select-amdgcn.kernarg.segment.ptr.mir | 19 ---
.../irtranslator-amdgpu_kernel-system-sgprs.ll | 118 ++++++++++++++-
.../AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll | 2 +-
.../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 18 +--
.../GlobalISel/irtranslator-fast-math-flags.ll | 2 +-
.../AMDGPU/GlobalISel/llvm.amdgcn.dispatch.id.ll | 19 +++
.../AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll | 18 +++
.../GlobalISel/llvm.amdgcn.implicit.buffer.ptr.ll | 17 +++
.../GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll | 125 ++++++++++++++++
.../AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll | 18 +++
.../AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll | 106 ++++++++++++++
.../AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll | 92 ++++++++++++
.../AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll | 2 +-
17 files changed, 807 insertions(+), 97 deletions(-)
delete mode 100644 test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.kernarg.segme [...]
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.id.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.buffer.ptr.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
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unknown user pushed a change to branch master
in repository gcc.
from b031d0ddbe3 PR target/90963 * config/pa/pa.md (builtin_longjmp): Rest [...]
new 857ca76e646 PR middle-end/90923 - hash_map destroys elements without co [...]
new acf2650a7b2 @neg<mode>2
new b16a7addc33 @fix_trunc<mode>si2_fprs
new f2ce4d065d6 @abs<mode>2_internal
new 33dd25d4562 @indirect_jump<mode>_nospec
new 49e4b4494a5 @ctr<mode>
new 8dedfb93add @eh_set_lr_<mode>
new 66f1b2c57e3 @extenddf<mode>2_{fprs,vsx}
new 7cb5254a4fa * config/i386/i386.md ("isa" attribute): Add sse_noavx. ( [...]
new bab9b531b88 @extenddf<mode>2
new ef1c51078ee @neg<mode>2_hw
new f6fd219cdf9 @abs<mode>2_hw
new 2d3c0a1392f @ieee_128bit_vsx_neg<mode>2
new 7433985c06a @ieee_128bit_vsx_abs<mode>2
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Summary of changes:
gcc/ChangeLog | 91 ++++++++++++++++++++++++++
gcc/config/i386/i386.md | 4 +-
gcc/config/i386/mmx.md | 24 ++++---
gcc/config/rs6000/rs6000.md | 130 ++++++++++---------------------------
gcc/hash-map-tests.c | 134 ++++++++++++++++++++++++++++++++++++++
gcc/hash-map.h | 37 ++++++++---
gcc/hash-set-tests.c | 154 ++++++++++++++++++++++++++++++++++++++++++++
gcc/hash-set.h | 12 +++-
gcc/hash-table.h | 14 ++--
9 files changed, 480 insertions(+), 120 deletions(-)
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from f55969cbd1f AMDGPU/GlobalISel: Lower SALU min/max to cmp+select
new 8658877c1fa AMDGPU/GlobalISel: Handle 16-bit SALU min/max
new 643e4ad7f2f AMDGPU/GlobalISel: Custom lower control flow intrinsics
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lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 64 +++++++++++
lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 4 +
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 24 +++-
.../GlobalISel/legalize-amdgcn.if-invalid.mir | 73 ++++++++++++
test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir | 126 +++++++++++++++++++--
.../AMDGPU/GlobalISel/regbankselect-smax.mir | 108 +++++++++++++++---
.../AMDGPU/GlobalISel/regbankselect-smin.mir | 108 +++++++++++++++---
.../AMDGPU/GlobalISel/regbankselect-umax.mir | 108 +++++++++++++++---
.../AMDGPU/GlobalISel/regbankselect-umin.mir | 108 +++++++++++++++---
9 files changed, 647 insertions(+), 76 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if-invalid.mir
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from db3759c68a8 AMDGPU/GlobalISel: Legalize s16 add/sub/mul
new 17d7fd53f6d AMDGPU/GlobalISel: Add tests for add legalization
new 3871c498921 [X86] Avoid SFB - Fix inconsistent codegen with/without deb [...]
new f55969cbd1f AMDGPU/GlobalISel: Lower SALU min/max to cmp+select
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Summary of changes:
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 47 ++++-
lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +
test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 87 ++++++++
.../AMDGPU/GlobalISel/regbankselect-smax.mir | 84 ++++++--
.../AMDGPU/GlobalISel/regbankselect-smin.mir | 84 ++++++--
.../AMDGPU/GlobalISel/regbankselect-umax.mir | 84 ++++++--
.../AMDGPU/GlobalISel/regbankselect-umin.mir | 84 ++++++--
...-g-no-change.mir => avoid-sfb-g-no-change2.mir} | 138 ++++++-------
test/CodeGen/X86/avoid-sfb-g-no-change3.mir | 223 +++++++++++++++++++++
9 files changed, 668 insertions(+), 167 deletions(-)
copy test/CodeGen/X86/{avoid-sfb-g-no-change.mir => avoid-sfb-g-no-change2.mir} (64%)
create mode 100644 test/CodeGen/X86/avoid-sfb-g-no-change3.mir
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from 6b0bb33c86a [NFC][InstCombine] Add tests for "shift direction in bittes [...]
new 93f32681689 AMDGPU/GlobalISel: Fix allowing non-boolean conditions for [...]
new db3759c68a8 AMDGPU/GlobalISel: Legalize s16 add/sub/mul
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Summary of changes:
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 13 +-
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 103 +-
test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir | 146 +-
test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir | 285 ++-
test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir | 146 +-
.../AMDGPU/GlobalISel/regbankselect-phi.mir | 1849 +++++++++++++-------
.../AMDGPU/GlobalISel/regbankselect-select.mir | 1451 ++++++++++-----
7 files changed, 2856 insertions(+), 1137 deletions(-)
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from 892d71956 [lldb] [Process/NetBSD] Use global enable bits for watchpoints
new 8b396183d [lldb] [lldbsuite] Use a unique class name for TestBacktraceAll
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.../test/functionalities/thread/backtrace_all/TestBacktraceAll.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
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from 860def304b2 GlobalISel: Verify G_MERGE_VALUES operand sizes
new 6b0bb33c86a [NFC][InstCombine] Add tests for "shift direction in bittes [...]
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.../InstCombine/shift-direction-in-bit-test.ll | 234 +++++++++++++++++++++
1 file changed, 234 insertions(+)
create mode 100644 test/Transforms/InstCombine/shift-direction-in-bit-test.ll
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from 65810c2e1 [TSan] Improve handling of stack pointer mangling in {set,lon [...]
new 2e140cf32 [TSan] Fix initialized and declared ‘extern’ warning
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lib/tsan/rtl/tsan_platform_linux.cc | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
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