Tcwg-commits October 2019

tcwg-commits@lists.linaro.org

6 participants
13959 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allnoconfig updated (73e6d43 -> b8b9f33)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allnoconfig in repository toolchain/ci/base-artifacts. discards 73e6d43 0: update: llvm-linux: boot new b8b9f33 0: update: llvm-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (73e6d43) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-release-aarc [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 168 +- 02-build_llvm/console.log | 12060 ++++++++++++++++++------------------ 03-build_linux/console.log | 652 +- 04-boot_linux/console.log | 4 +- console.log | 12884 +++++++++++++++++++-------------------- jenkins/manifest.sh | 8 +- 6 files changed, 12888 insertions(+), 12888 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (18690af21f6 -> e04a052b62e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/gcc. from 18690af21f6 Fix use after free in vector_size change adds 1243f4ece47 Fix PR reference in ChangeLog. adds 9b3b552318b Come up with json::integer_number and use it in GCOV. adds c5c6e50cd41 * config/abi/post/aarch64-linux-gnu/baseline_symbols.txt: Update. adds fee76a24c81 2019-10-22 Richard Biener <rguenther(a)suse.de> adds 69dbf052478 Fix PR middle-end/90796 adds 5885f487165 2019-10-22 Richard Biener <rguenther(a)suse.de> adds b80bc224a5b [arm] make arm_carry_operation and arm_borrow_operation duals adds bc0ce08b88f [arm] Match subtraction from carry_operation adds 88ab531a5ae Arm: Fix arm libsanitizer bootstrap failure adds 57f5992bc1c PR c++/85746: Don't fold __builtin_constant_p prematurely adds 7a17e445bbe PR tree-optimization/85887 * decl.c (expand_static_init): [...] adds cb490120bad 2019-10-22 Steven G. Kargl <kargl(a)gcc.gnu.org> adds b725ca4e8e3 Fix incorrect merge of conflictant names in `dump_graphviz` adds 954026a7a4e Remove redundant std::allocator members for C++20 adds 9b26e386695 Do not declare std::uses_allocator before C++11 adds 6b85fac30f4 Restore use of tr1::unordered_map in testsuite adds e4c103e5395 Daily bump. adds 3249bf94c3c [Darwin, PPC] Check for out of range asm values. adds 10928002eec 2019-10-23 Richard Biener <rguenther(a)suse.de> new e04a052b62e Do not ICE in IPA inliner. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 82 +++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/cgraph.c | 2 +- gcc/config/arm/arm.c | 7 ++ gcc/config/arm/arm.md | 13 ++++ gcc/config/arm/predicates.md | 2 +- gcc/config/rs6000/darwin.h | 4 +- gcc/cp/ChangeLog | 14 +++- gcc/cp/constexpr.c | 2 +- gcc/cp/decl.c | 4 +- gcc/diagnostic-format-json.cc | 4 +- gcc/fortran/ChangeLog | 6 ++ gcc/fortran/array.c | 14 ++++ gcc/fortran/decl.c | 9 --- gcc/gcov.c | 23 +++--- gcc/gimple-loop-jam.c | 81 +++++++++++++++++++-- gcc/ipa-inline.c | 2 +- gcc/json.cc | 41 ++++++++--- gcc/json.h | 35 +++++++-- gcc/optinfo-emit-json.cc | 10 +-- gcc/testsuite/ChangeLog | 25 +++++++ gcc/testsuite/g++.dg/ipa/pr91969.C | 38 ++++++++++ gcc/testsuite/g++.dg/pr85746.C | 10 +++ gcc/testsuite/gcc.dg/torture/pr92173.c | 11 +++ gcc/testsuite/gcc.dg/unroll-and-jam.c | 22 ++++-- gcc/testsuite/gcc.dg/vshift-5.c | 44 ++++++++++++ gcc/tree-vect-loop.c | 54 +++++++------- gcc/tree-vect-slp.c | 32 ++++++--- gcc/tree-vect-stmts.c | 29 +++++++- libsanitizer/ChangeLog | 6 ++ .../sanitizer_platform_limits_posix.cpp | 6 +- libstdc++-v3/ChangeLog | 83 ++++++++++++++++++++++ .../post/aarch64-linux-gnu/baseline_symbols.txt | 5 ++ libstdc++-v3/include/bits/alloc_traits.h | 62 ++++++++++++++-- libstdc++-v3/include/bits/allocator.h | 10 ++- libstdc++-v3/include/bits/basic_string.h | 11 +-- libstdc++-v3/include/bits/memoryfwd.h | 4 ++ libstdc++-v3/include/ext/debug_allocator.h | 3 +- libstdc++-v3/include/ext/malloc_allocator.h | 41 +++++++---- libstdc++-v3/include/ext/new_allocator.h | 33 ++++++--- libstdc++-v3/include/ext/rc_string_base.h | 4 +- libstdc++-v3/include/ext/rope | 8 ++- libstdc++-v3/include/ext/slist | 6 +- libstdc++-v3/include/ext/sso_string_base.h | 5 +- libstdc++-v3/include/ext/throw_allocator.h | 13 ++-- libstdc++-v3/include/ext/vstring.h | 5 +- libstdc++-v3/include/ext/vstring_util.h | 9 ++- libstdc++-v3/include/std/memory | 1 + libstdc++-v3/testsuite/17_intro/names.cc | 4 ++ libstdc++-v3/testsuite/20_util/allocator/8230.cc | 5 +- .../29134.cc => 20_util/allocator/rebind_c++20.cc} | 24 +++---- .../20_util/allocator/requirements/typedefs.cc | 4 ++ .../allocator/requirements/typedefs_c++20.cc | 56 +++++++++++++++ .../23_containers/deque/capacity/29134.cc | 4 +- .../23_containers/forward_list/capacity/1.cc | 5 +- .../testsuite/23_containers/list/capacity/29134.cc | 4 +- .../testsuite/23_containers/map/capacity/29134.cc | 5 +- .../23_containers/multimap/capacity/29134.cc | 5 +- .../23_containers/multiset/capacity/29134.cc | 5 +- .../testsuite/23_containers/set/capacity/29134.cc | 5 +- .../23_containers/vector/capacity/29134.cc | 11 ++- .../ext/malloc_allocator/variadic_construct.cc | 2 +- .../ext/new_allocator/variadic_construct.cc | 2 +- .../testsuite/ext/vstring/capacity/29134.cc | 3 +- .../testsuite/util/replacement_memory_operators.h | 4 ++ libstdc++-v3/testsuite/util/testsuite_abi.h | 10 ++- libstdc++-v3/testsuite/util/testsuite_allocator.h | 14 +++- 67 files changed, 915 insertions(+), 194 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ipa/pr91969.C create mode 100644 gcc/testsuite/g++.dg/pr85746.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92173.c copy libstdc++-v3/testsuite/{23_containers/map/capacity/29134.cc => 20_util/alloca [...] create mode 100644 libstdc++-v3/testsuite/20_util/allocator/requirements/typedefs_ [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (ef0cc92e9c -> 7e785608ce)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/binutils-gdb. from ef0cc92e9c Don't allow RELATIVE relocs in pr22269 testcase adds 6207ed2877 Prevent more potential illegal memory accesses in the RX dis [...] adds 7bb4305982 Store the mangled name as a string_view adds 1a6ff1a96b Add a fast_hash function in common-utils adds ccb1ba6229 Use libxxhash for hashing, if present adds 3a49427939 Fix compile error & incorrect push adds 403772ef61 Make demangled_name_entry::language not a bitfield adds 6a093f341b Automatic date update in version.in adds 7e785608ce [gdb/breakpoints] Fix fullname.exp when run from symlink dir No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/ChangeLog | 49 ++++++ gdb/Makefile.in | 8 +- gdb/config.in | 3 + gdb/configure | 497 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ gdb/configure.ac | 23 +++ gdb/symtab.c | 38 +++-- gdb/utils.h | 18 ++ opcodes/ChangeLog | 7 + opcodes/rx-dis.c | 50 ++++-- 10 files changed, 666 insertions(+), 29 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig updated (cec4bfe -> 3addb1c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. discards cec4bfe 0: update: binutils-gcc-linux: all new 3addb1c 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cec4bfe) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-aarch6 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 104 +- 02-prepare_abe/console.log | 278 +- 03-build_abe-binutils/console.log | 11473 +++++++------- 04-build_abe-stage1/console.log | 15795 +++++++++---------- 05-build_linux/console.log | 2480 +-- 06-boot_linux/console.log | 2 +- console.log | 30150 ++++++++++++++++++------------------ jenkins/manifest.sh | 12 +- 8 files changed, 30209 insertions(+), 30085 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[binutils-gdb] branch master updated (7e785608ce -> de6d8dc25c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 7e785608ce [gdb/breakpoints] Fix fullname.exp when run from symlink dir new de6d8dc25c Fix typo in RX disassembler error messages. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: opcodes/ChangeLog | 9 +++++++++ opcodes/rx-dis.c | 20 ++++++++++---------- 2 files changed, 19 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[gcc] branch master updated (10928002eec -> e04a052b62e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 10928002eec 2019-10-23 Richard Biener <rguenther(a)suse.de> new e04a052b62e Do not ICE in IPA inliner. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 6 ++++++ gcc/ipa-inline.c | 2 +- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/g++.dg/ipa/pr91969.C | 38 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 50 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/g++.dg/ipa/pr91969.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (ac2d1079acc -> b553943b346)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/gcc. from ac2d1079acc Daily bump. adds 8a3ffb51c5a PR c++/92106 - ICE with structured bindings and -Wreturn-l [...] adds aa98d62d9c7 PR c++/92062 - ODR-use ignored for static member of class [...] adds 8d4b1882b59 2019-10-22 Steven G. Kargl <kargl(a)gcc.gnu.org> adds b553943b346 Daily bump. No new revisions were added by this update. Summary of changes: gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 12 +++++++ gcc/cp/pt.c | 2 ++ gcc/cp/typeck.c | 6 ++-- gcc/fortran/ChangeLog | 6 ++++ gcc/fortran/array.c | 14 ++++++++ gcc/fortran/decl.c | 8 ----- gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C | 19 +++++++++++ gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C | 19 +++++++++++ gcc/testsuite/g++.dg/cpp1z/decomp50.C | 51 +++++++++++++++++++++++++++++ 10 files changed, 128 insertions(+), 11 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-odr1.C create mode 100644 gcc/testsuite/g++.dg/cpp0x/constexpr-odr2.C create mode 100644 gcc/testsuite/g++.dg/cpp1z/decomp50.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig updated (cbe8446 -> e1a8c91)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards cbe8446 0: update: binutils-gcc-linux: all new e1a8c91 0: update: binutils-gcc-linux: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cbe8446) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 184 +- 02-prepare_abe/console.log | 394 +- 03-build_abe-binutils/console.log | 10588 ++++++------- 04-build_abe-stage1/console.log | 18155 +++++++++++---------- 05-build_linux/console.log | 1118 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 8 +- console.log | 30474 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 30448 insertions(+), 30491 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (7d194c2100ad -> 3b7c59a1950c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/linux. from 7d194c2100ad Linux 5.4-rc4 adds 20504fa1d2ff pinctrl: armada-37xx: fix control of pins 32 and up adds f876dbff857b pinctrl: bcm-iproc: Use SPDX header adds 39b65fbb8130 pinctrl: ns2: Fix off by one bugs in ns2_pinmux_enable() adds 48659227e0a1 pinctrl: iproc: allow for error from platform_get_irq() adds 2fd215b8fdbe pinctrl: stmfx: fix null pointer on remove adds b835d6953009 pinctrl: armada-37xx: swap polarity on LED group adds 57ff2df1b952 pinctrl: intel: Allocate IRQ chip dynamic adds 260996c30f4f pinctrl: cherryview: restore Strago DMI workaround for all [...] adds d2fe76dddaac Merge tag 'intel-pinctrl-fixes-v5.4' of git://git.kernel.o [...] adds 8f1c9dffe30b pinctrl: berlin: as370: fix a typo s/spififib/spdifib adds 9091a0698be2 dt-bindings: pinctrl: aspeed-g6: Rework SD3 function and groups adds 377dfcdcc046 pinctrl: aspeed-g6: Sort pins for sanity adds b178f91f449c pinctrl: aspeed-g6: Fix I2C14 SDA description adds 9979346f5560 pinctrl: aspeed-g6: Fix I3C3/I3C4 pinmux configuration adds c136d4c71f75 pinctrl: aspeed-g6: Make SIG_DESC_CLEAR() behave intuitively adds 155058343253 pinctrl: aspeed-g6: Fix UART13 group pinmux adds d6e7a1a5119c pinctrl: aspeed-g6: Rename SD3 to EMMC and rework pin groups adds 3b7c59a1950c Merge tag 'pinctrl-v5.4-2' of git://git.kernel.org/pub/scm [...] No new revisions were added by this update. Summary of changes: .../bindings/pinctrl/aspeed,ast2600-pinctrl.yaml | 86 +++++++------- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 124 +++++++++------------ drivers/pinctrl/aspeed/pinmux-aspeed.h | 3 +- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 12 +- drivers/pinctrl/bcm/pinctrl-ns2-mux.c | 4 +- drivers/pinctrl/berlin/pinctrl-as370.c | 2 +- drivers/pinctrl/intel/pinctrl-cherryview.c | 4 - drivers/pinctrl/intel/pinctrl-intel.c | 27 ++--- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 26 ++--- drivers/pinctrl/pinctrl-stmfx.c | 2 +- 10 files changed, 131 insertions(+), 159 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 8 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig updated (1876e6c83c7 -> d052a578de5)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-defconfig in repository toolchain/ci/llvm-project. from 1876e6c83c7 [builtins][test] Avoid unportable mmap call in clear_cache_test.c adds ecc999101aa [FrontendTests] Try again to make test not write an output file adds 78d632d1055 [LLVMDebugInfoPDB] - Use cantFail() instead of assert(). adds 0f4186779e0 [ThinLTO] Don't internalize during promotion adds 17f5d2b1a5c [Alignment][NFC] Attributes use Align/MaybeAlign adds 8e050e41a4b [Alignment][NFC] Use MaybeAlign in AttrBuilder adds f2c8f3b181e [PowerPC] Turn on CR-Logical reducer pass adds 734c74ba14b [Alignment][NFC] Convert LoadInst to MaybeAlign adds 5b99c189b3b [Alignment][NFC] Convert StoreInst to MaybeAlign adds e5dd30f77e1 [ThinLTO] Add code comment. NFC adds e4af9de36ca [MIPS GlobalISel] Select MSA vector generic and builtin add adds 95290827d7d [MIParser] Set RegClassOrRegBank during instruction parsing adds 3ef017d0669 [InstCombine] Signed saturation tests. NFC adds 40c47680eb2 [libcxx] Remove shared_ptr::make_shared adds 186155b89c2 [InstCombine] Signed saturation patterns adds 3bf7fddeb05 Update git-llvm script to push to GitHub adds 0bff9bd26e3 [lldb] Adjust for the new class_rw_t layout. adds 19ca80ef057 gn build: make sync build work with git revs now that svn is gone adds 48f57138be5 [AMDGPU] Allow tied operand subreg folding adds 8be5827f856 Test commit - add clarification to README regarding Darwin. adds a7cebfe9c03 Relax assertions when there's really no entries. [NFC] adds f9b1dc5553c [AMDGPU] Updated fold-vgpr-copy.mir test. NFC. adds 9b1419a9e50 [NFC][LVI][CVP] Tests where pre-specified `add` no-wrap fla [...] adds 4334892e7b0 [DAGCombine][ARM] x ==/!= c -> (x - c) ==/!= 0 iff '-c' [...] adds 68f5ca4e19c [HIP] Add option -fgpu-allow-device-init adds aed9d6d64a3 [RISCV] Add support for -ffixed-xX flags adds e0e7d06df3e fix a few typos to test git committing adds 70316d3174d Revert "Fix lld detection in standalone compiler-rt." adds 1c98ff49a30 Fix name of warn_ignored_hip_only_option adds 4c539e8da1b Revert r374202"[ObjC generics] Fix not inheriting type boun [...] adds f86dc64bad4 typo fix test commit adds cf57be9d349 [PowerPC][NFC] Remove deprecated Function Attrs comments adds efd7caaa4ec Fix broken sphinx link in CMake.rst. adds 31d3c1d8b70 [PowerPC][NFC] Remove deprecated Function Attrs comments #2 adds 19e95ab4210 [NFC] Strip trailing whitespace in test to test Github committing adds 437e0e5191c [libcxx][test][NFC] Fix comment typos. adds d052a578de5 [c++2a] Allow comparison functions to be explicitly defaulted. No new revisions were added by this update. Summary of changes: clang/include/clang/AST/Decl.h | 7 + clang/include/clang/AST/Type.h | 2 +- clang/include/clang/Basic/DiagnosticCommonKinds.td | 8 +- clang/include/clang/Basic/DiagnosticGroups.td | 4 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 25 + clang/include/clang/Basic/LangOptions.def | 1 + clang/include/clang/Driver/Options.td | 9 +- clang/include/clang/Sema/Sema.h | 73 ++- clang/lib/AST/Decl.cpp | 23 +- clang/lib/AST/Type.cpp | 4 - clang/lib/CodeGen/CGDeclCXX.cpp | 7 +- clang/lib/Driver/ToolChains/Arch/RISCV.cpp | 64 +++ clang/lib/Driver/ToolChains/HIP.cpp | 4 + clang/lib/Frontend/CompilerInvocation.cpp | 7 + clang/lib/Parse/ParseDecl.cpp | 3 +- clang/lib/Parse/ParseDeclCXX.cpp | 3 +- clang/lib/Sema/SemaCUDA.cpp | 2 + clang/lib/Sema/SemaDecl.cpp | 22 - clang/lib/Sema/SemaDeclCXX.cpp | 285 ++++++++++-- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 9 +- .../class.compare/class.compare.default/p1.cpp | 46 ++ clang/test/CXX/class/class.compare/class.eq/p1.cpp | 25 + .../test/CXX/class/class.compare/class.rel/p1.cpp | 25 + .../dcl.fct.def/dcl.fct.def.default/p1.cpp | 26 +- clang/test/CodeGenCUDA/device-init-fun.cu | 19 + clang/test/Driver/riscv-fixed-x-register.c | 341 ++++++++++++++ clang/test/Frontend/warn-device-init-fun.cu | 8 + clang/test/Parser/cxx0x-decl.cpp | 2 +- clang/test/SemaCXX/cxx0x-defaulted-functions.cpp | 2 +- clang/test/SemaCXX/cxx17-compat.cpp | 33 ++ clang/test/SemaObjC/parameterized_classes_subst.m | 14 - clang/unittests/Frontend/OutputStreamTest.cpp | 2 + compiler-rt/CMakeLists.txt | 2 +- compiler-rt/cmake/config-ix.cmake | 1 - libcxx/include/memory | 45 +- .../memory/aligned_allocation_macro.pass.cpp | 2 +- .../array/array.cons/initializer_list.pass.cpp | 2 +- .../lexically_relative_and_proximate.pass.cpp | 2 +- .../fs.op.funcs/fs.op.relative/relative.pass.cpp | 2 +- .../weakly_canonical.pass.cpp | 2 +- .../fpos/fpos.operations/difference.pass.cpp | 2 +- .../fpos/fpos.operations/subtraction.pass.cpp | 2 +- libcxx/test/std/numerics/c.math/abs.pass.cpp | 4 +- .../string_compare/size_size_string_view.pass.cpp | 2 +- .../opge.string_view.pointer.pass.cpp | 4 +- .../opgt.string_view.pointer.pass.cpp | 4 +- .../ople.string_view.pointer.pass.cpp | 4 +- .../oplt.string_view.pointer.pass.cpp | 4 +- .../meta.const.eval/is_constant_evaluated.pass.cpp | 2 +- .../meta/meta.rel/is_convertible.pass.cpp | 2 +- .../optional/optional.specalg/swap.pass.cpp | 2 +- .../unique.ptr.asgn/move_convert.pass.cpp | 2 +- .../unique.ptr.class/unique.ptr.ctor/move.pass.cpp | 4 +- .../unique.ptr.ctor/move_convert.pass.cpp | 2 +- .../unique.ptr.ctor/nullptr.pass.cpp | 2 +- .../unique.ptr.ctor/pointer.pass.cpp | 2 +- .../time.cal.weekday.members/ok.pass.cpp | 2 +- .../tuple.tuple/tuple.assign/convert_copy.pass.cpp | 2 +- .../tuple.tuple/tuple.assign/convert_move.pass.cpp | 2 +- lld/include/lld/Core/Error.h | 4 +- lld/include/lld/Core/UndefinedAtom.h | 2 +- .../AppleObjCClassDescriptorV2.cpp | 12 + llvm/docs/CMake.rst | 2 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 + llvm/include/llvm/IR/Attributes.h | 40 +- llvm/include/llvm/IR/Function.h | 9 +- llvm/include/llvm/IR/InstrTypes.h | 10 +- llvm/include/llvm/IR/Instructions.h | 32 +- llvm/lib/AsmParser/LLParser.cpp | 43 +- llvm/lib/AsmParser/LLParser.h | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 12 +- llvm/lib/CodeGen/MIRParser/MIParser.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 61 +++ .../PDB/Native/NativeEnumInjectedSources.cpp | 25 +- llvm/lib/IR/AttributeImpl.h | 4 +- llvm/lib/IR/Attributes.cpp | 51 +-- llvm/lib/IR/Instructions.cpp | 59 ++- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 12 - llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 60 ++- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 18 +- llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 9 +- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 2 +- llvm/lib/Target/PowerPC/README.txt | 3 + llvm/lib/Target/RISCV/RISCV.td | 5 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 11 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 38 ++ llvm/lib/Target/RISCV/RISCVISelLowering.h | 6 + llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 11 + llvm/lib/Target/RISCV/RISCVRegisterInfo.h | 2 + llvm/lib/Target/RISCV/RISCVSubtarget.cpp | 1 + llvm/lib/Target/RISCV/RISCVSubtarget.h | 5 + llvm/lib/Transforms/IPO/FunctionImport.cpp | 4 + llvm/lib/Transforms/IPO/GlobalOpt.cpp | 16 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 7 +- .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstCombineLoadStoreAlloca.cpp | 4 +- llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp | 6 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 67 +++ .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 5 +- llvm/lib/Transforms/Scalar/GVN.cpp | 8 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 3 +- llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir | 35 +- llvm/test/CodeGen/ARM/addsubcarry-promotion.ll | 62 +-- llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll | 27 ++ .../test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir | 39 ++ .../Mips/GlobalISel/instruction-select/add_vec.mir | 130 ++++++ .../CodeGen/Mips/GlobalISel/legalizer/add_vec.mir | 122 +++++ .../Mips/GlobalISel/legalizer/add_vec_builtin.mir | 237 ++++++++++ .../GlobalISel/legalizer/sitofp_and_uitofp.mir | 20 +- .../CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll | 70 +++ .../Mips/GlobalISel/llvm-ir/add_vec_builtin.ll | 138 ++++++ .../Mips/GlobalISel/regbankselect/add_vec.mir | 126 +++++ llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll | 39 +- llvm/test/CodeGen/PowerPC/brcond.ll | 6 +- llvm/test/CodeGen/PowerPC/build-vector-tests.ll | 131 +----- llvm/test/CodeGen/PowerPC/pr42492.ll | 14 +- llvm/test/CodeGen/PowerPC/sms-simple.ll | 6 +- llvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll | 15 +- llvm/test/CodeGen/PowerPC/vec-min-max.ll | 23 +- llvm/test/CodeGen/RISCV/reserved-reg-errors.ll | 36 ++ llvm/test/CodeGen/RISCV/reserved-regs.ll | 130 ++++++ llvm/test/ThinLTO/X86/not-internalized.ll | 34 ++ llvm/test/ThinLTO/X86/weak_externals.ll | 4 +- .../Transforms/CorrelatedValuePropagation/icmp.ll | 136 ++++++ llvm/test/Transforms/InstCombine/sadd_sat.ll | 503 ++++++++++++++++++++ llvm/unittests/IR/AttributesTest.cpp | 8 +- llvm/utils/TableGen/SequenceToOffsetTable.h | 4 +- llvm/utils/git-svn/git-llvm | 510 ++++----------------- .../utils/gn/build/sync_source_lists_from_cmake.py | 24 +- 131 files changed, 3468 insertions(+), 1065 deletions(-) create mode 100644 clang/test/CXX/class/class.compare/class.compare.default/p1.cpp create mode 100644 clang/test/CXX/class/class.compare/class.eq/p1.cpp create mode 100644 clang/test/CXX/class/class.compare/class.rel/p1.cpp create mode 100644 clang/test/CodeGenCUDA/device-init-fun.cu create mode 100644 clang/test/Driver/riscv-fixed-x-register.c create mode 100644 clang/test/Frontend/warn-device-init-fun.cu create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.ll create mode 100644 llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/add_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/add_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/add_vec.mir create mode 100644 llvm/test/CodeGen/RISCV/reserved-reg-errors.ll create mode 100644 llvm/test/CodeGen/RISCV/reserved-regs.ll create mode 100644 llvm/test/ThinLTO/X86/not-internalized.ll create mode 100644 llvm/test/Transforms/InstCombine/sadd_sat.ll -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits October 2019