Tcwg-commits October 2019

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os updated (189f62b4901 -> 54b97aff264)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os in repository toolchain/ci/gcc. from 189f62b4901 Daily bump. adds cda60a3ce13 PR libstdc++/92059 fix several bugs in tr2::dynamic_bitset adds 995aa89a385 P1651R0 bind_front should not unwrap reference_wrapper adds 5438130aa96 Fix array index error in address_v6 comparisons adds 8d75a2adfd9 Include netinet/in.h in include/experimental/internet adds 65e54e42187 PR libstdc++/91456 make INVOKE<R> work with uncopyable prvalues adds b4ea8d36234 Update URL for Hoard in libstdc++ docs adds ccabe97303c Update URL for CUJ article in libstdc++ docs adds 6b40f57c577 Add makefile target to update HTML files in source tree adds c110fc78b61 Fix testsuite bugs adds 863dadd5779 Fix more tests that fail in C++2a mode adds 73d739bd134 PR libstdc++/92143 adjust for OS X aligned_alloc behaviour adds 35d5d9cb917 Do not declare std::uses_allocator before C++11 adds 6192703ef91 PR libstdc++/89164 enforce constraints for uninitialized algos adds 53bbdb185ea Fix indentation in testsuite utility header adds 423fdcc37d1 Fix tests that fail with -std=gnu++98 or -std=gnu++11 adds 2cdef11f36a Fix more failing tests for C++98 mode adds c0a16a84e68 PR libstdc++/61761 fix std::proj for targets without C99 cproj adds 15df354cbe4 PR libstdc++/90682 allow set_terminate(0) and set_unexpected(0) adds b1d2856cad9 [Darwin, PPC] Check for out of range asm values. adds bc7d2a776ea [arm] Backport -- Fix multilibs for Armv7-R adds 180b53e4cdb * decl.c (reshape_init_r): Add missing space. adds f24860adca4 Daily bump. adds 30f04a5d07b Backport ggc_trim Backport from mainline adds f61ed87a9f4 free summary vectors. Backport from mainline 2019-10-24 [...] adds 7b8f309cf42 [arm][PR88167] Fix __builtin_return_address returns invalid [...] adds 13a1c74461e compiler: don't inline integer expressions with named types adds 54b97aff264 Daily bump. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 58 +++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm.c | 84 ++++- gcc/config/arm/t-multilib | 29 +- gcc/config/rs6000/darwin.h | 4 +- gcc/cp/ChangeLog | 4 + gcc/cp/decl.c | 2 +- gcc/ggc-none.c | 5 + gcc/ggc-page.c | 44 ++- gcc/ggc.h | 3 + gcc/go/gofrontend/expressions.cc | 18 +- gcc/lto/ChangeLog | 6 + gcc/lto/lto.c | 2 + gcc/symbol-summary.h | 4 + gcc/testsuite/ChangeLog | 16 + gcc/testsuite/gcc.target/arm/multilib.exp | 22 ++ gcc/testsuite/gcc.target/arm/pr88167-1.c | 15 + gcc/testsuite/gcc.target/arm/pr88167-2.c | 18 + libstdc++-v3/ChangeLog | 214 +++++++++++ libstdc++-v3/doc/Makefile.am | 7 +- libstdc++-v3/doc/Makefile.in | 7 +- .../doc/html/manual/documentation_hacking.html | 7 +- libstdc++-v3/doc/html/manual/memory.html | 10 +- libstdc++-v3/doc/html/manual/status.html | 5 +- libstdc++-v3/doc/xml/manual/allocator.xml | 13 +- .../doc/xml/manual/documentation_hacking.xml | 9 +- libstdc++-v3/include/bits/memoryfwd.h | 2 + libstdc++-v3/include/bits/std_function.h | 10 +- libstdc++-v3/include/bits/stl_algobase.h | 2 +- libstdc++-v3/include/bits/stl_uninitialized.h | 24 +- libstdc++-v3/include/experimental/internet | 7 +- libstdc++-v3/include/std/complex | 68 ++-- libstdc++-v3/include/std/functional | 4 +- libstdc++-v3/include/std/type_traits | 41 ++- libstdc++-v3/include/std/version | 2 +- libstdc++-v3/include/tr2/dynamic_bitset | 295 ++++++++------- libstdc++-v3/include/tr2/dynamic_bitset.tcc | 2 +- libstdc++-v3/libsupc++/eh_term_handler.cc | 17 +- .../{eh_term_handler.cc => eh_term_handler.h} | 11 +- libstdc++-v3/libsupc++/eh_terminate.cc | 7 + libstdc++-v3/libsupc++/new_opa.cc | 5 +- libstdc++-v3/testsuite/17_intro/names.cc | 4 + libstdc++-v3/testsuite/18_support/set_terminate.cc | 57 +++ .../testsuite/18_support/set_unexpected.cc | 57 +++ .../invoke/1.cc => function/91456.cc} | 25 +- .../20_util/function_objects/bind_front/1.cc | 2 +- .../20_util/function_objects/bind_front/2.cc | 91 +++++ .../testsuite/20_util/function_objects/invoke/1.cc | 19 +- .../testsuite/20_util/function_objects/invoke/3.cc | 49 +++ .../invoke/1.cc => is_invocable/91456.cc} | 22 +- .../20_util/is_nothrow_invocable/value.cc | 4 + .../specialized_algorithms/uninitialized_copy/1.cc | 2 +- .../uninitialized_copy/89164.cc} | 26 +- .../uninitialized_copy_n/89164.cc} | 23 +- .../uninitialized_fill/89164.cc} | 23 +- .../uninitialized_fill_n/89164.cc} | 23 +- .../deque/requirements/dr438/assign_neg.cc | 1 + .../deque/requirements/dr438/constructor_1_neg.cc | 1 + .../deque/requirements/dr438/constructor_2_neg.cc | 1 + .../deque/requirements/dr438/insert_neg.cc | 1 + .../list/requirements/dr438/assign_neg.cc | 1 + .../list/requirements/dr438/constructor_1_neg.cc | 1 + .../list/requirements/dr438/constructor_2_neg.cc | 1 + .../list/requirements/dr438/insert_neg.cc | 1 + .../unordered_map/requirements/debug_container.cc | 2 +- .../unordered_set/allocator/ext_ptr.cc | 3 +- .../1.cc => 23_containers/vector/cons/89164.cc} | 29 +- .../23_containers/vector/cons/89164_c++17.cc | 50 +++ .../vector/requirements/dr438/assign_neg.cc | 1 + .../vector/requirements/dr438/constructor_1_neg.cc | 1 + .../vector/requirements/dr438/constructor_2_neg.cc | 1 + .../vector/requirements/dr438/insert_neg.cc | 1 + libstdc++-v3/testsuite/26_numerics/complex/proj.cc | 403 +++++++++++++++++++++ libstdc++-v3/testsuite/experimental/names.cc | 7 +- libstdc++-v3/testsuite/ext/char8_t/atomic-1.cc | 2 +- .../testsuite/libstdc++-prettyprinters/compat.cc | 2 +- .../1.cc => tr2/dynamic_bitset/cmp.cc} | 41 ++- libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc | 105 ++++++ .../1.cc => tr2/dynamic_bitset/copy.cc} | 46 ++- .../1.cc => tr2/dynamic_bitset/move.cc} | 44 ++- .../dynamic_bitset/pr92059.cc} | 24 +- libstdc++-v3/testsuite/util/testsuite_allocator.h | 266 +++++++------- 82 files changed, 2030 insertions(+), 538 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-1.c create mode 100644 gcc/testsuite/gcc.target/arm/pr88167-2.c copy libstdc++-v3/libsupc++/{eh_term_handler.cc => eh_term_handler.h} (83%) create mode 100644 libstdc++-v3/testsuite/18_support/set_terminate.cc create mode 100644 libstdc++-v3/testsuite/18_support/set_unexpected.cc copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => function/9145 [...] create mode 100644 libstdc++-v3/testsuite/20_util/function_objects/bind_front/2.cc create mode 100644 libstdc++-v3/testsuite/20_util/function_objects/invoke/3.cc copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => is_invocable/ [...] copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => specialized_a [...] copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => specialized_a [...] copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => specialized_a [...] copy libstdc++-v3/testsuite/20_util/{function_objects/invoke/1.cc => specialized_a [...] copy libstdc++-v3/testsuite/{20_util/specialized_algorithms/uninitialized_copy/1.c [...] create mode 100644 libstdc++-v3/testsuite/23_containers/vector/cons/89164_c++17.cc create mode 100644 libstdc++-v3/testsuite/26_numerics/complex/proj.cc copy libstdc++-v3/testsuite/{20_util/specialized_algorithms/uninitialized_copy/1.c [...] create mode 100644 libstdc++-v3/testsuite/tr2/dynamic_bitset/cons.cc copy libstdc++-v3/testsuite/{20_util/specialized_algorithms/uninitialized_copy/1.c [...] copy libstdc++-v3/testsuite/{20_util/specialized_algorithms/uninitialized_copy/1.c [...] copy libstdc++-v3/testsuite/{23_containers/deque/requirements/dr438/constructor_1_ [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os updated (ac41e973 -> 791b5f5c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk/gnu-release-arm-spec2k6-Os in repository toolchain/ci/base-artifacts. discards ac41e973 2: update: binutils-gcc-glibc: 0 new 791b5f5c 2: update: binutils-gcc-glibc: 0 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ac41e973) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk/gnu-release-arm-spec [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 132 +- 02-prepare_abe/console.log | 434 +- 03-build_abe-binutils/console.log | 10966 +-- 04-build_abe-stage1/console.log | 18630 ++-- 05-build_abe-linux/console.log | 292 +- 06-build_abe-glibc/console.log | 37786 ++++---- 07-build_abe-stage2/console.log | 46707 +++++----- 09-benchmark-Os_mthumb/benchmark-start.log | 2 +- 09-benchmark-Os_mthumb/benchmark.log | 26 +- 09-benchmark-Os_mthumb/console.log | 124 +- 10-check_regression/console.log | 258 +- 10-check_regression/results-0.csv | 3691 +- 10-check_regression/results-1.csv | 3715 +- 10-check_regression/results-compare.csv | 9 +- 10-check_regression/results-full.csv | 3953 +- 10-check_regression/results.csv | 245 +- 10-check_regression/results.log | 4468 +- 11-update_baseline/console.log | 8970 +- 11-update_baseline/results-1.csv | 3715 +- 11-update_baseline/results-compare.csv | 7 +- 11-update_baseline/results-full.csv | 3711 +- 11-update_baseline/results.csv | 245 +- 11-update_baseline/results.log | 2842 +- console.log | 124279 +++++++++++++------------- jenkins/manifest.sh | 12 +- results_id | 2 +- 26 files changed, 137666 insertions(+), 137555 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (30672f1c868 -> 541ec0fe275)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/gcc. from 30672f1c868 2019-09-09 Edward Smith-Rowland <3dw4rd(a)verizon.net> adds d5c02925a4c * doc/xml/gnu/gpl-3.0.xml: Switch www.gnu.org to https. adds f9b66efbaf9 * doc/xml/manual/policy_data_structures_biblio.xml: Switch [...] adds f172333b7d7 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8fda7730d16 Fix reductions for fully-masked loops adds 37438a1a429 Fix typo in dump_tree_statistics. adds 8f01336ddfc Update SVE tests for recent XPASSes adds 09a61eea0b9 Fix failure in gcc.target/sve/reduc_strict_3.c adds b52c5823a5c 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8c202b0db0a 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 29df010379b Guard use of concepts with feature test macro adds 1e9fd29a425 * gcc.target/powerpc/pr70100.c: Add -mvsx. [...] adds 96d1e6235a5 [Fortran] OpenACC – permit common blocks in some clauses adds e1ad18eeeed PR target/85969 * config/avr/gen-avr-mmcu-specs.c (str_pr [...] adds 3c585034cfd Fix compilation with Clang adds 4badc652b89 Use implicitly-defined copy operations for test iterators adds 991edac437a PR c++/91581 - ICE in exception-specification of defaulted ctor. adds 71046993786 Daily bump. adds 9da6344fa93 Fix false dependence of scalar operation vrcp/vsqrt/vrsqrt/ [...] adds 541ec0fe275 Adjust predicates and constraints of scalar insns. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 120 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/avr/gen-avr-mmcu-specs.c | 8 - gcc/config/i386/i386.md | 67 +++---- gcc/config/i386/sse.md | 205 +++++++++++++++------ gcc/config/i386/subst.md | 4 +- gcc/fortran/ChangeLog | 10 + gcc/fortran/openmp.c | 41 +++-- gcc/gimplify.c | 51 ++++- gcc/testsuite/ChangeLog | 65 +++++++ gcc/testsuite/g++.dg/cpp0x/noexcept55.C | 8 + gcc/testsuite/gcc.dg/torture/pr92222.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr65947-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-10.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-14.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-2.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-3.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-4.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-5.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-6.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-9.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/loop_add_5.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_5.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_8.c | 3 +- .../gcc.target/aarch64/sve/reduc_strict_3.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/slp_13.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve/slp_5.c | 22 +-- gcc/testsuite/gcc.target/aarch64/sve/slp_7.c | 20 +- gcc/testsuite/gcc.target/i386/pr87007-4.c | 18 ++ gcc/testsuite/gcc.target/i386/pr87007-5.c | 18 ++ gcc/testsuite/gcc.target/powerpc/pr70010.c | 4 +- gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 | 74 ++++++++ gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 | 53 ++++++ gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 | 39 ++++ gcc/tree-vect-loop.c | 65 +++---- gcc/tree-vect-patterns.c | 52 ++++++ gcc/tree-vect-slp.c | 64 ++----- gcc/tree-vect-stmts.c | 93 ++++++++-- gcc/tree.c | 2 +- libgomp/ChangeLog | 7 + .../libgomp.oacc-fortran/common-block-1.f90 | 107 +++++++++++ .../libgomp.oacc-fortran/common-block-2.f90 | 152 +++++++++++++++ .../libgomp.oacc-fortran/common-block-3.f90 | 139 ++++++++++++++ libstdc++-v3/ChangeLog | 27 +++ libstdc++-v3/doc/xml/gnu/gpl-3.0.xml | 2 +- .../xml/manual/policy_data_structures_biblio.xml | 2 +- libstdc++-v3/include/bits/allocator.h | 4 +- libstdc++-v3/include/bits/range_cmp.h | 4 +- .../20_util/allocator/requirements/constexpr.cc | 28 +++ libstdc++-v3/testsuite/util/testsuite_iterators.h | 89 ++++----- 58 files changed, 1418 insertions(+), 346 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept55.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92222.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-5.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-1.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-2.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-3.f90 create mode 100644 libstdc++-v3/testsuite/20_util/allocator/requirements/constexpr.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig updated (9188a35e -> d9486aae)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allmodconfig in repository toolchain/ci/base-artifacts. discards 9188a35e 0: update: binutils-1cc3da765d24068ef9046c19c9d23b1e69e30f6e: all new d9486aae 0: update: gcc-541ec0fe27585fce2b27750ca2bb1cf8985b043e: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (9188a35e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-ne [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-prepare_abe/console.log | 404 +- 03-build_abe-binutils/console.log | 11228 ++++++------ 04-build_abe-stage1/console.log | 19866 ++++++++++----------- 05-build_linux/console.log | 1846 +- 06-boot_linux/console.log | 2 +- 07-check_regression/console.log | 8 +- 08-update_baseline/console.log | 8 +- console.log | 33407 ++++++++++++++++++------------------ jenkins/manifest.sh | 8 +- 10 files changed, 33453 insertions(+), 33392 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (45787e56829 -> edb1a1de1b7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 45787e56829 Fix compilation warning. NFC. adds 13d8d19d518 gn build: (manually) merge 08074cc9 adds 9c0f66746ca gn build: Merge bb6a27fc257 adds 72d7908afc7 gn build: Merge d0bd3fc88be adds 918b88ab150 gn build: Merge ffa214ef228 adds b96e30c2172 git-llvm: Push to master branch by default adds efcdedd2e72 git-llvm: Drop dependency on github module adds 8c99a549dec [LiveDebugValues] Small code clean up; NFC adds a6712889f5f [lldb] [Host/netbsd] Set Arg0 for 'platform process list -v' adds 822059147bf [PowerPC] [Peephole] fold frame offset by using index form [...] adds 24ef631f433 Fix file-ordering nit in D67161. adds 77b3c794e34 [docs] Update Mips feature table in CodeGenerator.rst adds 2a3dc6b74f4 Fix a variable typo in LiveDebugValues [NFC] adds 53c164e2216 [llvm/Object] - Fix the error message reported for a broken [...] adds 9acaf542771 [obj2yaml] - Better dumping for relocations without symbols [...] adds 74d39a42f10 [clangd] DefineInline action availability checks adds dfd6374c784 [clangd] DefineInline action apply logic with fully qualifi [...] adds d581f68519d gn build: Merge 74d39a42f10 adds d62e3ed3f4b [clangd] Implement GetEligiblePoints adds 8aa84ad37db [clangd] Store Index in Tweak::Selection adds de3cef1d5d3 [yaml2obj, obj2yaml] - Add support for SHT_NOTE sections. adds e3105e71f3a [LLD][ELF] - Update test case after yaml2obj change. adds 11ce19d2119 [clang] Switch arm-mve-intrinsics tests to use %clang_cc1. adds ce1e249a688 Fix compilation error in clangd/refactor/tweaks/ExpandAutoType.cpp adds 3d9632a997f [clang-rename] NFC, make getCanonicalSymbolDeclaration robu [...] adds 417dd678250 [MIPS GlobalISel] Select MSA vector generic and builtin fsqrt adds 43e931cb5fc [clangd][NFC] Get rid of raw string literals in macros to m [...] adds 1baa50396d9 [RISCV] Add support for half-precision floats adds be29d928548 OpenMP Tasks dependencies hash re-sizing fixed. adds 11c2a85db88 [NFC] Rename LLVM_NO_DEAD_STRIP adds 6df7ef0d8ba [clang-format] [NFC] update the documentation in Format.h t [...] adds 59a51d84b3a [CodeGen][SelectionDAG] Fix tiny bug in ExpandIntRes_UADDSUBO adds b2c184458e9 [APInt] Add saturating multiply ops adds 1cc8e1e1d7d [APInt] Add saturating left-shift ops adds b82fa80e807 [SLP] adjust code comment; NFC adds 7ad3636c30a [AMDGPU] Remove update_llc_test_checks for a test adds abd89c243a4 build: reindent text (NFC) adds b85b4e5a6f8 Add an instruction marker field to the ExtraInfo in MachineInstrs. adds 8e567b0730f [clangd] Revert define-inline action changes to un-break wi [...] adds b74d7e5cccb [PowerPC] add test for popcnt with any_extend; NFC adds fd667b860e9 [libcxx] [test] Run `chmod +x` on executables when testing via SSH adds a153233caf6 gn build: Merge 8e567b0730f adds de79836312e [FPEnv] Teach the IRBuilder about correct use of the strict [...] adds 5934cd11ea3 [TableGen] Add asserts to make sure default values match pr [...] adds 7a2b704bf0c [Sema][Typo Correction] Fix another infinite loop on ambiguity adds 4d18b4a7c4f [SCEV] Add a clarifying comment around ExitLimit construction adds 96601ec28b7 ValueObject: Fix a crash related to children address type c [...] adds 197b7b24c33 [NFC][libomptarget] move remaining device specific code out [...] adds 118ceea5c36 Crt files are special cased by name when dealing with ctor [...] adds c35b358b741 AMDGPU/GlobalISel: Legalize FDIV16 adds e6c145e0548 [DAGCombiner] widen zext of popcount based on target support adds 3dd0a896b64 [X86] Add a check for SSE2 to the top of combineReductionTo [...] adds 72105b9dcd6 Fix compilation error in ObjectFileMachO::ParseSymtab adds 0877dd14e4e [Driver] Force llvm to install its handlers before lldb's adds c9c18e5a319 [AMDGPU] Disallow dpp combining for dpp instructions withou [...] adds d4303b38616 [AMDGPU] Fold AGPR reg_sequence initializers adds 074af2daf5f [llvm-objcopy][MachO] Add support for min os version load commands adds 2724d9e1296 build: remove `LLVM_CXX_STD` extension point adds 3c7c3717932 [CVP] add test for poison propagation bug (PR43802); NFC adds a4783ef58d3 [Alignment][NFC] getMemoryOpCost uses MaybeAlign adds cc0b9647b76 [LLD][ThinLTO] Handle GUID collision in import global processing adds 64c1f6602a0 Revert "Add an instruction marker field to the ExtraInfo in [...] adds a6e1de4afc5 [gicombiner] Add parse failure tests for defs/match adds 1ce552f3ef8 AMDGPU: Fix the broken dominator tree when creating waterfa [...] adds 171cf5302f4 AMDGPU/GlobalISel: Handle flat/global G_ATOMIC_CMPXCHG adds 03de2f84fc4 [ARM] Uses "Sun Style" syntax for section switching adds e8a0a0904b2 [Alignment][NFC] Convert AllocaInst to MaybeAlign adds 1a276d1e8c5 GlobalISel: Implement widenScalar for G_INSERT_VECTOR_ELT adds c7dcacf16a6 [AMDGPU] Fixed asan failure in SIFoldOperands adds a6b0219fc4a Revert "[ARM] Uses "Sun Style" syntax for section switching" adds 738af7a6241 Add the ability to pass extra args to a Python breakpoi [...] adds 0e4d4153115 Update version number in llvm python bindings adds e070cf81196 [x86] add tests for extractelement with undef index (PR42689); NFC adds a27c998c006 [BPF] fix a CO-RE issue with -mattr=+alu32 adds 7913126a08e [globalisel] Add LLVMDev 2019 talks and links for the 2017 talks adds 27887bc1e7a [globalisel] Fix typo in 'Add LLVMDev 2019 talks and links [...] adds 4c0251da149 [AMDGPU] Enable SGPR copy folding adds 73a7a55c0ec lldb/COFF: Create a separate "section" for the file header adds 27fdf8a29d1 [lit] Don't fail when printing test output with special chars adds 7c603a41e20 lldb/minidump: Refactor memory region computation code adds 8da20560ab0 [clang][DependencyScanning] 80-col. adds 10b5cd8ed52 [LLDB] Fix inline variable only used in assertion. (NFC) adds feab0334f57 [globalisel] Restructure the GlobalISel documentation adds 6c89392592c Use __builtin_strlen in constexpr StringRef ctor with MSVC adds 5a3c657f3e8 Fix after 738af7a6241c98164625b9cd1ba9f8af4e36f197 adds a88591cff46 [libFuzzer] Enable extra counters for Fuchsia. adds f3ad8ae7b73 [lit] Move sharding logic into separate function adds 4c47617627f [SDAG] fold extract_vector_elt with undef index adds dd501045cde [Clang][Bundler] Error reporting improvements adds 27e2c8faec6 Add Record::getValueAsOptionalDef(). adds baf91d02da6 [NFC] Add a tablegen node for the root of the AST node hier [...] adds 93b29d3882b Revert "[Clang][Bundler] Error reporting improvements" adds 4141bb50a87 [ORC] Avoid SymbolStringPtr copies in DynamicLibrarySearchG [...] adds edb1a1de1b7 Reland "[Clang][Bundler] Error reporting improvements" No new revisions were added by this update. Summary of changes: clang-tools-extra/clangd/SourceCode.cpp | 156 +++- clang-tools-extra/clangd/SourceCode.h | 21 + .../clangd/refactor/tweaks/ExpandAutoType.cpp | 2 +- .../clangd/unittests/SourceCodeTests.cpp | 62 ++ clang/include/clang/Basic/CommentNodes.td | 38 +- clang/include/clang/Basic/DeclNodes.td | 184 ++-- clang/include/clang/Basic/StmtNodes.td | 440 +++++----- clang/include/clang/Basic/TypeNodes.td | 114 ++- clang/include/clang/Format/Format.h | 32 +- .../DependencyScanning/DependencyScanningTool.h | 9 +- .../clang/Tooling/Inclusions/IncludeStyle.h | 9 + clang/lib/Sema/SemaExprCXX.cpp | 5 +- .../DependencyScanning/DependencyScanningTool.cpp | 8 +- .../Refactoring/Rename/USRFindingAction.cpp | 2 + .../CodeGen/arm-mve-intrinsics/scalar-shifts.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vadc.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vaddq.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vcvt.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vld24.c | 4 +- clang/test/CodeGen/arm-mve-intrinsics/vldr.c | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vminvq.c | 4 +- clang/test/Driver/clang-offload-bundler.c | 32 +- clang/test/Sema/typo-correction-ambiguity.c | 14 + .../clang-offload-bundler/ClangOffloadBundler.cpp | 409 ++++----- clang/tools/driver/CMakeLists.txt | 4 +- clang/utils/TableGen/CMakeLists.txt | 2 +- clang/utils/TableGen/ClangASTEmitters.h | 39 + clang/utils/TableGen/ClangASTNodesEmitter.cpp | 119 +-- clang/utils/TableGen/ClangAttrEmitter.cpp | 14 +- clang/utils/TableGen/ClangTypeNodesEmitter.cpp | 24 +- clang/utils/TableGen/TableGen.cpp | 7 +- compiler-rt/lib/fuzzer/FuzzerExtraCounters.cpp | 2 +- libcxx/utils/libcxx/test/executor.py | 20 +- lld/ELF/OutputSections.cpp | 26 +- lld/test/ELF/ctors_dtors_priority.s | 18 +- lld/test/ELF/sht-group-empty.test | 1 + lldb/include/lldb/API/SBBreakpoint.h | 3 + lldb/include/lldb/API/SBBreakpointLocation.h | 7 +- lldb/include/lldb/API/SBBreakpointName.h | 7 +- lldb/include/lldb/API/SBStructuredData.h | 3 + lldb/include/lldb/Core/PropertiesBase.td | 2 + lldb/include/lldb/Core/ValueObject.h | 1 + .../Interpreter/OptionGroupPythonClassWithDict.h | 20 +- lldb/include/lldb/Interpreter/ScriptInterpreter.h | 31 +- lldb/include/lldb/Target/MemoryRegionInfo.h | 30 +- .../breakpoint_command/TestBreakpointCommand.py | 8 +- .../TestBreakpointCommandsFromPython.py | 83 +- .../breakpoint/breakpoint_command/bktptcmd.py | 18 + lldb/scripts/Python/python-wrapper.swig | 17 +- lldb/scripts/interface/SBBreakpoint.i | 8 + lldb/scripts/interface/SBBreakpointLocation.i | 11 +- lldb/scripts/interface/SBBreakpointName.i | 4 + lldb/source/API/SBBreakpoint.cpp | 34 +- lldb/source/API/SBBreakpointLocation.cpp | 31 +- lldb/source/API/SBBreakpointName.cpp | 37 +- lldb/source/Commands/CommandObjectBreakpoint.cpp | 8 +- .../Commands/CommandObjectBreakpointCommand.cpp | 48 +- lldb/source/Commands/CommandObjectThread.cpp | 12 +- lldb/source/Commands/Options.td | 7 - lldb/source/Core/ValueObject.cpp | 53 ++ lldb/source/Core/ValueObjectVariable.cpp | 45 - lldb/source/Host/netbsd/Host.cpp | 1 + .../Interpreter/OptionGroupPythonClassWithDict.cpp | 61 +- lldb/source/Interpreter/ScriptInterpreter.cpp | 12 +- .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 7 +- .../Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp | 25 +- .../Plugins/Process/minidump/MinidumpParser.cpp | 72 +- .../Plugins/Process/minidump/MinidumpParser.h | 10 +- .../Plugins/Process/minidump/ProcessMinidump.cpp | 41 +- .../Plugins/Process/minidump/ProcessMinidump.h | 3 + .../Python/ScriptInterpreterPython.cpp | 105 ++- .../Python/ScriptInterpreterPython.h | 8 + .../Python/ScriptInterpreterPythonImpl.h | 22 +- lldb/source/Target/CMakeLists.txt | 1 + lldb/source/Target/MemoryRegionInfo.cpp | 20 + lldb/test/Shell/Minidump/memory-region.yaml | 49 ++ .../Shell/ObjectFile/PECOFF/export-dllfunc.yaml | 10 +- .../PECOFF/{subsections.yaml => sections.yaml} | 48 +- .../Shell/SymbolFile/DWARF/DW_OP_piece-struct.s | 113 +++ lldb/tools/driver/Driver.cpp | 19 + .../Process/minidump/MinidumpParserTest.cpp | 163 ++-- .../ScriptInterpreter/Python/PythonTestSuite.cpp | 3 +- lldb/utils/TableGen/LLDBPropertyDefEmitter.cpp | 15 + llvm/CMakeLists.txt | 6 +- llvm/bindings/python/llvm/common.py | 4 +- llvm/cmake/modules/AddLLVM.cmake | 4 +- llvm/cmake/modules/HandleLLVMOptions.cmake | 30 +- llvm/docs/CMake.rst | 14 +- llvm/docs/CodeGenerator.rst | 10 +- llvm/docs/FuzzingLLVM.rst | 2 +- llvm/docs/GlobalISel.rst | 940 --------------------- llvm/docs/GlobalISel/GMIR.rst | 158 ++++ llvm/docs/GlobalISel/IRTranslator.rst | 57 ++ llvm/docs/GlobalISel/InstructionSelect.rst | 98 +++ llvm/docs/GlobalISel/Legalizer.rst | 351 ++++++++ llvm/docs/GlobalISel/Pipeline.rst | 82 ++ llvm/docs/GlobalISel/Porting.rst | 21 + llvm/docs/GlobalISel/RegBankSelect.rst | 73 ++ llvm/docs/GlobalISel/Resources.rst | 11 + llvm/docs/GlobalISel/index.rst | 94 +++ llvm/docs/Reference.rst | 6 +- llvm/include/llvm/ADT/APInt.h | 4 + llvm/include/llvm/ADT/StringRef.h | 8 +- llvm/include/llvm/Analysis/ScalarEvolution.h | 3 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 9 +- .../llvm/Analysis/TargetTransformInfoImpl.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- .../llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 10 +- .../llvm/ExecutionEngine/Orc/ExecutionUtils.h | 2 +- llvm/include/llvm/IR/IRBuilder.h | 22 + llvm/include/llvm/IR/Instructions.h | 4 +- llvm/include/llvm/Object/ELF.h | 11 +- llvm/include/llvm/ObjectYAML/ELFYAML.h | 21 + llvm/include/llvm/Support/YAMLTraits.h | 3 +- llvm/include/llvm/TableGen/Record.h | 6 + llvm/lib/Analysis/TargetTransformInfo.cpp | 10 +- llvm/lib/AsmParser/LLParser.cpp | 3 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 25 + llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 5 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 33 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 12 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 31 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 4 +- llvm/lib/CodeGen/SjLjEHPrepare.cpp | 6 +- llvm/lib/IR/Instructions.cpp | 27 +- llvm/lib/ObjectYAML/ELFEmitter.cpp | 72 +- llvm/lib/ObjectYAML/ELFYAML.cpp | 38 + llvm/lib/Support/APInt.cpp | 40 + llvm/lib/TableGen/Record.cpp | 15 + .../Target/AArch64/AArch64TargetTransformInfo.cpp | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 2 + llvm/lib/Target/AMDGPU/AMDGPUInstructions.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 78 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 5 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/FLATInstructions.td | 85 +- llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 3 +- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 161 +++- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 7 - llvm/lib/Target/AMDGPU/SIISelLowering.h | 8 + llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 11 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 8 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 2 +- llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp | 15 +- .../Target/Hexagon/HexagonTargetTransformInfo.cpp | 31 +- .../Target/Hexagon/HexagonTargetTransformInfo.h | 5 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 20 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 4 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 219 +++++ llvm/lib/Target/PowerPC/PPCInstrInfo.h | 10 + llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 8 + llvm/lib/Target/PowerPC/PPCRegisterInfo.h | 9 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 11 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 2 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 7 +- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 4 +- .../Target/SystemZ/SystemZTargetTransformInfo.h | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 4 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 21 +- llvm/lib/Target/X86/X86TargetTransformInfo.h | 2 +- llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 5 +- llvm/lib/Transforms/Scalar/SROA.cpp | 21 +- llvm/lib/Transforms/Utils/FunctionImportUtils.cpp | 16 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 14 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 6 +- .../inst-select-amdgpu-atomic-cmpxchg-flat.mir | 374 ++++++++ .../legalize-atomic-cmpxchg-with-success.mir | 21 +- .../AMDGPU/GlobalISel/legalize-atomic-cmpxchg.mir | 96 ++- ...lize-fast-unsafe-fdiv.mir => legalize-fdiv.mir} | 468 +++++++--- .../GlobalISel/legalize-insert-vector-elt.mir | 48 ++ llvm/test/CodeGen/AMDGPU/dpp_combine.mir | 16 + llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir | 48 ++ .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 4 - llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 368 +++++++- llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll | 3 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 48 ++ llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll | 73 ++ llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll | 1 + .../BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-existence-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-existence-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-lshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-2.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-rshift-3.ll | 9 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-1.ll | 15 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-2.ll | 12 +- .../BPF/CORE/intrinsic-fieldinfo-signedness-3.ll | 9 +- llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll | 1 + llvm/test/CodeGen/BPF/CORE/intrinsic-union.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-access-str.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-struct-3.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-cast-union-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-end-load.ll | 6 +- llvm/test/CodeGen/BPF/CORE/offset-reloc-end-ret.ll | 3 +- .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll | 1 + .../CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-1.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-2.ll | 2 + .../test/CodeGen/BPF/CORE/offset-reloc-global-3.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-ignore.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-middle-chain.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multi-array-2.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-pointer-1.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-pointer-2.ll | 2 + .../BPF/CORE/offset-reloc-struct-anonymous.ll | 8 +- .../CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 6 +- .../CodeGen/BPF/CORE/offset-reloc-typedef-array.ll | 2 + .../BPF/CORE/offset-reloc-typedef-struct.ll | 2 + .../CodeGen/BPF/CORE/offset-reloc-typedef-union.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef.ll | 2 + llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll | 6 +- .../GlobalISel/instruction-select/fsqrt_vec.mir | 60 ++ .../Mips/GlobalISel/legalizer/fsqrt_vec.mir | 56 ++ .../GlobalISel/legalizer/fsqrt_vec_builtin.mir | 60 ++ .../CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll | 34 + .../Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll | 35 + .../Mips/GlobalISel/regbankselect/fsqrt_vec.mir | 58 ++ .../CodeGen/PowerPC/fold-frame-offset-using-rr.mir | 52 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 55 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 142 ++++ llvm/test/CodeGen/WebAssembly/simd.ll | 32 +- llvm/test/CodeGen/X86/extractelement-index.ll | 24 + llvm/test/Object/invalid.test | 2 +- .../TableGen/GICombinerEmitter/defs-invalid.td | 42 + .../TableGen/GICombinerEmitter/match-invalid.td | 71 ++ llvm/test/ThinLTO/X86/Inputs/guid_collision.ll | 12 + llvm/test/ThinLTO/X86/guid_collision.ll | 17 + .../CorrelatedValuePropagation/phi-common-val.ll | 27 + .../llvm-objcopy/ELF/set-section-alignment.test | 1 + .../MachO/Inputs/min_iphoneos_version_lc.yaml | 15 + .../MachO/Inputs/min_macos_version_lc.yaml | 15 + .../MachO/Inputs/min_tvos_version_lc.yaml | 15 + .../MachO/Inputs/min_watchos_version_lc.yaml | 15 + .../MachO/min-version-load-commands.test | 20 + .../test/tools/llvm-readobj/elf-section-types.test | 1 + llvm/test/tools/llvm-readobj/gnu-notes.test | 12 +- llvm/test/tools/llvm-size/elf-sysv.test | 1 + .../test/tools/obj2yaml/elf-ppc64-relocations.yaml | 92 -- llvm/test/tools/obj2yaml/elf-sht-symtab-shndx.yaml | 3 +- llvm/test/tools/obj2yaml/no-symbol-reloc.test | 2 - .../obj2yaml/relocation-unsupported-machine.yaml | 2 - .../tools/yaml2obj/implicit-sections-types.test | 1 + llvm/tools/bugpoint/CMakeLists.txt | 2 +- llvm/tools/llc/CMakeLists.txt | 2 +- .../llvm-objcopy/MachO/MachOLayoutBuilder.cpp | 3 + llvm/tools/obj2yaml/elf2yaml.cpp | 70 +- llvm/tools/opt/CMakeLists.txt | 2 +- llvm/unittests/ADT/APIntTest.cpp | 35 + llvm/unittests/IR/IRBuilderTest.cpp | 9 + llvm/utils/TableGen/GICombinerEmitter.cpp | 3 + llvm/utils/git-svn/git-llvm | 17 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 22 +- llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn | 1 + llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 11 +- llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn | 2 + .../gn/secondary/clang/utils/TableGen/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 - llvm/utils/lit/lit/cl_arguments.py | 3 + llvm/utils/lit/lit/display.py | 15 +- llvm/utils/lit/lit/main.py | 51 +- llvm/utils/lit/lit/run.py | 3 + llvm/utils/lit/lit/util.py | 2 + .../tests/Inputs/shtest-shell/stdout-encoding.txt | 7 + llvm/utils/lit/tests/max-failures.py | 2 +- llvm/utils/lit/tests/shtest-shell.py | 14 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 22 +- .../deviceRTLs/nvptx/src/target_impl.h | 15 + openmp/runtime/src/kmp_taskdeps.cpp | 8 +- 288 files changed, 6594 insertions(+), 2961 deletions(-) create mode 100644 clang/test/Sema/typo-correction-ambiguity.c create mode 100644 clang/utils/TableGen/ClangASTEmitters.h create mode 100644 lldb/source/Target/MemoryRegionInfo.cpp create mode 100644 lldb/test/Shell/Minidump/memory-region.yaml rename lldb/test/Shell/ObjectFile/PECOFF/{subsections.yaml => sections.yaml} (65%) create mode 100644 lldb/test/Shell/SymbolFile/DWARF/DW_OP_piece-struct.s delete mode 100644 llvm/docs/GlobalISel.rst create mode 100644 llvm/docs/GlobalISel/GMIR.rst create mode 100644 llvm/docs/GlobalISel/IRTranslator.rst create mode 100644 llvm/docs/GlobalISel/InstructionSelect.rst create mode 100644 llvm/docs/GlobalISel/Legalizer.rst create mode 100644 llvm/docs/GlobalISel/Pipeline.rst create mode 100644 llvm/docs/GlobalISel/Porting.rst create mode 100644 llvm/docs/GlobalISel/RegBankSelect.rst create mode 100644 llvm/docs/GlobalISel/Resources.rst create mode 100644 llvm/docs/GlobalISel/index.rst create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-c [...] rename llvm/test/CodeGen/AMDGPU/GlobalISel/{legalize-fast-unsafe-fdiv.mir => legal [...] create mode 100644 llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir create mode 100644 llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/field-reloc-alu32.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt_vec_builtin.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt_vec_builtin.ll create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fsqrt_vec.mir create mode 100644 llvm/test/CodeGen/RISCV/fp16-promote.ll create mode 100644 llvm/test/TableGen/GICombinerEmitter/defs-invalid.td create mode 100644 llvm/test/TableGen/GICombinerEmitter/match-invalid.td create mode 100644 llvm/test/ThinLTO/X86/Inputs/guid_collision.ll create mode 100644 llvm/test/ThinLTO/X86/guid_collision.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_iphoneos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_macos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_tvos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/Inputs/min_watchos_version_lc.yaml create mode 100644 llvm/test/tools/llvm-objcopy/MachO/min-version-load-commands.test create mode 100644 llvm/utils/lit/tests/Inputs/shtest-shell/stdout-encoding.txt -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (7044d4aa -> e72ceda1)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 7044d4aa 0: update: llvm-linux: 16 new e72ceda1 0: update: llvm-linux: 16 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7044d4aa) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 68 +- 02-build_llvm/console.log | 13228 ++++++++++++++++++------------------ 03-build_linux/console.log | 820 +-- 06-update_baseline/console.log | 28 - console.log | 14144 +++++++++++++++++++-------------------- jenkins/manifest.sh | 10 +- 6 files changed, 14119 insertions(+), 14179 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (f9b66efbaf9 -> 541ec0fe275)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/gcc. from f9b66efbaf9 * doc/xml/manual/policy_data_structures_biblio.xml: Switch [...] adds f172333b7d7 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8fda7730d16 Fix reductions for fully-masked loops adds 37438a1a429 Fix typo in dump_tree_statistics. adds 8f01336ddfc Update SVE tests for recent XPASSes adds 09a61eea0b9 Fix failure in gcc.target/sve/reduc_strict_3.c adds b52c5823a5c 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8c202b0db0a 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 29df010379b Guard use of concepts with feature test macro adds 1e9fd29a425 * gcc.target/powerpc/pr70100.c: Add -mvsx. [...] adds 96d1e6235a5 [Fortran] OpenACC – permit common blocks in some clauses adds e1ad18eeeed PR target/85969 * config/avr/gen-avr-mmcu-specs.c (str_pr [...] adds 3c585034cfd Fix compilation with Clang adds 4badc652b89 Use implicitly-defined copy operations for test iterators adds 991edac437a PR c++/91581 - ICE in exception-specification of defaulted ctor. adds 71046993786 Daily bump. adds 9da6344fa93 Fix false dependence of scalar operation vrcp/vsqrt/vrsqrt/ [...] adds 541ec0fe275 Adjust predicates and constraints of scalar insns. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 120 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/avr/gen-avr-mmcu-specs.c | 8 - gcc/config/i386/i386.md | 67 +++---- gcc/config/i386/sse.md | 205 +++++++++++++++------ gcc/config/i386/subst.md | 4 +- gcc/fortran/ChangeLog | 10 + gcc/fortran/openmp.c | 41 +++-- gcc/gimplify.c | 51 ++++- gcc/testsuite/ChangeLog | 65 +++++++ gcc/testsuite/g++.dg/cpp0x/noexcept55.C | 8 + gcc/testsuite/gcc.dg/torture/pr92222.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr65947-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-10.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-14.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-2.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-3.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-4.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-5.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-6.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-9.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/loop_add_5.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_5.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_8.c | 3 +- .../gcc.target/aarch64/sve/reduc_strict_3.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/slp_13.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve/slp_5.c | 22 +-- gcc/testsuite/gcc.target/aarch64/sve/slp_7.c | 20 +- gcc/testsuite/gcc.target/i386/pr87007-4.c | 18 ++ gcc/testsuite/gcc.target/i386/pr87007-5.c | 18 ++ gcc/testsuite/gcc.target/powerpc/pr70010.c | 4 +- gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 | 74 ++++++++ gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 | 53 ++++++ gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 | 39 ++++ gcc/tree-vect-loop.c | 65 +++---- gcc/tree-vect-patterns.c | 52 ++++++ gcc/tree-vect-slp.c | 64 ++----- gcc/tree-vect-stmts.c | 93 ++++++++-- gcc/tree.c | 2 +- libgomp/ChangeLog | 7 + .../libgomp.oacc-fortran/common-block-1.f90 | 107 +++++++++++ .../libgomp.oacc-fortran/common-block-2.f90 | 152 +++++++++++++++ .../libgomp.oacc-fortran/common-block-3.f90 | 139 ++++++++++++++ libstdc++-v3/ChangeLog | 18 ++ libstdc++-v3/include/bits/allocator.h | 4 +- libstdc++-v3/include/bits/range_cmp.h | 4 +- .../20_util/allocator/requirements/constexpr.cc | 28 +++ libstdc++-v3/testsuite/util/testsuite_iterators.h | 89 ++++----- 56 files changed, 1407 insertions(+), 344 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept55.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92222.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-5.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-1.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-2.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-3.f90 create mode 100644 libstdc++-v3/testsuite/20_util/allocator/requirements/constexpr.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (30fe183248 -> 1cc3da765d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/binutils-gdb. from 30fe183248 PR4499, assign file positions assumes segment offsets increasing adds 158da0d12a [gdb/testsuite] Use -wrap and $gdb_test_name in gdb_test_mul [...] adds 37a5888387 PR25125, relaxation chooses wrong branch size adds 52c64cf72d gdbserver does not need xstrdup adds 93878f4717 Allow out-of-order reads of CIEs adds 27cee81d06 Fix potential undefined behaviour in the RX disassembler. adds 5c49f2cd78 Improve objcopy's note mergeing capabilities. adds 5396ae1717 Don't make an extra copy + allocation of the demangled name adds 92174eeae8 Revert unintentional change in symtab.c adds 1834d45f0f Fix find_charset_names. adds 256878f318 elfedit.c: Replace BYTE_PUT with byte_put adds 760ddef46d elfedit: Report unknown x86 feature adds 25294a18fd Automatic date update in version.in adds 1cc3da765d sort_gnu_build_notes fix No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- binutils/ChangeLog | 51 ++ binutils/elfedit.c | 7 +- binutils/objcopy.c | 761 +++++++++++++++----------- binutils/testsuite/binutils-all/note-2-32.d | 15 +- binutils/testsuite/binutils-all/note-2-32.s | 76 +-- binutils/testsuite/binutils-all/note-2-64.d | 15 +- binutils/testsuite/binutils-all/note-2-64.s | 78 ++- binutils/testsuite/binutils-all/note-3-32.d | 10 +- binutils/testsuite/binutils-all/note-3-32.s | 15 +- binutils/testsuite/binutils-all/note-3-64.d | 10 +- binutils/testsuite/binutils-all/note-3-64.s | 14 +- binutils/testsuite/binutils-all/note-4-32.d | 8 +- binutils/testsuite/binutils-all/note-4-32.s | 14 +- binutils/testsuite/binutils-all/note-4-64.d | 10 +- binutils/testsuite/binutils-all/note-4-64.s | 14 +- binutils/testsuite/binutils-all/note-6-32.d | 20 + binutils/testsuite/binutils-all/note-6-32.s | 145 +++++ binutils/testsuite/binutils-all/note-6-64.d | 20 + binutils/testsuite/binutils-all/note-6-64.s | 145 +++++ binutils/testsuite/binutils-all/objcopy.exp | 2 + gas/ChangeLog | 9 + gas/write.c | 8 +- gdb/ChangeLog | 20 + gdb/charset.c | 7 +- gdb/dwarf2-frame.c | 92 +--- gdb/gdbserver/ChangeLog | 4 + gdb/gdbserver/utils.c | 12 - gdb/symtab.c | 36 +- gdb/testsuite/ChangeLog | 10 + gdb/testsuite/gdb.reverse/sigall-precsave.exp | 14 +- gdb/testsuite/gdb.reverse/sigall-reverse.exp | 22 +- gdb/testsuite/gdb.reverse/solib-precsave.exp | 13 +- gdb/testsuite/gdb.reverse/solib-reverse.exp | 13 +- gdb/testsuite/gdb.reverse/until-precsave.exp | 13 +- gdb/testsuite/gdb.reverse/until-reverse.exp | 13 +- opcodes/ChangeLog | 5 + opcodes/rx-dis.c | 2 +- 38 files changed, 1126 insertions(+), 599 deletions(-) create mode 100644 binutils/testsuite/binutils-all/note-6-32.d create mode 100644 binutils/testsuite/binutils-all/note-6-32.s create mode 100644 binutils/testsuite/binutils-all/note-6-64.d create mode 100644 binutils/testsuite/binutils-all/note-6-64.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig updated (fb2bf3da -> 8d970bef)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-stable-defconfig in repository toolchain/ci/base-artifacts. discards fb2bf3da 0: update: binutils-gcc-linux: boot new 8d970bef 0: update: binutils-gcc-linux: boot This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (fb2bf3da) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-master-arm-st [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 130 +- 02-prepare_abe/console.log | 422 +- 03-build_abe-binutils/console.log | 11399 ++++++------ 04-build_abe-stage1/console.log | 19941 ++++++++++----------- 05-build_linux/console.log | 1296 +- 06-boot_linux/console.log | 476 +- console.log | 33909 ++++++++++++++++++------------------ jenkins/manifest.sh | 14 +- 8 files changed, 33787 insertions(+), 33800 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (30672f1c868 -> 541ec0fe275)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig in repository toolchain/ci/gcc. from 30672f1c868 2019-09-09 Edward Smith-Rowland <3dw4rd(a)verizon.net> adds d5c02925a4c * doc/xml/gnu/gpl-3.0.xml: Switch www.gnu.org to https. adds f9b66efbaf9 * doc/xml/manual/policy_data_structures_biblio.xml: Switch [...] adds f172333b7d7 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8fda7730d16 Fix reductions for fully-masked loops adds 37438a1a429 Fix typo in dump_tree_statistics. adds 8f01336ddfc Update SVE tests for recent XPASSes adds 09a61eea0b9 Fix failure in gcc.target/sve/reduc_strict_3.c adds b52c5823a5c 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 8c202b0db0a 2019-10-25 Richard Biener <rguenther(a)suse.de> adds 29df010379b Guard use of concepts with feature test macro adds 1e9fd29a425 * gcc.target/powerpc/pr70100.c: Add -mvsx. [...] adds 96d1e6235a5 [Fortran] OpenACC – permit common blocks in some clauses adds e1ad18eeeed PR target/85969 * config/avr/gen-avr-mmcu-specs.c (str_pr [...] adds 3c585034cfd Fix compilation with Clang adds 4badc652b89 Use implicitly-defined copy operations for test iterators adds 991edac437a PR c++/91581 - ICE in exception-specification of defaulted ctor. adds 71046993786 Daily bump. adds 9da6344fa93 Fix false dependence of scalar operation vrcp/vsqrt/vrsqrt/ [...] adds 541ec0fe275 Adjust predicates and constraints of scalar insns. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 120 ++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/avr/gen-avr-mmcu-specs.c | 8 - gcc/config/i386/i386.md | 67 +++---- gcc/config/i386/sse.md | 205 +++++++++++++++------ gcc/config/i386/subst.md | 4 +- gcc/fortran/ChangeLog | 10 + gcc/fortran/openmp.c | 41 +++-- gcc/gimplify.c | 51 ++++- gcc/testsuite/ChangeLog | 65 +++++++ gcc/testsuite/g++.dg/cpp0x/noexcept55.C | 8 + gcc/testsuite/gcc.dg/torture/pr92222.c | 17 ++ gcc/testsuite/gcc.dg/vect/pr65947-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-10.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-12.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-13.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-14.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-2.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-3.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-4.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-5.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-6.c | 2 +- gcc/testsuite/gcc.dg/vect/pr65947-9.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-1.c | 2 +- gcc/testsuite/gcc.dg/vect/pr80631-2.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-3.c | 2 +- gcc/testsuite/gcc.dg/vect/vect-cond-reduc-4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/loop_add_5.c | 14 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_1.c | 8 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_2.c | 4 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_5.c | 10 +- gcc/testsuite/gcc.target/aarch64/sve/reduc_8.c | 3 +- .../gcc.target/aarch64/sve/reduc_strict_3.c | 1 + gcc/testsuite/gcc.target/aarch64/sve/slp_13.c | 11 +- gcc/testsuite/gcc.target/aarch64/sve/slp_5.c | 22 +-- gcc/testsuite/gcc.target/aarch64/sve/slp_7.c | 20 +- gcc/testsuite/gcc.target/i386/pr87007-4.c | 18 ++ gcc/testsuite/gcc.target/i386/pr87007-5.c | 18 ++ gcc/testsuite/gcc.target/powerpc/pr70010.c | 4 +- gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 | 74 ++++++++ gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 | 53 ++++++ gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 | 39 ++++ gcc/tree-vect-loop.c | 65 +++---- gcc/tree-vect-patterns.c | 52 ++++++ gcc/tree-vect-slp.c | 64 ++----- gcc/tree-vect-stmts.c | 93 ++++++++-- gcc/tree.c | 2 +- libgomp/ChangeLog | 7 + .../libgomp.oacc-fortran/common-block-1.f90 | 107 +++++++++++ .../libgomp.oacc-fortran/common-block-2.f90 | 152 +++++++++++++++ .../libgomp.oacc-fortran/common-block-3.f90 | 139 ++++++++++++++ libstdc++-v3/ChangeLog | 27 +++ libstdc++-v3/doc/xml/gnu/gpl-3.0.xml | 2 +- .../xml/manual/policy_data_structures_biblio.xml | 2 +- libstdc++-v3/include/bits/allocator.h | 4 +- libstdc++-v3/include/bits/range_cmp.h | 4 +- .../20_util/allocator/requirements/constexpr.cc | 28 +++ libstdc++-v3/testsuite/util/testsuite_iterators.h | 89 ++++----- 58 files changed, 1418 insertions(+), 346 deletions(-) create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept55.C create mode 100644 gcc/testsuite/gcc.dg/torture/pr92222.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr87007-5.c create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-2.f90 create mode 100644 gcc/testsuite/gfortran.dg/goacc/common-block-3.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-1.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-2.f90 create mode 100644 libgomp/testsuite/libgomp.oacc-fortran/common-block-3.f90 create mode 100644 libstdc++-v3/testsuite/20_util/allocator/requirements/constexpr.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

5 years, 7 months

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Tcwg-commits October 2019