[clang] branch master updated (0f0140520d -> 388574a33b)
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from 0f0140520d [tests] Include Python binding tests in CMake rules
new 388574a33b [analyzer][UninitializedObjectChecker] Reports Loc fields po [...]
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.../UninitializedObject/UninitializedPointee.cpp | 68 ++++++++++++++++------
test/Analysis/cxx-uninitialized-object-ptr-ref.cpp | 17 ++++--
2 files changed, 60 insertions(+), 25 deletions(-)
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[glibc] branch master updated (2a4b25fad8 -> 9f9feb6d5d)
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from 2a4b25fad8 Use common bits/shm.h for more architectures.
new 9f9feb6d5d Use single bits/msq.h for all architectures.
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Summary of changes:
ChangeLog | 24 ++++++
sysdeps/unix/sysv/linux/Makefile | 3 +-
.../unix/sysv/linux/bits/msq-pad.h | 24 +++---
sysdeps/unix/sysv/linux/bits/msq.h | 37 ++++-----
.../{bits/procfs-id.h => hppa/bits/msq-pad.h} | 13 +--
sysdeps/unix/sysv/linux/hppa/bits/msq.h | 85 --------------------
.../{x86/bits/procfs-id.h => mips/bits/msq-pad.h} | 19 ++---
sysdeps/unix/sysv/linux/mips/bits/msq.h | 93 ----------------------
.../bits/procfs-id.h => powerpc/bits/msq-pad.h} | 13 +--
sysdeps/unix/sysv/linux/powerpc/bits/msq.h | 84 -------------------
.../sysv/linux/sparc/bits/msq-pad.h} | 25 ++----
sysdeps/unix/sysv/linux/sparc/bits/msq.h | 85 --------------------
.../sysv/linux/x86/bits/msq-pad.h} | 20 +++--
sysdeps/unix/sysv/linux/x86/bits/msq.h | 83 -------------------
14 files changed, 97 insertions(+), 511 deletions(-)
copy resolv/gai_sigqueue.c => sysdeps/unix/sysv/linux/bits/msq-pad.h (62%)
copy sysdeps/unix/sysv/linux/{bits/procfs-id.h => hppa/bits/msq-pad.h} (74%)
delete mode 100644 sysdeps/unix/sysv/linux/hppa/bits/msq.h
copy sysdeps/unix/sysv/linux/{x86/bits/procfs-id.h => mips/bits/msq-pad.h} (68%)
delete mode 100644 sysdeps/unix/sysv/linux/mips/bits/msq.h
copy sysdeps/unix/sysv/linux/{sh/bits/procfs-id.h => powerpc/bits/msq-pad.h} (74%)
delete mode 100644 sysdeps/unix/sysv/linux/powerpc/bits/msq.h
copy sysdeps/{x86/tst-cet-legacy-3.c => unix/sysv/linux/sparc/bits/msq-pad.h} (74%)
delete mode 100644 sysdeps/unix/sysv/linux/sparc/bits/msq.h
copy sysdeps/{s390/tst-dl-runtime-mod.S => unix/sysv/linux/x86/bits/msq-pad.h} (74%)
delete mode 100644 sysdeps/unix/sysv/linux/x86/bits/msq.h
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[clang] branch master updated (4eb8e4f562 -> 0f0140520d)
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from 4eb8e4f562 clang-cl: Add /showFilenames option (PR31957)
new 517f6f4f9e [python] [tests] Support overriding library path via environment
new 0f0140520d [tests] Include Python binding tests in CMake rules
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Summary of changes:
CMakeLists.txt | 1 +
bindings/python/README.txt | 4 ++--
bindings/python/tests/CMakeLists.txt | 7 +++++++
bindings/python/tests/cindex/test_access_specifiers.py | 4 ++++
bindings/python/tests/cindex/test_cdb.py | 5 +++++
bindings/python/tests/cindex/test_code_completion.py | 5 +++++
bindings/python/tests/cindex/test_comment.py | 5 +++++
bindings/python/tests/cindex/test_cursor.py | 5 +++++
bindings/python/tests/cindex/test_cursor_kind.py | 5 +++++
bindings/python/tests/cindex/test_diagnostics.py | 5 +++++
bindings/python/tests/cindex/test_exception_specification_kind.py | 5 +++++
bindings/python/tests/cindex/test_file.py | 5 +++++
bindings/python/tests/cindex/test_index.py | 5 +++++
bindings/python/tests/cindex/test_linkage.py | 5 +++++
bindings/python/tests/cindex/test_location.py | 5 +++++
bindings/python/tests/cindex/test_tls_kind.py | 5 +++++
bindings/python/tests/cindex/test_token_kind.py | 5 +++++
bindings/python/tests/cindex/test_tokens.py | 5 +++++
bindings/python/tests/cindex/test_translation_unit.py | 5 +++++
bindings/python/tests/cindex/test_type.py | 5 +++++
20 files changed, 94 insertions(+), 2 deletions(-)
create mode 100644 bindings/python/tests/CMakeLists.txt
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[gcc] branch master updated (cebe6e17b35 -> 5d56b42ba9f)
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from cebe6e17b35 [testsuite] Further fixes to warn-abs-1.c
new 5d56b42ba9f Make ext allocators support heterogeneous equality comparison
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libstdc++-v3/ChangeLog | 15 +++++++++++++++
libstdc++-v3/include/bits/allocator.h | 20 ++++++++------------
libstdc++-v3/include/ext/debug_allocator.h | 20 +++++++++++---------
libstdc++-v3/include/ext/malloc_allocator.h | 22 ++++++++++++----------
libstdc++-v3/include/ext/new_allocator.h | 20 +++++++++++---------
.../macros.cc => ext/debug_allocator/eq.cc} | 17 ++++++++++-------
.../macros.cc => ext/ext_pointer/alloc_eq.cc} | 17 ++++++++++-------
.../macros.cc => ext/malloc_allocator/eq.cc} | 17 ++++++++++-------
.../version/macros.cc => ext/new_allocator/eq.cc} | 17 ++++++++++-------
9 files changed, 97 insertions(+), 68 deletions(-)
copy libstdc++-v3/testsuite/{18_support/headers/version/macros.cc => ext/debug_all [...]
copy libstdc++-v3/testsuite/{18_support/headers/version/macros.cc => ext/ext_point [...]
copy libstdc++-v3/testsuite/{18_support/headers/version/macros.cc => ext/malloc_al [...]
copy libstdc++-v3/testsuite/{18_support/headers/version/macros.cc => ext/new_alloc [...]
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[llvm] branch master updated (3e9802e2f98 -> b4f227a2a58)
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from 3e9802e2f98 [RISCV] Re-generate test/CodeGen/RISCV/vararg.ll after r344142
new b4f227a2a58 [InstCombine] Demand bits of UMin
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lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 10 ++++++++++
test/Transforms/InstCombine/minmax-demandbits.ll | 12 +++---------
2 files changed, 13 insertions(+), 9 deletions(-)
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[llvm] branch master updated (c3c05ee92fb -> 3e9802e2f98)
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from c3c05ee92fb [InstCombine] Demand bits of UMax
new 3e9802e2f98 [RISCV] Re-generate test/CodeGen/RISCV/vararg.ll after r344142
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test/CodeGen/RISCV/vararg.ll | 66 +++++++++++++++++++++-----------------------
1 file changed, 32 insertions(+), 34 deletions(-)
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[llvm] branch master updated (3572c80cdbe -> c3c05ee92fb)
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from 3572c80cdbe [InstCombine] Add tests for demand bits of min/max. NFC.
new c3c05ee92fb [InstCombine] Demand bits of UMax
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.../InstCombine/InstCombineSimplifyDemanded.cpp | 20 ++++++++++++----
test/Transforms/InstCombine/minmax-demandbits.ll | 28 ++++++----------------
2 files changed, 23 insertions(+), 25 deletions(-)
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[llvm] branch master updated (e13d0945215 -> 3572c80cdbe)
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from e13d0945215 [LV] Use SmallVector instead of DenseMap in calculateRegist [...]
new 7a175729942 [tblgen][CodeGenSchedule] Add a check for invalid RegisterF [...]
new 3572c80cdbe [InstCombine] Add tests for demand bits of min/max. NFC.
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test/Transforms/InstCombine/minmax-demandbits.ll | 256 ++++++++++++++++++++++
tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp | 10 +-
utils/TableGen/CodeGenSchedule.cpp | 5 +
3 files changed, 265 insertions(+), 6 deletions(-)
create mode 100644 test/Transforms/InstCombine/minmax-demandbits.ll
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[binutils-gdb] branch master updated (fbe61a3661 -> de564eb5cc)
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from fbe61a3661 Fix interp::m_name resource leak found by Coverity
new de564eb5cc Prevent the --keep-global-symbol and --globalize-symbol opti [...]
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binutils/ChangeLog | 11 +++++++++++
binutils/doc/binutils.texi | 13 +++++++++----
binutils/objcopy.c | 9 +++++++++
binutils/testsuite/binutils-all/copy-5.d | 7 +++++++
binutils/testsuite/binutils-all/objcopy.exp | 2 ++
5 files changed, 38 insertions(+), 4 deletions(-)
create mode 100644 binutils/testsuite/binutils-all/copy-5.d
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[toolchain/llvm/llvm] branch linaro-local/thomas.preudhomme/tcwg-1428-rebase updated (4a8b0b37ccc -> 7b79106af28)
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thomas.preudhomme pushed a change to branch linaro-local/thomas.preudhomme/tcwg-1428-rebase
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discards 4a8b0b37ccc FileCheck: Add support for variable expressions
discards 5389807c6ae Support inline asm with multiple 64bit output in 32bit GPR
discards b1366b5c435 Fix crash on inline asm with 64bit matching input in 32bit GPR
discards 11143ead429 Fix PR34170: Crash on inline asm with 64bit output in 32bit GPR
adds 023b04f4507 [AArch64] Armv8.4-A: TLB support
adds 2d706a67e35 [llvm-mca] A write latency cannot be a negative value. NFC
adds c988f9e6c39 [LoopSink] Make the enforcement of determinism deterministic.
adds ef8af9b997f Commit rL336426 cause buildbot failures
adds f36b7500f84 [ARM] ParallelDSP: added statistics, NFC.
adds 58b0c3857a1 [Constant] add undef element query for vector constants; NFC
adds 79da1642b15 [Constants] extend getBinOpIdentity(); NFC
adds 3f928c753ce AMDGPU: Fix UBSan error caused by r335942
adds 735ebc0759b [InstCombine] add more tests with poison and undef; NFC
adds 0f83e1fc484 [Local] replaceAllDbgUsesWith: Update debug values before RAUW
adds d3643492a56 [Debugify] Allow unsigned values narrower than their variables
adds 5b4b9a07e87 Revert 336426 (and follow-ups 428, 440), it very likely cau [...]
adds f72707ee11c [InstCombine] add more tests for potentially poisonous shifts; NFC
adds 80e7ea0a47d [llvm-objcopy] Add support for static libraries
adds 73b3f8bb2de [llvm-mca] Add HardwareUnit and Context classes.
adds ce6569598e1 [X86] Add more FMA3 memory folding patterns. Remove pattern [...]
adds 9159fc2036d [X86] Remove patterns for MOVLPD/MOVLPS nodes with integer types.
adds cfc86d49874 [IR] Fix inconsistent declaration parameter name
adds c2801b16401 Use Type::isIntOrPtrTy where possible, NFC
adds c779b36d254 [PDB] One more fix for hasing GSI records.
adds 21926ea0e19 Remove a redundant null-check in DIExpression::prepend, NFC
adds ca9c12e96d9 Fix DIExpression::ExprOperand::appendToVector
adds ec4a235223d [PDB] memicmp only exists on Windows, use StringRef::compar [...]
adds 962a2856aa4 Revert "[SCEV] Strengthen StrengthenNoWrapFlags (reapply r3 [...]
adds 8c87300f879 [X86] Merge INTR_TYPE_3OP_RM with INTR_TYPE_3OP. Remove unu [...]
adds 4498596c195 [PM/LoopUnswitch] Fix PR37889, producing the correct loop n [...]
adds 5fd5dc8e41a [Support] Clear errno before calling the function in RetryA [...]
adds 4af4a557bf5 [MachineOutliner] Assert that Liveness tracking is accurate (NFC)
adds 7d301039274 [MachineOutliner] Add missing liveness tracking info in MIR test.
adds df921c67472 NFC - Typo fixes in X86 flags-copy-lowering.mir test
adds 50f103a27d1 Test commit
adds b68da8c2ed3 [CostModel][X86] Add SREM/UREM general and constant costs ( [...]
adds 7671355ab9f [DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
adds b58cfae435c Use const APInt& to avoid extra copy. NFCI.
adds 074b7c3a09e [SelectionDAG] Split float and integer isKnownNeverZero tests
adds 7bae6f41cec [X86] Regenerate PR14088 test. NFCI.
adds 560d937f1dc [X86] Use a rounding mode other than 4 in the scalar fma in [...]
adds 455fcc664fe [X86] Add new scalar fma intrinsics with rounding mode that [...]
adds 5c9e6ab590d [X86] Add back some intrinsic table entries lost in r336506.
adds 7d6057ca556 [LoopIdiomRecognize] Support for converting loops that use [...]
adds 750b8ba6b61 [MCA][X86][NFC] Add BSF/BSR resource tests
adds 330c7eb5b8c [X86][Basically NFC] Sched: split WriteBitScan into WriteBS [...]
adds d160cee4e47 [X86] Set scheduler classes to unsupported. NFCI.
adds 6656bc9f257 [X86][SSE] Combine v16i8 SHL by constants to multiplies
adds 2ad74abae51 [X86] Enhance combineFMA to look for FNEG behind an EXTRACT [...]
adds 1f94f5a559e [X86][Nearly NFC] Split SHLD/SHRD into their own WriteShift [...]
adds 2ee4a67a673 [X86] Remove an AddedComplexity line that seems unnecessary.
adds 73888073048 [X86] Improve the message for some asserts. Remove an if th [...]
adds 51d3739fb8c [PGOMemOPSize] Preserve the DominatorTree
adds ceac96362f6 [AccelTable] Dwarf5AccelTableEmitter -> Writer (NFC)
adds f8d4a3aecfd [AccelTable] Provide abstraction for emitting DWARF5 accele [...]
adds 4e2f2576ac5 [AArch64][SVE] Asm: Support for UZP and TRN instructions.
adds 1c576638ca6 [AArch64][SVE] Asm: Support for ADR instruction.
adds 5070d36f882 Lift JSON library from clang-tools-extra/clangd to llvm/Support.
adds 1cbf1da4d65 [PM/Unswitch] Fix a nasty bug in the new PM's unswitch intr [...]
adds 6da02771fb8 [Support] Fix GCC compile after r336534
adds 8d164e7fb3d [Support] Make JSON handle doubles and int64s losslessly
adds ceb3c09eb4c [Support] Allow JSON serialization of Optional<T> for supported T.
adds d77ac0d3a5b [llvm-mca] report an error if the assembly sequence contain [...]
adds 93fba7b3ae4 [AArch64][SVE] Asm: Support for TBL instruction.
adds b9d744a0d2c [mips] Addition of the [d]rem and [d]remu instructions
adds f03a571cbf3 [InstCombine] fix shuffle-of-binops transform to avoid pois [...]
adds 317ed53ce58 [AArch64][SVE] Asm: Support for remaining shift instructions.
adds 0b08bea28be [Power9] Add __float128 support for compare operations
adds 955b8d422de [CVP] Handle calls with void return value. No need to creat [...]
adds da1756486d7 [AArch64][SVE] Asm: Support for CNT(B|H|W|D) and CNTP instr [...]
adds dc4af2458e3 [VPlan][LV] Introduce condition bit in VPBlockBase
adds 76feca7c86f [X86] Remove some seemingly unnecessary AddedComplexity lines.
adds e7dd6fb9bef [X86] Remove some patterns that seems to be unreachable.
adds a7002f57585 [X86] Remove some patterns that include a bitcast of a floa [...]
adds fa29fd677fd [InstCombine] generalize safe vector constant utility
adds 798b3ef0fcd [BitcodeReader] Infer the correct runtime preemption for Gl [...]
adds a5d860c4719 [dsymutil] Add support for outputting assembly
adds c2d5ed64547 [InstCombine] avoid extra poison when moving shift above shuffle
adds 18f7f341df1 [X86][AVX] Regenerate AVX1 fast-isel tests.
adds eb849ef7956 [X86] In combineFMA, make sure we bitcast the result of isF [...]
adds 202c8c5e5bb [InstCombine] correct test comments; NFC
adds fdaaa22a5ca [LoopInfo] Port loop exit interfaces from Loop to LoopBase
adds 24020ee58bc Add bitcode compatibility test for 6.0
adds f2fd9eaa8e6 [SelectionDAG] Add VT consistency checks to the creation of [...]
adds 5e8a352aa6d [DebugInfo] Change default value of FDEPointerEncoding
adds 3ea14f7d95a [Power9] Add __float128 builtins for Round To Odd
adds 378d508446e [Utils] Fix gdb pretty printers to work with Python 3.
adds 9e386ad60d4 [X86][TLI] DAGCombine: Unfold variable bit-clearing mask to [...]
adds 12d30e1e277 AMDGPU: Force inlining if LDS global address is used
adds 28793aedf68 [AMDGPU][Waitcnt] fix "comparison of integers of different [...]
adds d700c295ab8 [globalisel][irtranslator] Add support for atomicrmw and (s [...]
adds 88b9c135285 RenameIndependentSubregs: Fix handling of undef tied operands
adds 8e48754afe3 [Power9] [LLVM] Add __float128 support for trunc to double [...]
adds 7b100837117 [WebAssembly] Improve readability of load/stores and tests. NFC.
adds 7ee7123814d [Power9] Add __float128 builtins for Rounding Operations
adds 211f0307b2f Fix line endings. NFCI.
adds ae0f1dc9280 [ORC] Rename MaterializationResponsibility::delegate to rep [...]
adds 401e29e8b78 Make llvm.objectsize more conservative with null
adds 1897a62c2ef Use StringRef instead of `const char *`.
adds c6da6867a1d llvm: Add support for "-fno-delete-null-pointer-checks"
adds b737b070e3e [WebAssembly] Support for binary atomic RMW instructions
adds 1cc2d659530 [InstCombine] allow more shuffle folds using safe constants
adds 94f396c4e1e [DWARF][NFC] Refactor range list emission to use a static helper
adds 3bda4ed0ecf Revert "AMDGPU: Force inlining if LDS global address is used"
adds cc4b35dde44 [X86] Remove FloatVT from X86VectorVTInfo in X86InstrAVX512.td
adds ed86411ba99 [X86] Add test cases that show failure to fold load into vf [...]
adds 784e3eb4914 [X86] Correct vfixupimm load patterns to look for an intege [...]
adds 0758f84dc32 [X86] Add back GCCBuiltin on mask_div_ss/sd_round.
adds 40da47fe008 [X86] Remove some seemingly unnecessary patterns.
adds 650cfa6dc06 [X86] Use IsProfitableToFold to block vinsertf128rm in favo [...]
adds b66a4fe5b73 [X86] Regenerate vector-shuffle-512-v8.ll so the script wil [...]
adds 237e0b6b434 [X86][SSE] Prefer BLEND(SHL(v,c1),SHL(v,c2)) over MUL(v, c3)
adds 785db918619 [X86] Fast-isel tests for lowered truncation intrinsics
adds f0e0135e659 [PM/Unswitch] Fix a collection of closely related issues wi [...]
adds bdef81ad962 [PM/Unswitch] Fix unused variable in r336646.
adds 9cec565a79f Fix MSVC "signed/unsigned mismatch" warning. NFCI.
adds 20b07351273 [VPlan] Add VPlanTestBase.h with helper class to build VPla [...]
adds 862b1ab9346 [DAGCombiner] Split SDIV/UDIV optimization expansions from [...]
adds 18ff70955fb [Support] Harded JSON against invalid UTF-8.
adds 8008d9214cc [LowerSwitch] Fixed faulty PHI nodes
adds c5c3efb2ec3 [Hexagon] Add implicit uses even when untied explicit uses [...]
adds 1a63bb49cb0 [DAGCombiner] visitREM - call visitSDIVLike/visitUDIVLike d [...]
adds c1175857e2e [DebugInfo][LoopVectorize] Preserve DL in induction PHI and Add
adds db58626da58 [InstCombine] allow more shuffle-binop folds with safe constants
adds e07c9538b54 Reapply "AMDGPU: Force inlining if LDS global address is used"
adds 321acf353ee [AArch64][SVE] Asm: Support for predicated unary operations.
adds 4b885003421 [InstCombine] drop poison flags when shuffle mask undef pro [...]
adds 4575d3492bd Support -fdebug-prefix-map in llvm-mc. This is useful to o [...]
adds d94b2b4b7f8 [Hexagon] Change .mir testcase to make sure function is not [...]
adds db3db6b2b65 Add CachedHashStringRef::data().
adds 57f9ec67396 [InstCombine] safely allow non-commutative binop identity c [...]
adds 7176a5d65f5 Update test to work on Windows
adds 74dc40422c2 [MC] Add interface to finish pending labels.
adds 5e52c9ed250 AMDGPU/NFC: Fix typo in test name
adds a553f67e44a [WebAssembly] Add missing a few {{$}}s to a test
adds 8d4bfa624a5 [gcov] Fix ABI when calling llvm_gcov_... routines from ins [...]
adds 91833b661fa [X86] Add srem/udiv/urem by constant tests
adds 128882e5b63 [InstCombine] allow flag propagation when using safe constant
adds febd9a0f028 AMDGPU: Make hidden argument metadata consistent with amdgp [...]
adds c031419fe66 Revert "[AccelTable] Provide abstraction for emitting DWARF [...]
adds fe8c951cfd9 [DAGCombiner] Add special case fast paths for udiv x,1 and [...]
adds ab6c6cb9932 [Evaluator] Examine alias when evaluating function call
adds c11402ea82d [GlobalISel][X86_64] Support for G_SITOFP
adds 5c37ae1e46f [AMDGPU] Refactor HSAMetadataStream::emitKernel (NFC)
adds 7613264ef4a [CMake] Teach the build system to codesign built products
adds 43680a049cc [X86] Remove AddedComplexity from MMX_X86movw2d patterns.
adds f3303f010c0 [X86] Remove AddedComplexity from register form of NOT. NFCI
adds 071f23bbb92 [CMake] Set per-runtime library directory suffix in runtimes build
adds b0ec158d067 Revert r336653 "[VPlan] Add VPlanTestBase.h with helper cla [...]
adds 4bac7448e75 [X86] Remove dead SDNode object from X86InstrFragmentsSIMD.td. NFC
adds 7b0ba29ddb6 [ThinLTO] Use std::map to get determistic imports files
adds 47362da9679 [AMDGPU] Fix layering issue with AMDGPUHSAMetadataStreamer (NFC)
adds d455726cf4f [X86] Remove X86ISD::MOVLPS and X86ISD::MOVLPD. NFCI
adds 3b874f619c3 [NFC] typo
adds 5fd5b23e94e [X86] Teach X86InstrInfo::commuteInstructionImpl to use MOV [...]
adds 2c1b42aecbf Fix -Wmismatched-tags warning
adds 42c5f73d3bb [X86] Remove AddedComplexity from all patterns that use X86 [...]
adds b3a7b8e1235 Sort includes + include a missing `extern "C"` header
adds 635418475ae [ORC] Generalize alias materialization to support re-export [...]
adds 43b8da3b5b4 [ARM] Treat cmn immediates as legal in isLegalICmpImmediate.
adds ca521172652 [LangRef] Clarify alloca of zero bytes.
adds ab7abafe4c9 [TableGen] Fix some bad formatting. NFC
adds cebe6b04b04 [test cases] add test cases for find more abs pattern
adds 9e4aa1f63d0 [Power9] Add remaining __flaot128 builtin support for FMA r [...]
adds 1399f710b38 [ORC] Use a gtest fixture to remove a bunch of boilerplate [...]
adds 8cbf4142f33 [ORC] Drop constexpr in unit test to appease a bot.
adds 153b1da7646 [WebAssembly] Add pass to infer prototypes for prototype-le [...]
adds d16b7e57845 [ORC] Add unit tests for the reexports utility that were le [...]
adds eb79fe37964 [ORC] Remove a shadowing definition.
adds 25618d5e9e9 [X86] Remove some composite MOVSS/MOVSD isel patterns.
adds bcf1a2ec72d Revert r336760: "[ORC] Add unit tests for the reexports uti [...]
adds 002bef1dc82 [X86] The TEST instruction is eliminated when BSF/TZCNT is used
adds d07522f0425 [WebAssembly] Only call llvm::value::dump() in debug build.
adds 9cfd4e54080 [TableGen] Add a general-purpose JSON backend.
adds 7adaa4250a0 [TableGen] Add missing std::moves to fix build failure.
adds 8884a4f1aab [DAGCombiner] Add (urem X, -1) -> select(X == -1, 0, x) fold
adds 1472199dc3a [DAGCombiner] Support non-uniform X%C -> X-(X/C)*C folds
adds d1c9cdb25aa [mips] Remove dead code. NFC
adds 6f6e8e488bf [llvm-mca] Add tests for partial register writes.
adds 51a70b932d4 [SelectionDAG] Add constant buildvector support to isKnownN [...]
adds cf6cd675f0f [NFC][InstCombine] Add variable names and regenerate icmp-l [...]
adds 25074d6f872 [NFC][InstCombine] Fix extra space padding in icmp-mul-zext [...]
adds 94b0940142a [llvm-readobj] Add -hex-dump (-x) option
adds 762a5bb3aec [AArch64][SVE] Asm: Support for LAST(A|B) and CLAST(A|B) in [...]
adds 2bb63d0b093 [NFC][InstCombine] icmp-logical.ll: add a few more tests.
adds aae5bb5ebfd [AArch64] Regenerate SDIV tests
adds 5ee4539c4ce Fix check-prefix vs check-prefixes typo in updated test
adds dccc8cca6c3 [AArch64][SVE] Asm: Support for COMPACT instruction.
adds be9aa7feff2 Recommit r336653: [VPlan] Add VPlanTestBase.h with helper
adds f0c06bd7673 Use debug-prefix-map for AT_NAME
adds f72585ca173 [ARM] ParallelDSP: multiple reduction stmts in loop
adds 6c02a48ba4f [NFC][InstCombine] Tests for x & (-1 >> y) == x -> x u<= [...]
adds 483861bc323 [llvm-mca] Use a different character to flag instructions w [...]
adds 336c1aeeb5c [NFC][InstCombine] Converts isLegalNarrowLoad into isLegalN [...]
adds aa6263071e1 [mips] Update the P5600 scheduler model not to use instruct [...]
adds 873b4b66d3f [CodeGen] Ignore debug uses in MachineCopyPropagation
adds 71b0da15d21 [SLPVectorizer] Add initial alternate opcode support for ca [...]
adds abad63db770 Recommit r334887: [SmallSet] Add SmallSetIterator.
adds 191ae9ef3c5 Revert rL336804: [SLPVectorizer] Add initial alternate opco [...]
adds 86d8ba10055 [SLPVectorizer] Add some additional alternate cast tests
adds 96954e8f95a [SLPVectorizer] Ensure alternate/passthrough doesn't vector [...]
adds 33f4d61062f [SLPVectorizer] Add initial alternate opcode support for ca [...]
adds 3a44ccd156e [llvm-objdump] Add -demangle (-C) option
adds 9972f984825 [X86] Fix MayLoad/HasSideEffect flag for (V)MOVLPSrm instructions.
adds d5cfc836bb5 Fix llvm-objdump demangle test (added triple option)
adds 67a7a09e83b [InstSimplify] add/move tests for add folds; NFC
adds f8497881d6a [DebugInfo] Make children iterator bidirectional
adds 04804b2f45b AMDGPU/NFC: Use already available explicit kernarg size ins [...]
adds 7a7cfd8a89e [TargetTransformInfo] Add pow2 analysis for scalar constants
adds f8a7a167d2a [X86] Remove patterns for inserting a load into a zero vector.
adds 31b21da1552 Revert "[llvm-objdump] Add -demangle (-C) option"
adds c642c1b4d70 [FileCheck] Don't permit overlapping CHECK-DAG
adds 9f8f3ca775d Quick fix for some Windows bots
adds 0e8a665664f Revert r336830: [FileCheck] Don't permit overlapping CHECK-DAG
adds 2dd26c97a82 [InstCombine] Fold x & (-1 >> y) == x to x u<= (-1 >> y)
adds adfcff45eef [DebugInfo] Fix getPreviousSibling after r336823
adds 35e8f7fa33f gold: Add ability to toggle function/data sections
adds ea13527137d Revert "[docs] As of binutils 2.21.51.0.2, ld.bfd supports [...]
adds ce57a4ff8c2 [FileCheck] Add -allow-deprecated-dag-overlap to failing ll [...]
adds 0195c0bee91 [FileCheck] Don't permit overlapping CHECK-DAG
adds 3c69e867ac4 finish: [FileCheck] Add -allow-deprecated-dag-overlap to fa [...]
adds 1d6fd076a3d AMDGPU: Refactor Subtarget classes
adds d2f9dac4f9e AMDGPU: Remove duplicate call to initializeSubtargetDependencies()
adds 2517f169abe [NFC][InstCombine] Tests for x & (-1 >> y) != x -> x u> [...]
adds 1935f944384 Temporarily reverting.
adds 9c94a76f7ad [MemorySSA] Add APIs to move memory accesses between blocks [...]
adds 469c8eebd97 AMDGPU/SI: Initialize InstrInfo before TargetLoweringInfo i [...]
adds a6e34881bcb [LoopIdiomRecognize] Add a test case showing a loop we turn [...]
adds 99a2c222c24 [LoopIdiomRecognize] Don't convert a do while loop to ctlz.
adds 87c3b54a362 [CodeGen] Emit more precise AssertZext/AssertSext nodes.
adds 15753b03821 IR: Skip -print-*-all after -print-*
adds 9e49a81863c Add -allow-deprecated-dag-overlap to one of the experimenta [...]
adds 18d8ba4a182 [X86] Remove and autoupgrade the scalar fma intrinsics with [...]
adds 6c31f1e00d9 [x86] Fix EFLAGS copy lowering to correctly handle walking [...]
adds 68cefd37e8e [X86] Add patterns to use VMOVSS/SD zero masking for scalar [...]
adds 60aba7d664a [x86] Fix another trivial bug in x86 flags copy lowering th [...]
adds d972c63af4b Temporarily revert "Recommit r328307: [IPSCCP] Use constant [...]
adds f831f82f3ec [AsmParser] Fix inconsistent declaration parameter name
adds 7d5acd8e56e [InstSimplify] simplify add instruction if two operands are [...]
adds ad360c850d4 [X86] Remove patterns and ISD nodes for the old scalar FMA [...]
adds 04d4b7fd45b [Dominators] Add isUpdateLazy() method to the DomTreeUpdater
adds ae80745b73e Fix few typos in comments (write access test commit)
adds ee39f0be06f [Support] Require llvm::Error passed to formatv() to be wra [...]
adds 82b46012db9 [X86] Remove i128 type from FR128 regclass.
adds f35639b8448 [mips] Mark standard encoded instructions as not being in MIPS16e
adds 2a6ae651e56 [X86] Add UDIV by uniform/non-uniform constant tests
adds 8bda54e5087 Fix -Wdocumentation warnings. NFCI.
adds ecc246961c8 [UnJ] Use SmallPtrSets for block collections. NFC
adds 2d2bdce25ce [X86][AVX] Use Zeroable mask to improve shuffle mask widening
adds 36dba4ab0ce [InstCombine]add testcases for folding more SPFofSPF pattern
adds 33468275adc [X86][SSE] Utilize ZeroableElements for canWidenShuffleElements
adds cf57e1b7d10 [XRay] Fix machine verifier issues in X86
adds 0ae89b82685 [DebugInfo][X86] Add start-after flags to MIR tests
adds f6e61654a19 [ThinLTO] Escape module paths when printing
adds 83a86dd616b [InstCombine] Fold x & (-1 >> y) != x to x u> (-1 >> y)
adds fd0e24d7eaa [InstCombine] icmp-logical.ll: restore the original intenti [...]
adds e425a8e34ad [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset ins [...]
adds 8840e88391b Follow up of r336913: forgot to add the new test files.
adds e427001e40b [llvm-mca] Simplify eventing by adding an onEvent templated [...]
adds d595b3ce746 [NFC][X86][AArch64] Add tests for the 'check for [no] signe [...]
adds df4581eddcf Add --strip-all option back to llvm-strip.
adds 0f2affe94be Reverted r336805 as it broke llvm-clang-x86_64-expensive-ch [...]
adds 6e9115adb50 [X86][FastISel] Choose EVEX instructions when possible when [...]
adds e3a92755ac6 [X86] Connect the flags user from PCMPISTR instructions to [...]
adds c11a95fb078 [DWARF v5] Generate range list tables into the .debug_rngli [...]
adds 50f2228bda9 CodeGen: Remove pipeline dependencies on StackProtector; NFC
adds 87100fdc04a Revert "(HEAD -> master, origin/master, arcpatch-D37582) Co [...]
adds 4835c04d29a AMDGPU: Fix assert in truncate combine with vectors
adds 33929672874 [X86] Add show-mc-encoding to some fast-isel intrinsic test [...]
adds 7cf5f05b8cd [X86][FastISel] Support EVEX version of sqrt.
adds a120e0c37ce [PowerPC] [NFC] Update __float128 tests
adds 3418676967e [SanitizerCoverage] Add associated metadata to 8-bit counters.
adds 0a4671b355d [gold-plugin] Disable section ordering for relocatable links
adds 54919303bfc Revert "[SLPVectorizer] Add initial alternate opcode suppor [...]
adds 197f95f9b9f foo
adds 30251f27e54 [X86] Add AVX512 equivalents of some isel patterns so we ge [...]
adds 1a14ab01567 Remove redundant *_or_null checks; NFC
adds 20f01a8a7d3 Revert r336950 and r336951 "[X86] Add AVX512 equivalents of [...]
adds 9bd050eb937 [X86] Add AVX512 equivalents of some isel patterns so we ge [...]
adds 07757b9f4ce [InstCombine] Simplify isKnownNegation
adds b9bc17351ee [X86] Regenerate checks in sse-scalar-fp-arith.ll.
adds 5c43c4ce5f1 [llvm-mca] Add cycleBegin/cycleEnd callbacks to mca::Stage.
adds fda9d387d8f [llvm-mca] Constify SourceMgr::hasNext. NFC.
adds 674f0a11744 Simplify recursive launder.invariant.group and strip
adds d79789afc64 CodeGen: Remove pipeline dependencies on StackProtector; NFC
adds 8a35df349b4 [InstCombine] return when SimplifyAssociativeOrCommutative [...]
adds 9074a87ea5f [FileCheck] Implement -v and -vv for tracing matches
adds bc2f48c38d3 [DomTreeUpdater] Ignore updates when both DT and PDT are nullptrs
adds 8383d4d295e [X86] Remove isel patterns that turns packed add/sub/mul/di [...]
adds 93177460538 [XRay][compiler-rt] Add PID field to llvm-xray tool and add [...]
adds 1b59f048c70 [X86] Prefer MOVSS/SD over BLEND under optsize in isel.
adds b76c4539710 [LiveDebugValues] Tracking copying value between registers
adds 3723787cc35 [AArch64][SVE] Asm: Support for insert element (INSR) instr [...]
adds 19f4c1ecb2b [ARM] Regenerated arg endian test
adds 1726fda3b28 [AArch64] Updated bigendian buildvector tests
adds ce729e20ee9 [AArch64][SVE] Asm: Vector Unpack Low/High instructions.
adds 27babdf37a5 [llvm-mca] Removed unused arguments from methods in class P [...]
adds ed770b652cb [llvm-mca] Simplify the Pipeline constructor. NFC
adds 5f81eab1b7a [x86] Teach the EFLAGS copy lowering to handle much more co [...]
adds c3bd8ccb0d7 [x86] Fix a capitalization that I failed to save in my edit [...]
adds 0bc0c53ebab [UpdateTestChecks] Teach the x86 asm parser to skip over th [...]
adds 1e086c7b69c [SLPVectorizer] Add initial alternate opcode support for ca [...]
adds bd8c8d75985 [SLH] Introduce a new pass to do Speculative Load Hardening [...]
adds 6069d4b651b DivergenceAnalysis: added debug output
adds 3a90426c48f [TableGen] Support multi-alternative pattern fragments
adds 8689f3429dd [NFC] Silence Wparentheses warning in DomTreeUpdater, intro [...]
adds edc45eb6a43 Add parens to silence Wparentheses warning, introduced by 336990
adds 6ff281cc606 [llvm-mca] Improve a few debug prints. NFC
adds 7c86c0663d5 [mips] Add microMIPS case to the tests and regenerate asser [...]
adds 2eb5b221110 [json, test] Fix the json.td test - the path to python coul [...]
adds 8352988dc15 [cfi-verify] Support AArch64.
adds 674b14846a3 [PowerPC] Materialize more constants with CR-field set in l [...]
adds f907c503aba [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset ins [...]
adds 0b0731cbb0b [dwarfdump] Pretty print DW_AT_APPLE_runtime_class
adds 57726810dce [cfi-verify] Only run AArch64 tests when it is a supported target
adds a97ad691465 [NFC][X86][AArch64] Negative tests for 'check for [no] sign [...]
adds b7219f9e807 Revert "CallGraphSCCPass: iterate over all functions."
adds f185b903488 [Tablegen] Optimize isSubsetOf() in AsmMatcherEmitter.cpp. NFC
adds e61b6779e4a AMDGPU: Fix handling of alignment padding in DAG argument lowering
adds 9c21e67b4cb AMDGPU: Properly handle shader inputs with split arguments
adds c62320ccc0e [TableGen] Suppress type validation when parsing pattern fragments
adds b6e0532b347 [llvm-mca][BtVer2] Add tests for dependency breaking instructions.
adds 6ab694dd51e [dwarfdump] Add pretty printer for accelerator table based [...]
adds 7dc602e5164 [LowerTypeTests] Limit when icall jumptable entries are emitted
adds b4c1bb4999a Revert "[CMake] Pass Clang defaults to runtimes builds"
adds 7d364253764 [NFC][InstCombine] Tests for 'check for [no] signed truncat [...]
adds 20e85b879b1 [X86] Try fixing r336768
adds e6cdf32fe6d [X86][FastISel] Add EVEX support to sitofp handling.
adds 504eed44cd3 AMDGPU/GlobalISel: Implement select() for @llvm.amdgcn.exp
adds 3393e5b81db [ThinLTO] Ensure we always select the same function copy to import
adds 6716a6f8768 [X86] Correct comment of TEST elimination in BSF/TZCNT
adds 5119a48bec2 [LTO] Fix linking with an alias defined using another alias.
adds f173f479c2e [X86][FastISel] Support uitofp with avx512.
adds 37f081b80d3 AMDGPU/GlobalISel: Implement select() for 32-bit @llvm.minn [...]
adds eede34f491c [X86] Use the correct types in some recently added isel patterns.
adds af68baa2093 [ThinLTO] Require x86 target for new test
adds 0f11eb4472d Clarify wording of a doxygen comment, NFC
adds 2d1b15b0368 Fix comments which mixed up 'before' and 'after', NFC
adds 1c00edf2e4f [docs] Update usage directive for llvm-cov report -show-functions
adds 0f602cf8528 [X86][SLH] Regroup the instructions in isDataInvariantLoad [...]
adds 2c5f2079745 [X86][SLH] Add VEX and EVEX conversion instructions to isDa [...]
adds 7cd0250e8e6 [X86][SLH] Remove PDEP and PEXT from isDataInvariantLoad
adds c31e75d1995 [LSR] If no Use is interesting, early return.
adds e29dbca9525 [Hexagon] Avoid introducing calls into coalesced range of H [...]
adds c9b1b5c60b7 Add a CHECK line for r337072.
adds fab6a247ff4 Re-apply "[SCEV] Strengthen StrengthenNoWrapFlags (reapply [...]
adds d0c165bf244 [ThinLTO] Add debug output to test
adds 24ec170d118 [llvm-mca] Remove unused InstRef formal from pre and post e [...]
adds 383081c48d2 [x86/SLH] Add an assert to catch if we ever end up trying t [...]
adds 1382a3a7e81 Revert "AMDGPU: Fix handling of alignment padding in DAG ar [...]
adds 73389a219db Revert "[ThinLTO] Add debug output to test"
adds 43658456ae9 Revert "[ThinLTO] Ensure we always select the same function [...]
adds 60ba444e117 [X86] Prefer blendi over movss/sd when avx512 is enabled un [...]
adds 981f0755e21 Give llvm-lib rudimentary help output.
adds b77be895f41 [X86] Fix a subtle bug in the custom execution domain fixin [...]
adds 6490d2153ff [x86/SLH] Fix an issue where we wouldn't harden any loads i [...]
adds 9d51c1875e9 [MachineOutliner] Check the last instruction from the seque [...]
adds c52910957c4 Attempt to get test/tools/llvm-lib/help.test passing on san [...]
adds 69508765409 [NFC][InstCombine] Add forgotten variable tests for foldICm [...]
adds 3f53e3baf51 [NFC][InstCombine] Tests for x & (-1 >> y) u>= x to x u< [...]
adds 21d6697e493 [InstCombine] Fold x & (-1 >> y) u>= x to x u<= (-1 >> y)
adds 5dfb6962209 [NFC][InstCombine] Tests for x & (-1 >> y) u< x to x u> [...]
adds 81c991bbc41 [InstCombine] Fold x & (-1 >> y) u< x to x u> (-1 >> y)
adds 1c239349f3f [NFC][InstCombine] Tests for x u> x & C to x u> C fold.
adds fc95a84f5d0 [InstCombine] Fold x u> x & C to x u> C
adds 67041dddbe7 [NFC][InstCombine] Tests for x u<= x & C to x u<= C fold.
adds d8e175bca59 [InstCombine] Fold x u<= x & C to x u<= C
adds 39ce2d4bc8b [NFC][InstCombine] Tests for x s> x & (-1 >> y) to x s> [...]
adds f938155483d [InstCombine] Fold x s> x & (-1 >> y) to x s> (-1 >> y)
adds fe2b66265c0 [NFC][InstCombine] Tests for x s<= x & (-1 >> y) to x s< [...]
adds 0e039b76e09 [InstCombine] Fold x s<= x & (-1 >> y) to x s<= (-1 >> y)
adds 56ad5a26da7 [NFC][InstCombine] Tests for x & (-1 >> y) s>= x to x s< [...]
adds 0d94eaa92c6 [InstCombine] Fold x & (-1 >> y) s>= x to x s<= (-1 >> y)
adds ec6933aa840 [NFC][InstCombine] Tests for x & (-1 >> y) s< x to x s> [...]
adds 3a68fbf4b51 [InstCombine] Fold x & (-1 >> y) s< x to x s> (-1 >> y)
adds 6e43f22733d [NFC][InstCombine] foldICmpWithLowBitMaskedVal(): update comments.
adds 37ac9396a03 [llvm-mca] Turn InstructionTables into a Stage.
adds 674b07eaef7 [TableGen] Add some std::move to the PatternToMatch constructor.
adds 7ed67c245ac [CMake] Pass CMAKE_INSTALL_DO_STRIP to external projects
adds 9d61922fe7c [X86] Add some optsize patterns for 256-bit X86vzmovl.
adds ecb89054528 [TableGen] Remove what seems to be an unnecessary std::map copy.
adds cfe3c915262 [TableGen] std::move vectors into TreePatternNode.
adds f23126d10ee [AVR] Document some public functions
adds eaabc71261e [llvm-mca][BtVer2] teach how to identify false dependencies [...]
adds 2d2ebb317ec [llvm-mca] Regenerate X86 specific tests. NFC
adds 4dd709869f4 [InstSimplify] add tests for minnum/maxnum; NFC
adds 268055dd8ce [InstSimplify] fold minnum/maxnum with NaN arg
adds 24d52ec9f94 [AMDGPU] adjusted test checks because minnum with NaN gets [...]
adds 7120b1dbea6 [InstSimplify] add fixme comment for PR37776; NFC
adds 08378e6ecfb [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)
adds 597deb92844 [InstCombine] Corrections in comments for division transfor [...]
adds a464223848e [DAGCombiner] fix typo in comment; NFC
adds c7482ced308 [X86] Use 128-bit ops for 256-bit vzmovl patterns.
adds ea81bb5e03d [X86] Use 128-bit blends instead vmovss/vmovsd for 512-bit [...]
adds 2012494a47b [X86] Add load patterns for cases where we select X86Movss/ [...]
adds 29bd1172553 [X86] Add custom execution domain fixing for 128/256-bit in [...]
adds 198f71f698c [x86/SLH] Extract one of the bits of logic to its own funct [...]
adds 0ad50ac3b85 Prune empty directory.
adds 3da6ce5ebe1 Recommit r335794 "Add support for generating a call graph p [...]
adds 727a214dd58 [InstCombine] fold icmp pred (sub 0, X) C for vector type
adds d27cef10a89 [InstCombine] add more SPFofSPF folding
adds 07f0205adef [x86/SLH] Teach speculative load hardening to correctly har [...]
adds d8c8d742377 [x86/SLH] Fix an unused variable warning in release builds [...]
adds 40a777270d9 [X86] Merge the FR128 and VR128 regclass since they have id [...]
adds 353f7b5433c [MemorySSAUpdater] Remove deleted trivial Phis from active workset
adds 356f9421a19 Revert "[AMDGPU][Waitcnt] fix "comparison of integers of di [...]
adds 249b255c788 run post-RA hazard recognizer pass late
adds 0f2a60eba6d [MSan] factor userspace-specific declarations into createUs [...]
adds a7209581698 [AMDGPU][Waitcnt] Re-apply fix "comparison of integers of d [...]
adds 393d0de3894 [x86/SLH] Extract another small helper function, add better [...]
adds ea9f37558a4 [AccelTable] Provide DWARF5AccelTableStaticData for dsymutil.
adds 06a94a9b18a MSan: minor fixes, NFC
adds 7847cb2c366 [x86/SLH] Fix a bug where we would try to post-load harden [...]
adds fd7429c4e7b Avoid losing Hi part when expanding VAARG nodes on big endi [...]
adds 1c521ba7c7a [Sparc] Generate ta 1 for the @llvm.debugtrap intrinsic
adds fb8753f34b8 [Sparc] Use the names .rem and .urem instead of __modsi3 an [...]
adds 84ab5c258ac [Sparc] Use the correct encoding for ta 3
adds 0c94a3b5119 [X86][AArch64][DAGCombine] Unfold 'check for [no] signed tr [...]
adds f85073912f3 [MIPS GlobalISel] Select instructions to load and store i32 [...]
adds 7d9d92b62e4 [mips] Eliminate the usage of hasStdEnc in MipsPat.
adds 63110793937 [x86/SLH] Completely rework how we sink post-load hardening [...]
adds 0a3ff055189 [InstrSimplify] add testcases for fold sdiv if two operands [...]
adds e27b1d0b0f6 [cfi-verify] Abort on unsupported targets
adds 92f58789014 Restore "[ThinLTO] Ensure we always select the same functio [...]
adds 735bf22bd79 [RegAlloc] Skip global splitting if the live range is huge [...]
adds a5425a350eb [InstCombine] Fold 'check for [no] signed truncation' pattern
adds bffcc487e3e [llvm] Change 2 instances of std::sort to llvm::sort
adds ac8c393bd50 [AMDGPU] [AMDGPU] Support a fdot2 pattern.
adds 7d88286b7cf [CodeGen] Fix inconsistent declaration parameter name
adds 51e4fb6e38b [llvm-objcopy] Add support for large indexes
adds e5c7b32694a [NFC][InstCombine] Fine-tune 'check for [no] signed truncat [...]
adds 937d2c0dee0 [LLVMDemangle] Move some utility classes to header files.
adds d554de1ec8d Add missing includes.
adds 9dce11c0cfb [llvm-mca][docs] Initial description of mca internals. NFC
adds 41306baa27e [NFC][llvm-objcopy] Make helper functions static
adds bb12f48c1c3 [Intrinsics] define funnel shift IR intrinsics + DAG builde [...]
adds 2a147a15071 [WebAssembly] Remove ELF file support.
adds 1fbf51fadc1 [X86] Add a missing FMA3 scalar intrinsic pattern.
adds 40b80a4e12e [llvm-mca][docs] Add notes about cycle and resource callbac [...]
adds d13c7c50a3c [testcases] move testcases to right place - NFC
adds 605986cfafd [X86] Add test cases for selecting floor/ceil/trunc/rint/ne [...]
adds 7904f0b1e7b [X86] Add full set of patterns for turning ceil/floor/trunc [...]
adds 00e3426bc2b [Sparc] Do not depend on icc for ta 1
adds 7468eaa74b8 [X86] Properly qualify some MOVSS/MOVSD patterns with OptSize.
adds 46f56568b28 [AArch64][SVE] Asm: Support for EXT instruction.
adds 6151dbec931 [AArch64][SVE] Asm: Support for SPLICE instruction.
adds 15fa57ae79a Fix MSVC "result of 32-bit shift implicitly converted to 64 [...]
adds ead04a95599 [DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_ [...]
adds ca47e5e7673 [AArch64][SVE] Asm: Support for predicated FP operations.
adds f948d85a47d [llvm-objcopy] Run not with any python, but the python conf [...]
adds 1907eb80ac0 [LLVM-C] Add target triple normalization to the C API.
adds 938172a55a8 [LLVM-C] Fix name mangling on AggressiveInstCombine
adds 7d1879721b1 Don't assert that a size_t fits into 64bit.
adds 1c105a00ab9 [NFC][testcases] add testcases for folding srem whose opera [...]
adds 5431fe06df8 [AArch64][SVE] Asm: Support for predicated FP operations (F [...]
adds 79ed3bcca7d More fixes for subreg join failure in RegCoalescer
adds de720479bb1 [SLPVectorizer] Don't attempt horizontal reduction on point [...]
adds 73739643d7b [AArch64][SVE] Asm: FP fused multiply-add/subtract instructions.
adds 35603461c5a [IPSCCP] Run Solve each time we resolved an undef in a function.
adds 87d8be53fdd [Mips][FastISel] Fix handling of icmp with i1 type
adds a5d63899381 Recommit r334887: [SmallSet] Add SmallSetIterator.
adds eabdfbb4b22 [AArch64][SVE]: Integer multiply-add/subtract instructions.
adds 1885077d4c3 [Tablegen][PredicateExpander] Fix a bug in `expandCheckImmO [...]
adds 95e53c28897 [llvm-mca][docs] Revert mca internals docs.
adds c1bbb5ef59c [llvm-mca][x86] Add LEA resource tests (PR32326)
adds b31fad1c7b0 [llvm-mca][x86] Add displacement-only and additional scale= [...]
adds e40f77a66b7 [X86] Remove some standalone patterns in favor of the patte [...]
adds cf065f71183 [WebAssembly] Update WebAssemblyLowerEmscriptenEHSjLj to ha [...]
adds cc5fc420331 [llvm-mca][x86] Add BSWAP resource tests
adds a5ec686ea52 Revert rL337292 due to another MSVC STL problem.
adds c8068fe5e7d [llvm-mca][x86] Add MOVBE resource tests to all supporting targets
adds 7c3ca4315c0 [llvm-mca][x86] Add extend, carry-flag and CMP instructions [...]
adds dc80a6e18ec [x86/SLH] Flesh out the data-invariant instruction table a [...]
adds bbdc5a72a79 Remove an errant piece of !dbg metadata from a test, NFC
adds f241fec5ea9 [InstCombine] Preserve debug value when simplifying cast-of-select
adds dc84f3b6c1a Add some helper functions to the demangle utility classes.
adds 08ea6f8319e Add missing include.
adds cf121a0f053 [Demangle] Add missing header files
adds 372f8c4f074 [X86] Add test case for missed opportunity to use MOVLPS on [...]
adds 8fe83c7092e [X86] Add patterns for folding full vector load into MOVHPS [...]
adds 1ea502b3c15 [LangRef] Clarify which fast-math flags affect fcmp.
adds 9ff02efe80b [LangRef] nnan and ninf produce poison.
adds 48ef58e6c15 [LangRef] Clarify semantics of load metadata.
adds a29ff2e0f94 MC: Implement support for new .addrsig and .addrsig_sym dir [...]
adds 03bb42af9d1 CodeGen: Add a target option for emitting .addrsig directiv [...]
adds 9722c06a8a8 [X86] Remove the vector alignment requirement from the patt [...]
adds b5b60c3d145 [NFC][llvm-objcopy] Cleanup namespace usage in llvm-objcopy.
adds 70df6e955a6 CodeGen: Don't create address significance table entries fo [...]
adds adf4ac8b228 Revert "[InstCombine] Fold 'check for [no] signed truncatio [...]
adds 34ada1b5236 Add PowerPC e500(v2) core scheduler and directives.
adds e0adf6dabf3 Complete the SPE instruction set patterns
adds c486a43e863 Introduce codegen for the Signal Processing Engine
adds b14a5d35fad [X86] Generate v2f64 X86ISD::UNPCKL/UNPCKH instead of X86IS [...]
adds a65225ba1f4 [X86] Remove patterns that mix X86ISD::MOVLHPS/MOVHLPS with [...]
adds e282c3c35e8 Fix build failures from r337347, found by clang
adds f8f02e122b8 [NFC] fix trivial typos in comments
adds a29d420a5f3 [X86] Regenerate fma.ll checks using current version of the [...]
adds de4051f80c4 [X86] Add test case for missed opportunity to commute vunpc [...]
adds b20ca5fcaa0 [X86] Enable commuting of VUNPCKHPD to VMOVLHPS to enable l [...]
adds 6cf11788591 [AArch64][SVE] Asm: Support for integer MUL instructions.
adds 8b3fece49e1 Revert test changes part of "Revert "[InstCombine] Fold 'ch [...]
adds 8b80d4ecc24 [llvm-readobj] - Teach tool to dump objects with >= SHN_LOR [...]
adds 10c3b3d15ed [llvm-objdump] - Stop reporting bogus section IDs.
adds 9e5f1ea427c [NFC][InstCombine] i65 tests for 'check for [no] signed tru [...]
adds c8f4a56750f [CMake] Export the LLVM_LINK_LLVM_DYLIB setting
adds 3caa90973aa Fix -Wdocumentation warning. NFCI.
adds 07e34c66633 Fix -Wdocumentation warning. NFCI.
adds f600b10dd2a [AArch64][SVE] Asm: Integer divide instructions.
adds 55222c9183c [Sparc] Use the IntPair reg class for r constraints with va [...]
adds 9c475e370b8 [llvm-objdump] - An attempt to fix BB after r337361.
adds a0223d639d9 [AArch64][SVE] Asm: Support for UDOT/SDOT instructions.
adds 9500eff8991 Revert "[Sparc] Use the IntPair reg class for r constraints [...]
adds 0c246047310 [X86][SSE] Add extra scalar fop + blend tests for commuted inputs
adds 1cd41cb2709 [InstCombine] Re-commit: Fold 'check for [no] signed trunca [...]
adds 3ac65c443f7 [Tablegen][PredicateExpander] Add the ability to define che [...]
adds f1ed5421fd9 [NFC] Make a test more neat
adds 73ce7fc085c [TargetInstPredicate] Add definition of CheckInvalidRegiste [...]
adds 41ef3985c79 [AArch64][SVE] Asm: Support for unpredicated FP operations.
adds 99893224eb0 ARM: deduplicate hard-float detection code. NFC.
adds feb1bb8b826 ARM: switch armv7em triple to hard-float defaults and libcalls.
adds b7eb4975c40 ARM: stop explicitly marking armv7k libcalls as hard-float. NFC.
adds a50de627562 [X86][SSE] Remove BLENDPD canonicalization from combineTarg [...]
adds 32e74a6f99f [Support] Build fix for Haiku when checking for a local filesystem
adds 1a0909c7b21 [SLPVectorizer] Avoid duplicate scalar cost calculations in [...]
adds f32280c8cd9 [x86/SLH] Add the design document for Speculative Load Hard [...]
adds bd2bb96fb18 [mips] Fix predicate for the MipsTruncIntFP pattern
adds 106f868ca63 [MC] Fix nested macro body parsing
adds 8562c439b44 [llvm-objcopy] %python wants to be in quotes, because it mi [...]
adds c279de70f62 [NFC][X86][AArch64][DAGCombine] More tests for optimizeSetC [...]
adds baea3f05000 [llvm-objdump] Add -demangle (-C) option
adds 19723d91b87 [RegAlloc][NFC] Fix the help string of the option "huge-siz [...]
adds 7f233b7000a [docs] Update GoldPlugin documentation
adds 9f006d32f1b [llvm-readobj] Generic -string-dump option
adds 461ab257e2f [ScheduleDAG] Fix unfolding of SUnits to already existent nodes.
adds 7e2280c100b [DebugInfo] Dwarfv5: Avoid unnecessary base_address specifi [...]
adds 1b4d2184e19 [DAG] Add testcase.
adds ca593328f30 Add (very partial) Kate syntax highlighting definition for [...]
adds 5aa954ccaf2 Skip debuginfo intrinsic in markLiveBlocks.
adds 6e4fb35e808 [X86][SSE] Canonicalize scalar fp arithmetic shuffle patterns
adds d5bb6fb05a5 Fix some tests that had (implied) duplicate mtriple
adds f7eb2f0fcb7 Revert "ARM: switch armv7em triple to hard-float defaults a [...]
adds 9dc116b0c7e [WebAssembly] Add missing -mattr=+exception-handling guards
adds e601e5fe08b Rename __asan_gen_* symbols to ___asan_gen_*.
adds 62b518b75a7 [SCEV] Fix buggy behavior in getAddExpr with truncs
adds ef2fcbd30cf Fix spelling mistake in comments. NFCI.
adds cfc3a3cba21 Use std::reference_wrapper instead of llvm::ReferenceStorage
adds 3a2e78e840c [DAGCombiner] Add rotate-extract tests
adds d13704d44f3 [x86/SLH] Major refactoring of SLH implementaiton. There ar [...]
adds 91823932bda [UnJ] Document unroll and jam pass and loop metadata
adds 95f104ac2d5 ARM: switch armv7em MachO triple to hard-float defaults and [...]
adds 629edfbb7a4 [Docs] Testing Debug Info Preservation in Optimizations
adds 2a478d43e1f [ThinLTO] Enable ThinLTO WholeProgramDevirt and LowerTypeTe [...]
adds efd8832ecba [llvm-readobj] - Do not report invalid amount of sections.
adds 19ad9309e1e [X86][SSE] Add FPEXT vXf32 - vXf64 tests
adds 3b09b9e80ea [X86][BtVer2] correctly model the latency/throughput of LEA [...]
adds ae72a8c5708 [LoadStoreVectorizer] Use getMinusScev() to compute the dis [...]
adds 5b81b48075a [libFuzzer] Update documentation regarding MSan.
adds 3bb52cad65a [APInt] Keep the original bit width in quotient and remainder
adds a02ad35dfa9 [OpenEmbedded] Add a unittest for aarch64-oe-linux
adds 6e502837915 [Analysis] Fix typo in assert. NFC
adds f9fb677cc24 [Power9] Code Cleanup - Remove needsAggressiveScheduling()
adds b2f9f92413f [LSV] Refactoring + supporting bitcasts to a type of differ [...]
adds a34dfe65428 Fix -Wsign-compare in llvm-readobj
adds 85eba188bc6 [X86] Fix some 'return SDValue()' after DCI.CombineTo inste [...]
adds 0d0107000d2 Disable GCC's -Wclass-memaccess warning
adds b1b35797986 Work around bug in mingw-w64 GCC 8.1.0
adds e05bab28b64 [llvm-mca][docs] Add Timeline and How MCA works.
adds 91284ba1d6e [X86][AVX] Use extract_subvector to reduce vector op widths [...]
adds f97a90d9582 [DAGCombiner] Teach DAGCombiner that A-(-B) is A+B.
adds d11d789e5ef [ThinLTO] Only emit referenced type id records in index files
adds b3e4684b358 ADT: Shrink size of SmallVector by 8B on 64-bit platforms
adds 7e9afd4946f Skip out of SimplifyDemandedBits for BITCAST of f16 to i16
adds 88c3cbe6a72 [SCCP] Don't use markForcedConstant on branch conditions.
adds fc138001126 [docs] Add support for Markdown documentation in Sphinx
adds 8e3c7f6cf64 [x86/SLH] Clean up helper naming for return instruction han [...]
adds 0ee7ae5caa2 Revert "ADT: Shrink size of SmallVector by 8B on 64-bit platforms"
adds ed6266d5795 [WebAssembly] Disable a test that violates DR1696
adds 40d8d2b15d4 Revert "[docs] Add support for Markdown documentation in Sphinx"
adds 604b45ddcfd Reapply "ADT: Shrink size of SmallVector by 8B on 64-bit pl [...]
adds 2bbe26162ea [DAGCombiner] Fold X - (-Y *Z) -> X + (Y * Z)
adds 14b97bb6303 Add x86_64-unkown triple to llc for x86 test.
adds 8d6095aa061 [AArch64][SVE] Asm: Support for FTMAD instruction.
adds f5878e6b347 [AArch64][SVE] Asm: Support for bit/byte reverse operations.
adds 06b493f7f03 Reapply "AMDGPU: Fix handling of alignment padding in DAG a [...]
adds f638e5271d8 Improved sched model for X86 BSWAP* instrs. Differential Re [...]
adds 8c93523c814 [SystemZ] Reimplent SchedModel IssueWidth and WriteRes/Read [...]
adds 9bdae65513e [UBSan] Also use blacklist for 'Address; Undefined' setting
adds 16429798515 Revert "[LSV] Refactoring + supporting bitcasts to a type o [...]
adds b15f0ae4d4f [SystemZ] Test case formatting fixes
adds 3876c1deaef [NFC][testcases] more testcases for folding srem if its two [...]
adds e53157e9ebc [DebugInfo] Generate .debug_names section when it makes sense
adds da67c6d0eff [InstSimplify] fold srem instruction if its two operands ar [...]
adds 077efdaae0c Regenerate remainder test.
adds ca4d424e2e6 [X86][AVX] Convert X86ISD::VBROADCAST demanded elts combine [...]
adds 1ba71c6ab7a Recommit r328307: [IPSCCP] Use constant range information f [...]
adds 60fb40346bf [NFC][testcases] fold sdiv if two operands are negated and [...]
adds 6dde8495c07 Regenerate partial vector fold test. NFCI.
adds 59b3465a59e [IPSCCP] Fix for bot failure caused by r337548
adds 7b7da9f3c10 [X86][AVX] Add 256-bit vector horizontal op redundant shuff [...]
adds d5c8d8bb016 [DAG] Fix Memory ordering check in ReduceLoadOpStore.
adds 09babe53b1d [X86][AVX] Add support for 32/64 bits 256-bit vector horizo [...]
adds cb80e4d222b DwarfDebug: Reduce duplication in addAccel*** methods
adds 708378d3558 [DAG] Avoid Node Update assertion due to AND simplification
adds bb7c99a9c22 Fix build breakage from r337562
adds 0ec1f16b4e3 [X86][AVX] Add v16i16 horizontal op redundant shuffle tests
adds 42411242d60 [X86][AVX] Add support for i16 256-bit vector horizontal op [...]
adds 7ba70e88cc0 [llvm-objcopy, tests] Fix several llvm-objcopy tests
adds 8ec2a959fa2 [X86][SSE] Use SplitOpsAndApply to improve HADD/HSUB lowering
adds 7d86834e82c [MSan] run materializeChecks() before materializeStores()
adds f51ced79104 Rewrite the VS integration scripts.
adds cd6f3910e90 Add llvm::Any.
adds 6649de34e98 [ARM] Add new feature to enable optimizing the VFP registers
adds ee762a8b97e Change bool_constant to integral_constant.
adds 86a77cda68e [MSan] Hotfix compilation
adds 354367414b3 [X86][XOP] Fix SUB constant folding for VPSHA/VPSHL shift lowering
adds c2a416a076b [MemorySSA] Add API to update MemoryPhis, following CFG changes.
adds 3dac3fac6c9 [Any] Fix a typo: didn't use the correct argument
adds 42e40ea33ee Add a Microsoft Demangler.
adds 7d1ac03f353 [llvm-mca][x86] Add movsx/movzx instructions to general x86 [...]
adds 32922e691b8 Fix linker failure with Any.
adds a7a130cbf71 [X86] Remove what appear to be unnecessary uses of DCI.CombineTo
adds 34f6b250b3e [X86] Remove isel patterns for MOVSS/MOVSD ISD opcodes with [...]
adds aeb65f137ae Fix a few warnings and style issues in MS demangler.
adds 70215f556ff [Demangler] Add missing overrides
adds cea401e58a5 [ORC] Replace SymbolResolvers in the new ORC layers with se [...]
adds ec3e95710f4 [ORC] Simplify VSO::lookupFlags to return the flags map.
adds 7891d706dae [ORC] Add new symbol lookup methods to ExecutionSessionBase [...]
adds 3dd57df1d16 [Demangler] Correctly factor in assignment when allocating.
adds 5f6eec8ceb9 Make check-llvm depend on llvm-undname
adds bc0cffa673a Remove a superfluous semicolon
adds 502e1bf6141 And add a lit substitution for llvm-undname, as the comment [...]
adds ff83113c2f5 [llvm-objcopy] Add basic support for --rename-section
adds a46c1d6b583 [FileCheck] Fix search ranges for DAG-NOT-DAG
adds 6bb56ed1173 Reapply "[LSV] Refactoring + supporting bitcasts to a type [...]
adds 1f565f54cd4 Revert r337595 "[ORC] Add new symbol lookup methods to Exec [...]
adds 4571da68d10 [FileCheck] Provide an option for FileCheck to dump origina [...]
adds 3631b664083 [COFF] Adjust how we flag weak externals
adds 337fc79e64d [COFF] Use symbolic constants instead of hardcoded numbers. NFCI.
adds 9f7b7482cbb [llvm-undname] Remove a superfluous semicolon. NFC.
adds a69ec545d20 Revert "[X86][AVX] Convert X86ISD::VBROADCAST demanded elts [...]
adds 8f2b72e7d1b AMDGPU: Use existing function to check for VGPRs
adds 43c7ac58945 Change the cap on the amount of padding for each vtable to [...]
adds 15f33310a86 [Hexagon] Disable packets in test to avoid ordering issues [...]
adds c53ade08d70 [ADT] Only run death tests in !NDEBUG
adds 845fa153ca1 Re-apply r337595 with fix for LLVM_ENABLE_THREADS=Off.
adds 9d8e9ef4914 [ORC] Re-apply r336760 with fixes.
adds 1d13545e10c [DebugInfo] Add a new DI flag to record if a C++ record is [...]
adds ebc7653063d [InstrSimplify] fold sdiv if two operands are negated and n [...]
adds ed64ebdb3f6 Early exit with cheaper checks
adds 0754d77d6ad Fix the MSVC Visualizers for SmallVector classes.
adds 322f6d046b0 [llvm-undname] Flush output before demangling.
adds d0914d174ca [mips] Move out the WrapperPat declaration from the NotInMi [...]
adds 7d957555181 [mips] Factor out register class selection for global base [...]
adds bdf2ac006fb [llvm-mca][docs] Add documentation for the statistic output [...]
adds bd64674cdec [X86] Add more MADD recurrence test cases with larger and n [...]
adds 8c41af6002b [SelectionDAGBuilder] Restrict vector reduction check to ty [...]
adds 7a0e9e5b054 [SelectionDAGBuilder] Use APInt::isZero instead of comparin [...]
adds a747d6134aa [ORE] Move loop invariant ORE checks outside the PM loop.
adds 13ee34b3354 [X86] Remove the max vector width restriction from combineL [...]
adds c6b3cc723aa Test commit, fix a minor typo.
adds 32b278468b1 [x86/SLH] Rename and comment the main hardening function. NFC.
adds 9e30933ab10 [x86/SLH] Add a test covering indirect forms of control flow. NFC.
adds d0f4fb1b00c [x86/SLH] Fix a bug where we would harden tail calls twice [...]
adds dbf6cfb47d5 [GVNHoist] safeToHoistLdSt allows illegal hoisting
adds e3427c2f095 [NFC][MCA] ZnVer1: add partial-reg-update tests
adds 7fdea0d4185 [NFC][MCA] ZnVer1: Update RegisterFile to identify false de [...]
adds ef8ab912b61 [Support] Add a UniqueStringSaver: like StringSaver, but de [...]
adds 40f8300dd17 [MemorySSAUpdater] Update Phi operands after trivial Phi el [...]
adds 576662c3d6b [GVN] Don't use the eliminated load as an available value i [...]
adds 942fbb23308 [ARM] ARMCodeGenPrepare backend pass
adds e1487414326 [Docs] Fix LLVM_YAML_IS_DOCUMENT_LIST_VECTOR
adds fabe54b1977 [FPEnv] Legalize double width StrictFP vector operations
adds f1a7318d1a2 [SystemZ] Fix dumpSU() method in SystemZHazardRecognizer.
adds 65db7c5dccb [ARM][NFC] ParallelDSP reorganisation
adds 7a4d8f6dc1a [mips] Add more checks to the tls.ll test case. NFC
adds eac6487bf2a [Legalize] Elide MERGE_VALUES created by scalarizeVectorLoad.
adds 524f8982b85 [ARM] Add doFinalization() to ARMCodeGenPrepare pass.
adds ad863f56576 [ARM] Follow-up to r337709.
adds 2741a66921e OpChain has subclasses, so add a virtual destructor.
adds 83862fefd9a [ARM] Use unique_ptr to fix memory leak introduced in r337701
adds 7550101af9b [lit] Move the shtest-xunit-output check lines into shtest-format
adds c250bf82878 Fixing a typo; NFC.
adds 7bf2466873c [Demangle] Attempt to fix arena memory leak
adds 6884c73229b [Hexagon] Handle unnamed globals in HexagonConstExpr
adds f3f578d2866 [yaml2obj] Add default sh_entsize for dynamic sections
adds 3acc5604543 [docs] Add support for Markdown documentation in Sphinx
adds d24baad0e0e Revert "[docs] Add support for Markdown documentation in Sphinx"
adds 8454ad66268 Add inline asm aliasing test.
adds 820d48f45c6 Fix RegScavenger::unprocess
adds e6aaf315db3 [llvm-mca][docs] Define IPC where it is first mentioned. NFC.
adds d3db945575b Re-land r335297 "[X86] Implement more of x86-64 large and m [...]
adds 7321ba268a1 ConstantFolding: Avoid a crash.
adds 94363b3cf67 [gdb] Fix SmallVector pretty printer after r337514
adds 4f40986a056 [DebugCounters] Keep track of total counts
adds 2f14f1125a7 [ThinLTO] Ensure the TargetLibraryInfo is constructed early enough
adds 113fd07750c [SelectionDAG] Reduce DanglingDebugInfo memory traffic, NFC
adds 217be219024 [utils] Fix the llvm::Optional data formatter
adds 09465e9be5f [AArch64] Use MCAsmInfoMicrosoft and MCAsmInfoGNUCOFF as ba [...]
adds c819c64d039 [COFF] Fix assembly output of comdat sections without an at [...]
adds ae3e2f02439 [MC] Add a separate flag for skipping comdat constant secti [...]
adds faddb71dd9f [demangler] call terminate() if allocation failed
adds 073f01b8db4 [LTO] Handle __imp_ (dllimport) symbols consistently with lld
adds 3e597f45e6c [DWARF v5] Refactor range lists dumping by using a more gen [...]
adds 2d6fb152e57 Embed a template specialization in a namespace to work arou [...]
adds 55b2a35d066 Fix typo in test/CodeGen/Mips/dins.ll
adds 6ee94ea43df [DWARF] Use deque in place of SmallVector to fix use-after- [...]
adds 3813cf4b746 [x86/SLH] Remove complex SHRX-based post-load hardening.
adds ae41ebb3a69 [x86/SLH] Simplify the code for hardening a loaded value. NFC.
adds a4afd1f12d5 [Debugify] Move interface definitions to a header, NFC
adds 499e3df2ce6 [Debugify] Export per-pass debug info loss statistics
adds c4c8d7b1655 Add PerfJITEventListener for perf profiling support.
adds 031045ec8db AMDGPU/GlobalISel: Remove unnecessary legality constraint f [...]
adds 46356154bf7 llvm-xray: Broken chrome trace event format output
adds 6779fccada2 AMDGPU/GlobalISel: Legalize G_INSERT
adds b454fa1b407 [DebugInfo] Generate DWARF debug information for labels.
adds 6eec3c8253d [x86] Update the CHECK lines of this test to use the latest [...]
adds b79cc9e7eb3 [x86] Clean up and convert test to use generated CHECK lines.
adds 35ffbe6bcf3 Revert "[DebugInfo] Generate DWARF debug information for labels."
adds f2cead440d9 Recommit r334887: [SmallSet] Add SmallSetIterator.
adds d61e7c72367 ADT: Shrink SmallVector size 0 to 16B on 64-bit platforms
adds 99421a402fb [ARM] Disable ARMCodeGenPrepare by default
adds 0cb06771b3b [x86/SLH] Tidy up a comment, using doxygen structure and wo [...]
adds ab7df71889e [x86/SLH] Extract the core register hardening logic to a lo [...]
adds dab9d81b7c2 [mips] Fix local dynamic TLS with Sym64
adds ae8e83e5e72 [PredicateInfo] Use custom mangling to support ssa_copy wit [...]
adds cef24f0d3b7 Use SCEV to avoid inserting some bounds checks.
adds f381561a76c [MachineOutliner][NFC] Sink some candidate logic into Outli [...]
adds 6f78ca4aa02 [MachineOutliner][NFC] Move missed opt remark into its own [...]
adds 264d8038e84 [MachineOutliner][NFC] Make Candidates own their call information
adds 3e6b79abab2 [docker] Fix LLVM_EXTERNAL_PROJECTS cmake variable value
adds a3de0cbb8f4 [X86] Add test case to show failure to combine away negates [...]
adds e944ca86b15 [Inliner] Teach inliner to merge 'min-legal-vector-width' f [...]
adds f48b4d01aaa [x86] Teach the x86 backend that it can fold between TCRETU [...]
adds 5df3f9e0708 Put "built-in" function definitions in global Used list, fo [...]
adds 742c37184cc [MachineOutliner][NFC] Move target frame info into Outlined [...]
adds e38c32aa3b4 [MachineOutliner][NFC] Move outlined function remark into i [...]
adds bd6cf0e2e7a [X86] Change multiply by 19 to use (9 * X) * 2 + X instead [...]
adds 15bfd7a6941 [WebAssembly] Add tests for weaker memory consistency orderings
adds 89b692c8285 [X86] Generalize the multiply by 30 lowering to generic mul [...]
adds a783e1fbc23 [X86] When expanding a multiply by a negative of one less t [...]
adds 78dd298f340 [SCEV] Add zext(C + x + ...) -> D + zext(C-D + x + ...)<nuw [...]
adds 222b8becdda [LV] Fix for PR38110, LV encountered llvm_unreachable()
adds e2033feaa49 [X86] Change multiply by 26 to use two multiplies by 5 and [...]
adds a1d740bf957 [X86] Add test cases for multiply by 37, 41, and 73.
adds 7cc443c91a5 [X86] Use a two lea sequence for multiply by 37, 41, and 73.
adds d277be2a297 [X86] Expand mul by pow2 + 2 using a shift and two adds sim [...]
adds 0bca0d9f065 [X86] Use a shift plus an lea for multiplying by a constant [...]
adds 9416121005f [x86/SLH] Teach the x86 speculative load hardening pass to [...]
adds bce5b55ff31 [profile] Support profiling runtime on Fuchsia
adds fc5040103f2 [RegisterBankInfo] Ignore InstrMappings that create impossi [...]
adds 2f4f56849c8 [X86] Autogenerate complete checks and fix a failure introd [...]
adds 434ff8b75b9 [X86] Use X86ISD::MUL_IMM instead of ISD::MUL for multiply [...]
adds a23be0643b8 [Dominators] Assert if there is modification to DelBB while [...]
adds f9c35fb62e2 [mips] Replace custom parsing logic for data directives by [...]
adds cc954f3fcb3 [x86/SLH] Improve name and comments for the main hardening [...]
adds b5ba78c96b1 [x86/SLH] Sink the return hardening into the main block-wal [...]
adds cac968ea784 [llvm-readobj] Generic hex-dump option
adds 05d358bad52 [llvm-objdump] Add dynamic section printing to private-head [...]
adds ac1626ec4dd Fix PR34170: Crash on inline asm with 64bit output in 32bit GPR
adds 413e39f9df1 Recommit r333268: [IPSCCP] Use PredicateInfo to propagate f [...]
adds f5b8d1cf394 [SystemZ] Use tablegen loops in SchedModels
adds b1674d0d93b dwarfgen: Add support for generating the debug_str_offsets section
adds 3de71f627ed [MIPS GlobalISel] Lower pointer arguments
adds a47b5f6ca0a Revert "dwarfgen: Add support for generating the debug_str_ [...]
adds 6a84cfbab18 Move JIT listener C binding fallbackks to ExecutionEngineBi [...]
adds 030afdf934a dwarfgen: Add support for generating the debug_str_offsets [...]
adds a9364fc1850 [Hexagon] Properly scale bit index when extracting elements [...]
adds a70431e931a Revert "dwarfgen: Add support for generating the debug_str_ [...]
adds 07e41a65933 Fix llvm::ComputeNumSignBits with some operations and llvm.assume
adds a31192b5376 [AMDGPU] Use AssumptionCacheTracker in the divrem32 expansion
adds d1f49bb39a2 Fix corruption of result number in LegalizeVectorOps.cpp
adds 8544cc867df Add an option to specify the name of an function whose CFG [...]
adds 4f30db4325f [windows] Don't inline fieldFromInstruction on Windows
adds d844c8fc2cb [SCEV] Add [zs]ext{C,+,x} -> (D + [zs]ext{C-D,+,x})<nuw><ns [...]
adds 999d8967886 [ARM] Prefer lsls+lsrs over lsls+ands or lsrs+ands in Thumb1.
adds 25eb40c0141 [LangRef] Clarify undefined behavior for function attributes.
adds a81fbf2f94c [COFF] Hoist constant pool handling from X86AsmPrinter into [...]
adds f2f6b9cfe05 [COFF] Use comdat shared constants for MinGW as well
adds 4ed456cbf1c Add missing 'override', fixing compilation with some compil [...]
adds 95ba9814e6d Revert r337904: [IPSCCP] Use PredicateInfo to propagate fac [...]
adds fab866fa9c2 [GlobalMerge] Allow merging globals with arbitrary alignment.
adds d73322deb3b [AArch, PowerPC] add more tests for legal rotate ops; NFC
adds 406c0440c5f [LSV] Look through selects for consecutive addresses
adds 2b264247a9d [SelectionDAG] try to convert funnel shift directly to rota [...]
adds 261e479ae9e [GlobalMerge] Handle llvm.compiler.used correctly.
adds 596b78875d4 bpf: new option -bpf-expand-memcpy-in-order to expand memcp [...]
adds 7c767bd7868 [dsymutil] Add support for generating DWARF5 accelerator tables.
adds 327eaad5f0c [DWARF v5] Don't emit multiple DW_AT_rnglists_base attribut [...]
adds 12c27f5b539 [MCA] Avoid an InstrDesc copy in mca::LSUnit::reserve.
adds ee571f2b410 CodeGen: Cleanup regmask construction; NFC
adds b94181c027c InitializePasses: Sort declarations; NFC
adds 663f587f45b CodeGen.cpp: Sort initializers; NFC
adds 3a7b5a66665 RegUsageInfo: Cleanup; NFC
adds 77618f2a517 [LoadStoreVectorizer] Use const reference
adds 7bfb55f7a4d [DWARF v5] Don't report an error when the .debug_rnglists s [...]
adds a145774c76e [GlobalISel] Fall back to SDISel for swifterror/swiftself a [...]
adds f4c9d7c0dc4 [Support] Introduce createStringError helper function
adds cbe902c02cc [X86] Remove some unnecessary explicit calls to DCI.AddToWorkList.
adds aaa4c838e96 Revert r337981: it breaks the debuginfo-tests
adds 00c4d032c89 [Docs] Update of Xray page
adds 1726a8cfd34 [X86] Don't use CombineTo to skip adding new nodes to the D [...]
adds f96e99c4f0d [AsmParser] Fix preserve-comments-crlf.s on FreeBSD
adds 1ba2ba3af88 [ConstProp] Fix calls-math-finite.ll on FreeBSD
adds fcfe10d3d0a [AArch64] Armv8.2-A: add the crypto extensions
adds 7b3bfc8151f [AArch64][NFC] Removed tab characters from test files.
adds 65b1f6fe0ac Allow users of the GCOV API to extend the FileInfo class to [...]
adds 9c2cf1492d7 [test] Do dsymutil update in place
adds a0882e9c6c7 [x86/SLH] Extract the logic to trace predicate state throug [...]
adds 078cc9c528c Revert "[COFF] Use comdat shared constants for MinGW as well"
adds 4f48c840d00 [mips] Sign extend i32 return values on MIPS64
adds 99cfb5c8a74 dwarfgen: Don't create an AsmPrinter with an invalid ObjFil [...]
adds 6678e03e560 Fix raw_fd_ostream::write_impl hang with large output
adds cb0c8af1cb8 Enable some pointer authentication instructions for aarch64 [...]
adds 4dcaa89c887 [test] Disable dsymutil update test on windows
adds bffd929d5b0 dwarfgen: Add support for generating the debug_str_offsets [...]
adds 0b19d8a7b1d [UnJ] Common some code. NFC
adds 6069e66e2ca [ADT] Replace std::isprint by llvm::isPrint.
adds ec700d4f8fc Revert r338027 to pacify build bot
adds 3615fab87ed [DEBUGINFO, NVPTX] Set `DW_AT_frame_base` to `DW_OP_call_fr [...]
adds da3868db1ab [InstCombine] add tests for udiv with common factor; NFC
adds 01c573fe17b [DEBUGINFO, NVPTX] Emit correct debug information for local [...]
adds 24c0aa9af62 [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle [...]
adds 8aa95af9e5c MacroFusion: Fix macro fusion with ExitSU failing in top-do [...]
adds 23f8b780224 [RISCV] Add support for _interrupt attribute
adds ededc9899f1 [InstCombine] fold udiv with common factor from muls with nuw
adds 7531be0d757 [AMDGPU] Fix VGPR spills where offset doesn't fit in 12 bits
adds 3c58d5b196e [MS Demangler] Demangle data member pointers.
adds 1028e2499b5 Handle the lack of a symbol table correctly.
adds 70e518f5234 [MC] Add support for the .rva assembler directive for COFF targets
adds d4bb30eca16 [MS Demangler] Demangle pointers to member functions.
adds 3a62886fee0 Add missing tests from ms-mangle.cpp.
adds eedd47c7f5a [MS Demangler] Add ms-arg-qualifiers.test
adds c2403ba5de8 [MS Demangler] Print calling convention inside parentheses.
adds 081d211981d [DebugInfo] LowerDbgDeclare: Add derefs when handling CallI [...]
adds 8818f00dd61 [RegisterCoalescer] Fixed inconsistent followCopyChain with subreg
adds 235b4df870a ADT: Document advantages of SmallVector<T,0> over std::vector
adds db695a11d79 [SCEV] Add an expandAddToGEP overload for a single operand. NFC.
adds 3cb83a57794 [SCEV] Don't expand Wrap predicate using inttoptr in ni addrspaces
adds c20481951cf [MS Demangler] Properly handle function parameter back-refs.
adds fa36b7f50db Fix -Wsign-compare warning.
adds afc6e834feb [DAGCombiner] Remove some calls to AddToWorklist that shoul [...]
adds c91e9d7b377 [SelectionDAG] Add MLOAD/MSTORE/MGATHER/MSCATTER to AddNode [...]
adds c0e32a59eda [DWARF v5] Reposting r337981, which was reverted in r337997 [...]
adds aeb706baf5a [InstrProf] Use comdats on COFF for available_externally functions
adds 1393b8f6d79 [SelectionDAGBuilder] Add masked loads to PendingLoads rath [...]
adds 8049eb58063 [X86] When removing sign extends from gather/scatter indice [...]
adds 976b9f9f2df [InstCombine] canonicalize abs pattern Differential Revisio [...]
adds ae832cbb544 [X86] Add matching for another pattern of PMADDWD.
adds 01a1fe5ce8b Replace LLVM_ALIGNAS with alignas as a follow-up of r337330
adds 10a832fe97f [LTO] Don't internalize declarations
adds 949469ba7e5 [X86] Remove an unnecessary 'if' that prevented treating IN [...]
adds 6dce5ed08b2 AMDGPU/GlobalISel: Fix crash in regbankselect on non-power- [...]
adds f44aafb1ce1 [NFC] Remove an empty line.
adds 07cbe1baa39 [Docs] Remove hard tab character from code block in optbise [...]
adds 951194fd1c4 [LV][DebugInfo] Set DL to the middle block Icmp instruction
adds 7eb8348d106 [InstSimplify] tests for D48828: fold extraction from std::pair
adds e4b83127155 Revert "[LV][DebugInfo] Set DL to the middle block Icmp ins [...]
adds ffc1a1ca6a1 PatternMatch: Add wrappers for fabs and canonicalize
adds f3b5d6dfcf8 DAG: Remove unnecessary .str()
adds e9c22aa83fd AMDGPU: Fix code size for return_to_epilog pseudo
adds ef4fb1985c1 [Support] Bring std::errc::not_supported to llvm::errc.
adds 9c24b380dc0 [SimplifyIndVar] Canonicalize comparisons to unsigned while [...]
adds 9ac57f95b0b [InstCombine] add tests for not+sub; NFC
adds 4582fbe0624 [InstCombine] not(sub X, Y) --> add (not X), Y
adds cbda3f80430 [CMake] Followup for r337366: Only export LLVM_LINK_LLVM_DY [...]
adds ed46696aff3 [AArch64][SVE] Asm: Support for FRECPE and FRSQRTE.
adds 275c00cc764 [AArch64][SVE] Asm: Support for FEXPA and FTSSEL.
adds 26a258012a9 [AArch64][SVE] Asm: Predicated floating point reductions.
adds e2d5b7575fd [AMDGPU][MC][DOC] Updated AMD GPU assembler description
adds addbabf0a80 [AArch64][SVE] Asm: Predicated integer reductions.
adds 0a1753ac2dd AMDGPU/R600: Add MOV instructions to BFE patterns
adds 13b09222ff2 [Support] Use unsigned char for xxHash 64-bit
adds b9dee6e2c28 [AArch64] add more tests for signbit math; NFC
adds 67980f703ba [PowerPC] add more tests for signbit math; NFC
adds a0c25fcea2b [x86] add more tests for signbit math; NFC
adds 125191a9e0c [DAGCombiner] fold 'not' with signbit math
adds 6f446a56af7 Enable MachineOutliner by default under -Oz for AArch64
adds 767b5de4f4a bpf: add missing RegState to notify MachineInstr verifier n [...]
adds f25070cb8b0 Revert "Enable MachineOutliner by default under -Oz for AArch64"
adds 4d940e78155 [demangler] Support for reference collapsing
adds fac43a31235 [AArch64, PowerPC, x86] add more signbit math tests; NFC
adds dd4e083abf3 [ARM] Add new target feature to fuse literal generation
adds 4ec15997d0a [MachineOutliner] Exit getOutliningCandidateInfo when we er [...]
adds c9159350aee [AArch64, PowerPC, x86] add more signbit math tests; NFC
adds ea66136bc88 [SLC] Test simplification of pow(x, 0.333...) to cbrt(x) (NFC)
adds 8ab74e6b402 [InstCombine] [NFC] [Tests] Fold Select with AND/OR condition
adds 031332e7888 Recommit "Enable MachineOutliner by default under -Oz for AArch64"
adds 4cca12faa69 [InstCombine] [NFC] [Tests] Fold Select with AND/OR conditi [...]
adds cc0c5b9ce0d [WebAssembly] Added default stack-only instruction mode for MC.
adds b6a0f6b8e00 [InstrProf] Don't register __llvm_profile_runtime_user
adds 2ccd4fbdb9c [llvm-objcopy] Make --strip-debug strip .zdebug* (zlib-gnu) [...]
adds 7d3adcd95a0 [X86] Add support expanding multiplies by constant where th [...]
adds 134080471cd [Support] Remove unnecessary MemoryBuffer::anchor (where th [...]
adds bbe055241a2 Revert "[WebAssembly] Added default stack-only instruction [...]
adds e593ad899af [SimpleLoopUnswitch] Fix DT updates for trivial branch unsw [...]
adds fefdba1e17f [DAGCombiner] Teach DAG combiner that A-(B-C) can be folded [...]
adds 17313457855 [docs] Clarify role of DIExpressions within debug intrinsics
adds e061215a7e5 [Dominators] Make applyUpdate's documentation less confusing [NFC]
adds 840922e2b4a [demangler] Fix an oss-fuzz bug from r338138
adds cf073c23aa2 [InstCombine] Fold Select with AND/OR condition
adds d38f49543ed [GlobalOpt] Test array indices inside structs for out-of-bo [...]
adds 3d794576ede AMDGPU: Stop trying to extend arguments for clover
adds f02d879e99f DAG: Add calling convention argument to calling convention funcs
adds 6f476979f90 [InstSimplify] Moved Select + AND/OR tests from InstCombine
adds 8a22271900d [AArch64][SVE] Asm: Data-dependent loop predicate partition [...]
adds c358be353a3 AMDGPU: Stop wasting argument registers with v3i32/v3f32
adds 234c23e0a02 [AArch64][SVE] Asm: Support for PFALSE and PTEST instructions.
adds bd68890e8f0 [InstCombine] try to fold 'sub' to 'not'
adds 8a20db36739 [InstCombine] Tests for fold Select with binary op
adds 52b10b8b07e Add VS natvis support for LLVMDemangle's StringView.
adds b03e51dff43 [X86] Use alignTo and divideCeil to make some code more rea [...]
adds e192af49a17 [X86] Correct the immediate cost for 'add/sub i64 %x, 0x80000000'.
adds acb4985d700 [SelectionDAG] Pass std::vector by reference instead of by [...]
adds 789dd7b8055 Fix crash on inline asm with 64bit matching input in 32bit GPR
adds 71650da2ad2 [MS Demangler] Refactor some of the name parsing code.
adds 32d3bbcc6c7 [AArch64][SVE] Asm: Instructions to perform serialized operations.
adds 11c523d2b15 [AArch64][SVE] Asm: Support for WHILE(LE|LO|LS|LT) instructions.
adds ebd090bd41e [AVR] Re-enable expansion of ADDE/ADDC/SUBE/SUBC in ISel
adds 04eda8fb6f1 revert r338206 because the test does not pass
adds 769bf94359c [InstSimplify] refactor intrinsic simplifications; NFCI
adds 58d4a39f630 [dsymutil] Simplify temporary file handling.
adds c817c924d52 [InstSimplify] add tests for funnel shift intrinsics; NFC
adds 5c9b7b9b828 [InstSimplify] fold funnel shifts with 0-shift amount
adds 866b9e6fe19 [MS Demangler] NFC - Remove state from Demangler class.
adds 02b53da6b65 [InstCombine] add tests for another sub-not variant; NFC
adds 19a2e2a495f [InstCombine] try to fold 'add+sub' to 'not+add'
adds 28b397746c3 [DAGCombiner] Remove unnecessary calls to AddToWorklist.
adds c84f7e82fc4 [MS Demangler] Demangle symbols in function scopes.
adds 5240109d473 Try to fix build.
adds ef9e348db2a [NFC] Prepare GuardWidening for widening of cond branches
adds ec18b801a33 [RegisterScavenger] Fix debug print
adds dc8a4c5d74e [ARM] Fix over-alignment in arguments that are HA of 128-bi [...]
adds bfada8913e3 AMDGPU: Force skip over s_sendmsg and exp instructions
adds 6476cb62059 Revert "[X86] Correct the immediate cost for 'add/sub i64 % [...]
adds 8c6201cde53 [MachineOutliner][X86] Use TAILJMPd64 instead of JMP_1 for [...]
adds 7ca84ad7ea6 [GVNHoist] Re-enable GVNHoist by default
adds df2b9399fe9 [BasicAA] Use PhiValuesAnalysis if available when handling [...]
adds 86dcb58e5df AMDGPU: Make fneg combine handle fcanonicalize
adds 78e0f474878 AMDGPU: Reduce code size with fcanonicalize (fneg x)
adds 86e834abd60 Adjust opt pass pipeline tests to cope with combination of [...]
adds 2618edfa4ca [Hexagon] Simplify A4_rcmp[n]eqi R, 0
adds aee71c080d5 [doc] Fix Getting Started typo.
adds b8b1cb30e78 [InstCombine] [NFC] Added tests for Select with binop fold
adds c80d03aba54 [AArch64][SVE] Asm: Add MOVPRFX instructions.
adds d0973b1cc35 [AArch64][SVE] Asm: Enable instructions to be prefixed.
adds 8a876198f4a [X86] Regenerate fast-isel tests.
adds cd2281d9372 [X86] Regenerate PKU test to merge 32/64-bit rdpkru checks
adds 68c3d4fad41 [X86] Regenerate NOBMI/BMI combine-select tests.
adds fb73e7ba915 [SLC] Refactor the simplication of pow() (NFC)
adds 1453140bcb1 Attempt to fix Windows test failure caused by r338133
adds 690afef84f0 Fix uninitialized read in ARM's PrintAsmOperand
adds 005ad0240a6 Reapply "Fix crash on inline asm with 64bit matching input [...]
adds 44dc58d645c [DAGCombiner] Bug 31275- Extract a shift from a constant mu [...]
adds e1239522278 Add machine verifier to arm64-opt-remarks-lazy-bfi
adds 63006f4c992 Recommit r338204 "[X86] Correct the immediate cost for 'add [...]
adds 45a1b043b06 [X86] Fix typo in comment. NFC
adds 54b04a891a5 [MachineOutliner][AArch64] Add support for saving LR to a register
adds 7e678dc65bb [InstSimplify] [NFC] Tests for Select with AND/OR fold
adds b22576f80da [Inline] Copy "null-pointer-is-valid" attribute in caller.
adds af7b1832a03 Remove trailing space
adds aec199b9d76 Revert "[GVNHoist] Re-enable GVNHoist by default"
adds 3e5ff188671 Revert r338222 "[DAGCombiner] Remove unnecessary calls to A [...]
adds a5603d18b0a [InstCombine] Fold Select with binary op
adds f264341a831 [DAGCombiner][PowerPC][AArch64] Pass Created vector by refe [...]
adds e9f23bb5b17 [TargetLowering] In BuildSDIV, add the MULHS/SMUL_LOHI to t [...]
adds 865d24fcb44 [ORC] Add SerializationTraits for std::set and std::map.
adds 1715f28483f This fixes a crash when a second pass is required for the C [...]
adds 00f1a051eff [VPlan] Introduce VPlan-based dominator analysis.
adds 648b708c20e [DAGCombiner] transform sub-of-shifted-signbit to add
adds d08e6c74a6f [llvm-mca][docs] Add instruction flow documentation. NFC.
adds ef4200131b9 [MS Demangler] Add rudimentary C++11 Support
adds 4a5776cc933 [DAGCombiner][TargetLowering] Pass a SmallVector instead of [...]
adds cbb0dfe533d [MS Demangler] Add ms-return-qualifiers.test.
adds be764dbd779 [GlobalISel] Add a G_BLOCK_ADDR opcode to handle IR blockad [...]
adds 58ce02a3b60 [AArch64][GlobalISel] Make G_BLOCK_ADDR legal.
adds a422671937f [AArch64][GlobalISel] Add isel support for G_BLOCK_ADDR.
adds e558f30bfb2 [MS Demangler] Better demangling of template arguments.
adds f7d1ac1d98f [RISCV] Fixed test case failure due to r338047
adds 816cd634769 [X86] Stop accidentally running the Bonnell LEA fixup path [...]
adds 41daa756aa8 Revert r338340 "[MS Demangler] Better demangling of templat [...]
adds b2970fad9bf [VPlan] Introduce VPLoopInfo analysis.
adds 8b661d1f712 [NFC] Collect statistics in GuardWidening
adds 24f705031bf [InstSimplify] tests for D48828, D49981: fold extraction fr [...]
adds 9325cc92edd [InstSimplify] tests for D48828, D49981: fold extraction fr [...]
adds d8319b3d669 Test commit.
adds a52192cab50 [ARM] Revert r337821
adds 90e3e8259bc [AArch64] Support the .inst directive for MachO and COFF targets
adds 4c60168fd23 [ARM] Support the .inst directive for MachO and COFF targets
adds c5db03f3384 [ARM] Allow automatically deducing the thumb instruction si [...]
adds 05daff0b996 [X86][SSE] isFNEG - Use getTargetConstantBitsFromNode to ha [...]
adds b2deef92d96 [X86] Improved sched models for X86 SHLD/SHRD* instructions [...]
adds f8c29cb84b8 [InstCombine] move/add tests for xor+add fold; NFC
adds b80d74e072c [X86] Improved sched models for X86 BT*rr instructions. htt [...]
adds 44442fbe1a2 [InstCombine] simplify code for A & (A ^ B) --> A & ~B
adds 6108c027cf8 [SystemZ] Improve decoding in case of instructions with fou [...]
adds 947573c21d9 Revert r338365: [X86] Improved sched models for X86 BT*rr i [...]
adds 0915eb50a32 [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags
adds e4002873382 [llvm-mca][BtVer2] Teach how to identify dependency-breakin [...]
adds 07f371fc510 [ARM] Complete enumeration values for Tag_ABI_VFP_args
adds 8d00765ed12 AMDGPU: Fix test check line bugs
adds 8f44f41e0f3 AMDGPU: Fold undef fcanonicalize to qNaN
adds 1ae9ed698a7 [SLP] Fix PR38339: Instruction does not dominate all uses!
adds 55c7db8b2ea AMDGPU: Don't handle FP16_TO_FP in isCanonicalized
adds 48e2f473006 DAG: Fix PromoteFloatResult for fcanonicalize
adds f241788fa53 [InstSimplify] Fold another Select with And/Or pattern
adds 9e1f67df4fc [MemDep] Use PhiValuesAnalysis to improve alias analysis results
adds 8838d03a84a [llvm-mca] Remove README.txt
adds 99862d39d7c Enrich inline messages
adds 07836bef1a3 [InstCombine] auto-generate checks; NFC
adds 757fc2f38e7 Revert Enrich inline messages
adds f03f9e8cd4d [DebugInfo] Generate DWARF debug information for labels.
adds c22c96db495 [DebugInfo][LCSSA] Preserve debug location in lcssa phis
adds d3bdf1f29b6 [InstCombine] regenerate checks and add tests for D50035; NFC
adds c49e38382fc [llvm-mca][docs] Always use `llvm-mca` in place of `MCA`.
adds d9904414c21 Fix InstCombine address space assert
adds 8f61a2ac041 [Dominators] Make slow walks shorter
adds 7eb35db2b9b [DebugInfo] Fix build failed in 'clang-cmake-armv8-full'.
adds 150fbb2f391 [X86] Preserve more liveness information in emitStackProbeInline
adds f8da0e7688c [X86] Add test cases that could use PMADDUBSW.
adds bc59a99d64a [X86] Add pattern matching for PMADDUBSW
adds b4a81ed64e5 Resubmit r338340 "[MS Demangler] Better demangling of templ [...]
adds 09bfc1d89e1 [llvm-mca][x86] Add 32-bit instruction resource tests
adds 2c3c78e685e Make ICF log output order deterministic.
adds 31004d79ff2 [X86][SSE] Use ISD::MULHU for constant/non-zero ISD::SRL lo [...]
adds bee8996fbdf Revert "[DebugInfo] Generate DWARF debug information for labels."
adds c122af5f3b2 [llvm-mca][docs] Improve the "How LLVM-MCA works" section.
adds efe67ede2a4 [X86] WriteBSWAP sched classes are reg-reg only.
adds 8073c6502e4 [llvm-mca][docs] Replace "temporary" with "physical registe [...]
adds 0a67b1c905b AMDGPU: Scalarize vector argument types to calls
adds a7336f29220 [CodeView] Minimal support for S_UNAMESPACE records
adds b9d99ce19e4 AMDGPU: Split wide vectors of i16/f16 into 32-bit regs on calls
adds 4b6157df8bf AMDGPU: Break 64-bit arguments into 32-bit pieces
adds 613bccbc84d [CodeView] Add coverage test for r338308 (Fixed crash in ty [...]
adds e946b0193e9 DAG: Correct pointer type used for stack slot
adds df2a6d7985c [SystemZ] Fix bad assert composition.
adds 99802f3deb0 [llvm-mca] Update the help text to reflect "physical" regis [...]
adds 2f227c480af Add DebugCounters to DivRemPairs
adds fa5ec153c2d AMDGPU: Split amdgcn/r600 fminnum/fmaxnum tests
adds 7cef9e8fc8a [DWARF] Do not create a .debug_ranges section when no range [...]
adds 0da00372337 Revert r338431: "Add DebugCounters to DivRemPairs"
adds 402cad06199 [llvm-objcopy] Make --strip-debug strip .gdb_index
adds 1c247de5eec [SLC] Refactor the simplication of pow() (NFC)
adds 9a8677da0d7 [DWARF] Support for .debug_addr (consumer)
adds fc3a3b78d41 [WebAssembly] Fix debug info tests after r338437.
adds 1fa19f68007 Revert r338354 "[ARM] Revert r337821"
adds 6baa465afec [PATCH] [SLC] Test simplification of pow() for vector types (NFC)
adds a3904966ff8 [MachineOutliner] Clean up subtarget handling.
adds bf9b77d2fac Tidy up logic around unique section name creation and remov [...]
adds 5311a6ea832 Simplify selectELFSectionForGlobal by pulling out the entry [...]
adds b47f061f5bb AMDGPU: Add clamp bit to dot intrinsics
adds 59a658d8e21 [GlobalISel][IRTranslator] Use RPO traversal when visiting [...]
adds 2bdc8dd491b [DebugInfo] Generate fixups as emitting DWARF .debug_line.
adds 2dead59c8f0 [x86/slh] Add unwind info to several tests to make it more [...]
adds 2671ee17f9d [x86] Fix a really subtle miscompile due to a somewhat glar [...]
adds 3472a740824 [X86] Adding more test patterns for lea-opt (PR37939)
adds c8a8300f9ab [DebugInfo] Fix build failed in clang-x86_64-linux-selfhost [...]
adds d967b3d2e7f [InstSimplify] fold extracting from std::pair (1/2)
adds 6f455447cbb [DWARF] Basic support for producing DWARFv5 .debug_addr section
adds a79cc075efb [X86] When looking for (CMOV C-1, (ADD (CTTZ X), C), (X != [...]
adds 4e7dc16e1cf [AArch64] Disallow the MachO specific .loh directive for windows
adds 788bdbbd5c9 Enrich inline messages
adds f0efa56f804 Add llvm-rc to LLVM_TOOLCHAIN_TOOLS (PR38386)
adds 8e70a95cbce Revert "Enrich inline messages", tests fail
adds f4bd4b26895 [MIPS GlobalISel] Select global address
adds 86e18055e60 [DebugInfo] Have custom std::reverse_iterator<DWARFDie>
adds 3afffc7790f [X86] Improved sched models for X86 BT*rr instructions. Dif [...]
adds 4bd72473d80 [DebugInfo] Improve consistency in DWARFDie.h (NFC)
adds 122a371c30a [DebugInfo] Remove ambiguity to fix Windows bots
adds 7dce6b6631c [llvm-mca] Improve code comments. NFC.
adds f09d159b577 [llvm-mca][x86] Add STC + STD instruction resource tests
adds c6fbe17b987 [X86] Use isNullConstant helper. NFCI.
adds afca5c23cfc [SystemZ, TableGen] Fix shift count handling
adds 185957447e5 Fix build bot after r338521
adds a9d3893accd [AMDGPU] Optimize _L image intrinsic to _LZ when lod is zero
adds 6c7ea834f85 [MC] Report fatal error for DWARF types for non-ELF object files
adds caa9b8f4ab1 Fix "not all control paths return a value" MSVC warning.
adds 41514bcef96 [X86] Use isNullConstant helper. NFCI.
adds c690a0177e3 [llvm-mca][x86] Add CMPS/LODS/MOVS/STOS string instruction [...]
adds 3289ee65825 [dsymutil] Convert recursion in lookForDIEsToKeep into worklist.
adds 57bb7d2d705 Bump the trunk version to 8.0.0svn
adds 0dcbff2f349 [llvm-mca][x86] Add CLFLUSHOPT instruction resource tests
adds 83c5e86709e [AArch64] Fix FCCMP with FP16 operands
adds e17bf017767 Clear release notes and update version
adds 682f0ada213 [FPEnv] Widen illegal width StrictFP vector operations as needed
adds a18a727cde1 [llvm-mca][x86] Add more x86-64 system instruction resource tests
adds 97a41801565 [llvm-mca][x86] Add LEA instruction resource tests
adds 9a071608670 [llvm-exegesis] Provide a way to handle memory instructions.
adds 6260bdfbb97 [ARM] Armv8.2-A FP16 vector intrinsics tests
adds 9aed24e38ae AMDGPU: Allow fp32-denormals feature for r600 targets
adds 7e1cf4b0c45 [llvm-mca][x86] Add SET/TEST instruction resource tests
adds 9e6a27fb0cb [llvm-mca] Correctly update the rank in `Scheduler::select()`.
adds 742c679d08b [llvm-objcopy] Add support for --rename-section flags from [...]
adds 08b4b50725a [llvm-mca][x86] Add PCLMUL instruction resource tests
adds 4619b05f78c [llvm-mca][x86] Add PREFETCHW instruction resource tests
adds dc21a6f3288 [NFC][FunctionAttrs] Remove duplication in old/new PM pipeline
adds a2d22f73a3f [SelectionDAG] Make binop reduction matcher available to al [...]
adds 887eb8d03ab [x86] add tests to show miscompile for funnel shift with we [...]
adds 8fe02fad970 [SelectionDAG] fix bug in translating funnel shift with non [...]
adds 1bf2ea0a053 [x86] remove stale FIXME note from test; NFC
adds 17a47fdd425 [llvm-mca][x86] Add CMPXCHG instruction resource tests
adds 41983c4c676 [X86] Assign from a brace initializer to match style guide. NFCI.
adds 48d710e2cb4 [X86] FastISel fall back on !absolute_symbol GVs
adds a227166d0e1 [NFC] small addendum to r334242, FMF propagation
adds 68d8e287995 [MS Demangler] Don't crash as often when demangling.
adds 5999ebb85cc [MS Demangler] Properly demangle templated operators.
adds 39fff696974 [llvm-undname Add an option to dump back references.
adds bf6429d608c AMDGPU/R600: Convert kernel param loads to use PARAM_I_ADDRESS
adds 6bc30a81e71 [X86] Add test cases for the patterns used by __builtin_ffs.
adds 89d0eefc17e [X86] Canonicalize the pattern for __builtin_ffs in a simil [...]
adds 0d49c36e8db Try to fix FreeBSD build.
adds 83de8211787 [DEBUGINFO] Disable emission of the dwarf sections, but all [...]
adds 81f99ce8f5a [WebAssembly] Support for a ternary atomic RMW instruction
adds 6446fcd61ad AMDGPU: Partially fix handling of packed amdgpu_ps arguments
adds 7943061ff9b AMDGPU: Improve hack for packing conversion ops
adds 55a0ed21cd4 [DebugInfo/DWARF] [1/4] De-templatize DWARFUnitSection. NFC
adds 2b9857ed4fb [DebugInfo/DWARF] [2/4] Type units no longer in a std::deque. NFC
adds bc7a6422c5d AMDGPU: Use SPseudoInst helper
adds 72eb9b0a58f [DebugInfo/DWARF] [3/4] Rename DWARFUnitSection to DWARFUni [...]
adds a42866d162e [DebugInfo/DWARF] [4/4] Unify handling of compile and type [...]
adds de10da00241 [llvm-objcopy] Add missing -I command line flag alias for - [...]
adds 27222373998 [ORC] Add a 'Callable' flag to JITSymbolFlags.
adds 0318cbc235d [ASAN] Use the correct shadow offset for ASAN on FreeBSD/mips64.
adds 886a8633738 Load from the GOT for external symbols in the large, PIC co [...]
adds 5ea9eaae861 [InstSimplify] move minnum/maxnum with same arg fold from i [...]
adds baed6422b25 Reland r338431: "Add DebugCounters to DivRemPairs"
adds 4dbc3320660 Add maybe-unused attribute to a variable.
adds 6b6a4ee7d77 [AArch64] DWARF: do not generate AT_location for thread local
adds 121bd57dbe0 [PowerPC] Do not round values prior to converting to integer
adds 1c8763a4dce [ADT] Add some documentation for GraphTraits.
adds 4f8fe653608 [LICM] hoisting/sinking legality - bail early for unsupport [...]
adds b4d32d09c57 Fix FCOPYSIGN expansion
adds 218719c51e6 [LICM] Expand tests to highlight an oddity in sinking imple [...]
adds b41c2e390dc [LICM] Factor out fault legality from canHoistOrSinkInst [NFC]
adds e815ef97079 Test commit.
adds 6e63f1c5224 [AArch64] Add support for got relocated LDR's
adds f166ea7ca2d [UnJ] Add debug messages for why loops are not unrolled. NFC
adds c6ba19258a5 lit: bump version number
adds b30285c9707 utils/release/tag.sh: add debuginfo-tests to project list
adds 8c575a1c2ec [GlobalISel] Rewrite CallLowering::lowerReturn to accept mu [...]
adds 47b593936e4 [emacs] Indent statement continuation to match clang-format
adds 9808d690618 [GlobalISel] Fix typo with missed override specifier
adds 87ee9baa74a [X86][SSE] Pull out duplicate VSELECT to shuffle mask code. NFCI.
adds 4d0538ee448 Add include guard
adds 7cb2547b5f8 [X86][SSE] Add more UDIV nonuniform-constant vector tests
adds a9ba7266d45 [llvm-exegesis] Rename InstructionInstance into Instruction [...]
adds a86b69635fd [llvm-mca] Use a vector to store ResourceState objects in t [...]
adds 2153e58d865 [llvm-ar] Correct help text
adds bd8ff3504a8 [llvm-ar] Fix help text test. NFC.
adds c9baad19d31 AMDGPU: Fix scalarizing v4f16 fcanonicalize
adds 2920ef78158 DAG: Fix vector widening fcanonicalize
adds fd0862123da [ValueTracking] fix maxnum miscompile for cannotBeOrderedLe [...]
adds 5907e1ea986 [ARM][NFC] Follow up of r338568
adds e1c9b76cd3d [InstSimplify] move minnum/maxnum with undef fold from instcombine
adds 24c4936dc05 [InstCombine] [NFC] Tests for select with binop fold
adds 79b60e464bf [X86][SSE] Add uniform/non-uniform exact sdiv vector tests [...]
adds 00c90457120 [SLC] Refactor simplification of pow() (NFC)
adds 9cb26abb0fb [X86] Allow fake unary unpckhpd and movhlps to be commuted [...]
adds f58835b3b61 [MS Demangler] Resolve back-references lazily.
adds c6b30d1f129 Use %.*s instead of %*s when formatting strings with explic [...]
adds 7de6a1524c2 Fix a couple of warnings.
adds fb1454729e4 Update the LLVM VS integration to sign the assembly.
adds 2eed0509599 Fix one more warning.
adds 63fe07e426a [WebAssembly] Ensure bitcasts that would result in invalid [...]
adds 15bc9858adf [Support] fix TempFile infinite loop and permission denied errors
adds 7811a54d576 [itanium demangler] Support dot suffixes on block invocatio [...]
adds 0380d77b497 CMake: Remove LLVM_DYLIB_SYMBOL_VERSIONING
adds 4aec14e3f66 [NFC] clang-format cleanup of a couple files in llvm-objcopy.
adds 710aab8e4fe [Support] [NFC] change comment about retries in createUniqueEntity
adds 5c1bd30b863 [SCEV] Properly solve quadratic equations
adds ddedb75c1d0 [DebugInfo/DWARF] Remove redundant iterator type. NFC
adds 40eb37919a1 Unbreak build after r338758: specify lambda return type explicitly
adds fbf5dde96bf [Support] Add an enable bit to our DebugCounters
adds e3f12bdc7ba [ORC] Add a re-exports fallback definition generator.
adds df48071db73 [X86] Autogenerate complete checks. NFC
adds 913533ec00b [Unittests] Fix returning string in SolveQuadraticEquationWrap
adds 0ac578037cc [WebAssembly] Support for atomic.wait / atomic.wake instructions
adds 0b5d0cfa8e5 [Hexagon] Simplify CFG after atomic expansion
adds f1aa92e7028 [MS Demangler] Fix some tests that are no longer broken.
adds 5e96e38d965 [AMDGPU] Avoid using divergent value in mubuf addr64 descriptor
adds fe4807d1761 [X86] Add NEG and NOT test cases to atomic_mi.ll in prepara [...]
adds 0c927928e41 [X86] Allow 'atomic_store (neg/not atomic_load)' to isel to [...]
adds 79905333cdf [AMDGPU] Reworked SIFixWWMLiveness
adds 25b58860e76 [AMDGPU] Minor change to d16 buffer load implementation
adds f4a5ef1f003 [GlobalMerge] Allow merging globals with explicit section m [...]
adds 58b1de483d3 objdump: Better handling of Mach-O universal binaries
adds fb8aeadb5e5 [LICM] Remove unneccessary safety check to increase sinking [...]
adds ee462eee339 [X86] Prevent promotion of i16 add/sub/and/or/xor to i32 if [...]
adds f24d85d9be1 [X86] Autogenerate complete checks. NFC
adds 1435ef31d85 [X86] Autogenerate complete checks. NFC
adds bf116bb82d0 [X86] Add R13D to the isInefficientLEAReg in FixupLEAs.
adds f5ce968e81e [X86] Autogenerate complete checks. NFC
adds be1098c24b9 [X86] When post-processing the DAG to remove zero extending [...]
adds 18e311ebbb7 [Dominators] Convert existing passes and utils to use the D [...]
adds ebab95406fe [InstSimplify] fold extracting from std::pair (2/2)
adds 91fa1be82c2 [X86] Support fp128 and/or/xor/load/store with VEX and EVEX [...]
adds a9028ca1b43 [Dominators] Refine the logic of recalculate() in the DomTr [...]
adds 1e182a91377 build_llvm_package.bat: Add OpenMP back
adds 92ac75817fa [X86] Remove all the vector NOP bitcast patterns. Use a few [...]
adds ea39027a818 [XRay][llvm] Load XRay Profiles
adds 1760333a4bc [XRay] Fixup: remove 'noexcept' in defaulted move members
adds afa9b4c739d [XRay] fixup: Add missing std::move(...)
adds c45dda4fda4 [XRay] fixup: add one more missing std::move(...)
adds 0c1e01d11aa [ARM] FP16: support VFMA
adds f1843f8e41d [X86] Add example of 'zero shift' guards on rotation patter [...]
adds 93e0d05b71d [XRay][tools] Use Support/JSON.h in llvm-xray convert
adds 33493244220 [ARM] FP16: support vector zip and unzip
adds 80d3cc7363b [llvm-exegesis] Renaming classes and functions.
adds 5bf23c0ee01 [TargetLowering] Generalise BuildSDIV function
adds 8602af619ee [Windows FS] Allow moving files in TempFile::keep
adds 00ccfbc5889 [NFC] Move some methods into static functions
adds 8d89c08c5ba [NFC] Add missing comment
adds b49e61777a7 [SystemZ] Improve handling of instructions which expand to [...]
adds 73b8421aafd [DebugInfo/Verifier] Don't emit error for missing module in index
adds 3a8b61c1b61 convert some tabs to spaces
adds 614e6127d2f [llvm-mca][docs] Improve the CommandLine documentation.
adds 1a16c79be03 [Dominators] Make RemoveUnreachableBlocks return false if t [...]
adds d6b95e9be38 [llvm-mca] Speed up the computation of the wait/ready/issue [...]
adds 54c1354d1ea [WebAssembly] Cleanup of the way globals and global flags a [...]
adds 5e1d4374735 [Partial Inlining] Fix small bug in detecting if we did something
adds a02557d1b8e [X86] Fix line endings.
adds dfa0460a549 [llvm-mca][docs] Move the code marker text into its own sub [...]
adds 1a17324d819 Fix crash in bounds checking.
adds 8ef7ef81f78 [SLC] Refactor shrinking of functions (NFC)
adds e60d78fd125 [X86] Add test cases for the current codegen of __builtin_parity.
adds 8d1ce331584 [X86] Add a DAG combine for the __builtin_parity idiom used [...]
adds 9f9755d867f [NVPTX] Handle __nvvm_reflect("__CUDA_ARCH").
adds 7166ee595d5 DAG: Enhance isKnownNeverNaN
adds bb272977e85 [Support] Don't initialize compressed buffer allocated by z [...]
adds 027b97fe0ac [SelectionDAG] Teach LegalizeVectorTypes to widen the mask [...]
adds f8fba9029f6 [TRE][DebugInfo] Preserve Debug Location in new branch instruction
adds b37b5c5bb2e [X86] Autogenerate complete checks. NFC
adds 91f64a0abdd [X86] Remove RELEASE_ and ACQUIRE_ pseudo instructions. Use [...]
adds a845a92bfa7 [X86] Layout tests exactly as update_llc_test_checks.py would
adds db7ed853528 [X86] Make abi-isel.ll like update_llc_test_checks.py output
adds c2be4a7cdda [X86] Re-generate abi-isel.ll checks with update_llc_test_c [...]
adds 592e45f05e2 [X86] Add test cases to show missed opportunity to use RMW [...]
adds a5b8d5a2e75 [X86] Add isel patterns for atomic_load+sub+atomic_sub.
adds 1090c4ba259 Use the same constants as zlib to represent compression level.
adds ec2a7945782 Fix buildbot breakage.
adds a347456a98f [GISel]: Add Opcodes for CTLZ/CTTZ/CTPOP
adds 8d82395b2d2 Reverted r338825 and all the following tries to fix issues [...]
adds 134b06ddd01 [ADCE] Remove the need of DomTree
adds 18aa36fa4fc [llvm-objdump] Remove continue after report_error which is [...]
adds 30fa583f843 [TailCallElim] Preserve DT and PDT
adds b2e68027e06 [ADT] Add an early-increment iterator-like type and range adaptor.
adds f7da01387d0 [InstCombine] [NFC] Tests for strcmp to memcmp transformation
adds f6904f8484b [X86] Remove stale comments from a test. NFC
adds 02c1957ea82 [NFC][InstCombine] Regenerate set.ll test
adds fd7de2bbcf3 [NFC][InstCombine] Add tests for sinking 'not' into 'xor' ( [...]
adds 6dac043f8ce Revert "Add a warning if someone attempts to add extra sect [...]
adds 88ab6705571 Enrich inline messages
adds d4945d6147c [NFC] Fixed inliner tests
adds 40868d43719 [NFC] Fixed inliner tests - 2
adds 9a3ece15dd3 [ORC] Change JITSymbolFlags debug output, add a function fo [...]
adds c64ea65b564 [ORC] Remove an incorrect use of 'cantFail'.
adds d78e43427f4 [docs] Reinstate r337730 - Add support for Markdown documen [...]
adds c0cb45a2cf1 [docs] Turn of `nasm` highlighting for a code block.
adds 7290db8e11c [docs] Fix an LLVM-syntax code block to actually be valid L [...]
adds 4c31db3adf7 [docs] Remove an example that isn't well formed LLVM IR and [...]
adds 512e317975b [docs] Correct the basic syntax structure of the DISubrange [...]
adds 63c6deda4e5 [docs] Switch debug info metadata blocks to use `text` inst [...]
adds cb6242dabbc [DebugInfo] Refactor DbgInfoIntrinsic class hierarchy.
adds e3fd2cc5fea [NFC] Fixed unused function warning
adds 5158029c058 [NFC] Fix typo
adds a1706269a05 [GuardWidening] Widen guards with conditions of frequently [...]
adds b71ba51d81f [ValueTracking] Teach isKnownNonNullFromDominatingCondition [...]
adds d9c4e386780 Try to fix buildbot
adds 376c0870719 Revert rL338990 to see if it causes sanitizer failures
adds 86b1509b594 [docs] Stop trying to parse the ThinLTO summary IR fragment [...]
adds f6ba2bc74ba [docs] Remove the `dso_local` tag from these functions.
adds 084fdcc27e8 [docs] Continue working around broken Sphinx parsing of LLV [...]
adds 1aa1d5cfe7c Re-enable "[ValueTracking] Teach isKnownNonNullFromDominati [...]
adds c7a69f138e2 ARM-MachO: don't add Thumb bit for addend to non-external r [...]
adds 06ef1791538 Fix modules build with different technique to suppress Knut [...]
adds fe95ff1e0b1 [AArch64] Fix assertion failure on widened f16 BUILD_VECTOR
adds 2813b7a46da [NFC] Fixed unused function warning
adds 5b20e129cf9 Revert unused function fix
adds 5edce4ca15d [NFC] Fixed unused function warnings
adds c3263d7deef AMDGPU: Rename check prefixes in test
adds 4e1ab5cbfb6 ValueTracking: Handle canonicalize in CannotBeNegativeZero
adds 273374717eb AMDGPU: Fold v_lshl_or_b32 with 0 src0
adds 5b8a7e263c1 Fix raw_fd_ostream::write_impl hang due to an infinite loop [...]
adds 62f717097f0 Fix typo in the MSVC Visualizer for SmallVector class
adds 5312a9b038b [RegisterCoalescer] Delay live interval update work until t [...]
adds 87986de4303 [X86] Add test cases to show bad use of "and $0" and "orl $ [...]
adds beea2e2b69d [X86] When using "and $0" and "orl $-1" to store 0 and -1 f [...]
adds 0b1717033ef [X86] Recognize a splat of negate in isFNEG
adds fabcc790fc0 [llvm-pdbutil] Support PDBs without a DBI stream
adds f064d04716a [SLC] Fix shrinking of pow()
adds 9f5cab6fbe5 [LICM] Add tests highlighting missing hoists for intrinsics [NFC]
adds 5c412ae2f6a [X86] Fix assertion in subreg extraction
adds 63e7c725f46 [LICM] Strengthen invariant.start hoisting tests [NFC]
adds 7ac42ca6410 Fix a -Wsign-compare
adds f0fa788ac74 AMDGPU: Fix implementation of isCanonicalized
adds 13888fd13af [LICM] Further strengthen tests for hoisting guards and inv [...]
adds a0ad7973811 AMDGPU: Conversions always produce canonical results
adds f583815bba9 AMDGPU: Treat more custom operations as canonicalizing
adds f06afc396f5 MC: Redirect .addrsig directives referring to private (.L) [...]
adds 418492e425f [LICM] Extract a helper function for readability [NFC]
adds 2a710f9b488 AMDGPU: Refactor fcanonicalize combine
adds a8868c6067a AMDGPU: Push fcanonicalize through partially constant build_vector
adds a27199db06e [lit, python] Always add quotes around the python path in lit
adds 6ae1bfa7a50 AMDGPU: Handle some vector operations in isCanonicalized
adds f966a408531 AMDGPU: cvt_pk_rtz_f16 canonicalizes
adds 7e13b7e2965 [WebAssembly] Replace SIMD expression types with V128
adds 3e2cfa03da4 [WebAssembly] Enable atomic expansion for unsupported atomicrmws
adds bc569e6512c [NFC] Factor out implicit control flow logic from GVN
adds ca626b31973 [lit, tests] Fix failing lit test: shtest-format.py
adds 300176c132f [XRay] Improve error reporting when loading traces
adds a4b4e86ad88 [SelectionDAG][X86] Rename getValue to getPassThru for gath [...]
adds a6d27860a53 [SelectionDAG][X86] Rename MaskedLoadSDNode::getSrc0 to get [...]
adds faf46314a8e AMDGPU: Add feature vi-insts
new 7b79106af28 FileCheck: Add support for variable expressions
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Summary of changes:
CMakeLists.txt | 24 +-
cmake/modules/AddLLVM.cmake | 30 +
cmake/modules/CMakeLists.txt | 6 +
cmake/modules/HandleLLVMOptions.cmake | 17 +-
cmake/modules/LLVMConfig.cmake.in | 2 +
cmake/modules/LLVMExternalProjectUtils.cmake | 2 +-
cmake/platforms/iOS.cmake | 20 +
docs/AMDGPUAsmGFX7.rst | 6 +
docs/AMDGPUAsmGFX8.rst | 12 +
docs/AMDGPUAsmGFX9.rst | 117 +-
docs/AMDGPUOperandSyntax.rst | 38 +-
docs/AMDGPUUsage.rst | 2 +-
docs/CFIVerify.rst | 4 +-
docs/CMake.rst | 3 +
docs/CommandGuide/FileCheck.rst | 110 +-
docs/CommandGuide/llvm-cov.rst | 4 +-
docs/CommandGuide/llvm-mca.rst | 614 +-
docs/CommandGuide/tblgen.rst | 5 +
docs/Extensions.rst | 30 +
docs/GettingStarted.rst | 2 +-
docs/GoldPlugin.rst | 57 +-
docs/LangRef.rst | 344 +-
docs/LibFuzzer.rst | 8 +-
docs/MarkdownQuickstartTemplate.md | 157 +
docs/OptBisect.rst | 2 +-
docs/Passes.rst | 23 +
docs/ProgrammersManual.rst | 27 +-
docs/ReleaseNotes.rst | 86 +-
docs/SourceLevelDebugging.rst | 186 +-
docs/SpeculativeLoadHardening.md | 1099 ++
docs/TableGen/BackEnds.rst | 121 +
docs/TableGen/index.rst | 7 +-
docs/XRay.rst | 5 +-
docs/YamlIO.rst | 2 +-
docs/conf.py | 8 +-
docs/index.rst | 5 +
.../speculative_load_hardening_microbenchmarks.png | Bin 0 -> 112926 bytes
include/llvm-c/Core.h | 4 +-
include/llvm-c/DebugInfo.h | 3 +
include/llvm-c/ExecutionEngine.h | 1 +
include/llvm-c/TargetMachine.h | 4 +
include/llvm/ADT/APInt.h | 36 +
include/llvm/ADT/Any.h | 150 +
include/llvm/ADT/CachedHashString.h | 1 +
include/llvm/ADT/DenseSet.h | 2 +-
include/llvm/ADT/FunctionExtras.h | 2 +-
include/llvm/ADT/GraphTraits.h | 7 +
include/llvm/ADT/SCCIterator.h | 24 +-
include/llvm/ADT/STLExtras.h | 97 +
include/llvm/ADT/SmallSet.h | 118 +-
include/llvm/ADT/SmallVector.h | 222 +-
include/llvm/ADT/StringExtras.h | 20 +
include/llvm/Analysis/BasicAliasAnalysis.h | 25 +-
include/llvm/Analysis/InlineCost.h | 35 +-
include/llvm/Analysis/LoopAccessAnalysis.h | 4 +-
include/llvm/Analysis/LoopInfo.h | 28 +-
include/llvm/Analysis/LoopInfoImpl.h | 68 +
include/llvm/Analysis/MemoryDependenceAnalysis.h | 6 +-
include/llvm/Analysis/MemorySSA.h | 25 +-
include/llvm/Analysis/MemorySSAUpdater.h | 50 +-
include/llvm/Analysis/MustExecute.h | 4 +-
include/llvm/Analysis/ScalarEvolutionExpander.h | 1 +
include/llvm/Analysis/TargetTransformInfoImpl.h | 2 +-
include/llvm/Analysis/ValueTracking.h | 8 +-
include/llvm/AsmParser/Parser.h | 16 +-
include/llvm/BinaryFormat/Dwarf.def | 1 +
include/llvm/BinaryFormat/Dwarf.h | 4 +
include/llvm/BinaryFormat/ELF.h | 21 +-
.../llvm/BinaryFormat/ELFRelocs/WebAssembly.def | 8 -
include/llvm/BinaryFormat/MachO.h | 2 +-
include/llvm/CodeGen/AccelTable.h | 44 +-
include/llvm/CodeGen/AsmPrinter.h | 8 +-
include/llvm/CodeGen/AtomicExpandUtils.h | 2 +-
include/llvm/CodeGen/BasicTTIImpl.h | 2 +-
include/llvm/CodeGen/CallingConvLower.h | 2 +-
include/llvm/CodeGen/CommandFlags.inc | 5 +
include/llvm/CodeGen/DIE.h | 6 +-
include/llvm/CodeGen/FastISel.h | 12 +-
include/llvm/CodeGen/GCStrategy.h | 6 +-
include/llvm/CodeGen/GlobalISel/CallLowering.h | 10 +-
include/llvm/CodeGen/GlobalISel/IRTranslator.h | 11 +-
include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 2 +-
include/llvm/CodeGen/GlobalISel/LegalizerInfo.h | 4 +-
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lib/Target/X86/X86SpeculativeLoadHardening.cpp | 2247 +++
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test/CodeGen/Hexagon/postinc-offset.ll | 50 +-
test/CodeGen/Hexagon/rdf-extra-livein.ll | 2 +-
test/CodeGen/Hexagon/redundant-branching2.ll | 8 +-
test/CodeGen/Hexagon/rotl-i64.ll | 19 +-
test/CodeGen/Hexagon/signed_immediates.ll | 4 +-
test/CodeGen/Hexagon/store-widen-subreg.ll | 10 +-
test/CodeGen/Hexagon/swp-carried-1.ll | 2 +-
test/CodeGen/Hexagon/swp-change-deps.ll | 2 +-
test/CodeGen/Hexagon/swp-check-offset.ll | 14 +-
test/CodeGen/Hexagon/swp-const-tc1.ll | 2 +-
test/CodeGen/Hexagon/swp-dep-neg-offset.ll | 2 +-
test/CodeGen/Hexagon/swp-epilog-phi2.ll | 12 +-
test/CodeGen/Hexagon/swp-epilog-phi4.ll | 13 +-
test/CodeGen/Hexagon/swp-epilog-phi6.ll | 2 +-
test/CodeGen/Hexagon/swp-epilog-phi8.ll | 2 +-
test/CodeGen/Hexagon/swp-epilog-phi9.ll | 2 +-
test/CodeGen/Hexagon/swp-epilog-phis.ll | 3 +-
test/CodeGen/Hexagon/swp-kernel-phi1.ll | 2 +-
test/CodeGen/Hexagon/swp-loop-carried-unknown.ll | 2 +-
test/CodeGen/Hexagon/swp-lots-deps.ll | 7 +-
test/CodeGen/Hexagon/swp-phi-dep.ll | 2 +-
test/CodeGen/Hexagon/swp-reuse-phi-6.ll | 14 +-
test/CodeGen/Hexagon/swp-tfri.ll | 2 +-
test/CodeGen/Hexagon/tail-dup-subreg-map.ll | 2 +-
test/CodeGen/Hexagon/tfr-mux-nvj.ll | 2 +-
test/CodeGen/Hexagon/v60-cur.ll | 83 +-
test/CodeGen/Hexagon/v60-halide-vcombinei8.ll | 26 +-
test/CodeGen/Hexagon/vassign-to-combine.ll | 59 +-
test/CodeGen/Hexagon/vec-call-full1.ll | 4 +-
test/CodeGen/Hexagon/vect/extract-elt-vNi1.ll | 18 +
test/CodeGen/Hexagon/vect/vect-bool-isel-crash.ll | 6 +-
test/CodeGen/Hexagon/vect/zext-v4i1.ll | 6 +-
test/CodeGen/Hexagon/vload-postinc-sel.ll | 62 +-
test/CodeGen/MIR/X86/diexpr-win32.mir | 2 +-
test/CodeGen/Mips/Fast-ISel/icmpi1.ll | 14 +
test/CodeGen/Mips/Fast-ISel/sel1.ll | 3 +-
.../instruction-select/gloal_address.mir | 46 +
.../GlobalISel/instruction-select/pointers.mir | 81 +
.../GlobalISel/instruction-select/stack_args.mir | 65 +
.../Mips/GlobalISel/irtranslator/global_address.ll | 26 +
.../Mips/GlobalISel/irtranslator/pointers.ll | 45 +
.../Mips/GlobalISel/legalizer/global_address.mir | 43 +
.../CodeGen/Mips/GlobalISel/legalizer/pointers.mir | 79 +
.../Mips/GlobalISel/legalizer/stack_args.mir | 62 +
.../Mips/GlobalISel/llvm-ir/global_address.ll | 34 +
test/CodeGen/Mips/GlobalISel/llvm-ir/pointers.ll | 36 +
test/CodeGen/Mips/GlobalISel/llvm-ir/stack_args.ll | 29 +
.../GlobalISel/regbankselect/global_address.mir | 44 +
.../Mips/GlobalISel/regbankselect/pointers.mir | 82 +
.../Mips/GlobalISel/regbankselect/stack_args.mir | 63 +
test/CodeGen/Mips/blez_bgez.ll | 121 +-
test/CodeGen/Mips/bswap.ll | 8 +-
.../Mips/cconv/arguments-hard-float-varargs.ll | 12 +-
test/CodeGen/Mips/cconv/arguments-varargs.ll | 12 +-
test/CodeGen/Mips/cconv/callee-saved.ll | 24 +-
test/CodeGen/Mips/cconv/return-struct.ll | 12 +-
test/CodeGen/Mips/cconv/vector.ll | 760 +-
test/CodeGen/Mips/const-mult.ll | 48 +-
test/CodeGen/Mips/delay-slot-kill.ll | 2 -
test/CodeGen/Mips/dins.ll | 6 +-
test/CodeGen/Mips/double2int.ll | 3 +-
test/CodeGen/Mips/llvm-ir/and.ll | 9 +-
test/CodeGen/Mips/llvm-ir/not.ll | 6 +-
test/CodeGen/Mips/llvm-ir/or.ll | 21 +-
test/CodeGen/Mips/llvm-ir/select-int.ll | 7 +-
test/CodeGen/Mips/llvm-ir/xor.ll | 18 +-
test/CodeGen/Mips/madd-msub.ll | 14 +-
test/CodeGen/Mips/msa/basic_operations.ll | 12 +-
test/CodeGen/Mips/no-odd-spreg.ll | 10 +-
test/CodeGen/Mips/shrink-wrapping.ll | 12 +-
test/CodeGen/Mips/tglobaladdr-wrapper.ll | 66 +
test/CodeGen/Mips/tls.ll | 174 +-
test/CodeGen/NVPTX/f16x2-instructions.ll | 6 +-
test/CodeGen/NVPTX/intrinsic-old.ll | 8 +-
test/CodeGen/NVPTX/nvvm-reflect-arch.ll | 21 +
test/CodeGen/NVPTX/param-load-store.ll | 2 +-
test/CodeGen/PowerPC/2008-10-28-f128-i32.ll | 262 +-
test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll | 2 +-
test/CodeGen/PowerPC/MergeConsecutiveStores.ll | 16 +-
test/CodeGen/PowerPC/build-vector-tests.ll | 365 +-
test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll | 103 +
test/CodeGen/PowerPC/coalesce-ext.ll | 4 +-
test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 9 +-
test/CodeGen/PowerPC/f128-aggregates.ll | 178 +-
test/CodeGen/PowerPC/f128-arith.ll | 33 +-
test/CodeGen/PowerPC/f128-compare.ll | 226 +
test/CodeGen/PowerPC/f128-conv.ll | 402 +-
test/CodeGen/PowerPC/f128-fma.ll | 95 +-
test/CodeGen/PowerPC/f128-passByValue.ll | 154 +-
test/CodeGen/PowerPC/f128-rounding.ll | 77 +
test/CodeGen/PowerPC/f128-truncateNconv.ll | 350 +-
test/CodeGen/PowerPC/f128-vecExtractNconv.ll | 863 +-
test/CodeGen/PowerPC/fast-isel-cmp-imm.ll | 9 +
test/CodeGen/PowerPC/fast-isel-conversion.ll | 25 +
test/CodeGen/PowerPC/fast-isel-load-store.ll | 13 +
test/CodeGen/PowerPC/funnel-shift-rot.ll | 229 +
test/CodeGen/PowerPC/funnel-shift.ll | 259 +
test/CodeGen/PowerPC/i1-to-double.ll | 10 +-
test/CodeGen/PowerPC/lsa.ll | 4 +-
test/CodeGen/PowerPC/machine-combiner.ll | 4 +-
test/CodeGen/PowerPC/memcpy-vec.ll | 6 +-
test/CodeGen/PowerPC/ppc32-vacopy.ll | 13 +-
test/CodeGen/PowerPC/ppc64-gep-opt.ll | 29 -
test/CodeGen/PowerPC/rlwinm_rldicl_to_andi.mir | 416 +
test/CodeGen/PowerPC/save-cr-ppc32svr4.ll | 11 +-
test/CodeGen/PowerPC/save-crbp-ppc32svr4.ll | 11 +-
test/CodeGen/PowerPC/signbit-shift.ll | 152 +-
test/CodeGen/PowerPC/spe.ll | 542 +
test/CodeGen/PowerPC/swaps-le-1.ll | 8 +-
test/CodeGen/PowerPC/testComparesigesll.ll | 8 +-
test/CodeGen/PowerPC/testComparesllgesll.ll | 12 +-
test/CodeGen/PowerPC/tls.ll | 2 +-
test/CodeGen/PowerPC/unal-altivec.ll | 9 +-
test/CodeGen/RISCV/interrupt-attr-args-error.ll | 11 +
test/CodeGen/RISCV/interrupt-attr-invalid.ll | 11 +
test/CodeGen/RISCV/interrupt-attr-nocall.ll | 217 +
test/CodeGen/RISCV/interrupt-attr-ret-error.ll | 12 +
test/CodeGen/RISCV/interrupt-attr.ll | 1066 ++
test/CodeGen/RISCV/tail-calls.ll | 2 +-
test/CodeGen/SPARC/2011-01-11-FrameAddr.ll | 6 +-
test/CodeGen/SPARC/rem.ll | 55 +-
test/CodeGen/SPARC/soft-mul-div.ll | 41 +
test/CodeGen/SPARC/trap.ll | 12 +-
test/CodeGen/SPARC/varargs-v8.ll | 24 +
test/CodeGen/SystemZ/addr-01.ll | 16 +-
test/CodeGen/SystemZ/addr-02.ll | 16 +-
test/CodeGen/SystemZ/addr-03.ll | 10 +-
test/CodeGen/SystemZ/alias-01.ll | 2 +-
test/CodeGen/SystemZ/and-01.ll | 40 +-
test/CodeGen/SystemZ/and-03.ll | 34 +-
test/CodeGen/SystemZ/and-05.ll | 26 +-
test/CodeGen/SystemZ/and-06.ll | 16 +-
test/CodeGen/SystemZ/and-08.ll | 104 +-
test/CodeGen/SystemZ/asm-18.ll | 48 +-
test/CodeGen/SystemZ/atomic-load-01.ll | 2 +-
test/CodeGen/SystemZ/atomic-load-02.ll | 2 +-
test/CodeGen/SystemZ/atomic-load-03.ll | 2 +-
test/CodeGen/SystemZ/atomic-load-04.ll | 2 +-
test/CodeGen/SystemZ/backchain.ll | 2 +-
test/CodeGen/SystemZ/branch-02.ll | 12 +-
test/CodeGen/SystemZ/branch-03.ll | 8 +-
test/CodeGen/SystemZ/branch-04.ll | 28 +-
test/CodeGen/SystemZ/branch-06.ll | 14 +-
test/CodeGen/SystemZ/branch-08.ll | 2 +-
test/CodeGen/SystemZ/bswap-02.ll | 14 +-
test/CodeGen/SystemZ/bswap-03.ll | 14 +-
test/CodeGen/SystemZ/bswap-06.ll | 14 +-
test/CodeGen/SystemZ/cond-load-01.ll | 18 +-
test/CodeGen/SystemZ/cond-load-02.ll | 18 +-
test/CodeGen/SystemZ/cond-load-03.ll | 2 +-
test/CodeGen/SystemZ/cond-store-01.ll | 44 +-
test/CodeGen/SystemZ/cond-store-02.ll | 44 +-
test/CodeGen/SystemZ/cond-store-03.ll | 36 +-
test/CodeGen/SystemZ/cond-store-04.ll | 24 +-
test/CodeGen/SystemZ/cond-store-05.ll | 24 +-
test/CodeGen/SystemZ/cond-store-06.ll | 24 +-
test/CodeGen/SystemZ/cond-store-07.ll | 22 +-
test/CodeGen/SystemZ/cond-store-08.ll | 14 +-
test/CodeGen/SystemZ/fp-abs-01.ll | 4 +-
test/CodeGen/SystemZ/fp-abs-02.ll | 4 +-
test/CodeGen/SystemZ/fp-abs-03.ll | 4 +-
test/CodeGen/SystemZ/fp-abs-04.ll | 4 +-
test/CodeGen/SystemZ/fp-add-01.ll | 32 +-
test/CodeGen/SystemZ/fp-add-02.ll | 32 +-
test/CodeGen/SystemZ/fp-add-03.ll | 2 +-
test/CodeGen/SystemZ/fp-cmp-01.ll | 56 +-
test/CodeGen/SystemZ/fp-cmp-02.ll | 34 +-
test/CodeGen/SystemZ/fp-cmp-03.ll | 4 +-
test/CodeGen/SystemZ/fp-cmp-04.ll | 6 +-
test/CodeGen/SystemZ/fp-conv-01.ll | 8 +-
test/CodeGen/SystemZ/fp-conv-02.ll | 10 +-
test/CodeGen/SystemZ/fp-conv-03.ll | 44 +-
test/CodeGen/SystemZ/fp-conv-04.ll | 44 +-
test/CodeGen/SystemZ/fp-conv-09.ll | 2 +-
test/CodeGen/SystemZ/fp-conv-10.ll | 2 +-
test/CodeGen/SystemZ/fp-conv-11.ll | 2 +-
test/CodeGen/SystemZ/fp-conv-12.ll | 2 +-
test/CodeGen/SystemZ/fp-conv-14.ll | 4 +-
test/CodeGen/SystemZ/fp-conv-16.ll | 4 +-
test/CodeGen/SystemZ/fp-copysign-01.ll | 12 +-
test/CodeGen/SystemZ/fp-div-01.ll | 32 +-
test/CodeGen/SystemZ/fp-div-02.ll | 32 +-
test/CodeGen/SystemZ/fp-div-03.ll | 2 +-
test/CodeGen/SystemZ/fp-move-01.ll | 2 +-
test/CodeGen/SystemZ/fp-move-02.ll | 48 +-
test/CodeGen/SystemZ/fp-move-03.ll | 20 +-
test/CodeGen/SystemZ/fp-move-04.ll | 20 +-
test/CodeGen/SystemZ/fp-move-05.ll | 22 +-
test/CodeGen/SystemZ/fp-move-09.ll | 6 +-
test/CodeGen/SystemZ/fp-move-12.ll | 2 +-
test/CodeGen/SystemZ/fp-move-13.ll | 6 +-
test/CodeGen/SystemZ/fp-mul-01.ll | 32 +-
test/CodeGen/SystemZ/fp-mul-02.ll | 32 +-
test/CodeGen/SystemZ/fp-mul-03.ll | 32 +-
test/CodeGen/SystemZ/fp-mul-04.ll | 32 +-
test/CodeGen/SystemZ/fp-mul-05.ll | 2 +-
test/CodeGen/SystemZ/fp-mul-06.ll | 14 +-
test/CodeGen/SystemZ/fp-mul-07.ll | 14 +-
test/CodeGen/SystemZ/fp-mul-08.ll | 14 +-
test/CodeGen/SystemZ/fp-mul-09.ll | 14 +-
test/CodeGen/SystemZ/fp-neg-01.ll | 4 +-
test/CodeGen/SystemZ/fp-neg-02.ll | 4 +-
test/CodeGen/SystemZ/fp-round-01.ll | 2 +-
test/CodeGen/SystemZ/fp-round-02.ll | 12 +-
test/CodeGen/SystemZ/fp-round-03.ll | 12 +-
test/CodeGen/SystemZ/fp-sqrt-01.ll | 44 +-
test/CodeGen/SystemZ/fp-sqrt-02.ll | 44 +-
test/CodeGen/SystemZ/fp-sqrt-03.ll | 2 +-
test/CodeGen/SystemZ/fp-sub-01.ll | 32 +-
test/CodeGen/SystemZ/fp-sub-02.ll | 32 +-
test/CodeGen/SystemZ/fp-sub-03.ll | 2 +-
test/CodeGen/SystemZ/frame-02.ll | 96 +-
test/CodeGen/SystemZ/frame-03.ll | 96 +-
test/CodeGen/SystemZ/frame-04.ll | 48 +-
test/CodeGen/SystemZ/frame-05.ll | 76 +-
test/CodeGen/SystemZ/frame-06.ll | 76 +-
test/CodeGen/SystemZ/frame-07.ll | 64 +-
test/CodeGen/SystemZ/frame-08.ll | 92 +-
test/CodeGen/SystemZ/frame-09.ll | 26 +-
test/CodeGen/SystemZ/frame-13.ll | 38 +-
test/CodeGen/SystemZ/frame-14.ll | 38 +-
test/CodeGen/SystemZ/frame-15.ll | 58 +-
test/CodeGen/SystemZ/frame-16.ll | 34 +-
test/CodeGen/SystemZ/frame-17.ll | 86 +-
test/CodeGen/SystemZ/frame-18.ll | 60 +-
test/CodeGen/SystemZ/insert-01.ll | 34 +-
test/CodeGen/SystemZ/insert-02.ll | 34 +-
test/CodeGen/SystemZ/insert-06.ll | 6 +-
test/CodeGen/SystemZ/int-add-01.ll | 20 +-
test/CodeGen/SystemZ/int-add-02.ll | 40 +-
test/CodeGen/SystemZ/int-add-03.ll | 34 +-
test/CodeGen/SystemZ/int-add-04.ll | 34 +-
test/CodeGen/SystemZ/int-add-05.ll | 34 +-
test/CodeGen/SystemZ/int-add-08.ll | 40 +-
test/CodeGen/SystemZ/int-add-09.ll | 8 +-
test/CodeGen/SystemZ/int-add-10.ll | 34 +-
test/CodeGen/SystemZ/int-add-11.ll | 84 +-
test/CodeGen/SystemZ/int-add-12.ll | 84 +-
test/CodeGen/SystemZ/int-cmp-01.ll | 22 +-
test/CodeGen/SystemZ/int-cmp-02.ll | 22 +-
test/CodeGen/SystemZ/int-cmp-03.ll | 22 +-
test/CodeGen/SystemZ/int-cmp-04.ll | 16 +-
test/CodeGen/SystemZ/int-cmp-05.ll | 42 +-
test/CodeGen/SystemZ/int-cmp-06.ll | 42 +-
test/CodeGen/SystemZ/int-cmp-07.ll | 16 +-
test/CodeGen/SystemZ/int-cmp-08.ll | 16 +-
test/CodeGen/SystemZ/int-cmp-15.ll | 38 +-
test/CodeGen/SystemZ/int-cmp-16.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-17.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-18.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-19.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-20.ll | 32 +-
test/CodeGen/SystemZ/int-cmp-21.ll | 32 +-
test/CodeGen/SystemZ/int-cmp-22.ll | 18 +-
test/CodeGen/SystemZ/int-cmp-23.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-24.ll | 8 +-
test/CodeGen/SystemZ/int-cmp-25.ll | 8 +-
test/CodeGen/SystemZ/int-cmp-26.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-27.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-28.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-29.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-30.ll | 32 +-
test/CodeGen/SystemZ/int-cmp-31.ll | 32 +-
test/CodeGen/SystemZ/int-cmp-32.ll | 36 +-
test/CodeGen/SystemZ/int-cmp-33.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-34.ll | 36 +-
test/CodeGen/SystemZ/int-cmp-35.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-36.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-37.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-38.ll | 14 +-
test/CodeGen/SystemZ/int-cmp-39.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-40.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-41.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-42.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-43.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-44.ll | 20 +-
test/CodeGen/SystemZ/int-cmp-45.ll | 12 +-
test/CodeGen/SystemZ/int-cmp-48.ll | 32 +-
test/CodeGen/SystemZ/int-conv-01.ll | 46 +-
test/CodeGen/SystemZ/int-conv-02.ll | 46 +-
test/CodeGen/SystemZ/int-conv-03.ll | 46 +-
test/CodeGen/SystemZ/int-conv-04.ll | 46 +-
test/CodeGen/SystemZ/int-conv-05.ll | 52 +-
test/CodeGen/SystemZ/int-conv-06.ll | 46 +-
test/CodeGen/SystemZ/int-conv-07.ll | 46 +-
test/CodeGen/SystemZ/int-conv-08.ll | 46 +-
test/CodeGen/SystemZ/int-conv-09.ll | 14 +-
test/CodeGen/SystemZ/int-conv-10.ll | 14 +-
test/CodeGen/SystemZ/int-conv-11.ll | 132 +-
test/CodeGen/SystemZ/int-conv-12.ll | 12 +-
test/CodeGen/SystemZ/int-conv-13.ll | 6 +-
test/CodeGen/SystemZ/int-div-01.ll | 42 +-
test/CodeGen/SystemZ/int-div-02.ll | 38 +-
test/CodeGen/SystemZ/int-div-03.ll | 20 +-
test/CodeGen/SystemZ/int-div-04.ll | 40 +-
test/CodeGen/SystemZ/int-div-05.ll | 40 +-
test/CodeGen/SystemZ/int-move-02.ll | 20 +-
test/CodeGen/SystemZ/int-move-03.ll | 14 +-
test/CodeGen/SystemZ/int-move-08.ll | 16 +-
test/CodeGen/SystemZ/int-move-09.ll | 20 +-
test/CodeGen/SystemZ/int-mul-01.ll | 20 +-
test/CodeGen/SystemZ/int-mul-02.ll | 40 +-
test/CodeGen/SystemZ/int-mul-03.ll | 34 +-
test/CodeGen/SystemZ/int-mul-04.ll | 34 +-
test/CodeGen/SystemZ/int-mul-08.ll | 34 +-
test/CodeGen/SystemZ/int-mul-10.ll | 14 +-
test/CodeGen/SystemZ/int-sadd-04.ll | 20 +-
test/CodeGen/SystemZ/int-ssub-04.ll | 20 +-
test/CodeGen/SystemZ/int-sub-01.ll | 40 +-
test/CodeGen/SystemZ/int-sub-02.ll | 34 +-
test/CodeGen/SystemZ/int-sub-03.ll | 34 +-
test/CodeGen/SystemZ/int-sub-04.ll | 34 +-
test/CodeGen/SystemZ/int-sub-05.ll | 40 +-
test/CodeGen/SystemZ/int-sub-06.ll | 34 +-
test/CodeGen/SystemZ/int-sub-07.ll | 20 +-
test/CodeGen/SystemZ/int-uadd-08.ll | 8 +-
test/CodeGen/SystemZ/int-uadd-09.ll | 8 +-
test/CodeGen/SystemZ/int-usub-08.ll | 8 +-
test/CodeGen/SystemZ/int-usub-09.ll | 8 +-
test/CodeGen/SystemZ/loop-01.ll | 6 +-
test/CodeGen/SystemZ/loop-02.ll | 2 +-
test/CodeGen/SystemZ/memchr-01.ll | 4 +-
test/CodeGen/SystemZ/memcpy-02.ll | 64 +-
test/CodeGen/SystemZ/or-01.ll | 40 +-
test/CodeGen/SystemZ/or-03.ll | 34 +-
test/CodeGen/SystemZ/or-05.ll | 26 +-
test/CodeGen/SystemZ/or-06.ll | 16 +-
test/CodeGen/SystemZ/or-08.ll | 16 +-
test/CodeGen/SystemZ/postra-sched-expandedops.mir | 90 +
test/CodeGen/SystemZ/pr36164.ll | 6 +-
test/CodeGen/SystemZ/shift-01.ll | 2 +-
test/CodeGen/SystemZ/shift-02.ll | 2 +-
test/CodeGen/SystemZ/shift-03.ll | 2 +-
test/CodeGen/SystemZ/shift-04.ll | 2 +-
test/CodeGen/SystemZ/shift-05.ll | 2 +-
test/CodeGen/SystemZ/shift-06.ll | 2 +-
test/CodeGen/SystemZ/shift-07.ll | 2 +-
test/CodeGen/SystemZ/shift-08.ll | 2 +-
test/CodeGen/SystemZ/shift-12.ll | 12 +
test/CodeGen/SystemZ/spill-01.ll | 212 +-
test/CodeGen/SystemZ/store_nonbytesized_vecs.ll | 56 +-
test/CodeGen/SystemZ/strcpy-01.ll | 2 +-
test/CodeGen/SystemZ/strcpy-nobuiltin.ll | 2 +-
test/CodeGen/SystemZ/unaligned-01.ll | 10 +-
test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll | 36 +-
test/CodeGen/SystemZ/vec-move-17.ll | 4 +-
test/CodeGen/SystemZ/vec-trunc-to-i1.ll | 2 +-
test/CodeGen/SystemZ/xor-01.ll | 40 +-
test/CodeGen/SystemZ/xor-03.ll | 34 +-
test/CodeGen/SystemZ/xor-05.ll | 26 +-
test/CodeGen/SystemZ/xor-06.ll | 16 +-
test/CodeGen/SystemZ/xor-08.ll | 16 +-
test/CodeGen/Thumb/i8-phi-ext.ll | 21 +
test/CodeGen/Thumb/shift-and.ll | 125 +
test/CodeGen/Thumb2/thumb2-cmp.ll | 5 +-
test/CodeGen/WebAssembly/add-prototypes.ll | 20 +
test/CodeGen/WebAssembly/atomic-mem-consistency.ll | 247 +
test/CodeGen/WebAssembly/atomic-rmw.ll | 1281 ++
test/CodeGen/WebAssembly/byval.ll | 14 +-
test/CodeGen/WebAssembly/call.ll | 2 +-
test/CodeGen/WebAssembly/exception.ll | 3 +-
.../WebAssembly/function-bitcasts-varargs.ll | 8 +-
test/CodeGen/WebAssembly/function-bitcasts.ll | 32 +-
.../WebAssembly/i32-load-store-alignment.ll | 33 +-
.../WebAssembly/i64-load-store-alignment.ll | 27 +-
test/CodeGen/WebAssembly/lower-em-exceptions.ll | 38 +-
test/CodeGen/WebAssembly/lower-em-sjlj.ll | 30 +-
test/CodeGen/WebAssembly/offset-atomics.ll | 1672 +-
test/CodeGen/WebAssembly/offset.ll | 405 +-
test/CodeGen/WebAssembly/reg-stackify.ll | 2 +-
test/CodeGen/WebAssembly/stack-alignment.ll | 24 +-
.../WebAssembly/unsupported-function-bitcasts.ll | 62 +-
test/CodeGen/WebAssembly/userstack.ll | 52 +-
test/CodeGen/X86/2012-01-12-extract-sv.ll | 12 +-
.../X86/GlobalISel/regbankselect-X86_64.mir | 161 +
.../x86_64-irtranslator-struct-return.ll | 290 +
.../X86/GlobalISel/x86_64-legalize-sitofp.mir | 306 +
.../X86/GlobalISel/x86_64-select-sitofp.mir | 158 +
test/CodeGen/X86/abi-isel.ll | 18472 ++++++++++---------
test/CodeGen/X86/absolute-bit-mask-fastisel.ll | 28 +
test/CodeGen/X86/addrsig.ll | 39 +
test/CodeGen/X86/atom-fixup-lea2.ll | 1 -
test/CodeGen/X86/atomic-non-integer.ll | 120 +-
test/CodeGen/X86/atomic_idempotent.ll | 146 +-
test/CodeGen/X86/atomic_mi.ll | 1919 +-
test/CodeGen/X86/avx-cast.ll | 12 +-
test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 3081 ++--
test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll | 16 +-
test/CodeGen/X86/avx-load-store.ll | 8 +-
test/CodeGen/X86/avx-vperm2x128.ll | 2 +-
test/CodeGen/X86/avx2-fma-fneg-combine.ll | 23 +-
test/CodeGen/X86/avx512-bugfix-26264.ll | 18 +-
test/CodeGen/X86/avx512-cvt.ll | 146 +-
test/CodeGen/X86/avx512-fma-intrinsics.ll | 28 +
test/CodeGen/X86/avx512-hadd-hsub.ll | 8 +-
test/CodeGen/X86/avx512-insert-extract.ll | 2 +-
test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 480 +-
test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 679 +-
test/CodeGen/X86/avx512-intrinsics.ll | 661 +-
test/CodeGen/X86/avx512-masked-memop-64-32.ll | 29 +-
test/CodeGen/X86/avx512-rndscale.ll | 3393 ++++
test/CodeGen/X86/avx512-scalar_mask.ll | 16 +-
test/CodeGen/X86/avx512-shuffle-schedule.ll | 32 +-
.../X86/avx512-shuffles/broadcast-scalar-fp.ll | 160 +-
test/CodeGen/X86/avx512-shuffles/duplicate-high.ll | 120 +-
test/CodeGen/X86/avx512-shuffles/duplicate-low.ll | 216 +-
.../CodeGen/X86/avx512-shuffles/in_lane_permute.ll | 240 +-
.../CodeGen/X86/avx512-shuffles/partial_permute.ll | 232 +-
test/CodeGen/X86/avx512-shuffles/permute.ll | 160 +-
.../X86/avx512-shuffles/shuffle-interleave.ll | 176 +-
test/CodeGen/X86/avx512-shuffles/shuffle-vec.ll | 144 +-
test/CodeGen/X86/avx512-shuffles/unpack.ll | 352 +-
test/CodeGen/X86/avx512-vbroadcasti128.ll | 26 +-
.../CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll | 13 +
test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll | 4 +-
test/CodeGen/X86/avx512dq-intrinsics.ll | 8 +-
test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 102 +
test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 66 +-
test/CodeGen/X86/avx512vl-intrinsics.ll | 136 +-
test/CodeGen/X86/avx512vl-mov.ll | 8 +-
test/CodeGen/X86/build-vector-512.ll | 8 +-
test/CodeGen/X86/buildvec-insertvec.ll | 10 +-
test/CodeGen/X86/cleanuppad-large-codemodel.ll | 2 +-
test/CodeGen/X86/clear-highbits.ll | 290 +-
test/CodeGen/X86/clear-lowbits.ll | 606 +-
test/CodeGen/X86/coalesce_commute_movsd.ll | 4 +-
test/CodeGen/X86/code-model-elf-memset.ll | 91 +
test/CodeGen/X86/code-model-elf.ll | 384 +
test/CodeGen/X86/combine-abs.ll | 18 +-
test/CodeGen/X86/combine-rotates.ll | 90 +
test/CodeGen/X86/combine-sdiv.ll | 804 +-
test/CodeGen/X86/combine-shl.ll | 80 +-
test/CodeGen/X86/combine-srem.ll | 338 +-
test/CodeGen/X86/combine-udiv.ll | 419 +
test/CodeGen/X86/combine-urem.ll | 62 +
test/CodeGen/X86/conditional-tailcall-samedest.mir | 2 +-
test/CodeGen/X86/dagcombine-cse.ll | 1 -
test/CodeGen/X86/dagcombine-select.ll | 150 +-
test/CodeGen/X86/domain-reassignment.mir | 8 +-
test/CodeGen/X86/extract-lowbits.ll | 76 +-
test/CodeGen/X86/extractelement-load.ll | 3 +-
test/CodeGen/X86/fast-isel-call-cleanup.ll | 4 +-
test/CodeGen/X86/fast-isel-fold-mem.ll | 9 +-
.../X86/fast-isel-int-float-conversion-x86-64.ll | 1 +
test/CodeGen/X86/fast-isel-int-float-conversion.ll | 2 +
test/CodeGen/X86/fast-isel-select.ll | 19 +-
test/CodeGen/X86/fast-isel-sext-zext.ll | 40 -
.../X86/fast-isel-uint-float-conversion-x86-64.ll | 69 +
.../CodeGen/X86/fast-isel-uint-float-conversion.ll | 160 +
test/CodeGen/X86/flags-copy-lowering.mir | 508 +-
test/CodeGen/X86/fma-fneg-combine.ll | 26 +-
test/CodeGen/X86/fma-intrinsics-x86.ll | 31 +
test/CodeGen/X86/fma.ll | 714 +-
test/CodeGen/X86/fma4-fneg-combine.ll | 28 +-
test/CodeGen/X86/fmsubadd-combine.ll | 22 +-
test/CodeGen/X86/fold-load-vec.ll | 22 +-
test/CodeGen/X86/fp128-i128.ll | 463 +-
test/CodeGen/X86/funnel-shift-rot.ll | 417 +
test/CodeGen/X86/funnel-shift.ll | 456 +
test/CodeGen/X86/gather-addresses.ll | 30 +-
test/CodeGen/X86/haddsub-2.ll | 44 +-
test/CodeGen/X86/haddsub-shuf.ll | 362 +-
test/CodeGen/X86/half.ll | 98 +-
test/CodeGen/X86/hipe-cc64.ll | 2 +-
test/CodeGen/X86/imul.ll | 52 +-
test/CodeGen/X86/known-bits-vector.ll | 10 +-
.../CodeGen/X86/lack-of-signed-truncation-check.ll | 636 +
test/CodeGen/X86/large-pic-string.ll | 21 +
test/CodeGen/X86/late-remat-update.mir | 118 +
test/CodeGen/X86/lea-opt.ll | 386 +-
test/CodeGen/X86/lea32-schedule.ll | 16 +-
test/CodeGen/X86/lea64-schedule.ll | 16 +-
test/CodeGen/X86/limit-split-cost.mir | 150 +
test/CodeGen/X86/loadStore_vectorizer.ll | 18 +-
test/CodeGen/X86/lower-vec-shift.ll | 25 +-
test/CodeGen/X86/lsr-crash-empty-uses.ll | 42 +
test/CodeGen/X86/machine-cp-debug.mir | 23 +
test/CodeGen/X86/machine-outliner-disubprogram.ll | 2 +-
test/CodeGen/X86/machine-outliner-tailcalls.ll | 2 +-
test/CodeGen/X86/madd.ll | 2130 ++-
test/CodeGen/X86/masked_gather_scatter.ll | 51 +
test/CodeGen/X86/masked_memop.ll | 61 +-
test/CodeGen/X86/merge-consecutive-loads-128.ll | 6 +-
test/CodeGen/X86/merge-consecutive-loads-256.ll | 8 +-
test/CodeGen/X86/mingw-comdats-xdata.ll | 81 +
test/CodeGen/X86/mmx-build-vector.ll | 4 +-
test/CodeGen/X86/mul-constant-i16.ll | 210 +-
test/CodeGen/X86/mul-constant-i32.ll | 645 +-
test/CodeGen/X86/mul-constant-i64.ll | 628 +-
test/CodeGen/X86/mul-constant-result.ll | 60 +-
test/CodeGen/X86/musttail-varargs.ll | 84 +-
test/CodeGen/X86/nontemporal-2.ll | 48 +-
test/CodeGen/X86/oddshuffles.ll | 286 +-
test/CodeGen/X86/parity.ll | 96 +
test/CodeGen/X86/pku.ll | 16 +-
test/CodeGen/X86/pmaddubsw.ll | 553 +
test/CodeGen/X86/pr14088.ll | 51 +-
test/CodeGen/X86/pr29112.ll | 20 +-
test/CodeGen/X86/pr30430.ll | 88 +-
test/CodeGen/X86/pr32282.ll | 2 +-
test/CodeGen/X86/pr32329.ll | 40 +-
test/CodeGen/X86/pr37826.ll | 60 +
test/CodeGen/X86/pr37916.ll | 44 +
test/CodeGen/X86/pr38038.ll | 10 +
test/CodeGen/X86/pr38185.ll | 64 +
test/CodeGen/X86/pr9517.ll | 140 +
test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 2 +-
test/CodeGen/X86/rem.ll | 8 +-
test/CodeGen/X86/required-vector-width.ll | 31 +-
test/CodeGen/X86/rotate-extract-vector.ll | 287 +
test/CodeGen/X86/rotate-extract.ll | 267 +
test/CodeGen/X86/sad.ll | 9 +-
test/CodeGen/X86/scalar_widen_div.ll | 1 -
test/CodeGen/X86/schedule-x86-64-shld.ll | 2 +-
test/CodeGen/X86/sdiv-exact.ll | 124 +-
test/CodeGen/X86/select.ll | 9 +-
test/CodeGen/X86/selectcc-to-shiftand.ll | 32 +-
test/CodeGen/X86/sha.ll | 135 +-
test/CodeGen/X86/signbit-shift.ll | 179 +-
test/CodeGen/X86/signed-truncation-check.ll | 635 +
.../X86/speculative-load-hardening-gather.ll | 955 +
.../X86/speculative-load-hardening-indirect.ll | 391 +
test/CodeGen/X86/speculative-load-hardening.ll | 1027 ++
test/CodeGen/X86/sse-fcopysign.ll | 20 +-
test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 3486 ++--
test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll | 13 +-
test/CodeGen/X86/sse-scalar-fp-arith.ll | 252 +-
test/CodeGen/X86/sse1.ll | 8 +-
test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 6194 ++++---
test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 33 +-
test/CodeGen/X86/sse2.ll | 23 +-
test/CodeGen/X86/sse3-avx-addsub-2.ll | 77 +-
test/CodeGen/X86/sse41-intrinsics-fast-isel.ll | 13 +-
test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll | 16 +-
test/CodeGen/X86/sse41.ll | 46 +-
test/CodeGen/X86/sse_partial_update.ll | 2 +-
test/CodeGen/X86/store-zero-and-minus-one.ll | 218 +-
test/CodeGen/X86/subvector-broadcast.ll | 120 +-
test/CodeGen/X86/tail-opts.ll | 2 +-
test/CodeGen/X86/tailcall-64.ll | 192 +-
test/CodeGen/X86/trunc-subvector.ll | 12 +-
test/CodeGen/X86/var-permute-128.ll | 36 +-
test/CodeGen/X86/variadic-node-pic.ll | 6 +-
test/CodeGen/X86/vec-copysign-avx512.ll | 19 +-
test/CodeGen/X86/vec_extract-avx.ll | 14 +-
test/CodeGen/X86/vec_extract.ll | 4 +-
test/CodeGen/X86/vec_fabs.ll | 36 +-
test/CodeGen/X86/vec_fp_to_int.ll | 32 +-
test/CodeGen/X86/vec_fpext.ll | 80 +-
test/CodeGen/X86/vec_int_to_fp.ll | 232 +-
test/CodeGen/X86/vec_shift6.ll | 17 +-
test/CodeGen/X86/vec_shift7.ll | 7 +-
test/CodeGen/X86/vec_ss_load_fold.ll | 6 +-
test/CodeGen/X86/vector-compare-all_of.ll | 24 +-
test/CodeGen/X86/vector-compare-any_of.ll | 24 +-
.../X86/vector-constrained-fp-intrinsics.ll | 2975 ++-
test/CodeGen/X86/vector-extend-inreg.ll | 6 +-
test/CodeGen/X86/vector-idiv-sdiv-128.ll | 36 +-
test/CodeGen/X86/vector-idiv-sdiv-256.ll | 48 +-
test/CodeGen/X86/vector-idiv-sdiv-512.ll | 48 +-
test/CodeGen/X86/vector-idiv-udiv-128.ll | 36 +-
test/CodeGen/X86/vector-idiv-udiv-256.ll | 48 +-
test/CodeGen/X86/vector-idiv-udiv-512.ll | 48 +-
test/CodeGen/X86/vector-mul.ll | 69 +-
test/CodeGen/X86/vector-reduce-add.ll | 18 +-
test/CodeGen/X86/vector-reduce-fadd.ll | 542 +-
test/CodeGen/X86/vector-reduce-fmul.ll | 86 +-
test/CodeGen/X86/vector-shift-ashr-128.ll | 50 +-
test/CodeGen/X86/vector-shift-ashr-256.ll | 77 +-
test/CodeGen/X86/vector-shift-lshr-128.ll | 95 +-
test/CodeGen/X86/vector-shift-lshr-256.ll | 106 +-
test/CodeGen/X86/vector-shift-shl-128.ll | 138 +-
test/CodeGen/X86/vector-shift-shl-256.ll | 86 +-
test/CodeGen/X86/vector-shuffle-128-v16.ll | 32 +-
test/CodeGen/X86/vector-shuffle-128-v2.ll | 203 +-
test/CodeGen/X86/vector-shuffle-128-v4.ll | 61 +-
test/CodeGen/X86/vector-shuffle-128-v8.ll | 17 +-
test/CodeGen/X86/vector-shuffle-256-v32.ll | 28 +-
test/CodeGen/X86/vector-shuffle-256-v4.ll | 79 +-
test/CodeGen/X86/vector-shuffle-256-v8.ll | 6 +-
test/CodeGen/X86/vector-shuffle-512-v16.ll | 18 +-
test/CodeGen/X86/vector-shuffle-512-v8.ll | 1248 +-
test/CodeGen/X86/vector-shuffle-combining-avx2.ll | 68 +-
test/CodeGen/X86/vector-shuffle-combining-ssse3.ll | 58 +-
test/CodeGen/X86/vector-shuffle-combining.ll | 4 +-
test/CodeGen/X86/vector-shuffle-sse1.ll | 12 +-
test/CodeGen/X86/vector-shuffle-variable-128.ll | 36 +-
test/CodeGen/X86/vector-shuffle-variable-256.ll | 40 +-
test/CodeGen/X86/vector-sqrt.ll | 12 +-
test/CodeGen/X86/vector-trunc.ll | 23 +-
test/CodeGen/X86/vector-zext.ll | 4 +-
test/CodeGen/X86/vselect-pcmp.ll | 2 +-
test/CodeGen/X86/widen_arith-4.ll | 12 +-
test/CodeGen/X86/win_coreclr_chkstk.ll | 7 -
test/CodeGen/X86/win_coreclr_chkstk_liveins.mir | 24 +
test/CodeGen/X86/x86-cmov-converter.ll | 2 +-
test/CodeGen/X86/xray-attribute-instrumentation.ll | 8 +-
test/CodeGen/X86/xray-custom-log.ll | 6 +-
test/CodeGen/X86/xray-log-args.ll | 4 +-
test/CodeGen/X86/xray-loop-detection.ll | 4 +-
test/CodeGen/X86/xray-multiplerets-in-blocks.mir | 2 +-
test/CodeGen/X86/xray-section-group.ll | 4 +-
test/CodeGen/X86/xray-selective-instrumentation.ll | 2 +-
test/CodeGen/X86/xray-tail-call-sled.ll | 4 +-
test/CodeGen/X86/xray-typed-event-log.ll | 4 +-
test/CodeGen/XCore/ashr.ll | 5 +-
test/DebugInfo/AArch64/asan-stack-vars.ll | 4 +-
test/DebugInfo/AArch64/coalescing.ll | 5 +-
test/DebugInfo/AArch64/tls-at-location.ll | 37 +
.../COFF/asan-module-without-functions.ll | 6 +-
test/DebugInfo/Generic/directives-only.ll | 59 +
.../Generic/incorrect-variable-debugloc.ll | 8 +-
.../MIR/ARM/live-debug-values-reg-copy.mir | 147 +
.../MIR/Mips/live-debug-values-reg-copy.mir | 241 +
test/DebugInfo/MIR/X86/bit-piece-dh.mir | 2 +-
test/DebugInfo/MIR/X86/empty-inline.mir | 4 +-
.../MIR/X86/live-debug-values-reg-copy.mir | 190 +
test/DebugInfo/Mips/dsr-fixed-objects.ll | 5 +-
test/DebugInfo/NVPTX/cu-range-hole.ll | 28 +-
test/DebugInfo/NVPTX/dbg-declare-alloca.ll | 28 +-
test/DebugInfo/NVPTX/debug-info.ll | 30 +-
test/DebugInfo/NVPTX/debug-loc-offset.ll | 32 +-
test/DebugInfo/PDB/pdb-invalid-type.test | 15 +
test/DebugInfo/PDB/using-namespace.test | 51 +
test/{CodeGen => DebugInfo}/RISCV/lit.local.cfg | 0
test/DebugInfo/RISCV/relax-debug-line.ll | 75 +
test/DebugInfo/X86/DIModule.ll | 3 +-
test/DebugInfo/X86/accel-tables-dwarf5.ll | 49 +
test/DebugInfo/X86/accel-tables.ll | 39 +-
test/DebugInfo/X86/bbjoin.ll | 2 +-
test/DebugInfo/X86/cu-ranges.ll | 11 +
test/DebugInfo/X86/dbg-value-const-byref.ll | 2 +-
test/DebugInfo/X86/dbg-value-frame-index.ll | 8 +-
test/DebugInfo/X86/dbg_value_direct.ll | 4 +-
test/DebugInfo/X86/debug-loc-asan.ll | 4 +-
test/DebugInfo/X86/debug-loc-frame.ll | 9 +-
test/DebugInfo/X86/debug_addr.ll | 79 +
test/DebugInfo/X86/dwarfdump-str-offsets.s | 7 +-
test/DebugInfo/X86/fission-ranges.ll | 21 +-
test/DebugInfo/X86/objc-property-void.ll | 1 +
test/DebugInfo/X86/range_reloc.ll | 27 +-
test/DebugInfo/X86/range_reloc_base.ll | 59 +
test/DebugInfo/X86/rnglists_base_attr.ll | 89 +
test/DebugInfo/X86/rnglists_curanges.ll | 50 +
test/DebugInfo/X86/string-offsets-table.ll | 6 +-
test/DebugInfo/debugify-bogus-dbg-value.ll | 13 +-
test/DebugInfo/debugify-export.ll | 14 +
test/Demangle/ms-arg-qualifiers.test | 301 +
test/Demangle/ms-back-references.test | 57 +
test/Demangle/ms-basic.test | 230 +
test/Demangle/ms-cxx11.test | 148 +
test/Demangle/ms-mangle.test | 394 +
test/Demangle/ms-nested-scopes.test | 146 +
test/Demangle/ms-return-qualifiers.test | 184 +
test/Demangle/ms-template-callback.test | 53 +
test/Demangle/ms-windows.test | 17 +
test/ExecutionEngine/MCJIT/eh-lg-pic.ll | 6 +
test/ExecutionEngine/OrcMCJIT/eh-lg-pic.ll | 6 +
test/FileCheck/check-dag-not-dag.txt | 76 +
test/FileCheck/check-dag-overlap-torture.txt | 304 +
test/FileCheck/check-dag-overlap.txt | 221 +
test/FileCheck/check-empty.txt | 2 +-
test/FileCheck/check-label-dag.txt | 2 +-
.../check-multiple-prefixes-nomatch-2.txt | 2 +-
test/FileCheck/check-multiple-prefixes-nomatch.txt | 2 +-
test/FileCheck/check-not-diaginfo.txt | 5 +-
test/FileCheck/defines.txt | 13 +-
test/FileCheck/implicit-check-not.txt | 28 +-
test/FileCheck/match-full-lines.txt | 10 +-
test/FileCheck/var-expression.txt | 144 +-
test/FileCheck/verbose.txt | 115 +
test/FileCheck/verbose_mode.txt | 17 +
.../do-not-instrument-profiling-globals.ll | 4 +-
test/Instrumentation/AddressSanitizer/freebsd.ll | 12 +
.../AddressSanitizer/global_metadata.ll | 6 +-
.../AddressSanitizer/global_metadata_array.ll | 6 +-
.../AddressSanitizer/instrument_global.ll | 2 +-
.../Instrumentation/BoundsChecking/many-traps-2.ll | 65 +
test/Instrumentation/BoundsChecking/opt.ll | 358 +
test/Instrumentation/InstrProfiling/linkage.ll | 30 +-
test/Instrumentation/InstrProfiling/platform.ll | 37 +-
.../MemorySanitizer/check_access_address.ll | 3 +
test/Instrumentation/MemorySanitizer/msan_basic.ll | 4 +-
test/Instrumentation/cgprofile.ll | 41 +
test/LTO/Resolution/X86/Inputs/alias-alias-1.ll | 5 +
test/LTO/Resolution/X86/alias-alias.ll | 27 +
.../X86/diagnostic-handler-remarks-with-hotness.ll | 7 +-
.../Resolution/X86/diagnostic-handler-remarks.ll | 5 +-
test/LTO/Resolution/X86/export-jumptable.ll | 10 +-
test/LTO/X86/Inputs/dllimport.ll | 17 +
.../X86/diagnostic-handler-remarks-with-hotness.ll | 5 +-
test/LTO/X86/diagnostic-handler-remarks.ll | 5 +-
test/LTO/X86/dllimport.ll | 30 +
test/LTO/X86/pr38046.ll | 34 +
test/LTO/X86/triple-init.ll | 11 +-
test/LTO/X86/triple-init2.ll | 31 +
test/MC/AArch64/SVE/abs.s | 28 +
test/MC/AArch64/SVE/add-diagnostics.s | 22 +
test/MC/AArch64/SVE/add.s | 40 +
test/MC/AArch64/SVE/adr-diagnostics.s | 75 +
test/MC/AArch64/SVE/adr.s | 128 +
test/MC/AArch64/SVE/and-diagnostics.s | 22 +
test/MC/AArch64/SVE/and.s | 40 +
test/MC/AArch64/SVE/andv-diagnostics.s | 49 +
test/MC/AArch64/SVE/andv.s | 32 +
test/MC/AArch64/SVE/asr-diagnostics.s | 152 +
test/MC/AArch64/SVE/asr.s | 216 +
test/MC/AArch64/SVE/asrd-diagnostics.s | 41 +
test/MC/AArch64/SVE/asrd.s | 84 +
test/MC/AArch64/SVE/asrr-diagnostics.s | 21 +
test/MC/AArch64/SVE/asrr.s | 60 +
test/MC/AArch64/SVE/bic-diagnostics.s | 22 +
test/MC/AArch64/SVE/bic.s | 40 +
test/MC/AArch64/SVE/brka-diagnostics.s | 10 +
test/MC/AArch64/SVE/brka.s | 20 +
test/MC/AArch64/SVE/brkas-diagnostics.s | 19 +
test/MC/AArch64/SVE/brkas.s | 14 +
test/MC/AArch64/SVE/brkb-diagnostics.s | 10 +
test/MC/AArch64/SVE/brkb.s | 20 +
test/MC/AArch64/SVE/brkbs-diagnostics.s | 19 +
test/MC/AArch64/SVE/brkbs.s | 14 +
test/MC/AArch64/SVE/brkn-diagnostics.s | 28 +
test/MC/AArch64/SVE/brkn.s | 20 +
test/MC/AArch64/SVE/brkns-diagnostics.s | 28 +
test/MC/AArch64/SVE/brkns.s | 20 +
test/MC/AArch64/SVE/brkpa-diagnostics.s | 11 +
test/MC/AArch64/SVE/brkpa.s | 20 +
test/MC/AArch64/SVE/brkpas-diagnostics.s | 11 +
test/MC/AArch64/SVE/brkpas.s | 20 +
test/MC/AArch64/SVE/brkpb-diagnostics.s | 11 +
test/MC/AArch64/SVE/brkpb.s | 20 +
test/MC/AArch64/SVE/brkpbs-diagnostics.s | 11 +
test/MC/AArch64/SVE/brkpbs.s | 20 +
test/MC/AArch64/SVE/clasta-diagnostics.s | 113 +
test/MC/AArch64/SVE/clasta.s | 96 +
test/MC/AArch64/SVE/clastb-diagnostics.s | 113 +
test/MC/AArch64/SVE/clastb.s | 96 +
test/MC/AArch64/SVE/cls-diagnostics.s | 18 +
test/MC/AArch64/SVE/cls.s | 60 +
test/MC/AArch64/SVE/clz-diagnostics.s | 18 +
test/MC/AArch64/SVE/clz.s | 60 +
test/MC/AArch64/SVE/cmpeq-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmpge-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmpgt-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmphi-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmphs-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmple-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmplo-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmpls-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmplt-diagnostics.s | 28 +
test/MC/AArch64/SVE/cmpne-diagnostics.s | 28 +
test/MC/AArch64/SVE/cnot-diagnostics.s | 18 +
test/MC/AArch64/SVE/cnot.s | 60 +
test/MC/AArch64/SVE/cnt-diagnostics.s | 18 +
test/MC/AArch64/SVE/cnt.s | 60 +
test/MC/AArch64/SVE/cntb-diagnostics.s | 57 +
test/MC/AArch64/SVE/cntb.s | 44 +
test/MC/AArch64/SVE/cntd-diagnostics.s | 57 +
test/MC/AArch64/SVE/cntd.s | 44 +
test/MC/AArch64/SVE/cnth-diagnostics.s | 57 +
test/MC/AArch64/SVE/cnth.s | 44 +
test/MC/AArch64/SVE/cntp-diagnostics.s | 11 +
test/MC/AArch64/SVE/cntp.s | 32 +
test/MC/AArch64/SVE/cntw-diagnostics.s | 57 +
test/MC/AArch64/SVE/cntw.s | 44 +
test/MC/AArch64/SVE/compact-diagnostics.s | 44 +
test/MC/AArch64/SVE/compact.s | 20 +
test/MC/AArch64/SVE/cpy.s | 76 +
test/MC/AArch64/SVE/ctermeq-diagnostics.s | 25 +
test/MC/AArch64/SVE/ctermeq.s | 32 +
test/MC/AArch64/SVE/ctermne-diagnostics.s | 25 +
test/MC/AArch64/SVE/ctermne.s | 32 +
test/MC/AArch64/SVE/decp-diagnostics.s | 10 +
test/MC/AArch64/SVE/decp.s | 16 +
test/MC/AArch64/SVE/dup-diagnostics.s | 40 +
test/MC/AArch64/SVE/dupm-diagnostics.s | 16 +
test/MC/AArch64/SVE/eon-diagnostics.s | 10 +
test/MC/AArch64/SVE/eon.s | 16 +
test/MC/AArch64/SVE/eor-diagnostics.s | 22 +
test/MC/AArch64/SVE/eor.s | 40 +
test/MC/AArch64/SVE/eorv-diagnostics.s | 49 +
test/MC/AArch64/SVE/eorv.s | 32 +
test/MC/AArch64/SVE/ext-diagnostics.s | 43 +
test/MC/AArch64/SVE/ext.s | 36 +
test/MC/AArch64/SVE/fabd-diagnostics.s | 33 +
test/MC/AArch64/SVE/fabd.s | 54 +
test/MC/AArch64/SVE/fabs-diagnostics.s | 23 +
test/MC/AArch64/SVE/fabs.s | 54 +
test/MC/AArch64/SVE/facge-diagnostics.s | 16 +
test/MC/AArch64/SVE/facgt-diagnostics.s | 16 +
test/MC/AArch64/SVE/facle-diagnostics.s | 16 +
test/MC/AArch64/SVE/faclt-diagnostics.s | 16 +
test/MC/AArch64/SVE/fadd-diagnostics.s | 57 +
test/MC/AArch64/SVE/fadd.s | 88 +
test/MC/AArch64/SVE/fadda-diagnostics.s | 36 +
test/MC/AArch64/SVE/fadda.s | 26 +
test/MC/AArch64/SVE/faddv-diagnostics.s | 35 +
test/MC/AArch64/SVE/faddv.s | 26 +
test/MC/AArch64/SVE/fcadd.s | 28 +
test/MC/AArch64/SVE/fcmeq-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmge-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmgt-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmla-diagnostics.s | 10 +
test/MC/AArch64/SVE/fcmla.s | 40 +
test/MC/AArch64/SVE/fcmle-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmlt-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmne-diagnostics.s | 28 +
test/MC/AArch64/SVE/fcmuo-diagnostics.s | 16 +
test/MC/AArch64/SVE/fcpy.s | 28 +
test/MC/AArch64/SVE/fcvt.s | 28 +
test/MC/AArch64/SVE/fcvtzs.s | 28 +
test/MC/AArch64/SVE/fcvtzu.s | 28 +
test/MC/AArch64/SVE/fdiv-diagnostics.s | 33 +
test/MC/AArch64/SVE/fdiv.s | 54 +
test/MC/AArch64/SVE/fdivr-diagnostics.s | 33 +
test/MC/AArch64/SVE/fdivr.s | 54 +
test/MC/AArch64/SVE/fdup-diagnostics.s | 16 +
test/MC/AArch64/SVE/fexpa-diagnostics.s | 30 +
test/MC/AArch64/SVE/fexpa.s | 26 +
test/MC/AArch64/SVE/fmad-diagnostics.s | 33 +
test/MC/AArch64/SVE/fmad.s | 54 +
test/MC/AArch64/SVE/fmax-diagnostics.s | 31 +
test/MC/AArch64/SVE/fmax.s | 70 +
test/MC/AArch64/SVE/fmaxnm-diagnostics.s | 61 +
test/MC/AArch64/SVE/fmaxnm.s | 126 +
test/MC/AArch64/SVE/fmaxnmv-diagnostics.s | 35 +
test/MC/AArch64/SVE/fmaxnmv.s | 26 +
test/MC/AArch64/SVE/fmaxv-diagnostics.s | 35 +
test/MC/AArch64/SVE/fmaxv.s | 26 +
test/MC/AArch64/SVE/fmin-diagnostics.s | 61 +
test/MC/AArch64/SVE/fmin.s | 126 +
test/MC/AArch64/SVE/fminnm-diagnostics.s | 61 +
test/MC/AArch64/SVE/fminnm.s | 126 +
test/MC/AArch64/SVE/fminnmv-diagnostics.s | 35 +
test/MC/AArch64/SVE/fminnmv.s | 26 +
test/MC/AArch64/SVE/fminv-diagnostics.s | 35 +
test/MC/AArch64/SVE/fminv.s | 26 +
test/MC/AArch64/SVE/fmla-diagnostics.s | 82 +
test/MC/AArch64/SVE/fmla.s | 84 +
test/MC/AArch64/SVE/fmls-diagnostics.s | 82 +
test/MC/AArch64/SVE/fmls.s | 84 +
test/MC/AArch64/SVE/fmov-diagnostics.s | 16 +
test/MC/AArch64/SVE/fmov.s | 28 +
test/MC/AArch64/SVE/fmsb-diagnostics.s | 33 +
test/MC/AArch64/SVE/fmsb.s | 54 +
test/MC/AArch64/SVE/fmul-diagnostics.s | 76 +-
test/MC/AArch64/SVE/fmul.s | 88 +
test/MC/AArch64/SVE/fmulx-diagnostics.s | 33 +
test/MC/AArch64/SVE/fmulx.s | 54 +
test/MC/AArch64/SVE/fneg-diagnostics.s | 23 +
test/MC/AArch64/SVE/fneg.s | 54 +
test/MC/AArch64/SVE/fnmad-diagnostics.s | 33 +
test/MC/AArch64/SVE/fnmad.s | 54 +
test/MC/AArch64/SVE/fnmla-diagnostics.s | 28 +
test/MC/AArch64/SVE/fnmla.s | 54 +
test/MC/AArch64/SVE/fnmls-diagnostics.s | 28 +
test/MC/AArch64/SVE/fnmls.s | 54 +
test/MC/AArch64/SVE/fnmsb-diagnostics.s | 33 +
test/MC/AArch64/SVE/fnmsb.s | 54 +
test/MC/AArch64/SVE/frecpe-diagnostics.s | 21 +
test/MC/AArch64/SVE/frecpe.s | 26 +
test/MC/AArch64/SVE/frecps-diagnostics.s | 31 +
test/MC/AArch64/SVE/frecps.s | 26 +
test/MC/AArch64/SVE/frecpx.s | 28 +
test/MC/AArch64/SVE/frinta.s | 28 +
test/MC/AArch64/SVE/frinti.s | 28 +
test/MC/AArch64/SVE/frintm.s | 28 +
test/MC/AArch64/SVE/frintn.s | 28 +
test/MC/AArch64/SVE/frintp.s | 28 +
test/MC/AArch64/SVE/frintx.s | 28 +
test/MC/AArch64/SVE/frintz.s | 28 +
test/MC/AArch64/SVE/frsqrte-diagnostics.s | 21 +
test/MC/AArch64/SVE/frsqrte.s | 26 +
test/MC/AArch64/SVE/frsqrts-diagnostics.s | 31 +
test/MC/AArch64/SVE/frsqrts.s | 26 +
test/MC/AArch64/SVE/fscale-diagnostics.s | 33 +
test/MC/AArch64/SVE/fscale.s | 54 +
test/MC/AArch64/SVE/fsqrt.s | 28 +
test/MC/AArch64/SVE/fsub-diagnostics.s | 86 +
test/MC/AArch64/SVE/fsub.s | 144 +
test/MC/AArch64/SVE/fsubr-diagnostics.s | 61 +
test/MC/AArch64/SVE/fsubr.s | 126 +
test/MC/AArch64/SVE/ftmad-diagnostics.s | 48 +
test/MC/AArch64/SVE/ftmad.s | 42 +
test/MC/AArch64/SVE/ftsmul-diagnostics.s | 31 +
test/MC/AArch64/SVE/ftsmul.s | 26 +
test/MC/AArch64/SVE/ftssel-diagnostics.s | 21 +
test/MC/AArch64/SVE/ftssel.s | 26 +
test/MC/AArch64/SVE/incd-diagnostics.s | 22 +
test/MC/AArch64/SVE/incd.s | 40 +
test/MC/AArch64/SVE/inch-diagnostics.s | 22 +
test/MC/AArch64/SVE/inch.s | 40 +
test/MC/AArch64/SVE/incp-diagnostics.s | 10 +
test/MC/AArch64/SVE/incp.s | 16 +
test/MC/AArch64/SVE/incw-diagnostics.s | 22 +
test/MC/AArch64/SVE/incw.s | 40 +
test/MC/AArch64/SVE/index-diagnostics.s | 40 +
test/MC/AArch64/SVE/insr-diagnostics.s | 61 +
test/MC/AArch64/SVE/insr.s | 108 +
test/MC/AArch64/SVE/lasta-diagnostics.s | 82 +
test/MC/AArch64/SVE/lasta.s | 56 +
test/MC/AArch64/SVE/lastb-diagnostics.s | 82 +
test/MC/AArch64/SVE/lastb.s | 56 +
test/MC/AArch64/SVE/ld1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rd-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rqb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rqd-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rqh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rqw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rsb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rsh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rsw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1rw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1sb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1sh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1sw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld2b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld2d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld2h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld2w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld3b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld3d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld3h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld3w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld4b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld4d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld4h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ld4w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1sb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1sh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1sw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldff1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1sb-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1sh-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1sw-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnf1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnt1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnt1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnt1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/ldnt1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/lsl-diagnostics.s | 91 +
test/MC/AArch64/SVE/lsl.s | 160 +-
test/MC/AArch64/SVE/lslr-diagnostics.s | 21 +
test/MC/AArch64/SVE/lslr.s | 60 +
test/MC/AArch64/SVE/lsr-diagnostics.s | 92 +
test/MC/AArch64/SVE/lsr.s | 208 +-
test/MC/AArch64/SVE/lsrr-diagnostics.s | 21 +
test/MC/AArch64/SVE/lsrr.s | 60 +
test/MC/AArch64/SVE/mad-diagnostics.s | 19 +
test/MC/AArch64/SVE/mad.s | 60 +
test/MC/AArch64/SVE/mla-diagnostics.s | 19 +
test/MC/AArch64/SVE/mla.s | 60 +
test/MC/AArch64/SVE/mls-diagnostics.s | 19 +
test/MC/AArch64/SVE/mls.s | 60 +
test/MC/AArch64/SVE/mov-diagnostics.s | 76 +
test/MC/AArch64/SVE/mov.s | 76 +
test/MC/AArch64/SVE/movprfx-diagnostics.s | 193 +
test/MC/AArch64/SVE/movprfx.s | 97 +
test/MC/AArch64/SVE/msb-diagnostics.s | 19 +
test/MC/AArch64/SVE/msb.s | 60 +
test/MC/AArch64/SVE/mul-diagnostics.s | 48 +
test/MC/AArch64/SVE/mul.s | 120 +
test/MC/AArch64/SVE/neg.s | 28 +
test/MC/AArch64/SVE/not-diagnostics.s | 18 +
test/MC/AArch64/SVE/not.s | 52 +
test/MC/AArch64/SVE/orn-diagnostics.s | 10 +
test/MC/AArch64/SVE/orn.s | 16 +
test/MC/AArch64/SVE/orr-diagnostics.s | 34 +
test/MC/AArch64/SVE/orr.s | 40 +
test/MC/AArch64/SVE/orv-diagnostics.s | 49 +
test/MC/AArch64/SVE/orv.s | 32 +
test/MC/AArch64/SVE/pfalse-diagnostics.s | 10 +
test/MC/AArch64/SVE/pfalse.s | 14 +
test/MC/AArch64/SVE/pfirst-diagnostics.s | 19 +
test/MC/AArch64/SVE/pfirst.s | 20 +
test/MC/AArch64/SVE/pnext-diagnostics.s | 10 +
test/MC/AArch64/SVE/pnext.s | 38 +
test/MC/AArch64/SVE/prfb-diagnostics.s | 16 +
test/MC/AArch64/SVE/prfd-diagnostics.s | 16 +
test/MC/AArch64/SVE/prfh-diagnostics.s | 16 +
test/MC/AArch64/SVE/prfw-diagnostics.s | 28 +
test/MC/AArch64/SVE/ptest-diagnostics.s | 10 +
test/MC/AArch64/SVE/ptest.s | 20 +
test/MC/AArch64/SVE/punpkhi-diagnostics.s | 15 +
test/MC/AArch64/SVE/punpkhi.s | 20 +
test/MC/AArch64/SVE/punpklo-diagnostics.s | 15 +
test/MC/AArch64/SVE/punpklo.s | 20 +
test/MC/AArch64/SVE/rbit-diagnostics.s | 10 +
test/MC/AArch64/SVE/rbit.s | 60 +
test/MC/AArch64/SVE/rev-diagnostics.s | 17 +
test/MC/AArch64/SVE/rev.s | 32 +
test/MC/AArch64/SVE/revb-diagnostics.s | 19 +
test/MC/AArch64/SVE/revb.s | 54 +
test/MC/AArch64/SVE/revh-diagnostics.s | 24 +
test/MC/AArch64/SVE/revh.s | 48 +
test/MC/AArch64/SVE/revw-diagnostics.s | 29 +
test/MC/AArch64/SVE/revw.s | 42 +
test/MC/AArch64/SVE/sabd.s | 28 +
test/MC/AArch64/SVE/saddv-diagnostics.s | 49 +
test/MC/AArch64/SVE/saddv.s | 26 +
test/MC/AArch64/SVE/scvtf.s | 28 +
test/MC/AArch64/SVE/sdiv-diagnostics.s | 33 +
test/MC/AArch64/SVE/sdiv.s | 48 +
test/MC/AArch64/SVE/sdivr-diagnostics.s | 33 +
test/MC/AArch64/SVE/sdivr.s | 48 +
test/MC/AArch64/SVE/sdot-diagnostics.s | 74 +
test/MC/AArch64/SVE/sdot.s | 60 +
test/MC/AArch64/SVE/sel-diagnostics.s | 17 +
test/MC/AArch64/SVE/smax-diagnostics.s | 10 +
test/MC/AArch64/SVE/smax.s | 40 +
test/MC/AArch64/SVE/smaxv-diagnostics.s | 49 +
test/MC/AArch64/SVE/smaxv.s | 32 +
test/MC/AArch64/SVE/smin-diagnostics.s | 10 +
test/MC/AArch64/SVE/smin.s | 40 +
test/MC/AArch64/SVE/sminv-diagnostics.s | 49 +
test/MC/AArch64/SVE/sminv.s | 32 +
test/MC/AArch64/SVE/smulh-diagnostics.s | 19 +
test/MC/AArch64/SVE/smulh.s | 60 +
test/MC/AArch64/SVE/splice-diagnostics.s | 37 +
test/MC/AArch64/SVE/splice.s | 48 +
test/MC/AArch64/SVE/sqadd-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqadd.s | 16 +
test/MC/AArch64/SVE/sqdecd-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqdecd.s | 40 +
test/MC/AArch64/SVE/sqdech-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqdech.s | 40 +
test/MC/AArch64/SVE/sqdecp-diagnostics.s | 10 +
test/MC/AArch64/SVE/sqdecp.s | 16 +
test/MC/AArch64/SVE/sqdecw-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqdecw.s | 40 +
test/MC/AArch64/SVE/sqincd-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqincd.s | 40 +
test/MC/AArch64/SVE/sqinch-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqinch.s | 40 +
test/MC/AArch64/SVE/sqincp-diagnostics.s | 10 +
test/MC/AArch64/SVE/sqincp.s | 16 +
test/MC/AArch64/SVE/sqincw-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqincw.s | 40 +
test/MC/AArch64/SVE/sqsub-diagnostics.s | 22 +
test/MC/AArch64/SVE/sqsub.s | 16 +
test/MC/AArch64/SVE/st1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/st1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/st1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/st1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/st2b-diagnostics.s | 16 +
test/MC/AArch64/SVE/st2d-diagnostics.s | 16 +
test/MC/AArch64/SVE/st2h-diagnostics.s | 16 +
test/MC/AArch64/SVE/st2w-diagnostics.s | 16 +
test/MC/AArch64/SVE/st3b-diagnostics.s | 16 +
test/MC/AArch64/SVE/st3d-diagnostics.s | 16 +
test/MC/AArch64/SVE/st3h-diagnostics.s | 16 +
test/MC/AArch64/SVE/st3w-diagnostics.s | 16 +
test/MC/AArch64/SVE/st4b-diagnostics.s | 16 +
test/MC/AArch64/SVE/st4d-diagnostics.s | 16 +
test/MC/AArch64/SVE/st4h-diagnostics.s | 16 +
test/MC/AArch64/SVE/st4w-diagnostics.s | 16 +
test/MC/AArch64/SVE/stnt1b-diagnostics.s | 16 +
test/MC/AArch64/SVE/stnt1d-diagnostics.s | 16 +
test/MC/AArch64/SVE/stnt1h-diagnostics.s | 16 +
test/MC/AArch64/SVE/stnt1w-diagnostics.s | 16 +
test/MC/AArch64/SVE/sub-diagnostics.s | 22 +
test/MC/AArch64/SVE/sub.s | 40 +
test/MC/AArch64/SVE/subr-diagnostics.s | 10 +
test/MC/AArch64/SVE/subr.s | 40 +
test/MC/AArch64/SVE/sunpkhi-diagnostics.s | 36 +
test/MC/AArch64/SVE/sunpkhi.s | 26 +
test/MC/AArch64/SVE/sunpklo-diagnostics.s | 36 +
test/MC/AArch64/SVE/sunpklo.s | 26 +
test/MC/AArch64/SVE/sxtb.s | 28 +
test/MC/AArch64/SVE/sxth.s | 28 +
test/MC/AArch64/SVE/sxtw.s | 28 +
test/MC/AArch64/SVE/tbl-diagnostics.s | 27 +
test/MC/AArch64/SVE/tbl.s | 56 +
test/MC/AArch64/SVE/trn1-diagnostics.s | 59 +
test/MC/AArch64/SVE/trn1.s | 56 +
test/MC/AArch64/SVE/trn2-diagnostics.s | 59 +
test/MC/AArch64/SVE/trn2.s | 56 +
test/MC/AArch64/SVE/uabd.s | 28 +
test/MC/AArch64/SVE/uaddv-diagnostics.s | 44 +
test/MC/AArch64/SVE/uaddv.s | 32 +
test/MC/AArch64/SVE/ucvtf.s | 28 +
test/MC/AArch64/SVE/udiv-diagnostics.s | 33 +
test/MC/AArch64/SVE/udiv.s | 48 +
test/MC/AArch64/SVE/udivr-diagnostics.s | 33 +
test/MC/AArch64/SVE/udivr.s | 48 +
test/MC/AArch64/SVE/udot-diagnostics.s | 74 +
test/MC/AArch64/SVE/udot.s | 60 +
test/MC/AArch64/SVE/umax-diagnostics.s | 10 +
test/MC/AArch64/SVE/umax.s | 40 +
test/MC/AArch64/SVE/umaxv-diagnostics.s | 49 +
test/MC/AArch64/SVE/umaxv.s | 32 +
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