Tcwg-commits October 2018

tcwg-commits@lists.linaro.org

6 participants
6641 discussions

[llvm] branch master updated (09ab8e9f3ad -> 7b42e952770)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 09ab8e9f3ad [llvm-mca][BtVer2] Add tests for optimizable GPR register m [...] new 7b42e952770 [DAGCombiner] move comment closer to the corresponding code; NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[libcxx] branch master updated (e436a759b -> 2199647ac)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository libcxx. from e436a759b Add a test that shows what happens with throwing destructors. NFC. new 2199647ac Prefer to use the __is_XXX compiler intrinsics to the (old, b [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/type_traits | 53 +++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 39 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[llvm] branch master updated (1f4ef788a3b -> 09ab8e9f3ad)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 1f4ef788a3b [AARCH64][FIX] Emit data symbol for constant pool data new 4b25d67d1bc [InstCombine] Fix SimplifyLibCalls erasing an instruction w [...] new 09ab8e9f3ad [llvm-mca][BtVer2] Add tests for optimizable GPR register m [...] The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/llvm/Transforms/Utils/SimplifyLibCalls.h | 23 ++++- lib/Transforms/InstCombine/InstCombineCalls.cpp | 6 +- lib/Transforms/Utils/SimplifyLibCalls.cpp | 24 +++-- .../InstCombine/simplify-libcalls-erased.ll | 25 +++++ .../llvm-mca/X86/BtVer2/reg-move-elimination-4.s | 108 +++++++++++++++++++++ .../llvm-mca/X86/BtVer2/reg-move-elimination-5.s | 108 +++++++++++++++++++++ 6 files changed, 278 insertions(+), 16 deletions(-) create mode 100644 test/Transforms/InstCombine/simplify-libcalls-erased.ll create mode 100644 test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s create mode 100644 test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[lldb] branch master updated (6181ff2b2 -> 6bbfadfd3)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 6181ff2b2 [lldb] rename MinOS::minor to MinOS::minor_version etc. NFC new 6bbfadfd3 [lldb] Surpress copy-elison warning. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[lldb] branch master updated (672a1ad09 -> 6181ff2b2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository lldb. from 672a1ad09 Upstreaming the BridgeOS device support and the LC_BUILD_VERS [...] new 6181ff2b2 [lldb] rename MinOS::minor to MinOS::minor_version etc. NFC The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[clang] branch master updated (bb45239209 -> 851f70b951)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository clang. from bb45239209 [Tooling] Move CompilationDatabasePlugin to the Registry hea [...] new 851f70b951 Add support for 'dynamic_allocators' clause on 'requires' di [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/clang/AST/OpenMPClause.h | 32 ++++++++++++++++++++++ include/clang/AST/RecursiveASTVisitor.h | 6 ++++ include/clang/Basic/OpenMPKinds.def | 2 ++ include/clang/Sema/Sema.h | 4 +++ lib/AST/OpenMPClause.cpp | 2 ++ lib/AST/StmtPrinter.cpp | 5 ++++ lib/AST/StmtProfile.cpp | 3 ++ lib/Basic/OpenMPKinds.cpp | 2 ++ lib/CodeGen/CGStmtOpenMP.cpp | 1 + lib/Parse/ParseOpenMP.cpp | 1 + lib/Sema/SemaOpenMP.cpp | 13 +++++++++ lib/Sema/TreeTransform.h | 7 +++++ lib/Serialization/ASTReader.cpp | 7 +++++ lib/Serialization/ASTWriter.cpp | 4 +++ test/OpenMP/requires_unified_address_ast_print.cpp | 3 ++ test/OpenMP/requires_unified_address_messages.cpp | 7 ++++- tools/libclang/CIndex.cpp | 3 ++ 17 files changed, 101 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[newlib] branch master updated (103b05503 -> 4f7a6c326)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository newlib. from 103b05503 Add generic implementation of fdopendir() new 4f7a6c326 newlib/libc/ctype/jp2uc.c: Declare "cs" variable as "const char *" The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: newlib/libc/ctype/jp2uc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

6 years, 1 month

[toolchain/llvm/llvm] branch linaro-local/thomas.preudhomme/tcwg-1428-rebase updated (7b79106af28 -> a319a84535c)

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This is an automated email from the git hooks/post-receive script. thomas.preudhomme pushed a change to branch linaro-local/thomas.preudhomme/tcwg-1428-rebase in repository toolchain/llvm/llvm. discards 7b79106af28 FileCheck: Add support for variable expressions adds 20e8e6e68f6 [ARM][NFC] Replaced tab characters in test file vfcmp.ll. adds b40956fe649 [yaml2obj] - Add a support for changing EntSize. adds af11d878af2 vs integration: fix default path to clang-cl adds 1e99c608efe vs integration: update the publisher name adds bb0d1d0b486 vs integration: bump version number adds 8a69efc9542 [X86][SSE] Add more non-uniform exact sdiv vector tests cov [...] adds 4fcef69e659 [TargetLowering] Add support for non-uniform vectors to BuildUDIV adds 23332c50c13 [DebugInfo] Reduce debug_str_offsets section size adds 6d74417eb4f [Tablegen] In TargetSchedule.td: Remove unused argument `pf [...] adds 82571dfdc11 [mips] Handle branch expansion corner cases adds b2fdb72a010 Fix inconsistency with/without debug information (-g) adds 926b53bb067 [GVN,NewGVN] Move patchReplacementInstruction to Utils/Local.h adds c8c3302c884 [SystemZ] NFC: Remove redundant check in SystemZHazardRecognizer. adds daf385e5698 [SystemZ] Comment update. adds 1b7b25a0230 [InstSimplify] move misplaced minnum/maxnum tests; NFC adds 7e35c221fbd [InstSimplify] add tests for minnum/maxnum with shared op; NFC adds 5ab217ce421 [InstSimplify] move minnum/maxnum with common op fold from [...] adds ee2e6d806cf [X86] MCA tests for XCHG*, XADD* and CMPXCHG* instructions [...] adds 13f3fc4d277 [TargetLowering] Use pre-computed Shift value type in Build [...] adds 29e9277c6c2 [DAG] Allow non-uniform constant vectors to call BuildSDIV adds 5aa74422b69 [ARM] FP16: codegen support for VACGT adds 512264ba6eb [GVN,NewGVN] Keep nonnull if K does not move. adds b0e8dee0f66 [RFC] Build LLVM-C.dll on MSVC that exports only the C API adds bddc6e21c75 [SelectionDAG][X86][SystemZ] Add a generic nonvolatile_stor [...] adds bd8a67bd05d [SelectionDAG] When splitting scatter nodes during DAGCombi [...] adds 9ff34990e52 [LICM] Strengthen assume hoisting tests [NFC] adds 9ff4d237d03 [SampleFDO] Fix a bug in getOrCompHotCountThreshold/getOrCo [...] adds 0b9e7ad06cc [SLP] Fix insert point for reused extract instructions. adds b651cfc7119 [InstSimplify] add tests for fadd/fsub; NFC adds ef9e4010080 Update msbuild integration warnings: Don't warn on /Zi and /X adds c10f372ba1e [InstSimplify] fold fsub+fsub with common operand adds c544ebb3658 [WebAssembly] CFG sort support for exception handling adds a8ab9e6d20b [Local] Add dbg location on unreachable inst in changeToUnr [...] adds a5d9c8f92a2 [InstSimplify] fold fadd+fsub with common operand adds c517d08361a [InstSimplify] fold fsub+fadd with common operand adds 9b5ab2cc213 [Hexagon] Allow use of gather intrinsics even with no-packets adds 638925075c5 [lit, python3] Update lit error logging to work correctly i [...] adds ab3088f7413 [lit] Disable shtest-timeout on Windows adds 4f8862743a4 [WebAssembly] Update SIMD binary arithmetic adds dcf686e1e73 AMDGPU: Remove broken i16 ternary patterns adds 5718b6f1bcb Refactor FileCheck to make it usable as an API adds 4d56d49ce18 [Coverage] Delete getCounterMismatches, it's dead code (NFC) adds 71a5ad442b3 [Coverage] Ignore 'unused' functions with non-zero executio [...] adds 80b87c3cb3f [InstCombine] add tests for fneg of fmul/fdiv with constant; NFC adds eeed30a7348 [NFC] adding tests for Y - (X + Y) --> -X adds aa84ac19e44 [InstCombine] fix FP constant in test; NFC Too many digits... adds b69cebd658b [InstCombine] add tests for fneg fold including FMF; NFC adds 70dbc396c83 [tablegen] Improve performance of -gen-register-info by rep [...] adds 31a9127a617 [MS Demangler] Properly handle backreferencing of special names. adds 84029c02723 [NFC] Add some tests on mustexec adds ea2a187f0de [ARM] FP16: support the vector vmin and vmax variants adds 9b16a0bf49b [NFC][InstCombine] Cleanup demorgan-sink-not-into-xor.ll test adds ba39c1b56cd Support inline asm with multiple 64bit output in 32bit GPR adds 93ef7cf14b5 [ARM] FP16: support vector INT_TO_FP and FP_TO_INT adds 2b9bc063aef [TargetLowering] BuildUDIV - Early out for divide by one (PR38477) adds 6c395a1b585 [Wasm] Don't iterate over MachineBasicBlock::successors whi [...] adds b10a250635f [X86][SSE] Add divide-by-one exact sdiv vector test adds 648f1e065da [ARM] FP16: vector VMUL variants adds 32fc17a3577 [ARM] FP16: vector vmov and vdup support adds 52db212f747 [ARM] FP16: codegen support for VEXT adds b6b375c7eca [InstCombine] De Morgan: sink 'not' into 'xor' (PR38446) adds f925727f874 test commit access adds 98bb3fb6304 [TargetLowering] Remove APInt divisor argument from BuildEx [...] adds cee64098465 [X86][SSE] PR38477 test is more cleanly tested with udiv in [...] adds 752da31e957 [InstCombine] fold fneg into constant operand of fmul/fdiv adds c1affcdede1 Add a CommandGuide for llvm-objdump adds 497f7d27c63 [ARM][NFC] Replaced tab-characters in test file vtrn.ll adds 2c34155a200 [RISCV] Add InstAlias definitions for add[w], and, xor, or, [...] adds 8a325745713 [TargetLowering] BuildUDIV - Add support for divide by one [...] adds 5e1abaf015b [RISCV] Add mnemonic alias: move, sbreak and scall. adds 2235c76a9bf [CodeGen] emit inline asm clobber list warnings for reserved adds 15de990f32d [PowerPC] Improve codegen for vector loads using scalar_to_vector adds cf105970b5e [DAG] DAGCombiner::visitSDIVLike - remove unnecessary isCon [...] adds caea841122c [InstCombine] add tests for fsub folds; NFC adds bd96310a2c7 [InstCombine] fold fsub+fsub with common operand adds 6b0047a7da8 [InstCombine] fold fadd+fsub with common operand adds 86e6f59695e [DebugInfo] Fine tune emitting flags as part of the producer adds 7689b8dd09a [WASM] Fix overflow when reading custom section adds 35d3bbfa095 AMDGPU: Fix shifts for i128 adds f1757fd8077 AMDGPU: Error more gracefully on libcalls adds 18b615c1644 [Hexagon] Diagnose misaligned absolute loads and stores adds 26f3bc576f6 revert '[CodeGen] emit inline asm clobber list warnings for [...] adds 6e073ca8401 [MS Demangler] Create a new backref context for template in [...] adds 741af08ef57 revert tests of '[CodeGen] emit inline asm clobber list war [...] adds 650bbe0ff0d Fix missing C++ mode comment in header adds aae8303b436 [ARM] Avoid spilling lr with Thumb1 tail calls. adds 1f6a7581c2d cmake: Store LLVM_VERSION_SUFFIX in LLVMConfig.cmake adds c007b4db6bc [cmake] Append LLVM_VERSION_SUFFIX to SOVERSION adds 71299703e41 [DWARF] Unclamp line table version on Darwin for v5 and later. adds e32dc0cc26c [x86] add tests for fsub+fadd with FMF; NFC adds 85ffa199e1c [ADT] Normalize empty triple components adds e52df1611ad [Demangle] Add another test for ItaniumPartialDemangler adds e6de6e24204 [DAGCombiner] move fadd simplification ahead of other folds adds a521995ff00 [DAGCombiner] loosen constraints for fsub+fadd fold adds f44662e5c40 [x86] add test for commuted variant for fsub fold; NFC adds f787c2d837a [DWARF] Verifier now handles .debug_types sections. adds 13ced78da16 [CMake] Use normalized Windows target triples adds 0cb6e749d53 [LICM] Add an assert to ensure all instruction types needin [...] adds f67b15406f7 [NFC] ConstantMerge: don't insert when find should be used adds dad5e8aacd2 [LICM] Add tests for future hoisting of fence instructions [NFC] adds 8e0b205f3bd [RISCV] Add "lla" pseudo-instruction to assembler adds 8da71ffd55f [NVPTX] Select atomic loads and stores adds 2b0633ba70f cmake: don't pack system libs unless CMAKE_INSTALL_UCRT_LIB [...] adds d6879f9d248 [X86] Improved sched models for X86 XCHG*rr and XADD*rr ins [...] adds 3e3f55fb7f0 vs integration: update the manifest to require VS 2017 adds 660ae1d9b90 vs integration: bump version number adds 2a529f7aa0b [X86][SSE] Combine (some) target shuffles with multiple uses adds d5be0360b62 [X86][SSE] Remove PMULDQ/PMULUDQ by zero adds cc67ca7ead1 [ARM] FP16: codegen support for VTRN adds c5db0e0f7c7 [TargetLowering] Add BuildSDIVPattern helper to BuildExactS [...] adds 2998722fb03 [InstCombine] reduce code duplication; NFC adds ead8b39fb5b [MC] Remove PhysRegSize from MCRegisterClass adds d99d65710d0 [MC][PredicateExpander] Extend the grammar to support simpl [...] adds 5e77ae5ff56 [ARM] Replace processor check with feature adds 431efe4a237 [ARM] Adjust the feature set for Exynos adds 5a282e54d07 extend folding fsub/fadd to fneg for FMF adds 6bbc345f937 [llvm-objcopy] Add --dump-section adds 3d464de9687 [SelectionDAG] try harder to convert funnel shift to rotate adds cddb95c7bc9 [GlobalOpt] Don't apply fastcc if it would break inalloca i [...] adds 123d5beafd7 [InstCombine] add vector tests for fsub+fmul; NFC adds ffc59809e8c [llvm-objcopy] Add --prefix-symbols option adds 2c03a06c9e8 SCEV should forget all loops containing a deleted block. adds 0ea64366b04 [Hexagon] Map ISD::TRAP to J2_trap0(#0) adds 4afd04a7bb6 [NFC] Remove magic bool param in RAUW adds 425788d8b59 Fix few g++ 8 warning with non obvious copy object operations adds ccbe637eb27 [InstCombine] allow fsub+fmul FMF folds for vectors adds 677e12bf9f7 Remove obsolete policy settings adds 33f1bc4cd7b Fix typo adds fbcccaf8cc6 [LICM] hoist fences out of loops w/o memory operations adds f88a6410d3a [RISC-V] Fixed alias for addi x2, x2, 0 adds 3173bbdb726 [LICM] Suppress a compiler warning noticed by one of the bots adds 9d9ecd48fb7 ConstantMerge: update MadeChange when change is made adds 01d33f7676b [NFC] ConstantMerge: factor out some functions adds 43efefa1c86 Add owner for llvm-objcopy adds 54b09599fc4 [InstSimplify] move minnum/maxnum with Inf folds from instcombine adds 3b9733f095c [MC] Move EH DWARF encodings from MC to CodeGen, NFC adds 2c938a6f65d [WebAssembly] Fix wasm backend compilation on gcc 5.4: vari [...] adds 0904319a620 ValueTracking: Start enhancing isKnownNeverNaN adds 024925d385a [llvm-objcopy] NFC: Add some color to error() adds e598b5c8618 [X86] Qualify one of the heuristics in combineMul to only a [...] adds 36f54002c93 [WebAssembly] Gate i64x2 and f64x2 on -wasm-enable-unimplemented adds af0751b6c0c [InstCombine] Transform str(n)cmp to memcmp adds 3e5777f3b95 [MemorySSA] "Fix" lifetime intrinsic handling adds 252445ebb1e [MSan] Shrink the register save area for non-SSE builds adds 224f18f3582 [NFC] Add tests that demonstrate that MustExecute is fundam [...] adds 201534e1aa6 Rename the cfguard module flag to cfguardtable adds 6ec2af8bc68 [Tablegen][SubtargetEmitter] refactor method `emitSchedMode [...] adds be12728bc54 Fix -Wimplicit-fallthrough warning introduced in rL339397. adds a59f7f099c7 [X86][SSE] Pull out repeated shift getOpcode() calls. NFCI. adds c709c56b9ad [ARM] Disallow zexts in ARMCodeGenPrepare adds f034be4325e [MS Demangler] Fix several issues related to templates. adds 2255d8ef79a [MS Demangler] Disable a couple of tests. adds 10ff79db772 [MS Demangler] Properly demangle conversion operators. adds abd85864811 [InstCombine] rearrange code for foldSelectBinOpIdentity; NFCI adds 78f83ec7216 [InstCombine][NFC] Added tests for select with binop fold adds 395e45dbe5c [InstCombine] revert r339439 - rearrange code for foldSelec [...] adds 9f42ecf77b0 [hwasan] Add -hwasan-with-ifunc flag. adds 807955f3a5c [llvm-objcopy] NFC: consistently use typename ELFT::<X> def [...] adds 8da2e112bcd [MS Demangler] Add conversion operator tests. adds b5eef713770 [InstCombine] add/update tests for selectBinOpIdentity; NFC adds 5aaa8205c76 Update the coding standards and developer policy documentat [...] adds 2388a7db339 AMDGPU: Add LLVM_FALLTHROUGH adds 4d8cda85adf AMDGPU: Match isfinite pattern to class instructions adds 203b8a7809b AMDGPU: Turn class x, p_zero|n_zero into fcmp oeq x, 0 adds a13d395b9e1 AMDGPU: Combine and of seto/setuo and fp_class adds 3119fcce36e revert r339450 - [MS Demangler] Add conversion operator tests adds 7f32e5e1904 AMDGPU: More canonicalized operations adds f819cf9ca33 [MS Demangler] Demangle cv qualifiers on template args. adds bdbdf525e9b Resubmit r339450 - [MS Demangler] Add conversion operator tests adds 55b4407c7d6 [InstCombine] add tests to show disabling of libcall/intrin [...] adds 2427dc2a353 [llvm-mca] Make InstrBuilder::getOrCreateInstrDesc private. NFC. adds c5553c47ec1 [InstCombine] rearrange code for foldSelectBinOpIdentity; NFCI adds 65ef1d041c5 [InstCombine] add tests for fsub factorization; NFC adds cffbbb125ea [MS Demangler] Support extern "C" functions. adds 0365cb94940 [ARM] Adjust AND immediates to make them cheaper to select. adds eb8079e8235 [WebAssembly] Added default stack-only instruction mode for MC. adds df25b5d38f4 [NFC] More ConstantMerge refactoring adds 033cdeca678 Fix unused lambda capture warning from r339472. adds a82514350b2 Revert "[NFC] More ConstantMerge refactoring" adds c0723309373 [LICM] Hoist assumes out of loops adds 018235abdfc Re-commit "[NFC] More ConstantMerge refactoring" adds 202efa74090 AMDGPU/GlobalISel: Define instruction mapping for G_INSERT adds 1c0dd31a783 [gold] Fix Tests cases on i686 adds 5b2a776ed94 Fix WebAssembly instruction printer after r339474 adds 6534d1052fd [X86] Change the MOV32ri64 pseudo instruction to def a GR64 [...] adds 91ac2ac7f5d [X86] Remove ADD8mi and ADDmr from the macro fusion shouldS [...] adds 85b787154c9 [X86] Add the mem-reg form of CMP to the macro fusion shoul [...] adds df14c7f5472 [X86] Remove the AL/AX/EAX/RAX short immediate forms from t [...] adds d2a6b5951c9 [UnJ] Create a hasInvariantIterationCount function. NFC adds 6fb93f326da [UnJ] Improve explicit loop count checks adds bfd4fdf0e5f [Dominators] Remove the DeferredDominance class adds 4751420c7e3 [X86] Remove unnecessary AddedComplexity line. NFC adds 80ad764eba7 [TargetLowering] Use APInt::isSubsetOf to simplify some code. NFC adds a19815f1d99 [TargetLowering] Simplify one of the special cases in Simpl [...] adds 8750be505da AMDGPU: Fix packing undef parts of build_vector adds 3b2fa4ee595 AMDGPU: Use splat vectors for undefs when folding canonicalize adds 10398322afa AMDGPU: Check NSZ MI flag when folding omod adds ac6c5d8a364 [InstSimplify] Guard against large shift amounts. adds 09ceeb3f508 [InstCombine] move/add tests for fadd/fsub factorization; NFC adds fa0e915a8e4 [InstCombine] fix/enhance fadd/fsub factorization (X * Z) [...] adds 9ff5ab2f4e0 [InstCombine] Fold Select with binary op - non-commutative opcodes adds cac6dd83b25 [Support][JSON][NFC] Silence GCC warning about broken stric [...] adds 3d3659c1e9f [NFC] Renamed test file adds bae42d6404a [NFC] Fixed build, updated tests adds f0912abc34c DAG: Check no-signed-zeros instead of unsafe-fp-math adds 1f25a887f69 AMDGPU: Cleanup min/max legacy tests adds d0ee5d297e8 [globalisel] Remove dead code from GlobalISelEmitter adds 3bc135240d9 [X86] Add constant folding for AVX512 versions of scalar fl [...] adds 069f0c31f78 [InstCombine] Replace call to haveNoCommonBitsSet in visitX [...] adds 6145f7d3cff [InstCombine] Fix typo in comment. NFC adds 7bbb4c9b165 [SelectionDAG] In PromoteFloatRes_BITCAST, insert a bitcast [...] adds fa3003a7832 Restore correct x86_64 EH encodings in kernel code model adds 36c59846ae3 [SelectionDAG] In PromoteIntRes_BITCAST, when the input is [...] adds 3638207d8f9 [SelectionDAG] In PromoteFloatOp_BITCAST, insert a bitcast [...] adds ffc8c538b70 [GuardWidening] Widen very likely non-taken br instructions adds 4514ca2f1dd [ARM] Added FP16 VREV Vector Instrinsic CodeGen support adds 5da7a1c1e5e Remove extra semicolon (fixes -Wpedantic warning). NFCI. adds ef546c9d7f2 [Sparc] Add support for the cycle counter available in GR740 adds 61e1c20944b [Tablegen][SubtargetEmitter] Improve expansion of predicate [...] adds 4177d36e035 [CGP] Fix GEP issue with out of range APInt constant values [...] adds 47b52ac4d99 [DAGCombiner] simplifyDivRem - add comment describing divid [...] adds a73fb6d0ab6 [X86] Add tests showing missing div/rem 0, X -> 0 combines adds 6cc0fcd6bb5 [SystemZ] Increase the amount of inlining. adds d9eaefb8663 Check for tied operands adds 01087accf22 Revert "[Sparc] Add support for the cycle counter available [...] adds 423c85b5519 [Hexagon] Silence -Wuninitialized warning from GCC 5.4, NFC adds 87972c49190 [Tablegen] Replace uses of formatted_raw_ostream with raw_o [...] adds 13b933258d8 [SLC] Expand simplification of pow() for vector types adds 709aadb7c35 [InstCombine] auto-generate full checks and add cos intrins [...] adds 77d3f0227a5 [itanium demangler] Add llvm::itaniumFindTypesInMangledName() adds d2f20dd1d7c [InstCombine] Limit simplifyAllocaArraySize constant foldin [...] adds b4de19d7ebf [ADT] Implemented unittests for ImmutableList adds 31ff4125c7d Attempt to fix some MSVC build errors. adds 3a74b4221a7 [SimplifyLibCalls] reduce code for optimizeCos; NFCI adds 09af9d2e29f [X86][BtVer2] Use NoSchedPredicate to model default transit [...] adds fd195ce798b [llvm-mca] Propagate fatal llvm-mca errors from library cla [...] adds b15a8309585 [InstCombine] add more tests for trig reflections; NFC (PR38458) adds 7b19ab70e3e [CodeGen] Fix assert in SelectionDAG::computeKnownBits adds e8a927c34a0 [InstCombine][NFC] Tests for 'signed truncation check' opti [...] adds 8b80050699f [SimplifyLibCalls] add reflection fold for -sin(-x) (PR38458) adds f3c7df4a0ed NFC: Add a test to LV showing that reduction is not possibl [...] adds 6c5927533a7 [SimplifyLibCalls] don't drop fast-math-flags on trig refle [...] adds 6a6b35cd86b revert r339608 - [SimplifyLibCalls] don't drop fast-math-fl [...] adds 3edbc102ddf [InstCombine] Optimize redundant 'signed truncation check p [...] adds 8244893b611 Revert "[InstCombine] Optimize redundant 'signed truncation [...] adds a391f98615b [llvm-objcopy] NFC: Fix minor formatting issues adds 9ee8a957cc4 [SimplifyLibCalls] don't drop fast-math-flags on trig refle [...] adds 7705bede805 [NFC][InstCombine] Add a test for D50465 that used to assert adds f91b41f4020 [InstCombine] Re-land: Optimize redundant 'signed truncatio [...] adds 656d5d59d3a [X86] Don't ignore 0x66 prefix on relative jumps in 64-bit [...] adds 5fada2e94d8 [AST] Cleanup code by using MemoryLocation utility [NFC] adds 20a211a99b5 [AST] Minor formatting cleanup [NFC] adds f0b29b88a47 [Support] NFC: Allow modifying access/modification times in [...] adds a297d964167 Revert "[WebAssembly] Added default stack-only instruction [...] adds 3ea7b0a0b1e [BasicAA] Don't assume tail calls with byval don't alias allocas adds d64c9dd5388 [ThinLTO] Handle optional args in assembly format for ConstVCalls adds 78ac4b1f01c [CMake] Split -gx strip flag into -g -x adds d3b60bef640 [ThinLTO] Fix printing of WPD remarks adds a3a6a7d1b97 [NFC] Add comprehensive test of AliasSetTracker with guards adds b0ee0d322a6 [NFC] Modify comment to make it more precise adds 35b2115503a [ARM] ParallelDSP: add option to enable/disable the pass adds 8ec69ac247c [X86] Lowering addus/subus intrinsics to native IR adds 7525376ccf3 Test commit: fix punctuation adds 1fb2ad5ddc4 [RISCV] Fix incorrect use of MCInstBuilder adds 17454e67ca5 [X86] Constant folding of adds/subs intrinsics adds 922ac36549e Fix MSVC "compiler limit: blocks nested too deeply" error. NFCI. adds 62fcc622307 [TableGen] Pass string/vector types by const reference (PR3 [...] adds 0904155b95b [GlobalISel][IRTranslator] Fix a bug in handling repeating [...] adds cb8c5e417d5 [DebugInfo] Generate DWARF debug information for labels. (F [...] adds 08a2e24fdca [X86][SSE] Generalize lowerVectorShuffleAsBlendOfPSHUFBs to [...] adds 8bdeb675f27 [InstCombine] regenerate checks; NFC adds dd807ea799a [Inliner] add inliner stats to new pm version of inliner adds 0e18d0dcb9c [InstCombine] regenerate checks; NFC adds 76cf1f6a8b0 [X86][SSE] Add shuffle combine tests for OR(PSHUFB,PSHUFB) [...] adds 9c0c0a23efe [X86][SSE] Add shuffle combine support for OR(PSHUFB,PSHUFB [...] adds 2f6f2fb76a6 [DAG] Avoid redundant chain transversal in store merge cycl [...] adds f921d44a03e Expose CFG Update struct. Define GraphTraits to get childre [...] adds 1645076dc8e [NFC] Tests for select with binop fold - FP opcodes adds dd11fa16f91 [DomTree] Cleanup Update and LegalizeUpdate API moved to Su [...] adds a06c0f8edb7 [X86][SSE] Avoid duplicate shuffle input sources in combine [...] adds e747ac6d9aa [GraphDiff] Make InverseGraph a property of a GraphDiff. adds 8c444324e7b Revert "[DebugInfo] Generate DWARF debug information for la [...] adds 1464f16217a [LV] Teach about non header phis that have uses outside the loop adds e9759ddbdc5 [Tablegen][MCInstPredicate] Removed redundant template argu [...] adds 95688ee84cf [WebAssembly] SIMD extract_lane adds addd2704187 [MS Demangler] Fix some minor formatting bugs. adds 35b45c96579 [WebAssembly] Fix encoding of non-SIMD vector-typed instructions adds 18a9130c102 [InstCombine] add tests for pow->sqrt; NFC adds 35b8f4b065f [WebAssembly] SIMD encoding tests adds adcef01bd74 [InstCombine] fix typos in tests; NFC adds c4d19094354 [DebugInfoMetadata] Added DIFlags interface in DIBasicType. adds a3fdc1d2931 NFC: Clarify comment in loop vectorization legality adds 5c7c276dd6d Add proper headers in CFGUpdate.h and add CFGDiff.h in the [...] adds 3bd565f2797 Remove vestiges of configure buildsystem adds 4db82cd15b0 [SanitizerCoverage] Add associated metadata to PC guards. adds 1a5e05d0703 [ARM] Make PerformSHLSimplify add nodes to the DAG worklist [...] adds ca4f10703e3 [FPEnv] Scalarize StrictFP vector operations adds c35538fcabb [WebAssembly] Delete a specific push number from test expectations adds fc187011bee [SDAG] Remove the reliance on MI's allocation strategy for [...] adds 34c8f3ddbad [WebAssembly] SIMD Splats adds 6203c9bd082 [hwasan] Add a basic API. adds f464242872b [SDAG] Update the AVR backend for the SelectionDAG API chan [...] adds eb72488593a [X86] Change legacy SSE scalar fp to integer intrinsics to [...] adds 7caa753e199 [NFC][LICM] Make hoist method void adds a3bb636475f [NFC] Add sanitizing assertion to ICF tracker adds d823f47a683 [NFC] Refactoring of LoopSafetyInfo, step 1 adds 9e9c1c4ddd5 [AliasSetTracker] Do not treat experimental_guard intrinsic [...] adds 90048a82062 [ARM] Allow pointer values in ARMCodeGenPrepare adds 81654d23626 [ARM] Allow signed icmps in ARMCodeGenPrepare adds 7e6dd0cff77 [TargetLowering] Add support for non-uniform vectors to Bui [...] adds c60b833f830 [DagCombiner] Don't bother adding to the work list if TLI.B [...] adds 0f7eb9f5326 [TargetLowering] Minor refactor to TargetLowering::BuildUDI [...] adds 406608e1b08 [X86] Add sibling-call test cases adds da4cfd320c2 [X86][SSE] Add sdiv by nonuniform constant vector tests adds a5f4d299297 [UnJ] Rename hasInvariantIterationCount to hasIterationCoun [...] adds f965428b0ed [TargetLowering] Minor cleanup of TargetLowering::BuildSDIV. NFCI. adds 3ea0447ec7a [yaml2obj] - Teach tool to produce SHT_GROUP section with a [...] adds 8ae415fb86e Remove lambda default argument to fix gcc pedantic warning. adds 47bbfe3bd01 [llvm-mca] Fix PR38575: Avoid an invalid implicit truncatio [...] adds 7c82b970fb5 [PowerPC] Don't run BV DAG Combine before legalization if i [...] adds 3dd52420555 [ARM] TypeSize lower bound for ARMCodeGenPrepare adds 312924a2b1c [yaml2obj] - Teach yaml2obj to produce SHT_GROUP section wi [...] adds 0566eefef9c [SimplifyCFG] Remove pointer from SmallPtrSet before deletion adds d9e857fb583 [SystemZ] New CL option to enable subreg liveness adds 33a5d47e0f1 [GVN] Fix typo in IsValueFullyAvailableInBlock. NFC. adds 9f59a11e239 [SystemZ] Replace subreg_r with subreg_h adds 4df6ca02ff2 [PowerPC] Enhance the selection(ISD::VSELECT) of vector type adds 165c0cc4857 [SystemZ] Add testcase for r339778 adds d7a0236f295 [RegAlloc] Check that subreg liveness tracking applies to g [...] adds ffcf1047060 [WebAssembly] SIMD replace_lane adds 28f0c7ef0ac [RegisterCoalescer] Reset VNInfo def when copying segments over adds b581cf5c17b [x86] add tests for poor vector intrinsic lowering via lega [...] adds 6faab4de878 [x86] add fabs test for vector intrinsic to potential libca [...] adds 0d5de60cbee [RegisterCoalescer] Ensure that both registers have subrang [...] adds 8529a08ceb1 [AArch64] add tests for poor vector intrinsic lowering via [...] adds 41df26a4e56 [MemorySSA] Expose the verify as a debug option. adds 9dfeae47a7c [InstCombine] Fix IC trying to create a xor of pointer types. adds 8bb6fcb54b3 [WebAssembly] Test commit adds a2ac910471e llvm-readobj: Fix addend in relocations for android packed format adds e94c82ccbba [WebAssembly][NFC] Standardize SIMD multiclass format adds e0dc5c1ea20 [Support] Add a basic C API for llvm::Error. adds 30db32fcf12 Revert "[ARM] Allow signed icmps in ARMCodeGenPrepare" adds c2a24b87802 [MCJIT] Fix a case of Error::success() being passed to repo [...] adds e79e42e6c4d DAG: Try to custom lower when promoting float operands adds 1cdda230e96 [TableGen] Remove unnecessary TypeSetByHwMode -> ValueTypeB [...] adds 982d395b2af DAG: Use getObjectOffset helper adds abf0ee059c4 AMDGPU: Address todo for handling 1/(2 pi) adds 6737250f979 AMDGPU: Stop producing icmp/fcmp intrinsics with invalid types adds ecc93786a13 [X86] Improve AVX1 shuffle lowering for v8f32 shuffles wher [...] adds 5f9b848ed3e AMDGPU: Implement llvm.amdgcn.icmp/fcmp for i16/f16 adds 6030329f4bc AMDGPU: Improve extract_vector_elt reduction combine adds d82cfba790c AMDGPU: Fold fneg into fmed3 adds c4dcd354354 [CodeGenPrepare] Add BothExtension type to PromotedInsts adds 61d7ed20677 [llvm-mca] Minor style changes. NFC adds 8f94a553bfa [Metadata] Replace a SmallVector with an array; NFC adds 21f571c07cb [BFI] Use rounding while computing profile counts. adds d914c51df99 [x86] Actually initialize the SLH pass with the x86 backend [...] adds ec2710fb9b3 [X86] Correct some bad FileCheck prefixes in tests. Add tes [...] adds 58d47fbc549 [X86] Remove the unused masked 128 and 256-bit masked padds [...] adds 6914988dcf2 [X86] Remove masking from the 512-bit padds and psubs intri [...] adds 2a96c80ff2a [NFC] Add missing const modifier adds 83b908472d7 [NFC] Remove const modifier to allow further development in LICM adds 87ed975f8b5 [mips] Remove dead code from MipsPassConfig adds 7d16ffe5b76 [ARM] Allow signed icmps in ARMCodeGenPrepare adds 547d94c0203 [ADT] Replace APInt::WORD_MAX with APInt::WORDTYPE_MAX adds ff51b9f280e [RISCV][MC] Don't fold symbol differences if requiresDiffEx [...] adds fd2bee90f5b [ARM] Allow zext in ARMCodeGenPrepare adds d9d671112da [yaml2elf] - Simplify code, add a test. NFC. adds 3591e4cd934 [ARM] Ignore GEPs in ARMCodeGenPrepare adds 4b96e82fd27 [yaml2elf] - Use check-next in test. adds f23f849bd17 [yaml2obj] - Allow to use numeric sh_link (Link) value for [...] adds 7edab834d4b [InstCombine] move vector compare before same-shuffled ops adds 0cd45cda8dd [cmake] Prevent LLVMgold.so from being unloaded on Linux adds 46fd9f609b6 [TableGen] Return ValueTypeByHwMode by const reference from [...] adds cfeb0f3b987 [llvm-mca] Small refactoring in preparation for another pat [...] adds 935c1e9f5aa [InstCombine] Expand the simplification of pow(x, 0.5) to sqrt(x) adds 37d2a3546f0 [TableGen] Avoid self getPredicates() != comparison. NFCI. adds 5ae4a74cc0d [ConstantFolding] add tests for funnel shift intrinsics; NFC adds fc96bec77d1 [TableGen] TypeSetByHwMode::operator== optimization adds 8d7767b85e2 [MS Demangler] Don't fail on MD5-mangled names. adds 404ae7db546 [MS Demangler] Demangle string literals. adds 89bba358f5f Add support for AVX-512 CodeView registers. adds 6a67b308fac Fix -Wmicrosoft-goto warnings. adds fd8c4124545 [MC][X86] Enhance X86 Register expression handling to more [...] adds 3c6e3abc6cf [MC] Remove unused variable adds 8c9b074b573 unittests: Don't install TestPlugin.so adds 3b2cfd19a0d [TargetLowering] Refactor BuildSDIV in preparation for D507 [...] adds 25358c8f56e [NFC] Fix typo in test cases adds b35922e680c [X86][SSE] Add sdiv by nonuniform constant vector test cont [...] adds a0d83d520ea AMDGPU: Custom lower fexp adds 550dfae3742 Revert "unittests: Don't install TestPlugin.so" adds cd2d2cfae69 [MC] Cleanup noop default case spelling. NFC. adds 9d1f82a2cc3 [codeview] Use push_macro to avoid conflicts instead of a prefix adds 465c62b8d3e [TargetLowering] Add support for non-uniform vectors to BuildSDIV adds 3174d7c7791 Fix memory leak in demangling of string literals. adds d9c9d827167 [RegisterCoalescer] Shrink to uses if needed after removeCo [...] adds 7b455c4fd2f [llvm-strip] Add support for -p/--preserve-dates adds cb762f1f3dd [SelectionDAG] Improve the legalisation lowering of UMULO. adds 8744f36d0bb [llvm-mca] Refactor how execution is orchestrated by the Pipeline. adds 5ede58d7d77 [MachineVerifier] Check if predecessor is jointly dominated [...] adds fb684e186b0 [WebAssembly] Remove temporary workaround for function bitcasts adds 382c2c9899a [X86] Pre-commit test case for D50827. adds ad8a8d12bf8 Add missing test file from r339799. adds 516dc8bd511 [llvm-mca] Fix -Wpessimizing-move warnings introduced by r339923. adds 4a208889a6c [LICM][NFC] Restructure pointer invalidation API in terms o [...] adds d020e74d683 [SystemZ] Require asserts in subregliveness-06.mir adds 73646782e5d [MemLoc] Fix a bug causing any use of invariant.end to cras [...] adds 17543750d37 [AST] Speculative build fix for a polly buildbot adds 86864df0931 add a missed case for binary op FMF propagation under select folds adds cf8a4a5d5e7 DebugInfo: Add metadata support for disabling DWARF pub sections adds 2a752bfdae6 [MI] Change the array of `MachineMemOperand` pointers to be [...] adds a9c1926d01f [MC] Improve COFF associative section lookup adds d2a106bf4ee Factor Node creation out of the demangler. No functionality [...] adds 2e94bd60b5a [X86] In EFLAGS copy pass, don't emit EXTRACT_SUBREG instru [...] adds 34d0ecae3a4 [DAGCombiner] Don't reassociate operations that have the ve [...] adds 96b3ee568e0 [DomTree] Add constructor to create a new DT based on curre [...] adds 218ada7811f [docs] Try to clarify the FuzzingLLVM docs adds 1f402bfa4fd Update MemorySSA in Local utils removing blocks. adds 7c82ae6d941 [InstCombine] add tests for tan with negated arg; NFC adds 41bee7d4780 [InstrProf] Use atomic profile counter updates for TSan adds 3964940ceb1 [InstCombine] add reflection fold for tan(-x) adds e90d44039a6 [x86/MIR] Implement support for pre- and post-instruction s [...] adds 5e5a9f7ee34 [WebAssembly] CFG stackify support for exception handling adds 1466a5a3703 DebugInfo: Remove command line (& target-based) disabling o [...] adds 3c76da17f7b [WebAssembly] Modify LateEHPrepare one-line description (NFC) adds bc3032830f2 [ADT] Replace a member initializer of a union with an expli [...] adds 907fb9abe88 [GISel]: Add Opcodes for a few LLVM Intrinsics adds 7de28914d7d [Support] Add a public API to allow clearing all (static) t [...] adds d91f0329ac6 [llvm-mc-assemble-fuzzer] Update API - Pass MCObjectWriter [...] adds 7debc334e64 Revert r339977: [GISel]: Add Opcodes for a few LLVM Intrinsics adds 6d4546ea14a [NFC] Add tests to ensure that improvement of MustThrow ana [...] adds 18374180e36 [MustExecute] Fix algorithmic bug in isGuaranteedToExecute. [...] adds 5a4ec120f8e [ARM][NFC] ARMCodeGenPrepare: some refactoring and algorith [...] adds 12061ae7173 [MISC]Fix wrong usage of std::equal() Differential Revision [...] adds 3ec6e52a80d [Sparc] Flush register windows for @llvm.returnaddress(1) adds 8d97f0d4be3 Fix "control reaches end of non-void function" -Wreturn-typ [...] adds 2f779737ec6 [Sparc] Get sret arg size from CallLoweringInfo.getArgs() adds 19640950ddf [DAGCombine] Improve (sra (sra x, c1), c2) -> (sra x, (add [...] adds 3a4d2d38bf8 [ARM/AArch64] TargetParserTest fixes adds c30814805cc [ARM/AArch64] Support FP16 +fp16fml instructions adds aec303a986c [InstCombine] Remove unused method FAddCombine::createFDiv(). NFC adds 19852c64c09 [DAGCombiner] extractShiftForRotate - fix out of range shift issue adds ac879930f81 [PowerPC] Generate Power9 extswsli extend sign and shift im [...] adds fd520f179d9 Revert extraneous directory added by accident in rL340016 adds 0633fddd687 [AArch64] - Generate pointer authentication instructions adds e1166b22b67 [TableGen] TypeSetByHwMode::insert - cache the default MVT. NFCI. adds 77ce59def02 [ConstantFolding] add simplifications for funnel shift intrinsics adds ac92a12e99e [RISCV] Remove unused function adds 9122aa2aace [LICM] Add a diagnostic analysis for identifying alias information adds f148aeb2480 [AtomicExpandPass] Widen partword atomicrmw or/xor/and befo [...] adds c7000f73ec2 [Hexagon] Expand vgather pseudos during packetization adds 1bf795160f3 [InstrSimplify,NewGVN] Add option to ignore additional inst [...] adds 46146670291 [NewGVN] Add tests for r340031. adds af922fde219 [X86] Fix liveness information when expanding X86::EH_SjLj_ [...] adds 12b9cde1952 [x86] Fix test breaking on Darwin after r339962 adds 91bcc605308 [llvm-mca] Removed references to HWStallEvent in Scheduler.h. NFCI adds 81e04e9e9ac [PowerPC] Generate lxsd instead of the ld->mtvsrd sequence [...] adds adb0f66b579 [DebugInfo] Generate DWARF debug information for labels. (F [...] adds 8f783892855 [TableGen] TypeInfer - Cache the legal types as TypeSetByHwMode adds 6c36cc6f616 [MS Demangler] Rework the way operators are demangled. adds 39b5a02c6fe [ThinLTO] Add option for printing import failure reasons adds 5ec0e9dcab9 [IDF] Teach Iterated Dominance Frontier to use a snapshot C [...] adds 545c5cb20b5 [TableGen] Don't separately search for DefaultMode when we' [...] adds 4baf8510375 [X86] Use hasOneUse instead of isOnlyUserOf. NFCI adds 061d7fa2aef [NFC] Expand test cases for simplifying pow() adds f896970b071 [InstCombine] Refactor the simplification of pow() (NFC) adds 7250585b4e5 [X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW adds b7e2745eb46 [Support] NFC: Fix docstring in FileSystem.h. adds 40198e78bb5 [llvm-mca] Reformat a few lines (fix spacing). NFC. adds 18da2d12953 [IDF] Make GD const. adds 9ce73cfd3e9 Remove a hardcoded address in test/DebugInfo/X86/vla-multi.ll adds f3a3ccda026 Test commit adds cd514b66e80 [llvm-objcopy] Add support for -I binary -B <arch>. adds 30a2cc03dc2 Fix windows buildbots by removing : from filenames adds 218b727473c [AST] Adapt Polly to AnalysisSetTracker changes. NFC. adds 00e6049559b [Hexagon] Remove unused functions from HexagonInstPrinter, NFC adds c1011528465 [MS Demangler] Demangle all remaining types of operators. adds 7aacef06ca5 [ORC] Rename VSO to JITDylib. adds fbdb20b2ab5 DAG: Fix isKnownNeverNaN for basic non-sNaN cases adds 651c0bf01a4 [X86] Remove detectAddSubSatPattern. adds 0a4b8880796 [MS Demangler] Properly print all thunk types. adds 2661a6cb5c2 [MC] Improve error message when a codeview register is unknown adds 7f03ac80bc8 ValueTracking: Add tests for isKnownNeverNaN adds a04ab7c2136 [AST] Add tests for argmemonly calls [NFC] adds 803952bdf02 [AST[Tests] Shorten tests using noalias params adds 709fda69699 [AST][Tests] Clarify what each test is doing adds 68cedc8ad59 [DebugCounters] don't do redundant map lookups; NFC adds dc7a8880207 [llvm-objcopy] Implement -G/--keep-global-symbol(s). adds c351fea480b [AST] Clarify printing of unknown size locations [NFC] adds c3f36baa5fa [GISel]: Add Legalization/lowering code for bit counting op [...] adds 8efb13000b8 MC: Remove dead code from WinCOFFObjectWriter.cpp. NFCI. adds 7af2fdceb02 [ORC] Rename 'finalize' to 'emit' to avoid potential confusion. adds eb7a43e43f3 [ORC] Fix some parameter names. NFC. adds b8cf2a3e85f Add the extended XMM registers mappings for AVX-512. adds c9e51dd5ede [DAGCombiner] Allow divide by constant optimization on opaq [...] adds 73258a24136 [X86] Add a signed test case for PR38622. Use nounwind to r [...] adds cf774b7bcc6 [DebugInfo] In FastISel, convert llvm.dbg.label to DBG_LABEL MI. adds 54cf5674ae4 [X86] Merge shift/rotate schedule class instregexs adds 1b130f83bfb [X86] Replace all single match schedule class instregexs wi [...] adds 88048c20048 [RuntimeDyld] Fix a bug in RuntimeDyld::loadObjectImpl that [...] adds 05de30e0954 [MS Demangler] Resolve backreferences eagerly, not lazily. adds ea726c66144 [X86] Add test cases to show missed opportunities to use 51 [...] adds 70fe12d401c [X86] Add support for using 512-bit PSUBUS to combineSelect. adds 88618843c34 [X86] Simplify the PADDUS legality check in combineSelect t [...] adds 03fa7f358cb [X86] Use SDValue::operator== instead of DAG.isEqualTo in s [...] adds a83fad8a70b Updating MergeFunctions.rst adds 1dca6ea705d [X86] Add a test case showing an issue in our addusw patter [...] adds 8a969265baf [X86] Fix an issue in the matching for ADDUS. adds 0f4ea22b4f7 [X86][SSE] Add PACKSS test showing ComputeNumSignBits failu [...] adds 5992c546c18 [SelectionDAG] Add basic demanded elements support to Compu [...] adds 692afe0b2cc [InstCombine] Add test cases for an icmp combine that is mi [...] adds 8bf9e9a0179 [C-API][DIBuilder] Added DIFlags in LLVMDIBuilderCreateBasicType adds 7c767e2cf3d [LLVM-C] Add coroutine passes adds b52e8dcdd12 [bindings/go] Add coroutine passes adds 12df467aacd [PowerPC] Add a peephole post RA to transform the inst that [...] adds b02c5266971 [InstCombine] Move some variable declarations into a more a [...] adds ba88b2b9ee7 [SimplifyCFG] Replace some uses of bitwise or with logical or adds ade2e57434d [llvm] Make YAML serialization up to 2.5 times faster adds 2ca8e676279 [AArch64][SVE] Asm: Add SVE System registers adds f90beef2bb3 Use LLVM_BUILTIN_TRAP not __builtin_trap to appease windows [...] adds f030fcc4ba4 [DWARF] Refactor DWARF classes to use unified error reporti [...] adds 8b5b8b504d5 [X86] Drop unnecessary exact qualifier from packss test adds 11c78fa4d09 [X86][SSE] Add PACKSS test showing ComputeNumSignBits failu [...] adds cdb82fb9b07 [X86][SSE] Fix PACKSS bitcast test from rL340166 adds 956102d0d8b [SelectionDAG] Add partial sign-bit support to ComputeNumSi [...] adds ce61d9b9836 Fix an undefined behavior when storing an empty StringRef. adds 52379849f94 AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space adds 836382087a3 AMDGPU: fix compilation errors since r340171 adds a8767a6d09e [SelectionDAG] Reuse the Op's VT. NFCI. adds 681bdae9774 [llvm-mca] Make the LSUnit a HardwareUnit, and allow derive [...] adds 1083c155dc1 [InstCombine] add tests for insertelement+binop; NFC adds 7e4b0fae2e7 Add cmake option to disable minidumps, default it to off adds d1341152d91 Revert rr340111 "[GISel]: Add Legalization/lowering code fo [...] adds defe1e27b11 ValueTracking: Handle more instructions in isKnownNeverNaN adds e48e0940ce5 [ConstantFolding] add tests for binops on vectors with unde [...] adds f654675def7 [MemorySSA] Update comment to better describe cfg change (NFC). adds 8ae5787df5b [ConstantFolding] improve folding of binops with vector und [...] adds f1f733e717c [TargetLowering] Disable BuildSDiv division by one or negone. adds 949b54fea58 Revert "Revert r339977: [GISel]: Add Opcodes for a few LLVM [...] adds 3de8077a940 [MS Demangler] Demangle member pointer template parameters. adds b0ab6f767f6 [PSV] Update API to be able to use TargetCustom without UB. adds 3e54b8bebb4 [FPEnv] Support constrained FREM intrinsic adds 70a5f27583e Revert "AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bi [...] adds 1b0e0069366 Move Itanium demangler implementation into a header file an [...] adds edb7976f970 Add missing include (<functional> for std::ref) adds 7e54adc6829 Consistently use MemoryLocation::UnknownSize to indicate un [...] adds 6b498e0d291 [LegacyPassManager] Remove analysis P from AnUsageMap befor [...] adds ef2b18c437d [X86] Pre-commit test cases for D50878. adds 006bf052a17 [X86] Teach combineTruncatedArithmetic to handle some cases [...] adds 3b19475ae2b [X86] Prevent lowerVectorShuffleByMerging128BitLanes from c [...] adds d72ab76b835 [X86] Add test command line to expose PR38649. adds c04ae04bb3c [llvm-objdump] Add ability to demangle COFF symbols. adds 679b18fd6ab extend binop folds for selects to include true and false bi [...] adds e8f3424e9d5 [llvm-mca] Remove unused formal parameter. NFC. adds 2e103633827 [llvm-strip] Allow only one input adds ceaf622b04c [WebAssembly] Remove an unused argument from writeSPToMemory (NFC) adds d43029ed517 [InstCombine] Add splat vector constant support to foldICmp [...] adds 6d691845e46 Re-land r334313 "[asan] Instrument comdat globals on COFF targets" adds d35f0462691 [LICM][Tests] Add tests for store hoisting [NFC] adds ec4b6d95ef1 [WebAssembly] Revert type of wake count in atomic.wake to i32 adds 797795774f4 [MS Demangler] Properly demangle anonymous namespaces. adds b6b924e475a [MS Demangler] Anonymous namespace hashes can be backreferenced. adds ac46986ee7c [MS Demangler] Demangle special operator 'dynamic initializer'. adds baa88cf6cb8 Fix global_metadata_external_comdat.ll test adds d984d20c63e [llvm-objcopy] Simplify find(X,Y) != X.end() with is_contained() adds f7cf5c08692 [LICM] More tests for D50925 [NFC] adds 8036734107c [LICM][NFC] Add tests from D50730 adds db87f3978b7 [LICM] Add tests from D50786 [NFC] adds ee5b70c9805 [AST] Mark invariant.starts as being readonly adds 985a0829452 [docs] Fix a small typo in a debug info example adds 69344b0171f [IR Verifier] Do not allow bitcast of pointer to vector of [...] adds a5a23b6d496 [NFC] Factor out predecessors collection into a separate method adds 740597761a3 [llvm] NFC: Fix assert condition and suppress warning adds cbf6acb30e7 [NFC] Add some LICM tests adds 56f506811f6 [RegisterCoalescer] Do not assert when trying to remat dead values adds 33515ddc705 [LICM] Hoist guards with invariant conditions adds 35df2a38417 [MIPS GlobalISel] Select bitwise instructions adds d92e522f128 [TargetLowering] Add BuildSDiv support for division by one [...] adds 48cb502069d [DAGCombiner] Reduce load widths of shifted masks adds ea794624a18 [X86] Add SSE2 sdiv combine tests adds 6a7eb84023d Change how finalizeBundle selects debug location for the BU [...] adds 12c4e30c78a [AMDGPU] New tbuffer intrinsics adds a53b9eb46e8 [AMDGPU] New buffer intrinsics adds 0c432687f9c [AMDGPU] Allow int types for MUBUF vdata adds 85067ec311f [llvm-mca] Add method cycleEvent() to class Scheduler. NFCI adds eb54575107a [llvm-mca] Replace use of llvm::any_of with std::any_of. adds db5a5413f85 NFC: Add loop vectorizer tests showing various control flow [...] adds 7ba25f54f9b [InstSimplify] add tests for FP uno/ord with nnan; NFC adds 099d4ece4fb [LV] Vectorize loops where non-phi instructions used outside loop adds 77028e31e5f [InstSimplify] use isKnownNeverNaN to fold more fcmp ord/uno adds e12b4e71d85 [X86] Add SSE2 and XOP udiv combine tests adds 836f774043c [InstCombine] Add new tests for icmp ugt/ult (add nuw X, C2), C adds d10f51f59ea [aarch64][mc] Don't lookup symbols when there is no symbol [...] adds e54f19aba26 [X86][SSE] Add helper function to convert to/between the SS [...] adds 60b9afadc6d AMDGPU: Partially move target handling code from clang to T [...] adds cf8aa848ecc [AMDGPU] Support idot2 pattern. adds 6b2c78bfb07 Try to fix bot build failure adds 4451f818aac [X86][SSE] Lower directly to SSE shifts in the BLEND(SHIFT, [...] adds af456551b43 [X86][SSE] Lower v8i16 general shifts to SSE shifts directl [...] adds 01ee4bc1831 [BypassSlowDivision] Teach bypass slow division not to inte [...] adds 3d6ae306d3e llvm-readobj: Simplify. NFCI. adds 4e9e5ecdb28 [X86][SSE] Lower vXi8 general shifts to SSE shifts directly. NFCI. adds 43485c44688 Revert "Revert rr340111 "[GISel]: Add Legalization/lowering [...] adds 985ee9ed765 Update DBG_VALUE register operand during LiveInterval operations adds 0ff071a16e8 [AST] Remove notion of volatile from alias sets [NFCI] adds e02e7e5792d [X86][SSE] Add non-uniform udiv test that is mostly divide by 1. adds 78240481788 [llvm-mca] Add the ability to customize the instruction sel [...] adds 70801a9fac8 Temporarily Revert "[PowerPC] Generate Power9 extswsli exte [...] adds a47e427744b [llvm-mca] Remove unused decl. NFC. adds be8b313cd23 [NVPTX] Remove ftz variants of cvt with rounding mode adds 3682387e68b [RegisterCoalscer] Manually remove leftover segments when c [...] adds 8be8c4ddf62 [GVN] Assign new value number to calls reading memory, if t [...] adds 2f00acbb71c [InstCombine] Pull simple checks above a more complicated o [...] adds 1a35fbef346 Fix Wdocumentation warning. NFCI. adds 408053d6cda [WebAssembly] Add isEHScopeReturn instruction property adds 17b7b8e97f4 [RegisterCoalescer] Use substPhysReg in reMaterializeTrivialDef adds 20dd1fbe93f [WebAssembly] Change writeSPToMemory to writeSPToGlobal (NFC) adds c315e740ba0 [WebAssembly] Don't make wasm cleanuppads into funclet entries adds bfa8bdbeb49 [CodeExtractor] Use 'normal destination' BB as insert point [...] adds 21c21a0782b [LICM] Refactor some AliasSetTracker code to get rid of new [...] adds 8a214493873 [docs][gold] Fix a typo adds 06d8a912fa8 [WebAssembly] v128.const adds 33352c6f25d NFC: update the test comments in LV test about early exit loops adds a064df25390 [WebAssembly] Restore __stack_pointer after catch instructions adds ebae6b8c6b0 Print "invalid mangled name" when we can't demangle something. adds da9501c5e54 [MS Demangler] Fix a few more edge cases. adds 96d2fdd06ae [AMDGPU] Consider loads from flat addrspace to be potential [...] adds 461110262a6 [LICM] Fix a test so it actualy checks what was meant [NFC] adds 486f7d6d9f8 MachineScheduler: Refactor setPolicy() to limit computing r [...] adds 5249baad0ea [MS Demangler] Print template constructor args. adds ab097bafe06 [MemorySSA] Update comment for move APIs to clarify behavio [...] adds e70c48dc362 Update MemorySSA in BasicBlockUtils. adds 317fccd35ef Avoid dbg.value use-before-def in a few tests (NFC) adds 510d469d61b [CodeGenPrepare] Exit earlier when optimizing selects (NFC) adds 404a8add814 [CodeGenPrepare] Scan past debug intrinsics to find select [...] adds 8a50cec4c82 [CodeGenPrepare] Pre-commit debug info test for optimizeSelectInst adds dc62ec40e66 [CodeGenPrepare] Clean up dbg.value use-before-def as late [...] adds 2570fb46756 [CodeGenPrepare] Set debug locations when splitting selects adds c77f2ddb8f1 [WebAssembly] Change comments on SP writing back (NFC) adds 2e85b37548b [WebAssembly] Fix typos in mem.grow/memory.grow opcodes adds b10c5f9f68b [Support][CachePruning] prune least recently accessed files first adds cc831d06605 [CodeGenPrepare] Set debug loc when widening a switch condition adds 1f25117d13d [gold] -thinlto-object-suffix-replace: don't append new suf [...] adds f18632847b7 [GuardWidening] Ignore guards with trivial conditions adds 3df4cb15d74 [AST] Move a function definition into the cpp [NFC] adds c5f69a51a0a [AST] Reorder code to reduce a future patch diff [NFC] adds 52c037b95c5 [AST] Fix a whitespace typo [NFC] adds b180171289a [XRay] Refactor file header reading (NFC) adds e2573bcfa6b [mips] Handle missing CondCodes adds 7105c4bb970 [X86][SSE] Add sdiv test case from PR38658 adds 4d6d5a12e88 [llvm-mca] Improved code comments and moved some method def [...] adds ad45fb5af4e AMDGPU: Fix not respecting byval alignment in call frame setup adds 3d765ce4b7f [AArch64] Add Tiny Code Model for AArch64 adds 284f2563065 [ARM] Rotated operand patterns for *xtb16 adds 760920e0720 [X86][SSE] LowerMULH vXi8 - use SSE shifts directly. adds 8ea5abf0df8 AMDGPU: fix existing alias rules for constant and global adds 7226e5bf26b AMDGPU: bump AS.MAX_COMMON_ADDRESS to 6 since 32-bit addr space adds cff9f567417 [llvm-mca] Remove unused decl. NFC. adds b4dc85b780e [WebAssembly] Ensure relocation entries are ordered by offset adds c82aef23c4a [x86] add tests for load scalar + insertelement; NFC adds 273215d0f92 [GISel]: Add legalization support for widening bit counting [...] adds 2bd592d05d4 [MemorySSA] Move two simple getters; NFC adds 9dc624a9ade [llvm-mca] Clean up a comment about the Context class. NFC. adds 67fcaf191e0 [CodeGenPrepare] Set debug locs when folding a comparison i [...] adds 7b635a26c42 [WebAssembly] Add hasSideEffects flag to catch instructions adds c7581d67b7d [X86] In OptimizeLEAs pass, check that the key is in the LE [...] adds 2f1f9f844d7 [CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIGURATION_TYPES adds 808aa8d421c [CMake] Remove unneeded and outdated policy adds 4d1c75ee8f1 [WebAssembly] Remove MachineFrameInfo arg from checking fun [...] adds 80d595cdf8f [AST] Minor whitespace cleanup [NFC] adds 0c5441ad260 [X86] Replace (32/64 - n) shift amounts with (neg n) since [...] adds 92802c24049 [AA] Remove a needless variable [NFC] adds 8093c81ae56 Update MemorySSA in LoopInstSimplify. adds 2e8575cb467 Update MemorySSA in LoopSimplifyCFG. adds 3c6df19a680 [ARM] Handle all-ones mask explicitly in targetShrinkDemand [...] adds 34868d785f1 [Hexagon] Enable interleaving in loop vectorizer adds 487456c9c51 [ARM] Move machine operand target flags to ARMBaseInstrInfo adds cab386f9087 [ARM] Avoid injecting constant islands in movw+movt pairs o [...] adds 3553a3ccab0 [AST] Add a test for attribute intersection adds c78d44c9d4e [WebAssembly] Don't write SP back when prolog is generated [...] adds 39184e407cd bpf: fix an assertion in BPFAsmBackend applyFixup() adds 66ce6fc8af9 [SafeStack] Handle unreachable code with safe stack coloring. adds 8b3c688d993 [BinaryFormat] Add MessagePack reader/writer adds 575895c12e1 [ARM] Lower llvm.ctlz.i32 to a libcall when clz is not available. adds 9e027f8824d [MemorySSA] Invalidate optimized Defs upon moving them; NFC adds 7657bcaad1b [NFC] Expand test cases for simplifying pow() adds 417158854ad [SelectionDAG] unroll unsupported vector FP ops earlier to [...] adds f0aaf6f525c [WebAssembly] Arbitrary BUILD_VECTOR and remove i64x2.mul adds 2898554fda7 [NFC] Refactor simplification of pow() adds 8029441c211 [X86] Add test cases for D50817. NFC adds f1d427341c3 [X86] Teach combineLoopSADPattern to handle cases where the [...] adds 878194421e4 [ValueTracking] Teach computeNumSignBits to understand min/ [...] adds 38b60af7cb1 MC: Teach the COFF object writer to write address-significa [...] adds d684f5c11c8 [WebAssembly][NFC] Move specific instruction formats to spe [...] adds 35f83f4320f [WebAssembly][NFC] Reorganize SIMD instructions adds aaa1b676c3b [WebAssembly] SIMD Bitwise binary arithmetic adds 648e7fb0246 Add new .def file introduced for BinaryFormat/MsgPack adds 5d5174cd048 Fix undefined behavior in r340457 adds 01196323735 [DebugInfo] Fix bug in LiveDebugVariables. adds 33aee6f125d Improve incompatible triple error adds 0130b6e98af [LibCalls] Added returned attribute to libcalls adds d8e05e4ef20 Revert r340508: [DebugInfo] Fix bug in LiveDebugVariables. adds 1853218e376 MC: Don't align COFF section contents. adds e88a506b16f [x86/retpoline] Split the LLVM concept of retpolines into s [...] adds 4662b47cbc3 Initialize the address-significance table fragment's layout order. adds b6e9cdd0acb Fix comparison of char and int64 in TestWriteFixNegativeInt [...] adds 286f6b54738 TableGen/SearchableTables: Cast enums to unsigned in genera [...] adds 47ff67b78de Allow creating llvm::Function in non-zero address spaces adds 8d709d9d439 [Support] Fix some Wundef warnings adds dcf21c6fd1d Recommit r333268: [IPSCCP] Use PredicateInfo to propagate f [...] adds 2234b901e15 [SCCP] Remove unused variable added in r340525. adds 271b93a6055 [DWARF] Unify warning callbacks. NFC. adds 36609924999 [GVN] Invalidate cached info for phis when setting dead pre [...] adds 069b9180add [llvm-mca] Allow the definition of custom strategies for se [...] adds 7aa61615deb [FunctionAttrs] Infer WriteOnly Function Attribute adds 48d2b81f7a1 [InstCombine] Fold Select with binary op - FP opcodes adds ba4c8a15c7a [x86] add debug option for and-immediate shrinking adds d024286359d [llvm-mca] Fix wrong call to setCustomStrategy(). adds b076be5cdae [ValueTracking] Fix an assert from r340480. adds 17b68c25c6f [RegisterCoalescer] Fix for assert in removePartialRedundancy adds d18e2f25882 [DEBUGINFO] Fix misprint in the name of DebugDirectivesOnly, NFC. adds 647d93d2e22 [ValueTracking] Fix assert message and add test case for r3 [...] adds 65dbe3021d2 Fixup AreCoreFilesPrevented() to consider first LLVM_ENABLE [...] adds 8bcab146970 [LoopVectorize][NFCI] Use find instead of count adds 47ef1705844 [x86] move/add tests for insertelement with variable index; NFC adds 8f953341a04 [llvm-mca] Set the Selection strategy to Default if nullptr [...] adds 780d32e608e Remove the use of pair inside the tuple in concat_iterator. adds d4a902bc71a [WebAssembly] Prioritize splats over v128.consts adds 9a14b78da2f [llvm-mca] Fix parameter name. NFC. adds 81dfd7dbac3 [MIPS GlobalISel] Lower i8 and i16 arguments adds 6602cf7c58d [MemorySSA] Fix def optimization handling adds 4e5d1aa29e0 [IDF] Make GraphDiff a const constructor argument. adds 4976f0e3691 DebugInfo: Improve debug location merging adds db0f76949f2 Make LLVM_ENABLE_CRASH_DUMPS set a variable default adds a11014c68c0 Make llvm-profdata show -text work as advertised in the doc [...] adds 2024fa294b0 [SDAG] Add versions of computeKnownBits that return a value adds 3327f8bee98 [XRay] Refactor loadTraceFile(...) into two (NFC) adds 97d7bcd5c02 [Local] Make DoesKMove required for combineMetadata. adds 77a17afc92d Find PLT entries for x86, x86_64, and AArch64. adds e47abe79613 [llvm-objdump] Label calls to the PLT. adds ff323c38f13 [cfi-verify] Support cross-DSO adds d73e0d8056d [PhiValues] Use callback value handles to invalidate delete [...] adds ca333d73cba [Exception Handling] Unwind tables are required for all fun [...] adds 64e272cbf8c Add missing override keyword (NFC) adds ef0538fd8af [LICM] Hoist an invariant_start out of loops if there are n [...] adds 192fe4c1fb5 [Inliner] Attribute callsites with inline remarks adds be41091c148 Revert [Inliner] Attribute callsites with inline remarks adds 355bcdc7afb Revert "[Exception Handling] Unwind tables are required for [...] adds cd6221355b5 [DAGCombiner][Mips] Don't combine bitcast+store after Legal [...] adds b7914a1f85c [X86] Add test case for D50868. NFC adds 118d1ceeb86 [X86] Teach combineLoopMAddPattern to handle cases where th [...] adds 5cd279703c5 [Support] Allow discarding a FileOutputBuffer without remov [...] adds 0fddef76985 [AArch64] Reject inline asm with FP registers when FP is disabled. adds 93b31da86ab [AST] Simplify code minorly using pattern match [NFC] adds a694af03de4 [PowerPC] Change Test Options [NFC] adds fcffb94d2a2 [Exception Handling] Unwind tables are required for all fun [...] adds ddf089299bb Use unique_ptr. adds 98864f40a30 [PowerPC] Emit xscpsgndp instead of xxlor when copying floa [...] adds 444bd8165fb [llvm-mca] Move views and stats into a Views subdir. NFC. adds 10937f20e48 DebugInfo: Fix skipping CUs in DWARFv5 debug_names table adds 84d4a7bcc97 CodeGen: Add two more conditions for adding symbols to the [...] adds 5309f160df7 Reduce the memory footprint of dsymutil. (NFC) adds e07179a223c [SafeStack] Set debug location for calls to __safestack_poi [...] adds b20e492a83e Verifier: verify that a DILocation's scope is a DILocalScope. adds a4da437c1de Use unique_ptr to hold MCInstrInfo adds 936b78d214c DAG: Allow matching fminnum/fmaxnum from vselect adds e50e52860b2 [PGO] add target md5sum in warning message for icall adds ac55a7fc752 [llvm-mca] Move the ResourceManger from the Scheduler into [...] adds 17e5e8506c6 [CVP] Extend tests to illustrate an old patch isn't needed adds 4746a181571 [llvm-mca] Revert r340659. NFC. adds a5beadf8248 Add data structure to form equivalence classes of mangled names. adds 4ad99d4624b Add documentation comment to ForwardTemplateReference. adds 8d280d4a1ee Fix ExpandedSpecialSubstitution demangling for Sa and Sb. adds 52479366fca [llvm-mca] Move ResourceManager from Scheduler into its own [...] adds 2feea286729 [RISCV] Fix std::advance slowness adds fc721a89bb4 Allow demangler's node allocator to fail, and bail out of t [...] adds 59c0c36fc16 Prevent DILocation::getMergedLocation() from creating inval [...] adds bb4f57ce91e [RISCV] Fixed Assertion`Kind == Immediate && "Invalid type [...] adds 19181fbcf2a This patch adds support to LLVM for writing HermitCore (htt [...] adds d41a54540bd [llvm] Document "%T" as deprecated in CommandGuide/lit.rst adds 98b23f06ba5 [MC, RISCV] Fixed StringRef Assertion `Index < Length && "I [...] adds 48bfbb5c8c9 [LiveDebugVariables] Avoid faulty addDefsFromCopies in comp [...] adds 9a9829f2731 [CodeGen] Set FrameSetup/FrameDestroy on BUNDLE instructions adds c0f17a7b7a7 [X86] Make requested test changes from D50636 adds c15fed2530b [InstCombine] add tests for shuffle+binop transform; NFC adds ee9a2bdfd53 [AMDGPU] Add support for multi-dword s.buffer.load intrinsic adds 7b5db9830a2 [x86] try harder to use broadcast to load a scalar into vector reg adds ad6c4284cdb Remove superfluous semicolon. NFCI. adds 42d60835b53 Fix -Wunused-function warning. NFCI. adds e44ba0057c5 [X86] Make sure type is a vector before calling VT.getVecto [...] adds 16d64ea7be7 [SelectionDAG][X86] Reorder the operands the MaskedStoreSDN [...] adds 6fc01b433ea [X86] Replace support for vXi32 SMUL_LOHI/UMUL_LOHI with MU [...] adds bffc6e53385 [C-API][DIBuilder] Use NameLen in LLVMDIBuilderCreateParame [...] adds f2d9bfdd599 [X86] Add test cases for D50952, paddus patterns involving [...] adds 08e341fad9a [X86] Fix typo in comment, expect->except. NFC adds f798bee7712 [MIPS GlobalISel] Legalize i8 and i16 add adds 5eb83c58cd5 [IR] Begin removal of TerminatorInst by removing successor [...] adds acc248f4ab9 [IR] Sink `isExceptional` predicate to `Instruction`, renam [...] adds 8c9f47fdf16 Avoid specializing a variadic member template in a way that [...] adds 9179aee2c17 [IR] Replace `isa<TerminatorInst>` with `isTerminator()`. adds 9842cc486c5 Replace fancy use of initializer lists with simple function [...] adds 4029ff6aeb4 [ORC] Do not include non-global symbols in getObjectSymbolFlags. adds a66b87aa571 [ORC] Remove a workaround for systems lacking 8-byte atomics. adds 79923d92c5a [SelectionDAG][x86] turn insertelement into undef with vari [...] adds 1ab9f718edf [X86] Add FeatureCMOV to athlon and athlon-tbird cpus. adds a37d3efcd53 [X86] Add FeatureCMOV explicitly to all CPUs that support i [...] adds f72a277dbb8 [X86] Correct the cost of (v4i32 (fptoui (v4f64))) under AVX512F. adds 6e3e8a765ed [MS Demangler] Re-write the Microsoft demangler. adds 4d181be3794 [MS Demangler] Add virtual destructor. adds 1cda61de1b1 [X86] Cleanup the LowerMULH code by hoisting some commonali [...] adds b19b37f8f01 Fix this file to have the necessary standard library includ [...] adds 57e55e3cd26 [RISCV] atomic_store_nn have a different layout to regular store adds deac5c28e00 [Sparc] Custom bitcast between f64 and v2i32 adds 921890cecf1 [COFF] Expose an easier helper function for getting names f [...] adds 4b12e2fa578 [NFC] Split logic of ImplicitControlFlowTracking to allow g [...] adds f3ceb74ac05 [NFC] Try to make buildbot happy about virtual destructors adds 4f41153e847 [Sparc] Add support for the cycle counter available in GR740 adds b4aa55042af [PowerPC] Recommit r340016 after fixing the reported issue adds 4fc5f360c93 [NFC][X86] Fix `sibcall.ll` formatting adds a6e572daa8b [Sparc] Avoid writing outside array in applyFixup adds 76e924a10d8 [X86] Adding the test pointing to the fail case of D45653 adds 24535f7c190 [PowerPC] Revert commit r339779 adds 4f83e0c2a49 [SelectionDAG] add helper query for binops; NFC adds ee400ed04b3 fix comment typo adds 0f9e36f242b [llvm-mca] Improved report generated by the SchedulerStatis [...] adds a26aa426258 [WebAssembly] Added default stack-only instruction mode for MC. adds 601e525007b Use a lambda for calls to ::open in RetryAfterSignal adds a890c68b0a5 [lit, python] Remove quotes around %python in cache.ll adds 99b81ea5dbf [llvm-mca] Remove unused method. NFC. adds e51f5fbfb8c [llvm-mca] Introduce the llvm-mca library and organize the [...] adds 51c6d8b704b [X86] Add support for matching paddus patterns where one of [...] adds c5f26069a5d [X86] When lowering v32i8 MULHS/MULHU, shuffle after the PA [...] adds 2ef0c6283a6 [NVPTX] Implement isLegalToVectorizeLoadChain adds 7ac9af102fe [PowerPC][MC] Support expressions in getMemRIX16Encoding. adds e07ed9ed4f5 LangRef: Clarify expected sNaN behavior for minnum/maxnum adds 9b313de7bb5 MachineVerifier: Fix assert on implicit virtreg use adds bfb50d8dbc8 DAG: Check transformed type for forming fminnum/fmaxnum fro [...] adds 0e4afbdc918 [llvm-mca] Remove unused include. NFC adds a7f410a7260 [x86] add tests for possibly avoiding scalar->vector move; NFC adds eddcb87f2e1 [X86] Add test cases to show current codegen of v2i32 div/r [...] adds 14805078059 [X86] Reverse the check prefixes in the test added in r340774. adds c7ce96854db Set line endings to Windows on MSBuild files. adds d52e35312a9 Revert "[SCEV][NFC] Check NoWrap flags before lexicographic [...] adds f550b4adcb7 Update the Visual Studio Integration from user feedback. adds cef9a05f4d2 [WebAssembly] TableGen backend for stackifying instructions adds 6d962e33747 [Pipeliner] Fix incorrect phi values in the epilog and kernel adds 01bc72d3184 s/std::set/DenseSet/; NFC adds f494ccf3dd8 [PATCH] [InstCombine] Fix issue in the simplification of po [...] adds 2bfb79f1996 [x86] add AVX runs to show more potential scalar->vector mo [...] adds 412085b4f39 [ORC] Add unit tests for the new RTDyldObjectLinkingLayer2 class. adds 68bb94af7f8 [InstCombine] allow shuffle+binop canonicalization with wid [...] adds 34cc8449db2 [RuntimeDyld] Add test case that was accidentally left out [...] adds 18188e8bbe7 [InstCombine] Add test cases for D51236. NFC adds 162b59d3039 [InstCombine] fix formatting; NFC adds 4fcbd6367bd [MemorySSA] Add NDEBUG checks to verifiers; NFC adds 237dc6a794d Revert "[CodeGenPrepare] Scan past debug intrinsics to find [...] adds d7e8f44ac5a [PPC] Remove Darwin support from POWER backend. This patch [...] adds 8e2acb78ca2 [InstCombine] Extend (add (sext x), cst) --> (sext (add x, [...] adds 00ca244b7de [DAGCombiner][AMDGPU][Mips] Fold bitcast with volatile load [...] adds f17bde5ddcb [X86] Fix some comments to refer to KORTEST not KTEST. NFC adds 4f69adc6555 Fix in getAllocationDataForFunction adds f3a4bc29053 [NFC] A loop can never contain Ret instruction adds 18c6fab1078 Pull google/benchmark library to the LLVM tree adds a53c4cfc76e [X86][SSE] Avoid vector extraction/insertion for non-consta [...] adds b2b31f26309 [benchmark] Silence warning by applying upstream patch adds b9a5b63789f [X86][SSE] Improve variable scalar shift of vXi8 vectors (PR34694) adds 78367b1bd22 [NFC] Apply another commit to comply with old CMake adds ad2805757e6 [GVNHoist] Prune out useless CHI insertions adds 24696e2bdf6 [TableGen] Use std::move where possible in InstructionMemo [...] adds 2120ec16b1a [CloneFunction] Constant fold terminators before checking s [...] adds 939bd02ce8e [llvm-mca] Pass an instruction reference when notifying eve [...] adds 0977b8082a9 [ADT] ImmutableList no longer requires elements to be copy [...] adds 82d654fdf4f [llvm-mca][TimelineView] Force the same number of execution [...] adds cf50706d0b7 Clarify comment in the string-offsets-table-order.ll test adds 3df07a217a0 [benchmark] Fix buildbots failing to identify regex support adds b300798fe5a [llvm-mca] Initialize each element in vector TimelineView:: [...] adds da360ea600a [AMDGPU] Add support for a16 modifiear for gfx9 adds fd5fafbedb3 [X86] Fix copy paste mistake in vector-idiv-v2i32.ll. Add m [...] adds 6f1d64eb934 [Inliner] Attribute callsites with inline remarks adds 5a575ac79e2 [benchmark] Stop building benchmarks by default adds ac6174ed201 [TableGen] CodeGenDAGPatterns::GenerateVariants - basic cac [...] adds 3b38b07fc66 [debuginfo] generate debug info with asm+.file adds 5c077985f38 [lit, shtest-timeout] Always use an internal shell for the [...] adds 1ca22e362e9 [InstCombine] add tests for select narrowing (PR38691); NFC adds f525bbcf3c1 [XRay][docs] Update instructions adds 55a27b1f9cd [X86] Mark the FUCOMI instructions as requiring CMOV to be [...] adds f26965ec977 [InstCombine] fix baseline assertions adds 4a2eaa1dbaf [XRay][docs] Chrome Trace Viewer Instructions adds 214d4f6e19e [WebAssembly] Use getCalleeOpNo utility function (NFC) adds c7c3bec2ffd AMDGPU: Remove nan tests in class if src is nnan adds a24ff67fb6f [DAG] Fix updateDivergence calculation adds f0b6863bfb5 [DAG] Avoid recomputing Divergence checks. NFCI. adds 7eda1917c3f [DAGCombine] Rework MERGE_VALUES to inline in single pass. NFCI. adds 7b8d06c2e30 AMDGPU: Move canShrink into TII adds c9d8c58e729 [WebAssembly] v128.not adds 4d766060a1a [WebAssembly][NFC] Fix up SIMD bitwise tests adds ac00e8c95bf AMDGPU: Shrink insts to fold immediates adds 0fbff7fa99c [libFuzzer] Port to Windows adds 39e9b90909a [WebAssembly][NFC] Fix formatting from rL340781 adds 0e21fb6c46d AMDGPU: Force shrinking of add/sub even if the carry is used adds 32497926554 [llvm-mca] use llvm::any_of instead of std::any_of. NFC adds 31d4eb8d765 [WebAssembly][NFC] Document stackifier tablegen backend adds f8d714889d1 [GISel]: Add missing opcodes for overflow intrinsics adds 29213a71a30 AMDGPU: Don't delete instructions if S_ENDPGM has implicit uses adds 0ac1dae46c7 Revert "[libFuzzer] Port to Windows" adds 18fbbd87715 [AMDGPU] Fix -Wunused-variable when -DLLVM_ENABLE_ASSERTIONS=off adds 28550757bf3 [X86] Add intrinsics for KADD instructions adds 592e4c7e296 [ORC] Add an addObjectFile method to LLJIT. adds 7729976f77a [SimpleLoopUnswitch] Form dedicated exits after trivial uns [...] adds 9f6be22d32d [NFC][PassTiming] factor out generic PassTimingInfo adds 702730fc21a [ORC] Replace lookupFlags in JITSymbolResolver with getResp [...] adds a0e0d1c6492 [X86] Remove GCCBuiltin from kadd intrinsics. adds d895f5db4dc [codeview] Emit labels for .cv_loc immediately adds 0f4e3580774 [ORC] Add a testcase for r338975. adds b9ba94c02a2 [QTOOL-37352] Consider isLegalAddressingImm in Constant Hoisting adds aea52742efe [codeview] Clean up machinery for deferring .cv_loc emission adds 7fdf8ca3942 [llvm-mca] Move the initialization of Pipeline. NFC. adds 3b3d483933b [llvm-mca] Remove unused formal. NFC. adds acf390b1ed2 Start reserving x18 by default on Android targets. adds ee609f0f123 [X86] Support v2i32 gather/scatter indices with -x86-experi [...] adds 9d8c6d38d9a [GISel]: Add legalization support for Widening UADDO/USUBO adds 96e608acc98 NFC. fixing time-passes test failure on Windows. adds 2e2b1e26089 [MS Demangler] Add output flags to all function calls. adds ef6d9043aff Add support for various C++14 demanglings. adds 8767aa656db [SelectionDAG] Add some comments to ISDOpcodes.h about the [...] adds 65dce11452f [SelectionDAG] Remove masked_gather/scatter from TargetSele [...] adds 10a4287278d LoopSink: Don't sink into blocks without an insertion point [...] adds 1209b727bc3 AMDGPU: Fix getInstSizeInBytes adds 3c4edb8fccb [llvm-mc] - Allow to set custom flags for debug sections. adds 0d21b888881 [benchmark] NFC: Turn benchmark ON on all non-Windows buildbots adds 2a751e18fda Revert r340904 "[llvm-mc] - Allow to set custom flags for d [...] adds 4b9c2a90398 Remove debug code accidently committed in rL340837. NFCI. adds 40552436a1d [MC] fix a clang-tidy warning, NFC adds 1986113fb21 [X86][AVX] Prefer VPBLENDW+VPBLENDD to VPBLENDVB for v16i16 [...] adds fe980e2e006 [NFC] Factor out guard utility methods into a separate file adds 91bff92aa54 [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) adds e64aa7c573e [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) adds 6065bc07699 [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds adds 3b08dd1f3f0 [mips] Add missing instructions adds 68de447e4fc [NFC] Unify guards detection adds 65850ba24ae [GVNHoist] Re-enable GVNHoist by default adds fc1247272fa Revert r340921 "[NFC] Unify guards detection" adds e01f3f0722b Revert r340922 "[GVNHoist] Re-enable GVNHoist by default" adds e817129d2b1 [InstCombine] remove unnecessary shuffle undef folding adds 426e5c16103 [mips] Prevent shrink-wrap for BuildPairF64, ExtractElement [...] adds a1a7c48dc0a [InstCombine] move declarations closer to uses; NFC adds 4963a3e5f71 [mips] Involves microMIPS's jump in the analyzable branch set adds 7a2be54fffd [mips] Fix microMIPS unconditional branch offset handling adds bdf9a8a0da5 [InstCombine] add test for vector demanded elements + shrin [...] adds ed91909be8b [DebugCounters] Fix DebugCounterTest when running all SupportTests adds 056d9c0c1fc [AMDGPU] Match udot4 pattern. adds cbc9a8c7504 Update Visual Studio Integration version number. adds b8bd0d424e1 [InstCombine] Replace two calls to getNumUses() with !hasNU [...] adds a63a709dd50 [MinGW] [X86] Add stubs for references to data variables th [...] adds 2d5557cff06 [llvm-mca] Don't disable the SummaryView if flag `-all-stat [...] adds 4dfd5dbebc8 [llvm-mca] Add fields "Total uOps" and "uOps Per Cycle" to [...] adds 02b82d7fb8c [InstCombine] Expand the simplification of pow() into exp2() adds 19ea694df62 [InstCombine] Expand the simplification of pow() with neste [...] adds 1f742a3c1bc [libFuzzer] Port to Windows adds 578a07e631c [InstCombine] add tests for llvm.sin(-x); NFC adds 19135aee749 [MemorySSA] Add expesive check for validating clobber accesses. adds 8ce71c5c877 [InstCombine] canonicalize fneg with llvm.sin adds e368b7aabb2 Revert "[libFuzzer] Port to Windows" adds abc5ee601c5 [SimpleLoopUnswitch] After unswitch delete dead blocks in p [...] adds 8ce430e1819 AMDGPU: Handle 32-bit address wraparounds for SMRD opcodes adds a9f18e972f4 [LICM] Hoist stores of invariant values to invariant addres [...] adds d78238ee046 Add a todo and tests to Address a review commnt from D50925 [NFC] adds 0bac46f10e9 [MemorySSA] Fix checkClobberSanity to skip Start only for D [...] adds ff8943d2480 Revert r340947 "[InstCombine] Expand the simplification of [...] adds 460e601c155 Reverse subregister saved loops in register usage info coll [...] adds 04e389a2006 [MemorySSA] Silence warning. adds 72a8d84d5ba [llvm-strip] Fix -p|--preserve-dates to not truncate output [...] adds 649d2874ae0 [SimplifyCFG] Common debug handling [NFC] adds 47dc01928f5 [NFC] Make getPreferredAlignment honor section markings. adds 6568fb5f19a [MS Demangler] Fix several crashes and demangling bugs. adds 3972070749f [SimplifyCFG] Fix a cost modeling oversight in branch commoning adds a166c354553 [SimplifyCFG] Rename a variable for readibility of a future [...] adds 6f7036edd39 [GlobalMerge] Fix GlobalMerge on bss external global variables. adds bdeb8b88b91 [WebAssembly] Be a little more conservative in WebAssemblyF [...] adds 9969df381b2 [XRay][llvm] Load XRay Profiles adds 187d9188f78 Re-enable "[NFC] Unify guards detection" adds 3a86455ee79 [NFC] Move OrderedInstructions and InstructionPrecedenceTra [...] adds 0dc6b313f60 DAG: Don't use ABI copies in some contexts adds 5ea005bbab9 [X86] Remove powerpc cpu name and features from uwtables.ll adds 4f8c160f077 [X86] Update test command line to not use 64-bit mode on a [...] adds 038d08360ce [X86] Make Feature64Bit useful adds ed9c8639f4d [InstCombine] Add test cases for D51398 adds 15b43272428 [X86] Improved sched model for X86 CMPXCHG* instructions. D [...] adds 03c16fb53c1 [DWARF] Missing location debug information with -O2. adds 23c93c1752d CodeGen: Make computeRegisterLiveness consider successors adds f29f15e2ea2 CodeGen: Make computeRegisterLiveness search forward first adds da1abaaf13c Don't count debug instructions towards neighborhood count adds 20baaad0f3a [XRay] FDRTraceWriter and FDR Trace Loading adds 058bf39189c [XRay] Remove attribute packed adds 43b3c1a2475 Revert "[SimplifyCFG] Common debug handling [NFC]" adds 6a0b228274f [XRay] Move out template and use perfect forwarding adds b4ef1e85f81 [XRay] Help gcc disambiguate names adds 009ed30f633 [NFC] Rename map to make the naming consistent adds 2550ec0d3b7 Revert "[CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIG [...] adds c5079f070c6 [Hexagon][Test] Remove undef and infinite loop from test adds 3b98b95f4a9 [NFC][CodeGen][SelectionDAG] Tests for X % C == 0 codegen i [...] adds af61b7b6b9f Revert "[Hexagon][Test] Remove undef and infinite loop from test" adds 5092d234f32 [RISCV][NFC] Rework CHECK lines in rvi-aliases-valid.s adds 9480b0964b2 [NFC] Add severe validation of InstructionPrecedenceTracking adds 3e54ac3b7f3 Fix "Q" and "R" inline assembly template modifiers for big- [...] adds 4749d41121e [RISCV] Fix r341050 adds ae25728c085 [NFC] Whitespace fix adds f0c09e5b1e0 [llvm-mca] Report the number of dispatched micro opcodes in [...] adds e7278ca56d2 [llvm-mca] correctly initialize field 'CycleRetired' in the [...] adds 8f4233c3859 [AArch64] Optimise load(adr address) to ldr address adds 6089d1a3c7c [CodeGen] emit inline asm clobber list warnings for reserve [...] adds 0993f24765c [Error] Add FileError helper; upgrade StringError behavior adds 21dc79ecb53 Build fix for r341064. Temporarily disable compile-time val [...] adds c851af3c8a8 [AMDGPU] Preliminary patch for divergence driven instructio [...] adds 784c92e9bc0 [Sparc] Use ANDN instead of AND if constant can be encoded [...] adds 60d68978a7c More build fix for r341064. adds b33a4032405 [NFC] Rename the DivergenceAnalysis to LegacyDivergenceAnalysis adds 5f6a0845684 Make TargetInstrInfo::isCopyInstr return true for regular C [...] adds 14ea008c517 [IR] add shuffle queries for identity extend/extract adds 386f7a697fe Move test/Analysis/DivergenceAnalysis/AMDGPU/loads.ll adds 9a75e493e80 [WebAssembly] Made disassembler only use stack instructions. adds 3898022b16e [libFuzzer] Port to Windows adds e2e1cabd39f [IR] fix declaration of shuffle mask adds 8f32507f5b6 [LLVM-C] Add Bindings For Named Metadata adds a32d403fb6a Allow inconsistent offsets for 'noreturn' basic blocks when [...] adds b8a8d084efe [X86] Add kshift test cases for D51401. NFC adds 3e316392762 Reverting r340807. adds 4a777e245da [SROA] Fix alignment for uses of PHI nodes. adds 8969d63f179 [InstCombine] Expand the simplification of pow() into exp2() adds 40f519897b6 [ARM] Adjust the feature set for Exynos adds bfc2cc6bb48 [X86] Weaken an overly aggressive assert. adds 0ea32614822 [DAGCombiner] Fix bad identation. NFC adds b707c0dbae6 [RISCV] Fixed SmallVector.h Assertion `idx < size()' adds c31eb6fd8c5 [X86] Add -x86-experimental-vector-widening-legalization co [...] adds be4b3b1eba3 Hashing: use 64-bit seed for hashing on all platforms. adds 033d7590b1d SafeStack: Prevent OOB reads with mem intrinsics adds 25cfd0d86ed [MS Demangler] Add support for $$Z parameter pack separator. adds cf77b92ddda Add a utility script to stress test the demangler. adds 4ed0bf2194a Remove some debugging code that was accidentally left in. adds c6bf8fac1ee dsymutil: Avoid pruning non-type forward declarations insid [...] adds 40d40d8e3a1 [WebAssembly] SIMD loads and stores adds 9f6fab911bd [WebAssembly] Vector conversions adds 0246068b059 [WebAssembly] Update utility functions with SIMD types adds fbac6f0f0d9 Remove LIT_SITE_CFG_IN_FOOTER, llvm adds da01ae3cf24 [ARM] Enable GEP offset splitting for 32-bit ARM. adds 07df95450a1 [Hexagon] Check validity of register class when generating [...] adds 24ef0d5262c [NFC] adding initial intersect test for Node to Instruction [...] adds d02189d061b Revert "[NFC] Add severe validation of InstructionPrecedenc [...] adds 9eedf73e773 Import lit.llvm after rL341135 adds 39a71331ffb [ORC] Add utilities to RTDyldObjectLinkingLayer2 to simplif [...] adds b93b2b7c04d [ORC] Remove a stray debugging output line left in a unit test. adds 7e212e4168a AMDGPU: Remove remnants of old address space mapping adds c8c005cb52f AMDGPU: Stop forcing internalize at -O0 adds 54c2fe982a5 AMDGPU: Remove obsolete tests adds 5b83d05dba0 [X86] Add -x86-experimental-vector-widening-legalization ru [...] adds 0c8291951db [X86] Don't custom widen (v2i32 (setcc v2f32)) when -x86-ex [...] adds 2916e45b744 [X86] Add a -x86-experimental-vector-widening command line [...] adds 8f80157cb00 [X86] Don't do anything in ReplaceNodeResults for (v2i32 (f [...] adds d67818ff54f [MinGW] [ARM] Add stubs for potential automatic dllimported [...] adds 53f45710293 [MinGW] [X86] Pass true for the second parameter to StubVal [...] adds 48aa7c74983 [AArch64] Hook up the missed machine operand flag name for [...] adds 6557447c425 [XRay] FDR Record Producer/Consumer Implementation adds 53c157a2904 [X86][BtVer2] Fix WriteFShuffle256 schedule write info. adds debd956b98d [NFC][X86][AArch64] A few more patterns for [lack of] signe [...] adds ab5aae51aa6 [XRay] FDRProducerConsumerTest: unbreak (gcc?) build adds 8c3d38a57bc Fix MSVC "not all control paths return a value" warning. NFCI. adds e2435982623 [GlobalIsel][X86] Support for G_FCMP adds 50365ce77a6 [XRay] Attempt to fix failure on Windows adds 5d3c85df6d6 [X86][BtVer2] Add an llvm-mca test that shows how the read [...] adds be4bb828141 [NFC] Fix unused variable warning in X86RegisterBankInfo.cpp adds b9f4344b8a2 [GlobalIsel][X86] Support for llvm.trap intrinsic adds 7764ab8163d [GlobalISel][X86_64] Support for G_FPTOSI adds a3d05d4460c [GlobalISel][X86] Add the support for G_FPTRUNC adds c42a8a5ef0e [XRay] Remove array for Metadata Record Types adds 73e2113025e [llvm-objdump] Keep the memory buffer from the dSYM alive w [...] adds 57ed8ef0fa9 [X86] Add llvm-mca tests that show how operand latency is w [...] adds d3da33bf59a AMDGPU: Fix broken generated check lines adds bde9b3177bb SLPVectorizer: Fix assert with different sized address spaces adds 1dc41819630 [Wasm] Add missing EOF checks for floats adds 9ee1996724a AMDGPU: Actually commit re-run of update_llc_test_checks adds 6241a83e35a AMDGPU: Restrict extract_vector_elt combine to loads adds 3ecff60381e [mips] Fix `mtc1` and `mfc1` definitions for microMIPS R6 adds 8f931c71476 [X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast( [...] adds bff6dcb26b8 [XRay] Make the FDRTraceWriter Endian-aware adds c4a2b8b5e44 [XRay] Make Trace loading endian-aware adds 3bdab0c31e2 [X86] Add support for turning vXi1 shuffles into KSHIFTL/KSHIFTR. adds 0444f576689 [DebugInfo] Common behavior for error types adds 817cfcb081f [XRay] Fix FunctionRecord serialization adds 3da9db91d1b [XRay] Change function record reader to be endian-aware adds 889f7035dc3 [XRay] Improve test matching granularity (NFC) adds 8a0d68fb024 [Hexagon] Add support for getRegisterByName. adds 7170738f81e [XRay] Use correct type for thread ID parsing adds e25423d7eab Tests: fix tests encoding specific hash values for 32-bit systems. adds 0ce8202f431 [XRay] Use correct type for PID records adds 6c04680ab10 [XRay] Update RecordInitializer for PIDRecord adds c523f7a1225 lit: Use sys.executable for executing builtin commands adds e76b95dac11 [NFC] Pre-calculate function IR counts in size remarks. adds c1a096dcd96 [NFC] Pre-calculate basic block IR counts in size remarks. adds 6a738602014 [NFC] Pre-calculate loop IR counts in size remarks. adds ca1a357d64d [NFC] Pre-calculate module IR counts in size remarks. adds 14667077ec6 [NFC] Pre-calculate SCC IR counts in size remarks. adds 4f3a2194ad3 [NFC] Pass the instruction delta to emitInstrCountChangedRemark adds a5d3acd60ee [NFC] Check if P is a pass manager on entry to emitInstrCou [...] adds 87d50cfb8ff [NFC] Optionally pass a function to emitInstrCountChangedRemark adds 3fad8a772e8 [X86] Add intrinsics for KTEST instructions. adds 64a07d91177 Revamp test-suite documentation adds 0c44dadb711 [Hexagon] Don't access non-existent instructions adds 44c99af37e5 [AMDGPU] Split v32i32 loads adds 29f24c91755 Fix typo in size remarks for module passes adds f6dfc5edb00 [Constant Hoisting] Hoisting Constant GEP Expressions adds f76a2c7e341 Make HasWinCFI a plain bool instead of Optional<bool> adds 051c6130853 AMDGPU/GlobalISel: Define instruction mapping for G_SELECT adds 855b4f981a3 [AVR] Define the ROL instruction as an alias of ADC adds dfd17d0fb9d [AVR] Define the TST instruction as an alias of AND adds 777b95dd3d8 [AVR] Redefine the 'SBR' instruction as an alias adds 001bbba7fec [AVR] Redefine the 'LSL' instruction as an alias of 'ADD' adds 2a632aa1b63 [InstCombine] simplify code for 'or' fold adds 0096cdb0879 [llvm-mca] Fix typo in debug output. NFC. adds 0cc8ff40144 [ORC] Tidy up JITSymbolFlags to remove the need for some ex [...] adds 339dfeb9d11 clang-format r341282. adds 41b17bcd0d1 [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle [...] adds 722ea18b54e [Reassociate] swap binop operands to increase factoring potential adds 27ea31c8eee [DebugInfo] Fix bug in LiveDebugVariables. adds e39c39b6ec0 Revert "[DebugInfo] Fix bug in LiveDebugVariables." adds 514dd474673 [InstCombine] move/add tests for not+sub; NFC adds 87137bbfee7 [InstCombine] allow not+sub fold for arbitrary vector constants adds 7cbb2dde800 [PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8 When [...] adds de01dd14072 [MC] - ConstantPools.cpp: Style consistency, remove redunda [...] adds 66813d721cc Test commit - adding a new line. adds 1d40abd2827 Extend hasStoreToStackSlot with list of FI accesses. adds be799060e64 Test commit. adds 3b146be88b9 Remove unnecessary semicolon to silence -Wpedantic warning. NFCI. adds 67bd0d9a0f5 Fix issue introduced by r341301 that broke buildbot. adds dfcc987b64b [Sparc] allow tls_add/tls_call syntax in assembler parser adds 8e6fd5fa48e [AArch64] Simplify code in LowerGlobalAddress. NFCI. adds cccbfeb6704 [DebugInfo] Have the verifier accept missing linkage names. adds 0985a4407d2 Rename a few unittests/.../Foo.cpp files to FooTest.cpp adds 24b52d3cc6d DAG: Handle extract_vector_elt in isKnownNeverNaN adds f4bf809d309 Add header guards to some headers that are missing them adds aab21a79d19 [X86] Remove wrong ReadAdvance from multiclass sse_fp_unop_s. adds 9b1f6880c1b Re-push "[Option] Fix PR37006 prefix choice in findNearest" adds 5ca8be39d26 [SLC] Support expanding pow(x, n+0.5) to x * x * ... * sqrt(x) adds c4a79cd8d69 Revert [Hexagon] Add support for getRegisterByName. adds 314d4c4af7a [InstCombine] consolidate tests for ~(X+C); NFC adds 2ea86665a12 Revert r341329 due to MSAN error adds 8427b2fbd1e [InstCombine] allow add+not --> sub for arbitrary vector co [...] adds cc6f9cbb28a [InstCombine] simplify xor/not folds; NFCI adds 0f7b987bae0 [mips] Disable the selection of mixed microMIPS/MIPS code adds e0a1c477d72 [AArch64][x86] add tests for pow(x, 0.25); NFC adds 341c1a8af7f [llvm-objcopy] Dwarf .debug section compression support (zl [...] adds 8098c52b195 [NFC][llvm-objcopy] Fixing a ubi-san problem with unaligned [...] adds f27e1852c4d [NFC][llvm-objcopy] clang-formating Object.cpp adds f0dce6702ce [IndVars] Fix usage of SCEVExpander to not mess with SCEVCo [...] adds 0f20aef25ad [PassTiming] reporting time-passes separately for multiple [...] adds dc6d9ec3646 [NFC] Add assert to detect LCSSA breaches early adds 7bcfffc0127 [NFC] correcting patterns in time-passes test to fix buildbot adds 4cf831c0ee1 [InstCombine] Fold icmp ugt/ult (add nuw X, C2), C --> icmp [...] adds be7ae28b635 [x86/SLH] Teach SLH to harden indirect branches and switche [...] adds 81a94dc6378 Do not leak the Mach host port in sys::getHostCPUName() adds 2ec0ce0cc30 [x86/SLH] Teach SLH to harden against the "ret2spec" attack [...] adds cf0bf50e162 Revert r341342: Dwarf .debug section compression support (z [...] adds 24a8df2c420 Disable -Wnoexcept-type due to false positives with GCC. adds d2b1fb11d3f [x86/SLH] Add a real Clang flag and LLVM IR attribute for S [...] adds 784fc22c779 Fix some Wundef warnings in Compiler.h adds 1381c3b1f03 Revert r341269: [Constant Hoisting] Hoisting Constant GEP E [...] adds 488ca480673 [dwarfdump] Improve -diff option by hiding more data. adds e6cfed97969 [MachO] Fix LC_DYSYMTAB validation for external symbols adds fe2c6872d72 [MachO] Fix inconsistency between error messages when valid [...] adds c7d9aac7182 [CodeGen] Fix remaining zext() assertions in SelectionDAG adds c38c85037dd [PGO] Control Height Reduction adds b9587f4923b [WebAssembly] Fix operand rewriting in inline asm lowering. adds 012ff47f2f5 Fix build failures after rL341386. adds 87877c50435 DAG: Factor out helper function for odd vector sizes adds 49cbe528e39 AMDGPU: Fix DAG divergence not reporting flat loads adds badf51784f6 [InstCombine] improve xor+and/or tests adds e2888fd876d [CMake] Provide a custom target to install LLVM libraries adds 810335c3b53 Set console mode when -fansi-escape-codes is enabled adds 46d216b8efd [Codegen] Fix test added in rL341380: AArch64SelectionDAGTe [...] adds ff4ee4df90b [SimpleLoopUnswitch] remove a chain of dead blocks at once adds 801cfc82da8 Fix unused variable warning adds 42d7052fc23 [MinGW] [AArch64] Add stubs for potential automatic dllimpo [...] adds 5d04fc0ef37 [MinGW] Move code for indicating "potentially not DSO local [...] adds 85c2e694ef1 [InstCombine] simplify code for xor folds; NFCI adds 354803c92f0 NFC: expand memset inline arm64 coverage adds 2618a117e18 [NFC] Improve clarity in emitInstrCountChangedRemark adds 09f9778d841 [Hexagon] Don't packetize new-value stores with any other stores adds 04349cea71a [InstCombine] make ((X & C) ^ C) form consistent for vectors adds c5f4b48f16e [WebAssembly][NFC] Fix formatting and tests adds 66ded417a22 Fix a memory leak after rL341386. adds 6da9a358852 [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions adds e49253c0c11 [WebAssembly][NFC] Add colon to label in test adds df71640548a [InstCombine] add tests for xor-or-xor fold; NFC adds a989ec75d48 [LV] First order recurrence phis should not be treated as uniform adds e4422b6a2a2 Revert "Revert r341269: [Constant Hoisting] Hoisting Consta [...] adds e15daa3dfb5 [llvm-strip] Allow copying relocation sections without symb [...] adds 3e090e5aa55 [ThinLTO] Fix memory corruption in ThinLTOCodeGenerator whe [...] adds 013c07f1650 [WebAssembly] Fixed stale assert message in WebAssemblyMCInstLower adds 59d80eec3d3 [InstCombine] update tests checks; NFC adds cb00c85d1c4 [InstCombine] fix xor-or-xor fold to check uses and handle [...] adds dc281ceff88 [Windows] Convert from UTF-8 to UTF-16 when writing to a Wi [...] adds 2f9ea06c6b0 Fix -Wunused-private-variable on non-Windows adds 581d231e61a [WebAssembly] clang-format (NFC) adds ea500dcb7bd Fix -Wunused-function in release build after rL341386 adds 8ca386371e3 Prevent unsigned overflow. adds 10377f6858a [DebugInfo] Fix bug in LiveDebugVariables. adds ebf842e7251 [XRay] Add a RecordPrinter visitor for FDR Records adds 7336954a4d9 Remove FrameAccess struct from hasLoadFromStackSlot adds c191ccbe182 [NFC] Add test on full IV widening adds 846d4ba8936 [DebugInfo] Normalize common kinds of DWARF sub-expressions. adds 5797fe2d199 [Aggressive InstCombine] Move C bindings to their own header file. adds 4906f3fb814 [llvm-strip] Support stripping multiple input files adds 559403cc050 [ControlHeightReduction] Remove unused includes adds 0cd23e06f80 [benchmark] Fix 32-bit build failure adds c5318e322ff [XRay] Use `const` instead of `constexpr` in storage declaration adds 0cfd5354a39 [Hexagon] Ignore unnamed globals in HexagonConstExtenders adds 3fcb1c02a5d [XRay] Use a function to return a constant adds 39f79ecf00e [DAGCombiner] try to convert pow(x, 0.25) to sqrt(sqrt(x)) adds 1f9e6bbfafc Handle zero-length debug directory entries. adds d6e49eeefab NFC: more memset inline arm64 coverage adds 1b5f73005f0 Remove some unnecessary constructor arguments. adds c4278f122c8 Add support for unittest inputs. adds af026c17609 [PDB] Refactor the PDB symbol classes to fix a reuse bug. adds f54d7cec405 NFC: improve ARM64 isFPImmLegal debug print adds a8b0ea0bbd7 Fix silly error in unittest helper. adds d2d8db6d7a5 Fix some warnings. adds 92c8fe0a62e [llvm-dwp] Use buffer_stream if output file is not seekable [...] adds 95d4ae18320 [llvm-dwp] Fix `UN:` lines (supposed to be `RUN:`) in X86/s [...] adds b9c9629e618 [X86][Assembler] Allow %eip as a register in 32-bit mode fo [...] adds 799544783a6 [DebugInfo] Do not generate label debug info if it has been [...] adds 73370761f5a Revert rL341509 to fix massive failures on buildbots adds a8709f19fbf [IndVars] Turn isValidRewrite into an assertion adds fba980b5249 Revert "[IndVars] Turn isValidRewrite into an assertion" be [...] adds afed9811bff [XRay] Add a BlockIndexer visitor for FDR Records. adds ac23fcdc321 [MSan] Make sure variadic function arguments do not overflo [...] adds d8ffa610fe5 Return "[NFC] Add severe validation of InstructionPrecedenc [...] adds 139b3ea82f1 [SLC] Add an alignment to CreateGlobalString adds a044b58ab14 [MSan] store origins for variadic function parameters in __ [...] adds 62f16664abf [NFC] Simplify inner structure of InstructionPrecedenceTracking adds 8502b00a75f [LoopInterchange] Move preheader creation to transform stag [...] adds b219bbc8630 Fix argument type in MachineInstr::hasPropertyInBundle adds f61d5e4a2a1 [LoopInterchange] Cleanup unused variables. adds 7b6a2c6037c [MSan] revert r341528 to unbreak the bots adds 48afe9e6360 [InstCombine] fix formatting in SimplifyDemandedVectorElts- [...] adds 738b5f5028e [RISCV][NFC] Rework test/MC/RISCV/rv{32,64}* to allow testi [...] adds 066246b9930 [MSan] store origins for variadic function parameters in __ [...] adds 3a4ff5c88dd Remove unnecessary semicolon to silence -Wpedantic warning. NFCI. adds 05fc2ce1bac [InstCombine] add tests for xor-not; NFC adds f2f8ab0657f ARM64: improve non-zero memset isel by ~2x adds 80b7585dc63 [InstCombine] add xor+not folds adds 94bb0ad1a1e Fix a warning. adds 6dc9199bec8 [NFC] - in preparation for adding nsw, nuw and exact as fla [...] adds bd424534045 AMDGPU: Remove old hack for function addresses adds 9840d7c8db6 [dsymutil] Reduce peak memory usage for the single threaded [...] adds 9d561f593f5 [llvm-ar] Support * as comment char in MRI scripts adds 2f53151ac14 Move init code in AArch64SelectionDAGTest to SetUpTestCase (NFC) adds df5fa7a3af3 [x86] add tests for pow --> cbrt; NFC adds 14596dffb38 [llvm-ar] Move a variable declaration closer to where it is [...] adds 28fce59a175 [ORC] Remove the mapSectionAddress method from RuntimeDyldO [...] adds 4d5299cbaeb [ORC] Make RuntimeDyldObjectLinkingLayer2 take memory manag [...] adds f22832842f7 Quick fix for -DBUILD_SHARED_LIBS=on build after rL341502 adds eef61336fc6 [ARC] Prevent InstPrinter from crashing on unknown conditio [...] adds 06ee15c9a59 Add missing #include for Testing/Support/SupportHelpers.h adds c04d05920ed [llvm-dwp] Use cl:: instead of using namespace cl adds f2dd6bb73f6 Reland rL341509: "[llvm-dwp] Use buffer_stream if output fi [...] adds bb146ec5a09 [LoopPassManager] MemorySSA should be preserved when enabled. adds 9e212806533 Output per-function size-info remarks adds 63ca6b52d57 Revert r341413 adds 9b5f11d5746 Fix a configure issue with Visual Studio generators. adds e465d88cdec [SampleFDO] Make sample profile loader unaware of compact f [...] adds 42eb082d633 The initial .text section generated in object files was mis [...] adds 0a118f7bb4d [llvm-strip] Fix -p test to check for explicit spaces aroun [...] adds c5185e8ec4e [X86] Add isel patterns for commuting X86adc_flag with a lo [...] adds 30d3c5d4355 Fix error with SmallString implicit conversion. adds 0c89ce389bd Provide a method for generating deterministic IDs for point [...] adds 1c0d3f0a7bd Fix SampleProf code on LLP64 platforms with stoull adds 68e835e9f02 [X86] Add a test case showing failure to use the RMW form o [...] adds 70e99b3383a [X86] Add RMW ADC patterns with load in operand 1. adds ea363334ce4 [llvm-objcopy] Dwarf .debug section compression support (zl [...] adds 7428f4506cb [PDB] Create a SymbolCache class. adds 6d1036d22d5 [PDB] Rename some files in the native reader. adds df0bc373894 Revert: [llvm-objcopy] Dwarf .debug section compression (Se [...] adds b3c98b851a9 [llvm-strip] -p test fix for windows buildbots adds 50b2f18e7ad [X86] Fix some incorrect comments. NFC adds 5d32049f064 [XRay] Add a BlockVerifier visitor for FDR Records adds 36dc275aa8a [X86] Add more test cases for missed opportunities for usin [...] adds 30734541ee1 Revert "[XRay] Add a BlockVerifier visitor for FDR Records" adds 5c4d2c1d43c [IndVars] Set Changed when we delete dead instructions. PR38855 adds 635af94d895 [PowerPC] Combine ADD to ADDZE adds ac820be7772 [llvm-objcopy] Dwarf .debug section compression support (zl [...] adds 55e56ce884b [AMDGPU] Preliminary patch for divergence driven instructio [...] adds f774071018b [MSan] Add KMSAN instrumentation to MSan pass adds 361c297c9dc ARM: fix Thumb2 CodeGen for ldrex with folded frame-index. adds 0e364e13566 [MSan] don't access MsanCtorFunction when using KMSAN adds 60c6009a34b [dsymutil] Prevent non-determinism due to threading. adds fe3b80029de [X86][SSE] Add fadd/fsub(x, bitcast_fneg(y)) tests adds 49e8ec03077 [NewGVN] Mark function as changed if we erase instructions. adds e14a443a2b3 [DAGCombiner] foldBitcastedFPLogic - Add basic vector support adds 4aea3b74910 [X86][SSE] Add additional fadd/fsub(x, bitcast_fneg(y)) tes [...] adds a06762109f9 Add support for getRegisterByName. adds 66586cc1b53 [DebugInfo] Handle stack slot offsets for spilled sub-regis [...] adds 1b57b3d686d [InstCombine] Do not fold scalar ops over select with vecto [...] adds 55883c94395 Hot cold splitting pass adds 78b2eddfbc4 [LV] Fix code gen for conditionally executed loads and stores adds 189c2c8cb6d [InstCombine] Fold (min/max ~X, Y) -> ~(max/min X, ~Y) when [...] adds 43fc2d6fe88 [X86] Teach X86DAGToDAGISel::foldLoadStoreIntoMemOperand to [...] adds d25c18e2ecb [X86] Use regular expressions to make test immune to regist [...] adds 3071b63207c [X86] Change the addcarry and subborrow intrinsics to retur [...] adds 0c1ea5a1294 utils/abtest: Refactor and add bisection method adds 35cb7177bd4 [Bindings][Go] Fixed go.test failure due to C-API argument [...] adds 66f1f168e07 [PGO][CHR] Small cleanup. adds 537da4277fc NFC: remove magic bool in LoopIdiomRecognize adds e853ba4a0c0 [RISCV] Fix AddressSanitizer heap-buffer-overflow in disassembling adds 4115a633261 [llvm-dwp] Clean up tests X86/*.test adds 1b609e06230 [Error] Reintroduce type validation in createFileError() adds f119734abe3 [RISCV] Fix crash in decoding instruction with unknown floa [...] adds 96a04e655cc [PGO][CHR] Build/warning fix adds d71790c2cf8 [codeview] Improve readobj FPO dumper and pdbutil register names adds 84c1ade2361 [X86] Modify the the rdtscp intrinsic to return values inst [...] adds a2fde749914 [CMake] Fix LLVM_ENABLE_LTO option on Windows adds 33d40b31957 [PGO] Fix some style issue of ControlHeightReduction adds 7df3d728242 [X86] Don't create X86ISD::AVG nodes from v1iX vectors. adds 183b21b1f20 [X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for [...] adds 906fd9ab476 [AArch64] Support reserving x1-7 registers. adds 4e9fc1ef01f [WebAssembly] Change SIMD lane indices to vec_i8imm_op adds a5f1bd02178 [InstCombine] narrow vector select with padded condition an [...] adds 566693531ef [MemorySSA] Update MemoryPhi wiring for block splitting to [...] adds dd2780f24dc [X86] Add codegen tests for narrow PADDUS/PSUBUS patterns f [...] adds 1de79cc6545 [codeview] Add .cv_string directive for testing purposes adds fe1f0fea236 [AST] Generalize argument specific aliasing adds a154fcb21fe [InstCombine][x86] add tests for possible blendv transform [...] adds cb88bb7c68f [benchmark] Re-enable benchmarks on all platforms including [...] adds a8ea812648f [benchmark] Fix flags used to compile benchmark library wit [...] adds 16a4c18a238 [WebAssembly] v8x16.shuffle adds b9bd7dd8126 Set cost of invariant group intrinsics to 0 adds 72cb007a52c [SimplifyIndVar] Avoid generating truncate instructions wit [...] adds 443a8ce3c66 [COFF] Implement llvm.global_ctors priorities for MSVC COFF [...] adds 265ce994cb2 ADT: add <bit> header, implement C++20 bit_cast, use adds 25ccaa7421b [PDB] Support pointer types in the native reader. adds 5dc5797dce8 Revert "ADT: add <bit> header, implement C++20 bit_cast, use" adds 1e06d13da75 Fix some of the PDB tests. adds 68a98733468 [MemorySSA] Relax verification of clobbering accesses. adds 90c166c4e52 Remove addBlockByrefAddress(), it is dead code as far as cl [...] adds 35bfd59001d Fix typos. NFC adds 7dcaeafd0b4 ADT: add <bit> header, implement C++20 bit_cast, use adds 4bbbe055a89 Fix typo in previous commit adds 4ed7b132f7e [X86] Add stack folding MIR test for ADCX/ADOX. adds 15159712e26 [X86] Add load folding test cases for the addcarryx intrinsic. adds 9bcfd971896 [X86] Add commuted isel pattern for the load form of ADCX i [...] adds d1fb1f52d32 NFC: use bit_cast more in AArch64AddressingModes adds ffff35344a6 Revert "NFC: use bit_cast more in AArch64AddressingModes" adds c4efbc074ac [X86] Add test cases for commuting ADCX/ADOX instruction to [...] adds d9ee98e0db5 [X86] Mark the ADCX and ADOX instruction as commutable. adds 09d0743fb69 [X86] Create paddus/psubus from narrower vectors with i8/i1 [...] adds 250785bc7b9 [SelectionDAG] enhance vector demanded elements to look at [...] adds 27d4a671404 [X86] Custom type legalize (v2i32 (fp_to_uint v2f64))) with [...] adds 185f21fbd37 AMDGPU: Don't abort on unknown addrspace argument adds 814247cd969 AMDGPU: Use GOT PSV since it has an address space now adds 229ad4c6b0a [XRay] Add a BlockVerifier visitor for FDR Records adds 7c299a76cf7 AMDGPU: Fix tests using old number for constant address space adds 69da26fa1d4 [XRay] Remove unused reference adds f32491f8a4c [Xray] tooling allow MachO format support adds 5d1d3581202 Move createMinMaxOp() out of RecurrenceDescriptor. adds 7fb521bd6b0 [XRay] Fix buildbot failure adds dfb80c8b798 Move a transformation routine from LoopUtils to LoopVectorize. adds 768427d1626 [IndVars] Set Changed if sinkUnusedInvariants changes IR. PR38863 adds fa259d80cab [IndVars] Set Changed if rewriteFirstIterationLoopExitValue [...] adds aa81d565a9f ReleaseNotes: update links to use https adds a5defd3b7d3 [AMDGPU] Prevent sequences of non-instructions disrupting G [...] adds 01fb00c5a75 [llvm-exegesis] Ignore double spaced separators in asm strings adds 2390ffbd78f DAG: Handle odd vector sizes in calling conv splitting adds fa0980a9215 AMDGPU: Stop reporting is-noop addrspacecast for constant 32-bit adds 32ca0aafd1f AMDGPU: Remove function pointer type hack adds 2c6fa12578b [GVN] Invalidate cached info for values replaced by equalit [...] adds 3ebb2159ed0 Don't create a temporary vector of loop blocks just to iter [...] adds d94f77a49e9 [Target] Untangle disassemblers adds 6aabdc9fdd4 [LLD][COFF] Cleanup error messages / add more coverage tests adds a45f6b17b54 [Sparc] Move SparcTargetStreamer.h to the MC Desc, where th [...] adds 0d018d17b33 InstCombine: move hasOneUse check to the top of foldICmpAdd [...] adds bd3beb46c43 [LSR] Add tests for small constants; NFC adds 341b8a710bc make flag name more specific to gvn [NFC] adds 09372b8e715 add flag instead of using a constant [NFC] adds d126aab2ef8 HotColdSplitting: check that target supports cold calling c [...] adds e60205289bb HotColdSplitting: fix test failing because of last commit adds 8a7d229b56d [MIPS GlobalISel] Select icmp adds 3e62673386d [AST] Visit memtransfer arguments in order adds 6df7a517cab [AMDGPU] Preliminary patch for divergence driven instru [...] adds 28b767e9cbd [ARC] Fix macro usage (DEBUG -> LLVM_DEBUG) adds a82b93eaf8b [x86] test codegen for unsigned saturated add; NFC adds 4eef9f69080 [InstCombine] use SelectInst operand names to make code cle [...] adds bda6541c0ca [Hexagon] Split large offsets into properly aligned addends adds 5603fd02d56 [ADT] Support converting to lowercase string in toHex adds ef953d792e1 NFC: bit.h don't warn on strict aliasing for GCC <= 7.1 adds bcb266e40dc API to update MemorySSA for cloned blocks and added CFG edges. adds ca3502c26ea [lit] Disable shtest-timeout on Windows adds 345db673f6a [X86] Mark the ISD::SETLT/SETLE condition codes as illegal [...] adds 5fd9698ca65 Move FeatureAES from SLM, WSM and SNB to GLM and SKL adds 279c17e658b [PDB] Change uint32_t to SymIndex wherever it makes sense. adds 375f98e9d85 Re-run clang-format on one file. adds 0c02f21726d [ADT] bit_cast: check for is_trivially_copyable more portably adds 81149d0872e Fix bit_cast __is_trivially_copyable adds 8dcc2291438 Fix bit_cast properly adds 7bdea3ad5f2 [X89] Explicitly enable aes in aes-schedule.ll to fix failu [...] adds 39736e86dae [ORC] Simplify LLJIT::Create by removing the ExecutionSessi [...] adds 5a3695dcfcd [ORC] Render unresolved symbol addresses as "<not resolved> [...] adds 3ec8365490f Add size remarks to MachineFunctionPass adds 5b11bd605ef [AST] Add test coverage of memsets adds 7712c9b977b Explicitly state triple in machine-size-remarks.ll adds 5ec364705cc [InstCombine] Partially revert rL341674 due to PR38897. adds e03b6481059 [InstCombine] Add testcases for (mul (sext x), cst) --> (se [...] adds a83a0234ccb Add REQUIRES line to machine-size-remarks adds dd24af18f68 [XRay] Add the `llvm-xray fdr-dump` implementation adds b59662095b7 Prevent Constant Folding From Optimizing inrange GEP adds 2da88b084cf llvm-symbolizer: Fix bug related to TUs interfering with sy [...] adds d15dc0bfc9f [LICM] (re-)simplify code using MemoryLocation API [NFC] adds 3b81e5c28ad [IndVars][NFC] Refactor to make modifications of Changed tr [...] adds 3ea47bf2858 AMDGPU: Don't error on out of bounds address spaces adds 4d739a8afdd AMDGPU: Remove leftovers from configurable address spaces adds 7cee7a56827 [LICM] Avoid duplicate work during building AliasSetTracker adds bd1fd314e74 NFC: use bit_cast more in AArch64AddressingModes adds 98228f97d85 AMDGPU: Fix r600 test adds 185bdde2660 [XRay] Add missing LLVMTestingSupport target_link_libraries adds 250f374f316 NCF: use bit_cast in IntervalMap adds 281457bf89c [NFC] Rename variable adds 845847b8459 [NFC] Specify test's option to reduce reliance on defaults adds 2b5cea5ac1c [XRay] Add TSC to NewCPUId Records adds 935f117e02c [XRay] Use FDR Records+Visitors for Trace Loading adds d4bd602817d [X86] Add test cases inspired by PR38840. adds 5fd44bde173 [XRay] Write the TSC along with CPUID adds ed1752d0834 [XRay] Ensure lambda outlives llvm::function_ref adds 6f7c2c62b73 [X86] In combineMOVMSK, look through int->fp bitcasts befor [...] adds 0b5496ca625 [NFC] Sanitizing asserts for OrderedBasicBlock adds e2dd6e18121 [mips] Add a pattern for 64-bit GPR variant of the `rdhwr` [...] adds f91f51f647f [LoopInfo] Fix Loop::getLoopID() for loops with multiple latches adds d690862bbcb [FuncAttrs] Remove "access range attributes" for read-none [...] adds 8f483e6fc2d [AMDGPU] Preliminary patch for divergence driven instructio [...] adds 0d36fb0dfa2 [ARM] Enable ARMCodeGenPrepare by default adds 419a294f43d [MIPS] ORC JIT support adds f9867973b72 [AArch64] test codegen for unsigned saturated add; NFC adds 880c654ad43 [ARM] Add smlald support in ARMParallelDSP adds b866f37ebd9 [Hexagon] [Test] Remove undef and infinite loop from test adds f072f08e159 Make malformed-machos.test pass on my Mac. adds 849df7b61fe pdb output: Initialize padding in PublicsStreamHeader. adds ca08016c455 [MemorySSAUpdater] Avoid creating self-referencing MemoryDefs adds 18dd74a3d2a [SanitizerCoverage] Create comdat for global arrays. adds 1c8be0dcb72 [MIPS] Fix illegal type assert in single-float mode adds dea972401f3 [DagCombine][NFC] Some more tests fo for X % C == 0 (UREM c [...] adds 95b03186771 [GVNHoist] Re-enable GVNHoist by default adds 8df88c5301c [X86] Correct the one use check from r341915. adds 3aac0132d0e [MachineOutliner][NFC] Factor out instruction mapping into [...] adds 127e4faaf54 [NFC] Fix typo in comment adds a0b208b8055 [InstCombine] Support (mul (sext x), cst) --> (sext (mul x, [...] adds 9d207e5918a [InstCombine] Use dyn_cast instead of match(m_Constant). NFC adds 6c625117959 Revert "[SanitizerCoverage] Create comdat for global arrays." adds c1ddded1a53 Test commit: remove trailing whitespace adds 261c19cd7cf [LoopInfo][FIX] Remove leftover dump in unit test adds 3ed903a2040 [GlobalISel] Lower dbg.declare into indirect DBG_VALUE adds 451b5b8c5a8 [CallSiteSplitting] Add debug location to created PHI nodes. adds b4dab097da6 [InstCombine] Fix incorrect usage of getPrimitiveSizeInBits [...] adds a6d74e3c8c9 [X86] Teach X86FastISel::X86SelectRet to use EAX for the sr [...] adds 8282b33d9e8 [X86] Prefer unpckhpd over movhlps in isel for fake unary cases adds b3c30eb7c68 Add some context to fatal verifier errors adds ae4bd95c1e6 [gcov] Fix branch counters with switch statements (fix PR38821) adds 0e5dfed76c0 [InstCombine] add tests for add-with-overflow compares; NFC adds 7aabb145039 [llvm-mca] Delay calculation of Cycles per Resources, separ [...] adds ca29f6a30b2 [InstCombine] enhance vector demanded elements to look at a [...] adds b479681381b AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination [...] adds 0495307cdba Update MemorySSA in LoopUnswitch. adds f3ceb83cbc6 [SanitizerCoverage] Create comdat for global arrays. adds 547c92f475f [Support] Avoid calling CommandLineToArgvW from shell32.dll adds e207c27bf55 [Support] Quote arguments containing \n on Windows adds fb7c1c49e0d [InstCombine] add tests for icmp with xor; NFC adds 3c9c61a3bae Revert "[SanitizerCoverage] Create comdat for global arrays." adds 87d1f822bf5 add IR flags to MI adds da5e3875624 [InstCombine] add folds for icmp with xor mask constant adds aa090871e9b [object] Improve the performance of getSymbols used by Arch [...] adds b73f47d91f1 [codeview] Decode and dump FP regs from S_FRAMEPROC records adds a6e4ea0d334 Apply local fixes intended to be part of r341999.' adds 8ba1cad4cfa Revert "[GVNHoist] Re-enable GVNHoist by default" adds 148f823e484 [cmake] Speed up check-llvm 5x by delay loading shell32 and ole32 adds 77a6888b3d6 [PDB] Write FPO Data to the PDB. adds b74213ab8d3 [InstCombine] add folds for unsigned-overflow compares adds 43011526128 [MachineOutliner] Add codegen size remarks to the MachineOutliner adds fad9f548626 [ORC] Remove some unused typedefs. adds ff7002de72a [X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy ab [...] adds 479b4ab2b0e Break LoopUtils into an Analysis file. adds a2120248857 [SelectionDAG] Remove some code from PromoteIntOp_MGATHER t [...] adds 867f48781f0 Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* deter [...] adds ab4b357430e Remove unused include from IVDescriptors.cpp. adds cf397e4d395 [LV] Move InterleaveGroup and InterleavedAccessInfo to Vect [...] adds 15889d480c6 [AArch64] Add parsing of aarch64_vector_pcs attribute. adds f8479a89f43 [ARM] Allow bitcasts in ARMCodeGenPrepare adds ddd717485f1 [ARM] Exchange MAC operands in ARMParallelDSP adds 0725c4c9fcf [llvm-exegesis][NFC]Remove dead function parameter adds 1235fed263c [AArch64] NFC: Refactoring to prepare for vector PCS. adds 8f7d596fb76 [SimplifyCFG] Put an alignment on generated switch tables adds de05d15a22b [ARM] Follow-up to rL342033 adds b2cbb982a6b [CGP] Ensure splitgep gives deterministic output adds 2bd27f32fe0 [ADT] Made numerous methods of ImmutableList const adds 76d3c908f50 [DWARF] Refactoring range list dumping to fold DWARF v4 fun [...] adds 6e42e3146cf [AArch64] Implement aarch64_vector_pcs codegen support. adds 748e6b87e21 [NFC][InstCombine] R38708 - inefficient pattern for high-bi [...] adds 6a54cd5c4b7 [GVNHoist] computeInsertionPoints() miscalculates IDF adds 103f07fe70f Reverting r342048, which caused UBSan failures in dsymutil. adds 9b8c7635149 [PatternMatch] Use generic One,Two,ThreeOps_match classes (NFC). adds 549a081f228 [X86] Remove isel patterns for ADCX instruction adds cfe06dbe7c5 [ARM] Tighten f64<->f16 conversion requirements adds 5ca4d748cca [WebAssembly] SIMD comparisons adds e2b125cd4df [objcopy] make objcopy follow program header standards adds b5eaa9c28c2 [InstCombine] Inefficient pattern for high-bits checking (PR38708) adds 4d82ce5c275 AMDGPU: Re-apply r341982 after fixing the layering issue adds f4463119255 [NFC][InstCombine] R38708 - inefficient pattern for high-bi [...] adds d9f48f60944 [NFC][InstCombine] Drop newly-added interference-tests-for- [...] adds bc55752c490 AMDGPU: Print all kernel descriptor directives (including t [...] adds f0f4c09005f [Hexagon] Use legalized type for extracted elements in scal [...] adds 69d3b581069 [PDB] Emit old fpo data to the PDB file. adds 45989987d87 Guard FMF context by excluding some FP operators from FPMat [...] adds 75346f6c67c [InstCombine] add tests for unsigned add overflow; NFC adds 59630cbb0ad revert r341288 - [Reassociate] swap binop operands to incre [...] adds f56ec7c112e [WebAssembly] Make tied inline asm operands work again adds 9a1147152d2 [ORC] Add a special 'main' JITDylib that is created on Exec [...] adds 1f54a23724a [ORC] Merge ExecutionSessionBase with ExecutionSession by m [...] adds 8c95af2aa25 [llvm-cov] Delete custom JSON serialization code (NFC) adds 90f4ccc2c5a [Support] sys::fs::directory_entry includes the file_type. adds 9c37cace429 [Hexagon] Improve the selection algorithm in scalarizeShuffle adds 5d5475af090 [Hexagon] Use shuffles when lowering "gather" shufflevectors adds e72998638a4 [PDB] Remove all clone() methods. adds 2cbd88fb606 fix 80-column violation with clang-format adds 3478d122685 [DAGCombiner] improve formatting for select+setcc code; NFC adds 2b32f85ed49 dwarfdump: Improve performance on large DWP files adds e228bb39fea DebugInfo/PDB: Remove unused member adds 047d8bd5395 STLExtras: Add some more algorithm wrappers adds 33fea30a52c [WebAssembly] Add missing SIMD instruction attributes adds 9944ae93d19 Remove isAsCheapAsAMove from mem ops adds 9294decf185 Remove isAsCheapAsAMove from v128.const adds 7f7717fed4b [NFC] Use expensive asserts in relevant LICM tests adds f3ae9dd418f [NFC] Add Requires: asserts where needed adds b8d7ba6811d ARM: correct the relocation type for `bl` on WoA adds 10ab82f5684 [X86] Type legalize v2i32 div/rem by scalarizing rather tha [...] adds f33751e706f [AMDGPU] Preliminary patch for divergence driven instru [...] adds 0f8c6051333 [llvm-exegesis][NFC] Split BenchmarkRunner class adds 198fe03a307 [llvm-exegesis][NFC] Remove dead parameter. adds a663124b774 [mips] Enable the mnemonic spell corrector adds 6785a334c36 [AMDGPU] Load divergence predicate refactoring adds 1468b7dcde3 [XRay] Bug fixes for FDR custom event and arg-logging adds 29369e8ff65 ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4. adds f16b31b11ec Fix unused variable warning. NFCI. adds 739dc6b5f9e AMDGPU: Fix some outdated datalayouts in tests adds 21339d63b93 DAG: Fix expansion of unaligned FP loads and stores adds 809cc972c8f AMDGPU: Fix not preserving alignent in call setups adds d76926a9bab [MC/Dwarf] Unclamp DWARF linetables format on Darwin. adds a8d062c8185 [ARM] Fix FixConst for ARMCodeGenPrepare adds 94436041e4a [ARM] Allow truncs as sources in ARM CGP adds 7cc8ebdc134 [InstCombine] reorder folds to reduce chance of infinite loops adds 92cf743ad67 Renovate CMake files in the `llvm-(cfi-verify|exegesis|mca) [...] adds 84c594f3870 [InstCombine] remove checks for IsFreeToInvert() adds aa4f97a256d [cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested. adds 0e178bfba37 [cmake] Fix missing DEPENDS. adds 9a7f4371107 [AArch64] Add integer abs testcases for D51873. adds c8301cc3196 [WebAssembly] Fix signature of `main` in FixFunctionBitcasts adds ab2b9db4901 [RISCV] Fix decoding of invalid instruction with C extensio [...] adds 64a51341c95 [RISCV][MC] Reject bare symbols for the simm6 and simm6non [...] adds 9d93ec6c77f Common infrastructure for reading a profile remapping file [...] adds dc08c466b98 [InstCombine] Add test cases for D51964. NFC adds 93dcdfe7b76 [InstCombine] Fold (xor (min/max X, Y), -1) -> (max/min ~X, [...] adds 03e629a1a43 Fix a couple of mangling canonicalizer corner case bugs. adds 61be1ad26c0 Add flag to llvm-profdata to allow symbols in profile data [...] adds 3def5002f7b Revert "[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` [...] adds 412d3308e1e [DCE] Add DebugCounter support adds b0f69a6d15f [NFC][InstCombine] Test what happens if 'unefficient high b [...] adds ea6d8b4aae7 [PartiallyInlineLibCalls] Add DebugCounter support adds ad7e5b06873 [InstCombine] Inefficient pattern for high-bits checking 2 [...] adds 0e8fee8f1aa [X86] Cleanup pair returns. NFCI. adds 28e4a69190d [X86] Fix register resizings for inline assembly register o [...] adds ee5f4639a8f [MachineInstr] In addRegisterKilled and addRegisterDead, do [...] adds 62d12ed7519 Add dependency on new llvm-cxxmap tool to check-llvm. adds e562960fe30 [bindings/go] Add DebugLoc parameter to InsertXXXAtEnd() adds 85a58e30c6c [llvm-exegesis] Add missing MC dependency to CMakeLists.txt adds 092278abb68 LLVMExegesisX86Tests: link to LLVMCore, too. adds 21390db3604 [DAGCombine] Fix crash when store merging created an extrac [...] adds a3cc066aa41 [NFC][InstCombine] PR38708 - inefficient pattern for high-b [...] adds 52d9c5f7ba7 [SanitizerCoverage] Create comdat for global arrays. adds 5d02c0ff966 [AMDGPU] Removed unused method adds 2a6d3ac6d81 [NFC] Link LLVMCore into LLVMExegesisARMTests. adds a858f4fe0be [VPlan] Implement initial vector code generation support fo [...] adds 5d8f7dea91a Fix for the buildbot failure http://lab.llvm.org:8011/build [...] adds 221adaaaaca [NFC] Remove meaningless code from GVN adds 0d8c8e520f3 [InstCombine] Add some test cases for (add (sext x), (sext [...] adds 54e576d2821 [Support] Treat null bytes as separator in windows command [...] adds e7a6d63e5e1 [SystemZ] Adjust cost functions for subtargets that use LI [...] adds 95265ffb1fe [LoopInterchange] Preserve ScalarEvolution, by forgetting a [...] adds ad72545325c [ARM] bottom-top mul support in ARMParallelDSP adds dbed722b630 [DWARF] reposting r342048, which was reverted in r342056 du [...] adds 3dd28f03d50 [AMDGPU] Ensure trig range reduction only used for subtarge [...] adds b0614b1476f [ThinLTO]Allow setting of maximum cache size with 64-bit number adds 7ac6bf71f75 [X86][BMI1] Add scheduler class for BLSI/BLSMSK/BLSR BMI1 i [...] adds 821226ef218 [X86][BMI1] Fix BLSI/BLSMSK/BLSR BMI1 scheduling on btver2 adds f9c79b45bdb [InstCombine] add more tests for x86 blendv (PR38814); NFC adds 6764b4552f4 fix typos adds 7eee232c9ae Revert r342233. adds b804bf5cf4e SelectionDAG: Add compact SDDbgValue representation to -dag [...] adds 71e86497f44 fix noasserts build adds 8c4c37e7244 Introduce explicit add_unittest_with_input_files target for [...] adds 59d74e3c8ac [InstCombine] regenerate test checks; NFC adds 91197d3c21d [InstCombine] remove stall comment from test file; NFC adds 194522e52bc [InstCombine] move test next to related tests; NFC adds 57ce6fdde2c [InstCombine] remove unnecessary target constraints for tests; NFC adds 02dc0815b48 [InstCombine] rename test file to better describe the fold; NFC adds 719fa9029b0 [X86] Re-generate test checks using current version of the [...] adds 4c198664373 [X86][SSE] Lower shuffles to permute(unpack(x,y)) (PR31151) adds 1b5dda42596 Revert a line-endings change that somehow got included with [...] adds 70de09a3481 Revert r342210 "[ARM] bottom-top mul support in ARMParallelDSP" adds 156c648224b [ThinLTOCodeGenerator] Avoid Rehash StringMap in ThreadPool adds f09790fa1e6 Fix debug info for SelectionDAG legalization of DAG nodes w [...] adds 388e636afb1 Revert r342183 "[DAGCombine] Fix crash when store merging c [...] adds f43a94c91a9 Test commit access adds 7b77a6b5d21 Fix lit/example/many-tests pickling issue adds 6b2a177e15d AMDGPU: Clear the bits before they are being set in program [...] adds 0686088716c Remove unused DIASession field adds e5875c4b228 [WebAssembly][NFC] Fix unconventional test names adds 17c04c42318 [InstCombine] add more tests for add narrowing folds; NFC adds b0ea73526f5 HotColdSplit: add back propagation to extend cold regions adds b2928cc4eb1 HotColdSplit: fix isSingleEntrySingleExit adds 0c636310aeb HotColdSplit: fix invalid SSA due to outlining adds 03a74f02992 [InstCombine] refactor add narrowing folds; NFCI adds 3d6400d5f12 test/Other/can-execute.txt: delete %t after the test adds ec13dea9af1 [SampleFDO] Add FunctionOffsetTable in compact binary forma [...] adds 932287b64f8 [PDB] Refactor a little of the Symbol creation code. adds a87575ecca9 [codeview] Remove dead code adds c839b30eff4 Add missing include. adds 53fdce9a566 [WebAssembly][NFC] Move SIMD encoding tests to dedicated file adds bc154d861ef [PowerPC] Fix the calling convention for i1 arguments on PPC32 adds d84a0a2c13b [InstCombine] add/use overflowing math helper functions; NFC adds 3d8fe264be4 Attempt to unbreak the build after r342286. adds fd837765bd0 [InstCombine] refactor mul narrowing folds; NFCI adds 6b3512c9ff7 [BreakFalseDeps] Fix bad formatting. NFC adds 903e31c1d6f [PDB] Make the pretty dumper output modified types. adds 8416bf98772 [WebAssembly] SIMD neg adds 5455b4c4993 Fix filesystem race issue in SampleProfTest introduced in r [...] adds db12109a870 [WebAssembly] SIMD shifts adds f4a23c67761 [WebAssembly][NFC] Generalize operand numbers in SIMD tests adds bfa7594241b [CodeGenPrepare] Preserve debug locs in OptimizeExtractBits adds 4c3db1c1e8d [InstCombine] Inefficient pattern for high-bits checking 3 [...] adds bb7b59846f8 Fix line endings. NFCI. adds 8ec990da8b3 [InstCombine][x86] try harder to convert blendv intrinsic t [...] adds d2aa336c9ad [NFC] minor cleanup in PassManagerInternal.h adds b7d1fd0cf82 [X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk [...] adds af350d56690 [X86] Remove an fp->int->fp domain crossing in LowerUINT_TO [...] adds c10b814e37d [X86][SSE] Fix insertps load combine test name adds 53bb7b2cc4a Update microsoftDemangle() to work more like itaniumDemangle(). adds 23d68908bac Give InfoStreamBuilder an opt-in method to write a hash of [...] adds becd18d5a87 [InstCombine] Support (sub (sext x), (sext y)) --> (sext (s [...] adds d5247393d7e Revert r342148 (and follow-on fix attempts r342154, r342180 [...] adds 37b4d0110f0 [llvm-readobj] Make some commonly used short options visibi [...] adds c700c57cd65 [NFC][InstCombine] Some more tests for comparisons with low [...] adds 2d59e217ef3 Fix -Wdangling-else gcc warning. NFCI. adds ef63e2ef4e3 [NFC][InstCombine] One more test pattern for comparisons wi [...] adds f9864b85c4c [x86] add failure to splat test (PR38949); NFC adds 34dfc5230e4 [x86] fix uses check in broadcast transform (PR38949) adds 9d4952d6a51 [DAGCombiner] try to convert pow(x, 1/3) to cbrt(x) adds 3b44c2befcd [X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16 adds b8983520ee1 [X86][SSE] Always enable ISD::SRL -> ISD::MULHU for v8i16 adds 9f47370eb81 [DebugInfo] Fix build when std::vector::iterator is a pointer adds c714b1a72e1 [NFC] Turn unsigned counters into boolean flags adds f61c769ec2c [llvm-objcopy] Add missing alias for --strip-all-gnu adds b981f4f4354 Reland r342233: [ThinLTO] Allow setting of maximum cache si [...] adds bec58f46358 [PowerPC] Fix label address calculation for ppc64 adds 5201dae2def [llvm-exegesis] Add predefined floating point values so we [...] adds bb05e42b84e Use createTemporaryFile in SampleProfTest adds edd72b28065 [GVNHoist] Re-enable GVNHoist by default adds 7fa1548f75c Fix vectorization of canonicalize adds d377332d772 [ARM] Disallow icmp with negative imm and overflow adds 222bbfaef7a Fix "not all control paths return a value" MSVC warning. NFCI. adds a72fb542405 [ARM] Cleanup ARM CGP isSupportedValue adds 468784fe49f [DebugInfo] Remove redundant argument. [NFC] adds 49ff0581758 Revert "Revert r342183 "[DAGCombine] Fix crash when store m [...] adds bd60c64f32c [CVP] Handle instructions with no user. No need to create C [...] adds d2dad5476b9 Revert "[DWARF] reposting r342048, which was reverted in r3 [...] adds a5c8509bc38 [AMDGPU] Initialize instruction itinerary from GCNSubtarget adds 95c3497d956 [X86ISel] Implement byval lowering for Win64 calling convention adds d532f4a81e0 [MachineOutliner][NFC] Don't map more illegal instrs than y [...] adds 2f778b8a01b [Loopinfo] Remove one latch-case in getLoopID. NFC. adds 1ad653993ab [MC] Avoid inlining constant symbols with variants. adds a3a0a03db21 [PDB] Make the native reader support modified types. adds 8d5fd87893b [PDB] Make the native reader support enumerators. adds b34d98d917d [mips] Fix MIPS N32 ABI triples support adds 45252eec244 Add #include <cassert> adds 7848793c8bd [EarlyCSEwMemorySSA] Add MSSA verification and tests to mak [...] adds 39b4178d852 [OCaml] Add missing instruction opcodes to OCaml API adds c753266f48f [OCaml] Add Token type to kind enum in OCaml API adds 7aa375cdfea [OCaml] Add GlobalIFunc value kind to OCaml API adds baf31dc385c Work around grep vs. CRLF issue in Thumb2 test by matching [...] adds e85b236f177 Revert "[ARM] Cleanup ARM CGP isSupportedValue" adds 0a0841da510 [OCaml] Add OCaml APIs for Invoke arguments and destinations adds a67a1a5fb6a [LLVM-C] Add support for ConstantExpr in LLVMGetNumIndices [...] adds 6fd937cc442 [LLVM-C][OCaml] Add C and OCaml APIs for llvm::StructType:: [...] adds b81d4c7e5fa [NFC][OCaml] Fix implicit declaration compilation warnings adds 84b255f9771 [NFC][OCaml] Fix copy paste error in file header adds fbd5ffcbc2c [OCaml] Add OCaml API for LLVMIsCleanup adds e63ae034604 AMDGPU: Expand vector canonicalizes adds a52c9558fa5 [PowerPC][NFC] Add a mulld testcase for scheduling check. T [...] adds e5eb6c55953 [PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8 adds 9ae72b778a2 LSV: Fix adjust alloca alignment trick for AMDGPU adds 8ec7f7a8ef3 AMDGPU: Don't form fmed3 if it will require materialization adds d9ef74dde8d [IndVars] Remove unreasonable checks in rewriteLoopExitValues adds bdecf7785e4 [benchmark] Lowercase windows specific includes adds f9de7712d43 [AArch64] Attempt to parse more operands as expressions adds 0a5be7e8d36 Fixes removal of dead elements from PressureDiff (PR37252). adds e725c11b63a [Xray] llvm-xray fix possible segfault adds 4a4cbdd47bb [X86][SSE] LowerShift - pull out repeated getTargetVShiftUn [...] adds 0ae87519292 Remove trailing whitespace introduced in r342440. adds 1313029e9ec Improve Register Setup adds 4692688a036 Added function to set a register to a particular value + tests. adds 3208ea15c53 [llvm-exegesis] Improve Register Setup. adds 686bd24614a [TableGen] CodeGenDAGPatterns::GenerateVariants - full cach [...] adds 275d69bc291 Fix signed/unsigned comparison warning. NFCI. adds 0f5ab3b66fc [TargetLowering] Android has sincos functions adds 78b19ea9d92 [PowerPC] Optimize compares fed by ANDISo adds 1a70735b284 [OCaml] Add OCaml API for LLVMGetIndices adds b224dd65361 [LLVM-C][OCaml] Add LowerAtomic pass to C and OCaml APIs adds f8ed54cc197 [LLVM-C][OCaml] Add UnifyFunctionExitNodes pass to C and OC [...] adds c7d97ef0cfc [LTO] Make detection of WPD remark enablement more robust adds 8c457a728f6 [PowerPC] Do not emit record-form rotates when record-form [...] adds 28bc0ab6063 [ThinLTO] Update LangRef doc for summary parsing adds 7f3e3780def [llvm-mca] Slightly refactor class InstRef. NFC. adds ff6f0e23ad9 Use pass-by-reference for-range loop. NFCI. adds 859ed6ce4d9 Revert r342457 "Fixes removal of dead elements from Pressur [...] adds c66f16ce868 [llvm-mca] Add the ability to mark register reads/writes as [...] adds cb24b2be15b Remove dead function user_cache_directory() adds 3c958d8fea5 [RISCV][MC] Tighten up checking of sybol operands to lui and auipc adds 0a7f06b65e2 [RISCV][MC] Reject bare symbols for the simm12 operand type adds 02a915b8e8c [RISCV][MC] Use a custom ParserMethod for the bare_symbol o [...] adds 6b2193a167c Revert rL342466: [llvm-exegesis] Improve Register Setup. adds d1ec7a712ce Revert rL342465: Added function to set a register to a part [...] adds c5c0a4b4805 [NFC] Update comments regarding BufferSize for ProcResources adds 00a938c3c1e [PostRASink] Make sure to remove subregisters from live-ins [...] adds 0c5ced81dc2 [PDB] Better support for enumerating pointer types. adds 6848bdaf778 Check lines before using alias analysis to check for interference adds f65d102feef [PGO][CHR] Add opt remarks. adds e105a22a72e Fix function signature to actually be an override. adds 40cb0cb6c74 [AMDGPU] Match udot8 pattern adds fbb826fa5c2 Do not optimize atomic load to non-atomic memcmp adds cd4dcdaaf24 [Docs] [Support] System Library to Support Library transiti [...] adds 9ae6d92a561 Remove svn:executable from a documentation file. adds 7dee23aa151 [bugpoint] Revert r318459 adds 520d38cd140 [benchmark] Mention another cherry-picked change in README. [...] adds 638f42a216c Revert r342494 as it was failing on a bot and the author ca [...] adds 50dce07c8dd [WebAssembly] v4f32.abs and v2f64.abs adds 9a1a4ca8cef [XRay][compiler-rt] FDRLogWriter Abstraction adds b064c24e4a2 ScheduleDAG: Cleanup dumping code; NFC adds b4967025822 AArch64MacroFusion: Factor out some opcode handling code; NFC adds b74b9fdb9a2 [WebAssembly][NFC] Remove extra space in WebAssemblyInstrSIMD.td adds aef051374a9 [DWARF Verifier] Add helper function to dump DIEs. [NFC] adds e8654dabcf8 [DebugInfo][Dexter] Speculated BB presents illegal variable [...] adds 94083e06715 [X86][SSE] Update extractelement test in preparation for D52140 adds c75b449af65 [COFF] Emit @feat.00 on 64-bit and set the CFG bit when emi [...] adds 2fdd5d38064 [RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A adds ab1155a38d3 [ADT][BitVector] Add push_back() adds 60bebed7a91 [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVe [...] adds 45e19861a8e Verify commit access in fixing typo adds fd06cb2db23 [InstCombine] Don't transform sin/cos -> tanl if for half types adds f02ce8dcad4 [TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVe [...] adds fa4dbf77f1d [New PM] Introducing PassInstrumentation framework adds bb4c3570003 [ARM] Fix unwind information for floating point registers adds 74e3c34a76f [InstCombine] foldICmpWithLowBitMaskedVal(): handle ~(-1 < [...] adds 47c99e0a969 [InstCombine] foldICmpWithLowBitMaskedVal(): handle uncanon [...] adds 7795456d9e4 [InstCombine] foldICmpWithLowBitMaskedVal(): handle uncanon [...] adds 80b0618b4c8 [benchmark] Cherrypick fix for MinGW/ARM from upstream adds 490f68fb298 [AtomicExpandPass]: Add a hook for custom cmpxchg expansion in IR adds 3b4fa0d0339 Fix -Wsign-compare warnings. NFCI adds 68fc66e3d30 Revert rL342544: [New PM] Introducing PassInstrumentation f [...] adds dcc25258ae6 [DAGCombiner][x86] add transform/hook to decompose integer [...] adds a9c15c18d50 [TableGen][SubtargetEmitter] Add the ability for processor [...] adds bf6ec206615 [bpf] Symbol sizes and types in object file adds 76c0cf65821 [AMDGPU] Add instruction selection for i1 to f16 conversion adds eb2ecf38ab4 Attempt to unbreak buidlbot lld-x86_64-darwin13 after r342555. adds 8ea1c2fe6a3 [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support adds 563a3bbd658 [LLJIT] Add API to expose linking layer from LLJIT classes adds bb017fb10f9 [mips][microMIPS] Fix the definition of MOVEP instruction adds d4b73063533 [mips][microMIPS] Extending size reduction pass with MOVEP adds 3c27669a0d7 [ThinLTO] Extract getReferencedTypeIds from [NFC] adds 6e5f07e0421 [ThinLTO] Write TYPE_IDs for types used in functions import [...] adds 3a89b36622b [x86] change names of vector splitting helper functions; NFC adds 9de32f78e1c Copy utilities updated and added for MI flags adds 71589ff6720 [X86] Handle COPYs of physregs better (regalloc hints) adds be08b55fc5f [InstCombine] Disable strcmp->memcmp transform for MSan. adds f9cabb9ebf9 [ARM] Refactor Exynos feature set (NFC) adds b044a64d277 [ARM] Adjust the feature set for Exynos adds 55025c47718 Workaround a limitation of llvm::Any when used with types t [...] adds 9214de517ed MachineScheduler: Add -misched-print-dags flag adds 98f7c2ba4a9 AArch64: Add FuseCryptoEOR fusion rules adds e48b2117883 [x86] add test for add+not vector fold; NFC adds 2327768f69d Fix the build when LLVM_TARGETS_TO_BUILD is empty. adds fe5554490ad [SelectionDAG] allow vector types with isBitwiseNot() adds de66c77d885 [x86] add test for 256-bit andn (PR37749); NFC adds c3779f52e63 Revert "[XRay][compiler-rt] FDRLogWriter Abstraction" and 1 more. adds 5ffd6db668e [New PM] Introducing PassInstrumentation framework adds eddbfad05ce [WEB] add new flags to a DebugInfo lit test adds 776583c82b8 [WebAssembly] Renumber SIMD ops adds 5dd1dd3856e [PowerPC] Fix the assert of combineBVOfConsecutiveLoads whe [...] adds 6bf5f37c12c [unittests] Do not use llvm::sort in googlemock adds f68a67ad961 Fix for bug 34002 - label generated before it block is fina [...] adds 85a14f04918 Temporarily Revert "[New PM] Introducing PassInstrumentatio [...] adds ba88c3a89a7 [XRay][compiler-rt] FDRLogWriter Abstraction adds 32a3289434c [MachineVerifier] Relax checkLivenessAtDef regarding dead s [...] adds 3f24abff843 Improve the doc about the initial commit email sent to the ML adds e1f5d9d40de [NFC][x86][AArch64] Add BEXTR-like test patterns. adds b5fa23ba6e5 [RISCV][MC] Improve parsing of jal/j operands adds 44db1d1e245 [IR] Add a boolean field in DILocation to know if a line mu [...] adds 0b774f63bca [IPSCCP] Fix a problem with removing labels in a switch wit [...] adds 37d99d3dedb [DWARF] - Emit the correct value for DW_AT_addr_base. adds fc05216ee6a [ADT] Try again to use the same version of llvm::Optional o [...] adds 0bc4e615841 Fix line-endings. NFCI. adds 21164cc5a55 Fix -Wdocumentation warnings introduced by r342555. NFC adds d4dc55135e9 [RISCV][MC] Modify evaluateConstantImm interface to allow r [...] adds eda0de3f051 [X86][SSE] Remove PSHUFLW/PSHUFHW combineRedundantHalfShuff [...] adds f724c01683a [ADT] Bring back memmove to make GCC 5.4 happy adds db98902adc6 [llvm-exegesis] Improve Register Setup (roll forward of D51856). adds be9fcb899f8 [X86][SSE] Remove UNPCKL(SHUFFLE)->UNPCKH custom combine adds 911cc8dde35 [llvm-exegesis] Fix broken build bots. adds a6fe72111f3 [InstCombine] Handle vector compares in foldGEPIcmp() adds dff6e8d22fa [IR] reduce duplication in unittest for shuffles; NFC adds 1c86ce8fa79 [IR] add shuffle query for vector concatenation adds c12a4567e46 [llvm-mca][BtVer2] Modify ANDN tests in zero-idioms-avx-256.s. NFC adds b17277efb8b [PDB] Add the ability to map forward references to full decls. adds 24b5a5351b0 [gcov] Fix wrong line hit counts when multiple blocks are o [...] adds 39b643282cd [PDB] Better printing of builtin types when using DIA dumper. adds 4dc31615f57 [PDB] Fix failing test. adds e6959a6ecfe [New PM] Introducing PassInstrumentation framework adds e8e1aa27c99 [InstCombine] add tests for vector concat with binop (PR330 [...] adds 5748c47c626 [SelectionDAG] replace duplicated peekThroughBitcast helper [...] adds 2d481c770a9 Fix warnings. adds 8281907cd2e Fix -Wtrigraphs. adds e54994e9c00 [inline Cost] Don't mark functions accessing varargs as non [...] adds cb2f53f0904 [MachineOutliner][NFC] Move debug info emission to createOu [...] adds 7840e607b99 [Bitcode] Address backwards compat bug in r342631 adds 4caac9138cb [PDB] Fix -Wcovered-switch-default warning. adds a96dc0e7b9d [RegAllocGreedy] Fix crash in tryLocalSplit adds 9d4397e6788 [InstCombine] rename test file, simplify tests, regenerate [...] adds 02b573b2155 [GlobalDCE] AvailableExternal linkage is checked in isDisca [...] adds c18b56ec273 [MachineOutliner][NFC] Don't add MBBs with a size < 2 to th [...] adds a22a6f2e1b7 [WebAssembly] Add V128 value type to binary format adds 10d1aafc782 [WebAssembly][NFC] Add missing tests for indirect calls adds 8135e49e9b6 bpf: check illegal usage of XADD insn return value adds 4c406c21ff3 Remove an unused function adds 3b417747054 Add the ability to register callbacks for removal and inser [...] adds 73d38155e86 Fix DenseSet::ConstIterator typedefs adds b69da1b452d [MachineCopyPropagation] Minor clang-formatting. NFC adds 7b734738932 [WebAssembly] Add WebAssembly to LLVM_ALL_TARGTS. adds 5b1329de306 [llvm-objcopy/llvm-strip]: handle --version adds 97eaa64e596 [MachineCopyPropagation] Refactor copy tracking into a class. NFC adds da8383a9ebe [Docs] [Support] Correct a missed reference and use up to d [...] adds 4739269956a [MCA] Remove dependency on CodeGen. adds db9807d302d [WebAssembly] Revert r342701, "Add WebAssembly to LLVM_ALL_ [...] adds 1269b2af10e Merge clang's isRepeatedBytePattern with LLVM's isBytewiseValue adds 469bae00242 [ADT] restrict bit_cast to trivially-constructible To adds 283b43360a5 Revert "[ADT] restrict bit_cast to trivially-constructible To" adds 722833d6cbe [dwarfdump] Verify compatibility of attribute TAGs. adds 794b30e75b8 [dwarfdump] Verify DW_AT_type is set and points to a compat [...] adds a12681683a5 [AMDGPU] Divergence driven instruction selection. Part 1. adds 5b5e5327906 [AMDGPU] lower-switch in preISel as a workaround for legacy DA adds 119d03653a4 [ADT] Hack around GCC 5.4 miscompiling Optional of enum. adds e849859f3dc [dsymutil] Suppress CoreFoundation leaks in tests. adds da1fb72bb30 Ensure that variant part discriminator is read by MetadataLoader adds 3ce8ac08176 [X86] Add scheduling tests for AVX1 256-bit zero-idioms. NFC adds cc1f2a595ea [test] Fix Assembler/debug-info.ll adds ad1103ee8b8 [X86][BtVer2] Fix latency and resource cycles of AVX 256-bi [...] adds d4f12ccce88 [X86][Sched] Add zero idiom sched data to the SNB model. adds 55385261c6c [ADT] restrict bit_cast to trivially-constructible To adds 7532b6d4c0d [InstCombine] add tests for extractelement; NFC adds 06e8a78c820 AArch64FastISel: Abort if we failed to select operand of intrinsic adds 0ccb4cd7342 revert changes from r342722 adds 6b9d6613897 [tblgen] Fix undefined behaviour when assigning integers to [...] adds 2714c69f003 [Hexagon] Avoid functions with exception handling in Hexago [...] adds f67f1ae5c72 [WebAssembly] Made assembler only use stack instruction tab [...] adds 641cba0696d [x86] add test with optsize attribute for scalar->vector tr [...] adds 9645e5619c1 [x86] add (negative) andnp test for D52318; NFC adds c146db29436 [NFC] use bit_cast in PointerSumType adds a53c520ec5d Pass code-model through Module IR to LTO which will use it. adds 07321881562 [WebAssembly][NFC] Rename simd-conversions test to simd-bitcasts adds a5595686a81 Test commit. Removed a blank line. adds 9dace88d8ad [WebAssembly] Simplified selecting asmmatcher stack instructions. adds 203ff2aeb22 [X86] Add AVX512 target to load scalar to vector tests adds 0215aedc694 [x86] add more tests for poetntial andnp splitting with AVX1; NFC adds bb1f2f9d39d llvm-dwarfdump --statistics: Unique abstract origins across [...] adds 8e283f9f96a [New PM][PassInstrumentation] Adding PassInstrumentation to [...] adds 9b6c494a00c [PDB] Add native reading support for UDT / class types. adds 2adab777567 [NativePDB] Add support for reading function signatures. adds 9c5b071efe7 Add missing include. adds 19bfe6dfac6 Add benchmark and benchmark_main to the Utils folder in IDEs. adds 39c7326099f [ORC] In RTDyldObjectLinkingLayer, only call NotifyFreed if [...] adds dfe1c7be7b0 Try moving this function to another file. adds 9f2b1de8658 Move individual benchmark targets into the Utils folder in IDEs. adds 99ea666c238 [Loop Vectorizer] Abandon vectorization when no integer IV found adds 65d8498b90e [X86] Teach fast isel to use MOV32ri64 for loading an unsig [...] adds e22ccacf712 [llvm-size] Berkeley formatting: use tabs instead of spaces [...] adds 36c4e6edfa3 Test commit. adds f0688aae65c [X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk [...] adds 6583fa2bece [X86] Fix inline expansion for memset in x32 adds 9461c2135c2 [InstCombine] Fold (min/max ~X, Y) -> ~(max/min X, ~Y) when [...] adds 4f792af2e09 [mips] Remove obsoleted "experimental" tag from MIPS 64-bit [...] adds 4541faeb816 [mips] Provide more detailed description for MIPS targets. NFC adds 09becbaba16 [lib/MC] - Set SHF_EXCLUDE flag for .dwo sections. adds e6eae088dce [InstCombine][x86] try even harder to convert blendv intrin [...] adds 970825c180b [bpf] Test case for symbol information in object file adds 5265fbe31e0 [DAGCombiner] Rewrite r331896 in a different way to address [...] adds 75dc9f32d0b [AArch64] Support adding X[8-15,18] registers as CSRs. adds 695ea113fa8 [DAGCombiner] Simplify some code in visitBITCAST. NFCI adds e61aa61731d [ORC] Update ORC C bindings to use the new llvm::Error C API. adds db59d33fd6a [X86] Fix a few typos in comments. adds 9e32caf0dbd [X86] Add isel pattern for (v8i16 (sext (v8i1))) with DQI a [...] adds ff40e91449c Build PassBuilder.cpp with /bigobj to try and appease MSVC [...] adds ffe95bb54a9 [WholeProgramDevirt] Don't process declarations when buildi [...] adds 1c5fea33cd0 [X86] Add WriteRotate schedule class, splitting off from Wr [...] adds 7b83cc7196c [x86] add tests for mul decomposition with negative constant; NFC adds ac5160958a8 [X86] Move RORX instructions back to WriteShift schedule class adds 5c822373b00 [X86] Remove unnecessary WriteRotate overrides. NFCI. adds 0b84fdad3fe [X86] Added missing RCL/RCR schedule overrides to the gener [...] adds ba4d9d9776f [DAGCombiner][x86] extend decompose of integer multiply int [...] adds e3a097b1a62 [Aarch64] Fix memcpy that was copying 4x too many bytes adds 515232b5573 [X86] ROR*mCL instruction models should match ROL*mCL etc. adds fb0b6723a05 Fix line ending mismatches. NFCI. adds b9ad1d04c10 [X86] Remove unnecessary WriteRotate override. NFCI. adds 93257a8e37e [LegalizeTypes] Fix bad indentation. NFC adds 92f62303791 [DAGCombiner] Clarify a comment. NFC adds a9bb2809e3e [X86] Split WriteShift/WriteRotate schedule classes by CL usage. adds 2ea08c43092 [ORC] Add some debugging output to Core.h/Core.cpp adds 3303750bfb0 [DAGCombiner] Remove some dead code from ConstantFoldBITCAS [...] adds 90ec44f78bf llvm-diff: Fix crash on anonymous functions adds a24408a8b6d Fix asserts when linking wrong address space declarations adds ccb6b7a050c [XRay] Clean up XRay build configuration adds bb4ba95d7eb [X86] Add 512-bit test cases to setcc-wide-types.ll. NFC adds 13deaadf272 Remove debug printf leftover from r342397 adds 62cfb198f15 Fix llvm-diff anon-func.ll test adds aad5345ceb1 [llvm-exegesis] Fix PR39021. adds 972331c62be [ARM] bottom-top mul support ARMParallelDSP adds 2948bf4bf86 [deadargelim] Update dbg.value of 'unused' parameters adds 33b1a96b81b [ARM][ARMLoadStoreOptimizer] adds f824ff369c8 Revert r341932 "[ARM] Enable ARMCodeGenPrepare by default" adds 857469dbb11 [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 adds ec56fd75964 [llvm-mca] Improve code comments in LSUnit.{h, cpp}. NFC adds 076203b5fd2 Fix some missing opcodes in bcanalyzer adds 9e2438a3e11 AMDGPU: Fix private handling for allowsMisalignedMemoryAccesses adds 3bc767c904e [NFC][CodeGen][X86][AArch64] More tests for 'bit field extr [...] adds 9c74f810d5b [dsymutil] Set LSan blacklist whenever sanitizers are enabled. adds a99a2b577d1 [PowerPC] Support operand modifier 'x' in inline asm adds 7b129940425 [Mips][FastISel] Fix selectBranch on icmp i1 adds 86317355d31 [DAGCombiner] use UADDO to optimize saturated unsigned add adds 3420e8ea2e2 [Arm][AsmParser] Restrict register list size for VSTM/VLDM adds 166505c19de [X86] Split WriteIMul into 8/16/32/64 implementations (PR36931) adds a7c2370e954 [New PM][PassInstrumentation] IR printing support for New P [...] adds ab8edbddaa5 [Thumb1] Any imm8 should have cost of 1 adds a894da785be [ARM] Adjust the feature set for Exynos adds 31df7feeab1 [ARM] Adjust the cost model for Exynos adds c155aff9372 [InstCombine] improve variable name and use 'match'; NFC adds aaa5cb30f6c [X86] Remove WriteDiv/WriteIDiv schedule overrides - use cl [...] adds 4bd2f33fd76 [InstCombine] add/move tests for extractelement; NFC adds 7e09993947c [Analysis] add comment to generalize finding a scalar op fr [...] adds 512e6852ef6 Reland r342494 after fixing LIT checks. adds fcc6f96a3b0 [X86][AVX] Add truncation as shuffle test for PR31451 adds 8b95b7fee34 [Power9] [LLVM] Add __float128 exponent GET and SET builtins adds 03728047a12 [X86] Infer 64bit feature support from the CPUID results in [...] adds 8ce2d0f5468 [X86] Remove shift/rotate by CL memory (RMW) overrides adds 5171686681c [InstCombine] add bitcast+extelt helper function; NFC adds 2d8135ffd90 Re-submitting changes in D51550 because it failed to patch. adds 292ffb5d194 [hwasan] Record and display stack history in stack-based reports. adds 36d0e5fce07 Revert "[hwasan] Record and display stack history in stack- [...] adds ad869f32bc1 [hwasan] Record and display stack history in stack-based reports. adds f7d89c1eb69 [CUDA] Added basic support for compiling with CUDA-10.0 adds 59895038204 [WebAssembly][NFC] Fix hardcoded stack indices in tests adds 78a8d5bbb0c [X86] Update comment. Use 'glued' instead of 'flagged' NFC adds b631aa4d26d [X86] Remove superfluous curly braces. NFC adds 78f1b6d15e1 [X86] Don't create FILD ISD nodes when X87 is disabled. adds 2f5a1177e1c [AMDGPU] Remove useless check from test. NFC. adds 677102bae87 [WebAssembly] SIMD sqrt adds e6f49e3ad8b [ORC] Switch to asynchronous resolution in JITSymbolResolver. adds 60a5c7791ac [MachineCopyPropagation] Rework how we manage RegMask clobbers adds 7617dcec907 Revert "[ORC] Switch to asynchronous resolution in JITSymbo [...] adds 742443a030f [MachineCopyPropagation] Reimplement CopyTracker in terms o [...] adds 24cd1ab7bf9 [DebugInfo] Do not generate address info for removed debug labels. adds 556673f902d Use TRI->regsOverlap() in MachineBasicBlock::computeRegiste [...] adds ae4ef7d35ca Use unique_ptr to hold AsmInfo,MRI,MII,STI adds 24ab3f138f4 [mips] Correct MUL pattern for mips64 adds 956d5f32589 [llvm-exegesis] Allow benchmarking arbitrary code snippets. adds ac26717e83e [llvm-exegesis] Fix doc in r342947. adds a744f27f85c Add macro LLVM_ATTRIBUTE_REINITIALIZES adds 049a285c58d [llvm-exegesis] Add MCParser to LLVM_LINK_COMPONENTS adds 7a70099f122 [llvm-exegesis] Add lit tests. adds f30d12a5f08 Revert rL342953 "[llvm-exegesis] Add lit tests." adds 116128c1c03 [AMDGPU] restore r342722 which was reverted with r342743 adds 50bc8f679d6 [LoopUnroll] Add check to Latch's terminator in UnrollRunti [...] adds 03d499113ef Revert r342637 "[ADT] Try again to use the same version of [...] adds f8d595349cf [llvm-exegesis][NFC] Rewrite of the YAML serialization. adds 38fec6fbbcc Revert rL342916: [X86] Remove shift/rotate by CL memory (RM [...] adds 644e014e9cc [llvm-exegesis] Fix broken test. adds 7167e4d196a [llvm-exegesis] Add lit tests (v2). adds 64957db18b5 [DAGCombine] Don't fold dependent loads across SELECT_CC. adds 449a2235e97 [llvm-exegesis] Fix missing document separator in YAML output. adds b418c2351b1 [llvm-exegesis] Serializes registers initial values. adds ea11fa660db [DAGCombine] Share predecessor bookkeeping in CombineToPost [...] adds 07f8b17dd34 [DAGCombine] Improve Predecessor check in SimplifySelectOps. NFCI. adds 3b51225303b [LegalizeDAG] Prune Predecessor check in ExpandExtractFromV [...] adds a2ee6e7f170 [AArch64] Share search bookkeeping in combines. NFCI. adds 7ee72241564 [ARM] Share predecessor bookkeeping in CombineBaseUpdate. NFCI. adds d66c2085229 [InstCombine] narrow binops on concatenated vectors (PR33026) adds 5d45cdc9842 [X86] Add AVX512 support to combineVectorSizedSetCCEquality. adds 7a725b21869 Revert "[DebugInfo] Do not generate address info for remove [...] adds 0d75a2849cb [ConstHoist] Do not rebase single (or few) dependent constant adds c38849ca46c [globalisel][tblgen] Table optimization should consider the [...] adds 6718480e69b [MC] Replace NULL constant in code with nullptr. adds 5bcb2da70c0 [RegAllocGreedy] avoid using physreg candidates that cannot [...] adds bd7b44f35ee Revert "[ConstHoist] Do not rebase single (or few) dependen [...] adds bbd1a3d4964 [WebAssembly] Move/clone DBG_VALUE during WebAssemblyRegSta [...] adds 02c47ab05ef [x86] avoid 256-bit andnp that requires insert/extract with [...] adds b0c4f7e14ec [MC] Fix bad indentation and 80 column violations. Use Stri [...] adds 2096ec5b86b Move MSVC workarounds for future<Error>/future<Expected<T>> [...] adds 32cb08f5ea8 [ORC] Reapply r342939 with a fix for MSVC's promise/future [...] adds f384f74cf0d Unify landing pad information adding routines (NFC) adds a7f65b7aff8 [MC] Return a std::string instead of taking it as an out pa [...] adds 0d4dfd227e5 [ThinLTO] Efficiency fix for writing type id records in per [...] adds a3c2b35ae0f Fix a missing includes and a use of the MSVC promise/future [...] adds bf745a628fe Remove 'orc' namespace from MSVCErrorWorkarounds.h, fix som [...] adds 29c56edfbe7 [X86] combineUIntToFP - Fix UINT_TO_FP(vXi1) comment (PR39078) adds e6b3ca85df5 [MCAsmParser] Move AltMacroMode tracking out of MCAsmLexer adds edafc389f17 [LV][LAA] Vectorize loop invariant values stored into loop [...] adds 837d4755cd2 AMDGPU: Add Selection patterns to support add of one bit. adds 3b27ccc7eaa [InstCombine] add fneg variation of shuffle-binop fold; NFC adds 8f7a77b36fc [ORC] Add an asynchronous jit-link function, jitLinkForORC, [...] adds 0f8f2423515 [X86] Add some more movmsk test cases. NFC adds 72eb1655c7c [X86] Allow movmskpd/ps ISD nodes to be created and selecte [...] adds 4d704664d64 [AMDGPU] Fix ds combine with subregs adds f048c66f451 [DAGCombiner] Remove unnecessary check for visitSDIVLike/vi [...] adds 969fcec33e8 [WebAssembly] SIMD conversions adds c1271f6cb47 Revert "Revert "[ConstHoist] Do not rebase single (or few) [...] adds 5088aa8e411 Remove LoopID metadata from the branch instruction that fol [...] adds d813c35f4cf [ORC] Add ThreadSafeModule and ThreadSafeContext wrappers t [...] adds 6e5c098df16 [ORC] Fix a missing include in r343055. adds d3429e96fe1 [ORC] Include-what-you-use fixes. adds 410236759a4 [ORC] Add support for multithreaded compiles to LLJIT and L [...] adds 089f5d0e086 [ORC] Refactor trampoline pool management out of JITCompile [...] adds cd626d1139a [ORC] Fix BuildingAJIT tutorial examples that were broken b [...] adds 62e9680cdc4 [ORC] Add a "lazy call-through" utility based on the same u [...] adds 588325ec092 [DebugInfo] Do not generate address info for removed debug labels. adds 1fe1a86443d [ORC] Update CompileOnDemandLayer2 to use the new lazyReexp [...] adds a372745043f [ORC] Remove a superfluous semicolon, fixing warnings. NFC. adds c1ea03b4ceb Silence compiler warning about unused variable introduced i [...] adds 2167f915308 [llvm-exegesis] Output the unscaled value as well as the sc [...] adds 12076fcf792 Revert r342870 "[ARM] bottom-top mul support ARMParallelDSP" adds 0553ec29cdf Run VerifyDAGDiverence in debug only adds cddb21ca9da [CMake] Avoid REVERSE on unset variable adds e99f0eb61e9 [AArch64] - Return address signing dwarf support adds 3502f75dcf1 Fixes removal of dead elements from PressureDiff (PR37252). adds ae073c99a46 [CodeGen] Enable tail calls for functions with NonNull attributes. adds 78e19a9d43e [ARM] Fix for PR39060 adds 88c138a88a9 [X86][SSE] Use ISD::MULHS for constant vXi16 ISD::SRA lower [...] adds afbc9614c01 [llvm-exegesis] Add support for measuring NumMicroOps. adds 4977226d354 [X86][SSE] canReduceVMulWidth - use ComputeNumSignBits/Sign [...] adds 65bcc34568e [X86][SSE] Refresh PR34947 test code to handle D52504 adds 5635aa9f41f [llvm-exegesis][NFC] Move CodeTemplate to it's own file. adds 3fccee2ee8c Revert r343058 "[ORC] Add support for multithreaded compile [...] adds 54312c3d1b7 [PowerPC] optimize conditional branch on CRSET/CRUNSET adds ee27783984d [DAG] ExpandLegalINT_TO_FP - pull out repeated getValueType [...] adds ecc449e514e [ARM/AArch64][v8.5A] Add Armv8.5-A target adds 21491992cfc Revert r343089 "[AArch64] - Return address signing dwarf support" adds b8bd68f4813 [PassTiming] cleaning up legacy PassTimingInfo interface. NFCI. adds 1eb922bdfce [ARM/AArch64] Add target parser unit tests for Armv8.4-A adds fa73cae3445 [CodeGen] Always print register ties in MI::dump() adds 0d107a3c3ed [llvm-exegesis] Get rid of debug_string. adds ae2e9237cb5 [AArch64][AsmParser] Show name of missing feature for syste [...] adds eb7711e3203 [llvm-exgesis][NFC] Do not pollute buildbots with messages [...] adds 538d8c7d859 [AArch64] - Return address signing dwarf support adds 183bad7d9c0 [AArch64] Refactor instructions that write PSTATE (NFCI) adds 9f0b248da54 Revert r343112 as CallFrameString API change has broken lld [...] adds e9139276f3c lit: Make sure the builtin_commands directory is packaged b [...] adds 71a85cf66a2 [AArch64] Extend single-operand FP insns to match Arm ARM (NFCI) adds 04c9c81cc65 [DAG] SelectionDAGLegalize::ExpandLegalINT_TO_FP - use getF [...] adds 91c25dba637 Reapply r343058 with a fix for -DLLVM_ENABLE_THREADS=OFF. adds 3e753e70082 [libLTO] Expose LLVMCreateDisasmCPUFeatures from libLTO adds 2f5ec56062f AMDGPU/SI: Change predicate to isCIOnly for 32-bit imm s_bu [...] adds 23ecc2ebf7f [X86] Update tzcnt fast-isel tests to match clang r343126. adds 31b94bfe453 [InstCombine] add tests for vector insert/extract; NFC adds 665fc45e847 [ORC] Change the field order of ThreadSafeModule to ensure [...] adds 08733c9b062 [LoopInterchange] Preserve LCSSA. adds bdab5ef14b3 Revert r343129 "[ORC] Change the field order of ThreadSafeM [...] adds cc53e502320 [InstCombine] add tests that show undef propagation failure [...] adds 1f88aa30595 Reapply r343129 with fix. adds 4e2557dbc76 Re-revert r343129. adds 2cb32ff329e [WebAssembly] Fix MRI.hasOneNonDBGUse assert in WebAssembly [...] adds d177f9e9bfa Revert "Re-revert r343129." adds ed523f9336c Re-reapply r343129 with more fixes. adds 3b35e17b21e llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...) adds a0148b89975 [docs] Remove reference to makellvm which was removed in rL329041 adds 4b09ab18583 [ORC] Use ExecutionSession's pre-constructed main JITDylib [...] adds 9fda99d1e58 [llvm-exegesis] Remove unused headers and fix naming issues adds acd4380df99 [mips] Add support MIPS r6 Debian triples adds 493618b38ba [AArch64][v8.5A] Add PSTATE manipulation instructions XAFla [...] adds 56a8ba1f8e4 [llvm-exegesis][NFC] moving code around. adds 8056d4002ab Revert r342942 "[MachineCopyPropagation] Reimplement CopyTr [...] adds c335565127d [InstCombine] Add new tests in preparation for a combine of [...] adds a26da939947 Reapply changes reverted in r343114, lldb patch to follow shortly adds 4e35650e5c1 [X86][Btver2] Add uops counter for exegesis reports adds 1ffbf26a1a0 [PowerPC] [NFC] Refactor code for printing register operands adds df5d1bc4b16 [X86][Btver2] TZCNT instructions take 2uops not 1 adds 589b3f884a9 [Sparc] Add support for the partial write PSR instruction adds 3895db1bce8 [Sparc] Add unimp alias adds 79b8d8e2688 [llvm-exegesis] Fix PR39096. adds f4e51169603 [AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions adds 930ab34cd50 [Sparc] Remove the support for builtin setjmp/longjmp adds ad5b1d79398 [AArch64][v8.5A] Add speculation barrier to AArch64 instruc [...] adds 13a83004f0e [ARM][v8.5A] Add speculation barrier to ARM & Thumb instruc [...] adds 9322555e963 [AArch64][v8.5A] Add prediction invalidation instructions t [...] adds 8a1edcb2277 The llvm-exegesis output file is a html file not a txt file. adds 80d9802d923 [AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction adds aba0e1b1de9 [AArch64][v8.5A] Add Armv8.5-A random number instructions adds c3edf1b3445 [AArch64][v8.5A] Add speculation restriction system registers adds fa611d49bbe [InstCombine] add tests for FP sign-bit cmp optimization wi [...] adds 26f2dcfa088 [AArch64][v8.5A] Add Branch Target Identification instructions adds 7756815310a [WPD] Fix incorrect devirtualization after indirect call promotion adds 51f78de4177 [X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not [...] adds 94a9f57861e [InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0) adds 5e78aca0435 [AArch64][v8.5A] Add speculation barriers SSBB and PSSBB adds be394f1c51e [AArch64] Refactor immediate details out of add/sub tblgen [...] adds 65e0fda8ab8 [Sparc] EXPENSIVE_CHECKS now passes all machine verifier er [...] adds 95202826053 [X86] Split BT and BTC/BTR/BTS scheduler classes adds 8ecc654008a [X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1 adds 4d42c19cd1f Revert r343192 as an ubsan build is currently failing adds b496008657d [X86][Btver2] (V)MPSADBW instructions take 3uops not 1 adds 3b719917004 [X86] Remove BT/BTC/BTR/BTS rr/ri overrides adds b41c4e18ffd [ScalarizeMaskedMemIntrin] Don't emit 'icmp eq i1 %x, 1' to [...] adds 45657b2c3b4 [AMDGPU] Fold copy (copy vgpr) adds 43980ea1fbf AMDGPU/NFC: Simplify VOP_MAC_F16/F32 adds 3764510fd97 [lli] Fix ArgV setup bug when running in -jit-kind=orc-lazy mode. adds 73ff7f8fad6 [ORC] LastKey needs to be protected to prevent data races. adds 4bcdd902842 [ORC] Coalesce all of ORC's symbol renaming / linkage-promo [...] adds 62258deb2a9 AMDGPU: Split VOP2Inst into VOP2Inst_e32/e64/sdwa adds 3a5e132bb3a [ORC] Lock ThreadSafeContext during Module destructing in T [...] adds 5fb9129f80e [ORC] Make LocalIndirectStubsManager's operations thread-safe. adds 1f7247b6c99 AMDGPU: Split HasExt into HasExtDPP/SDWA/SDWA9 adds 1d6ef084670 [ORC] Add definition for IRLayer::setCloneToNewContextOnEmi [...] adds 3844ee81e36 [ScalarizeMaskedMemIntrin] Cleanup comments. NFC adds 1a8d3258e37 [ScalarizeMaskedMemIntrin] Remove some temporary variables [...] adds fe9a6b988a4 [ScalarizeMaskedMemIntrin] Add dedicated IR only tests for [...] adds 4b75b6ed93b [ScalarizeMaskedMemIntrin] Handle the case where the mask i [...] adds 4f95400123e [ScalarizeMaskedMemIntrin] When expanding masked loads, sta [...] adds c670432bdda [ScalarizeMaskedMemIntrin] Add some IR only test cases for [...] adds 2122d188d16 [ScalarizeMaskedMemIntrin] When expanding masked gathers, s [...] adds 8f75350b99d WebAssembly: Rename GetSignature to GetLibcallSignature [NFC] adds 5c98f232270 [ScalarizeMaskedMemIntrin] Use cast instead of dyn_cast che [...] adds f947b53515e [ScalarizeMaskedMemIntrin] Ensure the mask is a vector of C [...] adds 1b2b5a55db6 [X86] Add the test case from PR38986. adds dee8e5347f2 [ScalarizeMaskedMemIntrin] Add test cases for masked store [...] adds bcbf6bc4932 [ScalarizeMaskedMemIntrin] Fix the alignment calculation fo [...] adds 2c78ea3621c [ORC] Lock ThreadSafeContext during module destruction in T [...] adds 7ea842c0132 [ORC] Add a const version of ThreadSafeModule::getModule(). adds 217504b6a8b [ORC] clang-format the ThreadSafeModule code. adds 70ae543dfd6 merge-request.sh: Add 7.0 metabug adds 384d350d2cf [pdb] Simplify the code by replacing a few string conversio [...] adds 67529047631 [ScalarizeMaskedMemIntrin] Use MinAlign to calculate alignm [...] adds 5cdff6b4844 Test commit. NFC. adds ea3df5ebac0 [CodeGen] fix broken successor probability in MBB dump adds 1076f420d2f [X86][BtVer2] Fix PHMINPOS schedule resources typo adds f2546843d5c [ARM][v8.5A] Add speculation barriers SSBB and PSSBB adds b785fa54a16 Remove extra whitespace. NFC. (test commit) adds c2c10245561 [ARM] Allow execute only code on Cortex-m23 adds 274ec57233a [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k adds 9abf993591b [llvm-mca] Teach how to track zero registers in class Regis [...] adds 945a3e0770c [LoopInterchange] Turn into a loop pass. adds deede4f5ad6 Revert r343308: [LoopInterchange] Turn into a loop pass. adds ab5d6ab2dea [X86][Btver2] Fix BSF/BSR schedule adds 965ed082b4d [llvm-mca] Remove redundant namespace prefixes. NFC adds edfa885345d Split invocations in CodeGen/X86/cpus.ll among multiple tes [...] adds 72cdd511978 [X86][Btver2] CVTSS2I/CVTSD2I - add missing JFPU0 pipe adds 46304bd3adc [MIPS GlobalISel] Lower i64 arguments adds 600c3e6345c Fix and modernize StringMatcher comment; NFC adds 96f82d5c182 Reapply changes reverted by r343235 adds 13e2d88349d [X86][Btver2] Add zero-idiom tests for PSUBS/PSUBUS instructions adds 9a43bbc36da [X86][Btver2] PSUBS/PSUBUS instructions are zero-idioms adds a6f5223feb7 [ORC] Improve debugging output for ORC. adds 88ba134609e [GISel]: Remove an incorrect assert in CallLowering adds 168e4a5c939 [ORC] Fix the unit tests that were broken by r343323. adds 033636c6aa3 [ORC] Remove some dead code. adds 5c806329ca4 [InstCombine] adjust shuffle undef propagation tests; NFC adds 331a5ec7132 [InstCombine] don't propagate wider shufflevector arguments [...] adds 56f7ea25dbb [LLVM-C] Add more debug information accessors to GlobalObje [...] adds 29869b91c05 [utils] Allow better identification of matching blocks in u [...] adds 340f0f6086c [utils] Stricter checking from update_mca_test_checks.py adds 076b15bac05 [utils] Cope with the binary having a .exe extension in upd [...] adds 6c702a84565 [LLVM-C] Fix broken build bots adds 411c9caf4fe [LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints adds 1bece59b9d1 Revert "[LLVM-C] Add bindings for addCoroutinePassesToExten [...] adds a2e8972f374 [bindings/go] Add Go bindings for inline assembly adds 4c6cb9f4272 Revert r343317 adds eb5f10b20ce [bindings/go] Add Go bindings to the Token type adds c8fd90b57bd [llvm-mca] Add a test for zero-idiom VPERM2F128rr. NFC adds 672a1781256 make lit builtins a package adds 1b5fe4e6379 [DAGCombiner] [NFC] Improve X div/rem 1 fold adds 441f6c80217 GraphWriter: Provide an API for writing a graph into a spec [...] adds 6fbdafa0d54 [AArch64] Split zero cycle feature more granularly adds 46f964d38a5 [X86] Add test cases for failures to use narrow test with i [...] adds 3bd24cdeac2 [ORC] Narrow a cast: the block guarded by the condition onl [...] adds 770516eb32d [ARM] Use preferred alignment for constants in promoteToCon [...] adds b10248393f5 [ARM] Fix correctness checks in promoteToConstantPool. adds 552971168d6 [WebAssembly] Fix memory leak on WasmEHFuncInfo adds 7776c2f4d8d [LLVM-C] Add an accessor for the "value type" of a global adds 30635bc8de5 [ValueTracking] Allow select patterns to work on FP vectors adds 7373792b4aa [ORC] Add more utilities to aid debugging output. adds 94cc8ba7207 [ORC] Make MaterializationResponsibility::getRequestedSymbo [...] adds 05252670a61 [cxx2a] Fix warning triggered by r343285 adds cde69b248ec Fix comment indentation in addLandingPad adds a1ab6444810 [X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit [...] adds 2a55d07e77a [X86] getTargetConstantBitsFromNode - add support for peeki [...] adds db283fd1bb3 [X86] Regenerate fma comments. adds 25f97823145 [X86] getTargetConstantBitsFromNode - fix self-move asserti [...] adds 5bf17aa03a0 [InstCombine] add test for vector widening of insertelements; NFC adds bdd68c5514e [InstCombine] fix formatting in vector evaluators; NFC adds 9e59026f782 [X86][SSE] LowerScalarImmediateShift - use getTargetConstan [...] adds bb664accc23 [X86] getTargetConstantBitsFromNode - add support for rearr [...] adds 204e40ee59d Fix signed/unsigned mismatch warning. NFCI. adds aa55d1b77cb [X86][SSE] LowerScalarImmediateShift - remove 32-bit vXi64 [...] adds 59b80ed4d57 [X86] Add fast-isel test cases for unaligned load/store int [...] adds bbb291c0d3c [X86] SimplifyDemandedVectorEltsForTargetNode - remove iden [...] adds ca85b1757cd [X86][AVX2] Cleanup shuffle combining tests - add common prefixes adds 21b46b07d71 [DAGCombiner][NFC] Tests for X div/rem Y single bit fold adds efac3737826 [PDB] Better native API support for pointers. adds c7013cd325e Add a comment to clarify the contract for LLVMGetErrorMessa [...] adds 974e7049611 [ORC] Clear SymbolToDefinitionMap when materializing a Mate [...] adds 90c3271e8e4 [ORC] Add partitioning support to CompileOnDemandLayer2. adds 02b1e4becf7 Fix some tests on Windows. adds 78ce4df1177 Only dump the types we need in the test. adds ecbe2f8e5e0 [X86] Disable BMI BEXTR in X86DAGToDAGISel::matchBEXTRFromA [...] adds 523dd2651f3 [PDB] Fix this test for real. adds d09ede48281 [X86] Regenerate MMX coalescing test adds 219704f8eed [NFC][CodeGen][X86][AArch64] Add 64-bit constant bit field [...] adds 435f54e4646 [DAG] Don't perform SINT_TO_FP<->UINT_TO_FP custom conversi [...] adds 22030c13ce7 [InstCombine] allow lengthening of insertelement to elimina [...] adds 8594ae08601 [InstCombine] try to convert vector insert+extract to trunc adds 0de6a84fee3 [X86][BtVer2] Add the ability to add additional uops for fo [...] adds e1b020acef2 [PDB] Add native support for dumping array types. adds 7eb858a56a2 [X86][Btver2] Fix PCmpIStrI/PCmpIStrM schedules adds 40eee5d07bd [LLVM-MCA][X86] Add some AVX512 tests adds e299be6492d [PHIElimination] Update the regression test for PR16508 adds cce9df65256 [PHIElimination] Lower a PHI node with only undef uses as I [...] adds c4936565e39 [X86] Copy memrefs when folding a load for division instruc [...] adds 62431ad72c3 [LLVM-MCA][X86] Add missing VCMPESTR/VCMPESTR tests adds 04756ee5266 [ORC] Extract and tidy up JITTargetMachineBuilder, add unit test. adds abccef1dfdd [X86] Fix scheduler class for BTmi instructions adds c466264b345 Use the container form llvm::sort(C, ...) adds 0e735f0b53f [ORC] Add an 'intern' method to ExecutionEngine for interni [...] adds 6b41faf1c9e [X86] Change an llvm_unreachable to a report_fatal_error so [...] adds 4e8d0ef849e [ORC] Add a method to JITTargetMachineBuilder to get the de [...] adds 2887f2e5941 [ORC] Add convenience methods for creating DynamicLibraryFa [...] adds eaf1a19dc4a [ORC] Pass Symbols to ExecutionSession::lookup by value, po [...] adds 62c612fdecf [X86] Stop X86DomainReassignment from creating copies betwe [...] adds e7e54cd1867 [CodeGen][NFC] Add tests for heterogeneous types in MergeCo [...] adds 42b54435076 [DebugInfo][Dexter] Incorrect DBG_VALUE after MCP dead copy [...] adds 90a5fbf4c67 [X86][Sched] Add pfm uop counter definitions for SNB,BDW,SKX. adds d80543967df [X86][Sched] Update scheduling information for VZEROALL on [...] adds 9cfef4ca8ff Recommit r343308: [LoopInterchange] Turn into a loop pass. adds cc27a05389e [llvm-objcopy] Adding support for decompressing zlib compre [...] adds f7f974d7eff [X86][BtVer2] Teach how to identify zero-idiom VPERM2F128rr [...] adds 2d661fe936f [NFC] Adding "REQUIRES: zlib" to a llvm-objcopy test for bo [...] adds 00e50653ed5 [AMDGPU] Divergence driven instruction selection. Shift ope [...] adds 0640a7318b1 [llvm-exegesis][NFC] Make randomizeUnsetVariables a free function. adds f7f9563cf46 Revert r343407 "[InstCombine] try to convert vector insert+ [...] adds a46ae181007 [Support] Listing a directory containing dangling symlinks [...] adds ed2d3e4fffe [llvm-exegesis][NFC] Move random functions from CodeTemplat [...] adds 1607bc84f24 [X86][Btver2] Fix masked load schedule adds eab58e03b0f [LLVM-C] Add an accessor for the kind of a Metadata Node adds 71670be4acf Move llvm util dependencies from clang-tools-extra to add_l [...] adds 3e27a44e649 [X86] Create schedule classes for BTmi and BTmr instructions adds 0b13e127297 [InstCombine] add more insert-extract tests for D52439; NFC adds f7cc35b1ce4 [InstCombine] try to convert vector insert+extract to trunc [...] adds a1b6ce1b110 [X86][Btver2] Fix BTmr schedule uop counts adds b4f7a97945b [mips] Generate tests expectations using update_llc_test_ch [...] adds 6b99c7f259d [InstCombine] Handle vector compares in foldGEPIcmp(), take 2 adds 9a604d610c6 [X86] Remove unnecessary BTmi/BTmr scheduler overrides adds a86f87cfc71 [AArch64] Refactor cheap cost model adds 3865b5ff69b [X86] Create schedule classes for BT(C|R|S)mi and BT(C|R|S) [...] adds f8aaa5b2fb4 [x86] add tests for 256- and 512-bit vector types for scala [...] adds c2625345a6c DAGCombiner: StoreMerging: Fix bad index calculating when a [...] adds c442198d91f [X86][Btver2] Fix BT(C|R|S)mr & BT(C|R|S)mi schedule latenc [...] adds b023cfc60d2 [X86] Improve test instruction shrinking when the sign flag [...] adds f0bd8cc3086 [X86] Enable load folding in the test shrinking code adds 2e04af78a2d [WebAssembly] Fixed AsmParser not allowing instructions with / adds 429bce6ae9f MIRParser: Check that instructions only reference DILocatio [...] adds a93560b336f [PDB] Add support for parsing VFTable Shape records. adds b47810926d8 [PDB] Add support for dumping Typedef records. adds cdda304902d [AMDGPU] Fixed SIInstrInfo::getOpSize to handle subregs adds beae29ccd48 [Hexagon] Remove incorrect pattern for swiz adds 5c1f4358a9b Revert r343499 and r343498. X86 test improvements adds f6d7cdc06b5 [X86] Add more test shrinking with truncate and sign bit us [...] adds 79816c8fee1 X86, AArch64, ARM: Do not attach debug location to spill/re [...] adds 55eda328c50 [globalisel] Add a combiner helpers for extending loads and [...] adds 2f73099e903 Temporarily revert "[GVNHoist] Re-enable GVNHoist by default" adds e957cca256c [PowerPC] Folding XForm to DForm loads requires alignment f [...] adds aba2e4f0055 [InstCombine] regenerate test checks; NFC adds e467ad47eaa [InstCombine] add inverse test for vector trunc canonical f [...] adds 6ba8c38c500 Recommit r343498 "[X86] Improve test instruction shrinking [...] adds d8de965221a Recommit r343499 "[X86] Enable load folding in the test shr [...] adds 02b91a8b773 Fix the Windows build in GlobalISel adds 6d4c271eeb2 [codeview] Emit S_FRAMEPROC and use S_DEFRANGE_FRAMEPOINTER_REL adds 9c94c5fb80f [codeview] Simplify S_DEFRANGE emission code, NFC adds d31f3f62272 Revert: r343521 and r343541: [globalisel] Add a combiner he [...] adds 5877e4ed63b [PDB] Add support for more kinds of PDB Sym Tags. adds e9e1c785d62 [SimplifyCFG] Update comments that refer to CondBB to say T [...] adds 9aca4e8d364 [llvm-mca] Rename the 'Subtract' method to 'subtract' adds 2982360e7a9 [SimplifyCFG] Use Value::hasNUses instead of 'getNumUses() [...] adds 8ffa63b4d58 [AArch64][DAGCombiner]: change -stop-after=isel to instruct [...] adds 0dc07911df8 [MCA] Remove SM.hasNext() call in FetchStage::execute. adds 73aeabb0f06 [WebAssembly] Restore slashes in SIMD conversion names adds b3a02e19253 AMDGPU: Expand atomicrmw nand in IR adds abe8e0a65ff [InstCombine] Tests for ~A - Min/Max(~A, O) -> Max/Min(A, ~ [...] adds 16b860b6ae0 [X86] Standardize floating point assembly comments adds 637450a7f29 [AArch64][v8.5A] Add MTE as an optional AArch64 extension adds cf1b18658c5 [InstCombine] Fold ~A - Min/Max(~A, O) -> Max/Min(A, ~O) - A adds ea81843dbdc [AArch64][v8.5A] Add MTE system instructions adds cc07c6d0507 [AArch64][v8.5A] Add Memory Tagging system registers adds 08e636c3eb8 [AArch64][v8.5A] Add Memory Tagging instructions adds 2c248c12135 [X86] Add APInt constant assembly printer helper adds d3241c78215 [NFC][CodeGen][X86] fma.ll: fix check prefixes for -mcpu=bdver2 adds 67253e401e0 [NFC][CodeGen][X86] lwp-intrinsics.ll: fix check prefixes adds 68276e8ffbf [X86] Remove unnecessary BT(C/R/S)m(i/r) scheduler overrides adds cbe63a8c2bc [InstCombine] add more insert/extract vector tests with FP [...] adds fc829e82f68 [NFC][CodeGen][X86] fma.ll, lwp-intrinsics.ll: actually spe [...] adds f646df2dd3f [ARM] Emmit data symbol for constant pool data adds 1b9f2a9da5f [InstCombine] add tests with undef elements; NFC adds 4cd3487f7fe [Hexagon] Fix extracting subvectors of non-HVX vNi1 adds 2e34e6d02ba [X86][Btver2] Fix BLENDV and AESDEC schedules adds a507425e00f [codeview] Fix 32-bit x86 variable locations in realigned s [...] adds 8f3aebf19b3 [globalisel][verifier] Run the MachineVerifier from IRTrans [...] adds 4e511d4c19d [X86][Disassembler] Add bizarro versions of the MOVSXD inst [...] adds e3f19a892df [llvm-mca] Constify the 'notify' routines. NFC. adds 2a77d5ea7cd Revert "X86, AArch64, ARM: Do not attach debug location to [...] adds cf3208c68b9 [llvm-mca] Remove unecessary forward decls. NFC. adds ab0e7288a66 [CodeView] Emit function options for subprogram and member [...] adds a1e00c37fc0 [CodeView] Only add the Scoped flag for an enum type when [...] adds d4c2f778f77 [globalisel] Attempt to fix llvm-clang-x86_64-expensive-checks-win adds 519b917bb02 [CodeView] Try fixing DebugInfo/X86/dbg-declare-inalloca.ll adds d73a6dca938 [WebAssembly] Stop generating helper functions in WebAssemb [...] adds 1e45d61508b Relax dbg-declare-inalloca.ll test more adds 20ec0569b5a [InstCombine] add icmp+logic tests with commuted ops; NFC adds 2c2c51be40b IR: Move AtomicRMW string names into class adds 90589b69f22 [AMDGPU] Assert in getOpSize() there are no sub-dword subregs adds db3d49018b6 [WebAssembly] any_true and all_true intrinsics and instructions adds 5a81c73c73a Re-commit: [globalisel] Add a combiner helpers for extendin [...] adds 1c8988249a3 Add the missing new files from r343654 adds 9bda9a4b479 Add atomicrmw operation to error messages adds 47e2c38609d AMDGPU: Always run AMDGPUAlwaysInline adds a8aaa535a73 [globalisel] Fix one more missing Verifier pass from gisel- [...] adds 49cc1ce73d4 [AMDGPU] Rename pass "isel" to "amdgpu-isel" adds f7ae0df6544 Add support for new pass manager adds ce8f59266c6 Improve static analysis of cold basic blocks adds f7055267ae2 [X86] ALU/ADC RMW instructions should use the WriteRMW sequ [...] adds 2b610ad4837 [X86][Btver2] Most RMW instructions don't require an additi [...] adds 5c738478d09 [AMDGPU] Fix for negative offsets in buffer/tbuffer intrinsics adds 17120e19403 [CodeGen] NFC fix pedantic warning from extra semicolon adds 2cad546297b [RISCV] Remove RV64 test lines from umulo-128-legalisation- [...] adds 1b130ed5dca [LoopInterchange] Remove unused variable PreserveLCSSA (NFC). adds c9c097dc7c6 [RISCV] Gate simm32 materialisation pattern and SW pattern [...] adds 2fcb9c7a2b3 [RISCV] Remove XLenVT==i32 assumptions from RISCVInstrInfo td adds 9e4a6daf235 [RISCV] Gate float<->int and double<->int conversion patter [...] adds f188396df5a [llvm-exegesis] Resolve variant classes in analysis. adds e7f7cd8bf8d [llvm-exegesis][NFC] Fix unused variable warning. adds ad242ffec21 [llvm-exegesis] Fix rL343680 in release mode. adds 12b71448c41 [llvm-exegesis][NFC] Revert rL343682 "Fix unused variable w [...] adds abaa9ca66ae [RA CopyHints] Fix compile-time regression adds b818787c3e6 [ThinLTO]Expose cache entry expiration time option in llvm- [...] adds c1d6f75b126 [RISCV][NFC] Refactor RISCVDAGToDAGISel::Select adds 0fbe023b079 [X86] Correctly use SSE registers if no-x87 is selected. adds 445c3f14aba [llvm-exegesis] Avoid yaml parser from calling sscanf for o [...] adds 97666c4d717 [llvm-mca] Add support for move elimination in class RegisterFile. adds 2aa873478d0 [InstCombine] name change: foldShuffledBinop -> foldVectorB [...] adds 96c454b924d [globalisel][combines] Don't sink G_TRUNC down to use if th [...] adds cf8ba840b8a [InstCombine] clean up foldVectorBinop(); NFC adds 9f149bc4ffc Correct implementation of -verify-machineinstrs such that i [...] adds 1ac9a626ccb [X86] Add SkylakeClient uops counter - same as the other In [...] adds 7624a6e73d7 [X86] Move Atomic CMPXCHG to WriteCMPXCHGRMW schedule class adds e9bd0c92b04 [X86][Btver2] Fix MMX PSHUFB schedule adds 796acd42b6d [X86] Move Atomic binops to use WriteALURMW schedule class adds fff44e68bae Emit template type and value parameter DIEs for template va [...] adds 58f59fb8cc8 [X86] PUSH/POP 'mem-mem' instructions are not RMW - these a [...] adds 946f07773b3 [X86] Don't break CMOV pseudo instructions down by type. Ju [...] adds bd8934fa436 [X86] Add CMOV pseudos for VR128X and VR256X register class [...] adds df9220fd714 [RISCV][NFCI] Handle redundant splitf64+buildpairf64 pairs [...] adds 02b73b4b279 [X86] Add CMOV_VK2/VK4 pseudos and remove lowering code tha [...] adds 748b49e3891 [InstCombine] add tests for binop undef-into-constant propa [...] adds 8521a3b90e2 [X86] Stop promoting vector ISD::SELECT to vXi64. adds 2058e014752 Make meanings of variables clearer in action table generati [...] adds 44cfbc7d137 [InstCombine] allow SimplifyDemandedVectorElts to work with [...] adds 2f53e1def5e [mips] Remove -allow-deprecated-dag-overlap flag from tests. NFC adds b95f965d7b2 [machineverifier] Detect PHI's that are preceeded by non-PHI's adds ab9755b8039 [WebAssembly] Refactor WasmSignature and use it for MCSymbolWasm adds 093b780cea1 [RISCV][NFC] Refactor LocVT<->ValVT converstion in RISCVISe [...] adds 6f31a46f4ac [WebAssembly] Bitselect intrinsic and instruction adds 1aba29db25e [RISCV] Handle redundant SplitF64+BuildPairF64 pairs in a D [...] adds 59b44e12949 [llvm-nm] Print an explicit "no symbols" message when an ob [...] adds 5e1a042afec [WebAssembly] Add WebAssembly to LLVM_ALL_TARGETS adds 6fa3b9479f7 [LegalizeIntegerTypes] Fix typo in comment. NFC adds c3c07bfd737 [llvm-exegesis] Unbreak analysis-uops-variant.test introduc [...] adds f590076c467 [RISCV][NFC] Fix naming of RISCVISelLowering::{LowerRETURNA [...] adds c1f3550351e [X86] Merge matchANDXORWithAllOnesAsANDNP into combineANDXO [...] adds f6c6a84a300 [llvm-exegesis][NFC] Test sched class names only in !NDEBUG mode. adds af8412e6ae7 [RISCV] Bugfix for floats passed on the stack with the ILP3 [...] adds c9b5c59206b [RISCV][NFC] Remove dead CHECK lines from vararg.ll test adds edb8892da34 Fix MSVC "not all control paths return a value" warning. NFCI. adds 11510934d7f [llvm-mca] Check for inconsistencies when constructing inst [...] adds 0ee905200b8 [doc] Update the programmer's manual about SmallSet's iterator adds 8ef94cfd7b4 [llvm-exegesis][NFC] Improve parsing of the YAML files adds c7144779933 [PassTimingInfo] cleanup on TimingData's Timer handling adds e13455ff38a [llvm-mca][x86] Add tests demonstrating ReadAfterLd delay adds e3c126f7cb2 [X86] Set correct MMO offset on scalarized load pieces adds 22abcbc182c [RISCV] Remove overzealous is64Bit checks adds 440a48b3e41 [utils] simple refactor in update_mca_test_checks.py to mak [...] adds 59b22373c7b [utils] Ensure that update_mca_test_checks.py writes prefix [...] adds 49595868917 [X86][AVX] Add PR39161 test case for v4f64 zzww shuffle adds 367ebf05cf7 [llvm-mca] Move field 'AllowZeroMoveEliminationOnly' to cla [...] adds 62aab8af14d [InstCombine] allow bitcast to/from FP for vector insert/ex [...] adds af1f1aafa46 [llvm-mca][x86] Add PR36951 ReadAfterLd test case adds b3e54123c53 [AMDGPU] Match signed dot4/8 pattern. adds 5fffc119967 AArch64: Fix XSeqPairs/WSeqPairs problems adds ef9b7604b61 [x86] add test for SSE sqrtss register dep (PR22206) adds c07d6f2d53c [globalisel][combine] Improve the truncate placement for th [...] adds 0101af51140 Give same-named members unique timestamps on Darwin in llvm-ar. adds 9e29af39fd9 [InstCombine] reduce code duplication in SimplifyDemandedVe [...] adds 67b5d05d6d7 [COFF] [X86] Don't use llvm_unreachable for unsupported rel [...] adds b57394b3c20 AMDGPU: Rename isAmdCodeObjectV2 -> isAmdHsaOrMesa adds 65c237b70d6 [WebAssembly] Don't modify preds/succs iterators while eras [...] adds bb5ea99c111 [SimplifyCFG] Change recursive calls to llvm::SimplifyCFG t [...] adds 95dbc86d2d7 [X86][LegalizeVectorOps] Use MERGE_VALUES to return two res [...] adds f2f6f77ac44 [InstCombine] drop poison flags in SimplifyVectorDemandedElts adds ae0852b7ac1 [globalisel][combine] Fix a rare crash when encountering an [...] adds 22bcdce166d [RISCV] Support named operands for CSR instructions. adds a978525b641 [llvm-mca] Remove unused/stale forward decl. NFC. adds 9c4d2a20d7e [WebAssembly] Ignore DBG_VALUE in WebAssemblyCFGStackify pa [...] adds c801f261266 [SimplifyCFG] Pass AggressiveInsts to DominatesMergePoint b [...] adds 48a6c8baacb [globalisel][combine] When placing truncates, handle the ca [...] adds 11a31132ba9 [WebAssembly] Fixed missing "global" symbol type in AsmParser. adds 24abcf4cda4 [cmake] Also create lowercase extension WinSDK symlinks adds 70285a03596 [WebAssembly] Saturating arithmetic intrinsics adds 69f718971f5 AMDGPU/GlobalISel: Add support for G_INTTOPTR adds f4bd5343c9a Add missing period to comment to match style of file. adds af9a1a11d8d [TargetRegisterInfo] Remove temporary hook enableMultipleCo [...] adds 9a16b611a76 [LoopVectorizer] Use TTI.getOperandInfo() adds d327e07926e [X86][AVX] getFauxShuffleMask - add support for INSERT_SUBV [...] adds 99f3c46cafd [x86] add test for fneg matching failure; NFC adds ece1a2dc300 [x86] regenerate full checks; NFC adds 22609030b4e [X86][SSE] Try to make MOVLPS/MOVHPS(+PD) instructions Simp [...] adds eb13633ec75 [x86] add test for (X - 0.0) vector with undef elts; NFC adds 24a3723b3a8 Format the dwarfdump --statistics version as an integer ins [...] adds 9d809925c65 [SelectionDAG] allow undefs when matching splat constants adds 41c8ada9ddc [X86] Move ReadAfterLd functionality into X86FoldableSchedW [...] adds 6bab3515ebc [X86] Don't promote i16 compares to i32 if the immediate wi [...] adds 628b7f58852 [RISCV] Regenerate several tests now enableMultipleCopyHint [...] adds 20785750a9e DwarfDebug: Pick next location in case of missing location [...] adds a8691d04397 Fix dwarf-no-source-loc.ll path separator on Windows adds b1bffa1a5b9 [x86] make blend tests resistant to demanded elements impro [...] adds 78b8f9db177 [DebugInfo] Add support for DWARF5 call site-related attributes adds 626a8eb0549 dwarfdump: Avoid parsing units unnecessarily adds 5fccc463e03 [GlobalIsel] Add llvm.invariant.start and llvm.invariant.end adds 72d0d2c07ee Avoid hardcoding PC addresses in a dwarf test adds 00a8b036c26 [llvm-nm] Write "no symbol" output to stderr adds f5174dba590 Disable the dwarf callsite attrs test on Windows adds ff3a583947d Clarify debug output in LiveDebugValues adds a01d5b88eb0 [LiveDebugValues] Extend var ranges through artificial blocks adds e1a7411e93f [X86][AVX] Limit getFauxShuffleMask INSERT_SUBVECTOR suppor [...] adds 094f8ead3ad Specify -mtriple=x86_64 in an X86-specific dwarf test adds a722d373617 X86, AArch64, ARM: Do not attach debug location to spill/re [...] adds 644c1ed5a96 [llvm-nm] Update all tests to redirect stderr to stdout adds 741cd84853f [AArch64] -mcpu=native CPU detection for Cavium processors adds 17dce3bea3d [New PM][PassTiming] implement -time-passes for the new pas [...] adds 4f840f1dc36 [llvm-ar] Use POSIX-specified timestamps for 'tv'. adds 84a8da9431f AMDGPU: Consolidate SMRD TableGen patterns adds 199c0d32e96 [RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6 adds 0d0e510068b [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemanded [...] adds 6b32c5aee11 Wdocumentation fix adds df6aa317095 [X86] Use the SimplifyDemandedBits wrappers where possible. NFCI. adds 80200289573 [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simpli [...] adds 29dbca16bf1 [x86] add test for masked store with extra shift op; NFC adds 942f89c8035 [X86] Regenerate LSR loop iteration test adds 9c587960b3f [X86] combinePMULDQ - add op back to worklist if SimplifyDe [...] adds 46f18c38323 [X86][AVX] Ensure resolveTargetShuffleInputs shuffle masks [...] adds e4c0278ac67 [X86][SSE] Add SSE41 vector int2fp tests adds e52b757e5dc [X86] getFauxShuffleMask - Handle undef + sentinel values i [...] adds c8d6c1623d5 [ORC] Pass symbol name to discard by const reference. adds ee5c35b1a78 [ORC] Add a 'remove' method to JITDylib to remove symbols. adds f66e35e8c00 [ORC] Consume unhandled errors in unit test. adds bb3be36c554 [RISCV] Introduce alu8.ll and alu16.ll tests adds 2e1904606dc [IAI,LV] Avoid creating interleave-groups for predicated accesse adds 77c5e43bd2b [LegalizeVectorOps] Make ExpandStrictFPOp return the result [...] adds fd84d483ad7 [AARCH64][X86] Remove _nonsplat from test names adds b1a2f9aee33 [SelectionDAG] Respect multiple uses in SimplifyDemandedBit [...] adds d28883e6157 [InstSimplify] add vector test for fneg+fdiv; NFC adds d827820a369 [clangd] NFC: Migrate to LLVM STLExtras API where possible adds 5edfe6ab5d1 [x86] add tests for FP logic folding for vectors with undefs; NFC adds f681ac49ad8 [DAGCombiner] shorten code for bitcast+fabs fold; NFC adds 0620db49508 [DAGCombiner] allow undef elts in vector fabs/fneg matching adds 9cc55166d54 [x86] add vector fmul with undef elts tests; NFC adds 199609a85f6 [DAGCombiner] allow undefs when matching vector splats for [...] adds 049dc00383f [x86] remove redundant tests; NFC adds c708db84ee7 [x86] add vector fadd with undef elts test; NFC adds a2434c2657e [DAGCombiner] allow undef elts in vector fadd matching adds 2eda4af476f [LegalizeDAG] Move legalization of scatter and masked store [...] adds e3e684c361c [LegalizeDAG] Make one of the ReplaceNode signatures take a [...] adds 78efcda4e24 Revert r343948 "[LegalizeDAG] Make one of the ReplaceNode s [...] adds cffc876a145 [PDB] Add the ability to lookup global symbols by name. adds 25a2b438a40 Fix a compilation failure on non-MSVC compilers. adds 251720c5388 Fix a -Wsign-compare warning. adds eb3fd4c932d [LV] Do not create SCEVs on broken IR in emitTransformedInd [...] adds 16686d37ce5 [SelectionDAGBuilder][NFC] Pass LHSTy to getShiftAmountTy r [...] adds 3948aa1d82c [InstCombine] Fix incongruous GEP type addrspace adds 990c587f42a [DebugInfo][PDB] Fix a signed/unsigned coversion warning adds 7d468f2a871 [RISCV] Update alu8.ll and alu16.ll test cases adds ca6a9e3669b [AArch64] Fix verifier error when outlining indirect calls adds 944e6c56f7b [ARM] Account for implicit IT when calculating inline asm size adds 9a00564d887 [AsmParser] Return an error in the case of empty symbol ref [...] adds 74655970605 [IRBuilder] Fixup CreateIntrinsic to allow specifying Types [...] adds 6a25e9b7c66 [x86] add 16 missed hadd patterns (PR39195); NFC adds c190984a44d [GlobalIsel][X86] Support G_UDIV/G_UREM/G_SREM adds 4bc81028d48 [AArch64][v8.5A] Branch Target Identification code-generation pass adds 764fdc0b3e2 [AArch64][v8.5A] Restrict indirect tail calls to use x16/17 [...] adds 8a4fa4a92db [AArch64][v8.5A] Don't create BR instructions in outliner w [...] adds 773ad8be845 [ThinLTO] Keep non-prevailing (linkonce|weak)_odr symbols live adds 706f3b0b72e Don't use back-quotes in a run line. adds b461f4de295 [AMDGPU] Add an AMDGPU specific atomic optimizer. adds 3c6deb08bb6 [x86] simplify hadd tests; NFC adds 0649ebe3a18 [x86] add hadd test with no undefs, remove duplicate tests; NFC adds 56c22a9e141 Fix test case for @r343970 adds 9d072d8bb21 TableGen/CodeGenDAGPatterns: addPredicateFn only once adds 2550649d6bf AMDGPU: Future-proof {raw,struct}.buffer.atomic intrinsics adds 1298296a640 Fix incorrect Twine usage in CFGPrinter adds 0861fa2a97f AMDGPU/GlobalISel: Select amdgcn.cvt.pkrtz to 64-bit instructions adds 791162c4879 [TailCallElim] Enable marking of calls with byval as tails adds 8c00cc11f9c [x86] make horizontal binop matching clearer; NFCI adds 0cccaa3bd10 [X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256 [...] adds 9099160b879 [AMDGPU] Legalize VGPR Rsrc operands for MUBUF instructions adds fa7848b1a02 [X86] condition branches folding for three-way conditional codes adds 84a731f2822 [x86] add tests for phaddd/phaddw; NFC adds 4fac31c8505 [X86] Prefer isTypeLegal over checking isSimple in a DAG combine. adds 780daee51ea [DAGCombiner] simplify code for fmul with constant fold; NFCI adds f2c7cc4b649 [X86] Revert r343993 condition branches folding for three-w [...] adds 9a29a011554 [DebugInfo] Fix debug information label tests adds 602f2b50662 [PDB] fix a bug in global stream name lookup. adds 78fee6e56c3 Remove unused variable. adds fabae5e3170 MachineFunctionPrinterPass: Declare SlotIndexes as used if [...] adds 5a629bf3d8e PHIElimination: Remove wrong comment; NFC adds dd8cebd2be4 TwoAddressInstructionPass: Modernize/fix some comments; NFC adds 48d3a5535e7 [MIPS GlobalISel] Legalize i64 add adds 3ff2ad5558f ExpandPostRAPseudos: Fix alldefsAreDead() not removing operands adds aba277a1d1a llvm-link: Improve diagnostic for module-level metadata mismatch adds 5454da3a19a Use locals instead of struct fields; NFC adds def2c06ca28 Make LocationSize a proper Optional type; NFC adds c179d7b0063 [CFG Printer] Add support for writing the dot files with a [...] adds 7f9eb168a9a [ADT] Change the `IntervalMap` alignment assert for x86 MSVC adds 729310ff093 [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bi [...] adds 8cc4d7e1c6c Revert "[ADT] Change the `IntervalMap` alignment assert for [...] adds 3659c41ec52 [ADT] Force the alignment of the `data` field of `IntervalMap` adds 9925bf1d88e [llvm-exegesis][NFC] Use accessors for Operand. adds 6844640a5ee [llvm-exegesis] Fix unused lambda capture. adds 6027f5ef522 [llvm-exegesis] Fix wrong index type. adds edb9a19f380 [PowerPC] Remove self-copies in pre-emit peephole adds 43136901183 Fix buildbot failures with the newly added test case (tripl [...] adds 00973e3c15c [mips] Set pointer size to 4 bytes for N32 ABI adds 244c796c894 [mips] Fix FDE/CFI encoding in case of N32 ABI adds e574f76b8f5 [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECT [...] adds 968d0cc02d8 [x86] use demanded bits to simplify masked store codegen adds 437c485aa9f [llvm-exegesis] Fix invalid return type and add a Dump function. adds 6a2b0733679 Fix function case. adds dd6a1fbcd5c [InstCombine] make helper function 'static'; NFC adds 0bcf39f903a [AArch64][x86] add tests for bitcasted fnabs; NFC adds 81b8d4b9e2a [X86] Autogenerate complete checks. NFC adds dccf3ce84ae [PDB] Fix failure on big endian machines. adds 0a3d7dbe84a Add missing space adds 4db5dbc6373 [InstCombine] add tests for extract subvector shuffles; NFC adds 6c508a5190e [DWARF] Make llvm-dwarfdump display the .debug_loc.dwo sect [...] adds 36b0632ee09 [SLPVectorizer] Check that lowered type is floating point b [...] adds b5c5010513d [X86] When lowering unsigned v2i64 setcc without SSE42, fli [...] adds 7df2b65a853 [PowerPC] Implement hasBitPreservingFPLogic for types that [...] adds 5148047f082 [ORC] Promote and rename private symbols inside the Compile [...] adds 0f4106775e3 llvm-dwarfdump: Extend --name to also search DW_AT_linkage_name. adds 10e3a5f0a76 [llvm-objcopy] Make -S an alias for --strip-all adds 6b971fb3697 [PDB] Fix another bug in globals stream name lookup. adds 1dd3c06445a [InstCombine] reverse 'trunc X to <N x i1>' canonicalization adds fe584de3052 [FPEnv] PatternMatcher support for checking FNEG ignoring s [...] adds c97898e7653 Recommit r343993: [X86] condition branches folding for thre [...] adds 048b5399127 [WebAssembly] Improve readability of SIMD instructions (NFC) adds a219e952b71 [LV] Move test for r343954 into x86 subdirectory adds 2e2e17dd9c8 [PowerPC][NFC] Commit nabs test case in preparation for com [...] adds dcc47f96ca8 [X86] Fix sanitizer bot failure from 344085 adds 53979264b2e [DAGCombiner] Expand combining of FP logical ops to sign-se [...] adds ce406930453 [WebAssembly] Handle V128 register class in explicit locals pass adds 98649f627c1 [git-llvm] Fix some issues surrouding EOL conversion on Windows. adds 42f63b6f964 [opt] Change the parameter of OptTable::PrintHelp from Name [...] adds 96ce5eaa493 [sancov] Generalize the code to get the previous instructio [...] adds bca81ff3bea [WebAssembly] Improve comments for SIMD instruction definitions adds de0558be123 [WebAssembly] Fix fneg lowering adds 952e752071b [Analysis] Make LocationSize pretty-printing more descriptive adds 64c3a57bec9 [PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when typ [...] adds 44cb9341251 [AVR] Fix the 'call.ll' CodeGen test adds 0bb919938f1 [PowerPC][NFC] Add a test case for extract and store patterns adds 625a776545f [NFC] Make a variable const adds 91f4bc63a87 [Analysis] Make LocationSizes carry an 'imprecise' bit adds 24446e792a3 [SystemZ] Take better care when computing needed vector re [...] adds 18c07e13a7c [X86] Remove FeatureRTM from Skylake processor list adds 4ffb89c65a8 [DebugInfo][Dexter] Unreachable line stepped onto after Sim [...] adds 5df653595ad [llvm-exegesis] Remove unused variable, add more semantic t [...] adds cc2cbf39f25 Fix an ordering bug in the scalarizer. adds 20f5c44b25b [SystemZ] Temporarily disable high VFs with integer div/rem. adds 29beaa2badc [llvm-exegesis][NFC] Simplify code now that Instruction has [...] adds 4e824350040 [llvm-exegesis] Fix broken build. adds f9d46e9db36 [TargetLowering] Add root node back to work list after succ [...] adds cfd600bc40b [TableGen] fix assert in !cast when used out of definition [...] adds 73cebd79c51 Revert "[DebugInfo][Dexter] Unreachable line stepped onto a [...] adds c195d382a13 [TargetLowering] SimplifyDemandedBits - pull out repeated g [...] adds 85645eb0d48 [llvm-exegesis][NFC] Fix typo adds efbdbcea746 [TargetLowering] SimplifyDemandedBits - rename demanded mas [...] adds 8e17e96c81f [llvm-exegesis] Fix function return generation so it doesn' [...] adds 765115422be Lift VFS from clang to llvm (NFC) adds 8798ea68b0a [x86] allow single source horizontal op matching (PR39195) adds df002d74e3e [DAGCombine] Improve Load-Store Forwarding adds 444acbd0615 [llvm-exegesis][NFC] Code simplification adds e144c76bb4f [llvm-mca][BtVer2] Add two more move-elimination tests. NFC adds 09f76c80ba8 [llvm-exegesis][NFC] Pass Instruction instead of bare Opcode adds d93bcaaa5bc [llvm-mca] Minor refactoring in preparation for a patch tha [...] adds 0768811666e [llvm-exegesis] Fix always true assert adds 7b3bebb1978 Relax trivial cast requirements in CallPromotionUtils adds a50609a0fa1 Change the timestamp of llvmcache-foo file to meet the thin [...] adds 3b607cb1fc8 [VPlan] Fix CondBit quoting in dumpBasicBlock adds 1cc98e6672b [OptRemarks] Add library for parsing optimization remarks adds f6b8b02db76 [GlobalISel] Fix the artifact combiner to fold G_IMPLICIT_D [...] adds b501cdb9f55 Revert "[OptRemarks] Add library for parsing optimization remarks" adds 2a9ea3459b2 [Support] Remove redundant qualifiers in YAMLTraits (NFC) adds 105b05e0855 Reland: [OptRemarks] Add library for parsing optimization remarks adds ca0c32a3b8c [LV] Add a new reduction pattern match adds c8b6096ed08 [WebAssembly][NFC] Use vnot patfrag to simplify v128.not adds 4942b853a9c [DwarfVerifier] Fixed -Wimplicit-fallthrough warning adds 9f5daa2df05 revert r344082: [InstCombine] reverse 'trunc X to <N x i1>' [...] adds 6029ddd2298 [X86] Move X86DAGToDAGISel::matchBEXTRFromAnd() into X86ISe [...] adds 2870bb06155 [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] adds 66a2c5ecaae [InstCombine] reverse 'trunc X to <N x i1>' canonicalizatio [...] adds 4c5954f7cf9 [NFC][X86][AArch64] extract-bits.ll: add tests with constan [...] adds 742beb6d7db llvm-ar: Darwin archive format fixes. adds 3b1e430b900 Support for remapping profile data when symbols change, for [...] adds 3cf846acd82 Test commit: fix typo in comment adds ea46abe2cc7 Replace most users of UnknownSize with LocationSize::unknow [...] adds 04af5ff3eb6 Support for remapping profile data when symbols change, for [...] adds 8313c3b553f [CMake] NFC. Updating documentation on options adds 63c98b33197 [X86] Prevent non-temporal loads from folding into instruct [...] adds d784be6ea22 [MC][ELF] compute entity size for explicit sections adds 7f7ab9f57f5 [LTO] Account for overriding lib calls via the alias attribute adds 63ec2563a97 Add a flag to remap manglings when reading profile data inf [...] adds 9528e40193f llvm-c: Add C APIs to access DebugLoc info adds ca6f7dc5ec2 [WebAssembly] Saturating float to int intrinsics adds d36df14f65d [MC][ELF] Fix section_mergeable_size.ll adds 119d9f6b0f7 [WebAssembly][NFC] Use intrinsic dag nodes directly adds 4599ef42e71 Use fully qualified namespace name. adds 0801e41a519 [Coverage] Apply filtered paths to summary adds 6fb010f388b [CMake] Unconditionally add .h and .td files to target sources adds b1493403a41 [CMake] Temporarily remove the LLVM_ENABLE_IDE option adds d342bc787ac [llvm-nm] Include the text "@FILE" in the output of --help adds d7e48738baf [IndVars] Drop "exact" flag from lshr and udiv when substit [...] adds b4d0c491d05 [X86][BMI1]: X86DAGToDAGISel: select BEXTR from x & ~(-1 << [...] adds fb7e6913cb7 [NFC] Factor out getOrCreateAddRecExpr method adds 6298cb983b2 [gcov] Display the hit counter for the line of a function d [...] adds 522fc4db7cd [LV] Ignore more debug info. adds e13d0945215 [LV] Use SmallVector instead of DenseMap in calculateRegist [...] new a319a84535c FileCheck: Add support for variable expressions This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7b79106af28) \ N -- N -- N refs/heads/linaro-local/thomas.preudhomme/tcwg-1428-reba [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: CMakeLists.txt | 88 +- CODE_OWNERS.TXT | 4 + benchmarks/CMakeLists.txt | 4 + benchmarks/DummyYAML.cpp | 13 + bindings/go/llvm/dibuilder.go | 15 +- bindings/go/llvm/ir.go | 22 + bindings/go/llvm/target.go | 1 + bindings/go/llvm/transforms_coroutines.go | 24 + bindings/ocaml/llvm/llvm.ml | 16 +- bindings/ocaml/llvm/llvm.mli | 36 +- bindings/ocaml/llvm/llvm_ocaml.c | 32 +- .../transforms/scalar_opts/llvm_scalar_opts.ml | 6 + .../transforms/scalar_opts/llvm_scalar_opts.mli | 10 + .../transforms/scalar_opts/scalar_opts_ocaml.c | 13 + .../ocaml/transforms/utils/transform_utils_ocaml.c | 2 +- cmake/modules/AddLLVM.cmake | 45 +- cmake/modules/GetHostTriple.cmake | 8 +- cmake/modules/HandleLLVMOptions.cmake | 27 +- cmake/modules/LLVM-Config.cmake | 4 +- cmake/modules/LLVMConfig.cmake.in | 1 + cmake/modules/LLVMProcessSources.cmake | 17 +- cmake/platforms/WinMsvc.cmake | 24 +- docs/CMake.rst | 10 +- docs/CodingStandards.rst | 14 +- docs/CommandGuide/index.rst | 2 + docs/CommandGuide/lit.rst | 2 +- docs/CommandGuide/lli.rst | 1 + docs/CommandGuide/llvm-cxxmap.rst | 91 + docs/CommandGuide/llvm-exegesis.rst | 63 +- docs/CommandGuide/llvm-mca.rst | 84 +- docs/CommandGuide/llvm-objdump.rst | 115 + docs/CommandGuide/llvm-profdata.rst | 10 + docs/DeveloperPolicy.rst | 12 +- docs/FuzzingLLVM.rst | 10 +- docs/GettingStarted.rst | 9 - docs/GoldPlugin.rst | 2 +- docs/LangRef.rst | 104 +- docs/Lexicon.rst | 1 + docs/MIRLangRef.rst | 13 +- docs/MergeFunctions.rst | 365 +- docs/ProgrammersManual.rst | 14 +- docs/ReleaseNotes.rst | 16 +- docs/SourceLevelDebugging.rst | 22 +- docs/SpeculativeLoadHardening.md | 7 +- docs/SupportLibrary.rst | 246 + docs/SystemLibrary.rst | 245 +- docs/TestSuiteGuide.md | 403 + docs/TestSuiteMakefileGuide.rst | 170 +- docs/TestingGuide.rst | 76 +- docs/XRayExample.rst | 20 +- docs/conf.py | 3 + docs/index.rst | 8 +- .../BuildingAJIT/Chapter3/KaleidoscopeJIT.h | 4 +- .../BuildingAJIT/Chapter4/KaleidoscopeJIT.h | 4 +- include/llvm-c/Core.h | 173 + include/llvm-c/DebugInfo.h | 85 +- include/llvm-c/Error.h | 69 + include/llvm-c/OptRemarks.h | 197 + include/llvm-c/OrcBindings.h | 73 +- include/llvm-c/TargetMachine.h | 1 + include/llvm-c/Transforms/AggressiveInstCombine.h | 43 + include/llvm-c/Transforms/Coroutines.h | 55 + include/llvm-c/Transforms/Scalar.h | 9 +- include/llvm-c/Types.h | 14 + include/llvm-c/lto.h | 12 +- include/llvm/ADT/APInt.h | 18 +- include/llvm/ADT/Any.h | 10 + include/llvm/ADT/BitVector.h | 17 + include/llvm/ADT/DenseMap.h | 13 +- include/llvm/ADT/DenseSet.h | 4 +- include/llvm/ADT/Hashing.h | 15 +- include/llvm/ADT/ImmutableList.h | 36 +- include/llvm/ADT/IntervalMap.h | 11 +- include/llvm/ADT/PointerSumType.h | 128 +- include/llvm/ADT/STLExtras.h | 94 +- include/llvm/ADT/SmallBitVector.h | 5 + include/llvm/ADT/SmallVector.h | 4 +- include/llvm/ADT/StringExtras.h | 11 +- include/llvm/ADT/Triple.h | 16 +- include/llvm/ADT/bit.h | 59 + include/llvm/ADT/iterator.h | 28 + include/llvm/Analysis/AliasAnalysis.h | 3 +- include/llvm/Analysis/AliasSetTracker.h | 54 +- include/llvm/Analysis/CFGPrinter.h | 3 +- include/llvm/Analysis/CGSCCPassManager.h | 33 +- include/llvm/Analysis/DivergenceAnalysis.h | 61 - include/llvm/Analysis/GuardUtils.h | 26 + include/llvm/Analysis/IVDescriptors.h | 357 + include/llvm/Analysis/IndirectCallSiteVisitor.h | 5 + .../llvm/Analysis/InstructionPrecedenceTracking.h | 119 + include/llvm/Analysis/InstructionSimplify.h | 47 +- include/llvm/Analysis/IteratedDominanceFrontier.h | 26 +- include/llvm/Analysis/LegacyDivergenceAnalysis.h | 61 + include/llvm/Analysis/LoopAccessAnalysis.h | 14 +- include/llvm/Analysis/LoopInfoImpl.h | 4 +- include/llvm/Analysis/MemoryDependenceAnalysis.h | 2 +- include/llvm/Analysis/MemoryLocation.h | 158 +- include/llvm/Analysis/MemorySSA.h | 77 +- include/llvm/Analysis/MemorySSAUpdater.h | 95 +- include/llvm/Analysis/MustExecute.h | 50 +- include/llvm/Analysis/OrderedInstructions.h | 65 + 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2 +- include/llvm/CodeGen/GlobalISel/Combiner.h | 10 + include/llvm/CodeGen/GlobalISel/CombinerHelper.h | 11 +- include/llvm/CodeGen/GlobalISel/CombinerInfo.h | 5 +- include/llvm/CodeGen/GlobalISel/IRTranslator.h | 1 + .../GlobalISel/LegalizationArtifactCombiner.h | 24 +- include/llvm/CodeGen/GlobalISel/LegalizerHelper.h | 3 + include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 23 +- include/llvm/CodeGen/ISDOpcodes.h | 16 +- include/llvm/CodeGen/MIRYamlMapping.h | 5 + include/llvm/CodeGen/MachineBasicBlock.h | 6 + include/llvm/CodeGen/MachineFrameInfo.h | 13 + include/llvm/CodeGen/MachineFunction.h | 87 +- include/llvm/CodeGen/MachineInstr.h | 279 +- include/llvm/CodeGen/MachineInstrBuilder.h | 17 +- include/llvm/CodeGen/MachineModuleInfoImpls.h | 22 + include/llvm/CodeGen/MachineRegisterInfo.h | 4 + include/llvm/CodeGen/MachineScheduler.h | 9 + include/llvm/CodeGen/PseudoSourceValue.h | 10 +- include/llvm/CodeGen/ScheduleDAG.h | 17 +- include/llvm/CodeGen/ScheduleDAGInstrs.h | 3 +- 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+- lib/Analysis/DemandedBits.cpp | 4 +- lib/Analysis/DependenceAnalysis.cpp | 4 +- lib/Analysis/DivergenceAnalysis.cpp | 340 - lib/Analysis/GuardUtils.cpp | 21 + lib/Analysis/IVDescriptors.cpp | 1088 +++ lib/Analysis/InlineCost.cpp | 12 +- lib/Analysis/InstructionPrecedenceTracking.cpp | 144 + lib/Analysis/InstructionSimplify.cpp | 251 +- lib/Analysis/IteratedDominanceFrontier.cpp | 21 +- lib/Analysis/LegacyDivergenceAnalysis.cpp | 340 + lib/Analysis/LoopAccessAnalysis.cpp | 25 +- lib/Analysis/LoopAnalysisManager.cpp | 4 +- lib/Analysis/LoopInfo.cpp | 43 +- lib/Analysis/LoopPass.cpp | 26 +- lib/Analysis/MemoryDependenceAnalysis.cpp | 53 +- lib/Analysis/MemoryLocation.cpp | 35 +- lib/Analysis/MemorySSA.cpp | 174 +- lib/Analysis/MemorySSAUpdater.cpp | 538 +- lib/Analysis/ModuleSummaryAnalysis.cpp | 23 +- lib/Analysis/MustExecute.cpp | 149 +- lib/Analysis/OrderedBasicBlock.cpp | 3 + lib/Analysis/OrderedInstructions.cpp | 51 + lib/Analysis/PhiValues.cpp | 17 + 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lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 9 + lib/CodeGen/GlobalMerge.cpp | 13 +- lib/CodeGen/ImplicitNullChecks.cpp | 14 +- lib/CodeGen/LLVMTargetMachine.cpp | 10 +- lib/CodeGen/LatencyPriorityQueue.cpp | 4 +- lib/CodeGen/LiveDebugValues.cpp | 79 +- lib/CodeGen/LiveDebugVariables.cpp | 112 +- lib/CodeGen/LiveInterval.cpp | 22 +- lib/CodeGen/LocalStackSlotAllocation.cpp | 2 +- lib/CodeGen/MIRCanonicalizerPass.cpp | 8 +- lib/CodeGen/MIRParser/MILexer.cpp | 55 + lib/CodeGen/MIRParser/MILexer.h | 7 + lib/CodeGen/MIRParser/MIParser.cpp | 102 +- lib/CodeGen/MIRParser/MIRParser.cpp | 1 + lib/CodeGen/MIRPrinter.cpp | 26 + lib/CodeGen/MachineBasicBlock.cpp | 81 +- lib/CodeGen/MachineBlockPlacement.cpp | 3 +- lib/CodeGen/MachineCSE.cpp | 4 + lib/CodeGen/MachineCopyPropagation.cpp | 283 +- lib/CodeGen/MachineFunction.cpp | 162 +- lib/CodeGen/MachineFunctionPass.cpp | 36 + lib/CodeGen/MachineFunctionPrinterPass.cpp | 2 + lib/CodeGen/MachineInstr.cpp | 346 +- lib/CodeGen/MachineInstrBundle.cpp | 27 +- lib/CodeGen/MachineLICM.cpp | 6 +- lib/CodeGen/MachineModuleInfoImpls.cpp | 1 + lib/CodeGen/MachineOperand.cpp | 7 +- lib/CodeGen/MachineOutliner.cpp | 247 +- lib/CodeGen/MachinePipeliner.cpp | 97 +- lib/CodeGen/MachineRegisterInfo.cpp | 10 + lib/CodeGen/MachineScheduler.cpp | 150 +- lib/CodeGen/MachineSink.cpp | 28 +- lib/CodeGen/MachineVerifier.cpp | 71 +- lib/CodeGen/MacroFusion.cpp | 12 +- lib/CodeGen/PHIElimination.cpp | 34 +- lib/CodeGen/PostRASchedulerList.cpp | 12 +- lib/CodeGen/PseudoSourceValue.cpp | 4 +- lib/CodeGen/ReachingDefAnalysis.cpp | 2 +- lib/CodeGen/RegAllocGreedy.cpp | 62 +- lib/CodeGen/RegUsageInfoCollector.cpp | 45 +- lib/CodeGen/RegisterCoalescer.cpp | 121 +- lib/CodeGen/RegisterPressure.cpp | 3 +- lib/CodeGen/RegisterUsageInfo.cpp | 2 +- lib/CodeGen/SafeStack.cpp | 14 +- lib/CodeGen/SafeStackColoring.cpp | 4 +- lib/CodeGen/ScalarizeMaskedMemIntrin.cpp | 266 +- lib/CodeGen/ScheduleDAG.cpp | 100 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 20 +- lib/CodeGen/ScoreboardHazardRecognizer.cpp | 3 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 944 ++- lib/CodeGen/SelectionDAG/FastISel.cpp | 16 +- lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 15 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 63 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 24 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 108 +- lib/CodeGen/SelectionDAG/LegalizeTypes.h | 2 + lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 2 +- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 31 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 166 +- lib/CodeGen/SelectionDAG/SDNodeDbgValue.h | 3 + lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 7 +- lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 12 +- lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 37 +- lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h | 4 +- lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp | 4 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 320 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 194 +- lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 19 + lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 56 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 934 ++- lib/CodeGen/SlotIndexes.cpp | 2 +- lib/CodeGen/SplitKit.h | 17 + lib/CodeGen/StackColoring.cpp | 14 +- lib/CodeGen/StackMaps.cpp | 9 +- lib/CodeGen/StackSlotColoring.cpp | 2 +- lib/CodeGen/TargetInstrInfo.cpp | 51 +- lib/CodeGen/TargetLoweringBase.cpp | 6 +- lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 232 +- lib/CodeGen/TargetPassConfig.cpp | 12 +- lib/CodeGen/TwoAddressInstructionPass.cpp | 10 +- lib/CodeGen/VirtRegMap.cpp | 2 +- lib/CodeGen/WinEHPrepare.cpp | 5 +- lib/DebugInfo/CodeView/CMakeLists.txt | 1 + lib/DebugInfo/CodeView/CodeViewError.cpp | 35 +- lib/DebugInfo/CodeView/DebugCrossImpSubsection.cpp | 2 +- .../CodeView/DebugFrameDataSubsection.cpp | 32 +- .../CodeView/DebugStringTableSubsection.cpp | 2 +- lib/DebugInfo/CodeView/EnumTables.cpp | 2 + lib/DebugInfo/CodeView/SymbolDumper.cpp | 36 +- lib/DebugInfo/CodeView/SymbolRecordMapping.cpp | 72 + lib/DebugInfo/CodeView/TypeRecordHelpers.cpp | 53 + lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 2 +- lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp | 54 +- lib/DebugInfo/DWARF/DWARFContext.cpp | 74 +- lib/DebugInfo/DWARF/DWARFDebugAranges.cpp | 2 +- lib/DebugInfo/DWARF/DWARFDebugFrame.cpp | 13 +- lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 48 +- lib/DebugInfo/DWARF/DWARFDebugRangeList.cpp | 19 +- lib/DebugInfo/DWARF/DWARFDebugRnglists.cpp | 41 +- lib/DebugInfo/DWARF/DWARFDie.cpp | 6 +- lib/DebugInfo/DWARF/DWARFFormValue.cpp | 15 +- lib/DebugInfo/DWARF/DWARFListTable.cpp | 34 +- lib/DebugInfo/DWARF/DWARFUnit.cpp | 63 +- lib/DebugInfo/DWARF/DWARFUnitIndex.cpp | 29 +- lib/DebugInfo/DWARF/DWARFVerifier.cpp | 229 +- lib/DebugInfo/MSF/MSFError.cpp | 30 +- lib/DebugInfo/PDB/CMakeLists.txt | 13 +- lib/DebugInfo/PDB/DIA/DIADataStream.cpp | 22 +- lib/DebugInfo/PDB/DIA/DIAEnumDebugStreams.cpp | 7 - lib/DebugInfo/PDB/DIA/DIAEnumInjectedSources.cpp | 10 +- lib/DebugInfo/PDB/DIA/DIAEnumLineNumbers.cpp | 7 - lib/DebugInfo/PDB/DIA/DIAEnumSectionContribs.cpp | 7 - lib/DebugInfo/PDB/DIA/DIAEnumSourceFiles.cpp | 7 - lib/DebugInfo/PDB/DIA/DIAEnumSymbols.cpp | 7 - lib/DebugInfo/PDB/DIA/DIAEnumTables.cpp | 12 +- lib/DebugInfo/PDB/DIA/DIAError.cpp | 31 +- lib/DebugInfo/PDB/DIA/DIARawSymbol.cpp | 464 +- lib/DebugInfo/PDB/DIA/DIASectionContrib.cpp | 2 +- lib/DebugInfo/PDB/DIA/DIASession.cpp | 14 +- lib/DebugInfo/PDB/DIA/DIASourceFile.cpp | 14 +- lib/DebugInfo/PDB/DIA/DIATable.cpp | 17 +- lib/DebugInfo/PDB/GenericError.cpp | 55 +- lib/DebugInfo/PDB/Native/DbiStream.cpp | 2 +- lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp | 45 +- lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp | 14 +- lib/DebugInfo/PDB/Native/GlobalsStream.cpp | 68 +- lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp | 11 +- lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp | 8 + lib/DebugInfo/PDB/Native/NativeBuiltinSymbol.cpp | 47 - lib/DebugInfo/PDB/Native/NativeCompilandSymbol.cpp | 19 +- lib/DebugInfo/PDB/Native/NativeEnumGlobals.cpp | 55 + lib/DebugInfo/PDB/Native/NativeEnumModules.cpp | 23 +- lib/DebugInfo/PDB/Native/NativeEnumSymbol.cpp | 108 - lib/DebugInfo/PDB/Native/NativeEnumTypes.cpp | 62 +- lib/DebugInfo/PDB/Native/NativeExeSymbol.cpp | 60 +- lib/DebugInfo/PDB/Native/NativeRawSymbol.cpp | 96 +- lib/DebugInfo/PDB/Native/NativeSession.cpp | 135 +- .../PDB/Native/NativeSymbolEnumerator.cpp | 123 + lib/DebugInfo/PDB/Native/NativeTypeArray.cpp | 67 + lib/DebugInfo/PDB/Native/NativeTypeBuiltin.cpp | 47 + lib/DebugInfo/PDB/Native/NativeTypeEnum.cpp | 382 + lib/DebugInfo/PDB/Native/NativeTypeFunctionSig.cpp | 200 + lib/DebugInfo/PDB/Native/NativeTypePointer.cpp | 194 + lib/DebugInfo/PDB/Native/NativeTypeTypedef.cpp | 27 + lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp | 221 + lib/DebugInfo/PDB/Native/NativeTypeVTShape.cpp | 35 + lib/DebugInfo/PDB/Native/PDBFile.cpp | 2 +- lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp | 34 +- lib/DebugInfo/PDB/Native/RawError.cpp | 30 +- lib/DebugInfo/PDB/Native/SymbolCache.cpp | 302 + lib/DebugInfo/PDB/Native/TpiHashing.cpp | 43 + lib/DebugInfo/PDB/Native/TpiStream.cpp | 59 + lib/DebugInfo/PDB/PDB.cpp | 6 +- lib/DebugInfo/PDB/PDBExtras.cpp | 43 +- lib/DebugInfo/PDB/PDBSymbol.cpp | 77 +- lib/DebugInfo/PDB/PDBSymbolAnnotation.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolBlock.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolCompiland.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolCompilandDetails.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolCompilandEnv.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolCustom.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolData.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolExe.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolFunc.cpp | 10 - lib/DebugInfo/PDB/PDBSymbolFuncDebugEnd.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolFuncDebugStart.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolLabel.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolPublicSymbol.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolThunk.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeArray.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeBaseClass.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeBuiltin.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeCustom.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeDimension.cpp | 7 - lib/DebugInfo/PDB/PDBSymbolTypeEnum.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeFriend.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeFunctionArg.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeFunctionSig.cpp | 11 - lib/DebugInfo/PDB/PDBSymbolTypeManaged.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypePointer.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeTypedef.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeUDT.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeVTable.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolTypeVTableShape.cpp | 6 - lib/DebugInfo/PDB/PDBSymbolUnknown.cpp | 4 - lib/DebugInfo/PDB/PDBSymbolUsingNamespace.cpp | 6 - lib/DebugInfo/Symbolize/Symbolize.cpp | 3 +- lib/Demangle/CMakeLists.txt | 1 + lib/Demangle/ItaniumDemangle.cpp | 5191 +----------- lib/Demangle/MicrosoftDemangle.cpp | 2839 ++++--- lib/Demangle/MicrosoftDemangleNodes.cpp | 610 ++ lib/Demangle/MicrosoftDemangleNodes.h | 697 ++ lib/Demangle/Utility.h | 188 - lib/ExecutionEngine/MCJIT/MCJIT.cpp | 3 +- lib/ExecutionEngine/Orc/CMakeLists.txt | 3 + lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp | 473 +- lib/ExecutionEngine/Orc/Core.cpp | 1688 ++-- lib/ExecutionEngine/Orc/ExecutionUtils.cpp | 69 +- lib/ExecutionEngine/Orc/IRCompileLayer.cpp | 10 +- lib/ExecutionEngine/Orc/IRTransformLayer.cpp | 10 +- lib/ExecutionEngine/Orc/IndirectionUtils.cpp | 145 +- .../Orc/JITTargetMachineBuilder.cpp | 55 + lib/ExecutionEngine/Orc/LLJIT.cpp | 160 +- lib/ExecutionEngine/Orc/Layer.cpp | 109 +- lib/ExecutionEngine/Orc/LazyReexports.cpp | 208 + lib/ExecutionEngine/Orc/Legacy.cpp | 58 +- lib/ExecutionEngine/Orc/NullResolver.cpp | 4 +- lib/ExecutionEngine/Orc/OrcABISupport.cpp | 455 + lib/ExecutionEngine/Orc/OrcCBindings.cpp | 121 +- lib/ExecutionEngine/Orc/OrcCBindingsStack.h | 264 +- lib/ExecutionEngine/Orc/OrcMCJITReplacement.h | 23 +- .../Orc/RTDyldObjectLinkingLayer.cpp | 226 +- lib/ExecutionEngine/Orc/ThreadSafeModule.cpp | 65 + lib/ExecutionEngine/RuntimeDyld/JITSymbol.cpp | 64 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 230 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 29 +- .../RuntimeDyld/RuntimeDyldCheckerImpl.h | 3 + lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h | 9 + lib/FuzzMutate/IRMutator.cpp | 1 + lib/FuzzMutate/RandomIRBuilder.cpp | 2 +- lib/IR/AsmWriter.cpp | 168 +- lib/IR/Attributes.cpp | 4 +- lib/IR/AutoUpgrade.cpp | 222 +- lib/IR/BasicBlock.cpp | 4 +- lib/IR/CMakeLists.txt | 2 + lib/IR/ConstantFold.cpp | 18 +- lib/IR/Core.cpp | 208 + lib/IR/DIBuilder.cpp | 29 +- lib/IR/DataLayout.cpp | 16 +- lib/IR/DebugInfo.cpp | 78 +- lib/IR/DebugInfoMetadata.cpp | 121 +- lib/IR/DebugLoc.cpp | 17 +- lib/IR/Dominators.cpp | 197 +- lib/IR/Function.cpp | 20 +- lib/IR/Globals.cpp | 5 + lib/IR/IRBuilder.cpp | 26 +- lib/IR/Instruction.cpp | 38 +- lib/IR/Instructions.cpp | 159 +- lib/IR/LLVMContextImpl.h | 31 +- lib/IR/LegacyPassManager.cpp | 352 +- lib/IR/MDBuilder.cpp | 7 +- lib/IR/Metadata.cpp | 4 +- lib/IR/Module.cpp | 27 +- lib/IR/PassInstrumentation.cpp | 22 + lib/IR/PassTimingInfo.cpp | 266 + lib/IR/Value.cpp | 8 +- lib/IR/Verifier.cpp | 42 +- lib/LLVMBuild.txt | 2 + lib/LTO/LTO.cpp | 45 +- lib/LTO/LTOBackend.cpp | 11 +- lib/LTO/LTOCodeGenerator.cpp | 1 + lib/LTO/ThinLTOCodeGenerator.cpp | 36 +- lib/LTO/UpdateCompilerUsed.cpp | 16 +- lib/Linker/IRMover.cpp | 19 +- lib/MC/ConstantPools.cpp | 6 +- lib/MC/ELFObjectWriter.cpp | 3 + lib/MC/MCAsmInfoWasm.cpp | 2 +- lib/MC/MCAsmStreamer.cpp | 17 +- lib/MC/MCCodeView.cpp | 67 +- lib/MC/MCContext.cpp | 7 +- lib/MC/MCDwarf.cpp | 3 - lib/MC/MCELFObjectTargetWriter.cpp | 3 + lib/MC/MCExpr.cpp | 17 +- lib/MC/MCInstrAnalysis.cpp | 5 - lib/MC/MCObjectFileInfo.cpp | 189 +- lib/MC/MCObjectStreamer.cpp | 35 +- lib/MC/MCParser/AsmParser.cpp | 157 +- lib/MC/MCParser/MCAsmLexer.cpp | 2 +- lib/MC/MCRegisterInfo.cpp | 5 +- lib/MC/MCSection.cpp | 3 +- lib/MC/MCStreamer.cpp | 22 +- lib/MC/MachObjectWriter.cpp | 4 +- lib/MC/WasmObjectWriter.cpp | 93 +- lib/MC/WinCOFFObjectWriter.cpp | 101 +- lib/Object/ArchiveWriter.cpp | 166 +- lib/Object/COFFObjectFile.cpp | 44 +- lib/Object/ELF.cpp | 15 +- lib/Object/ELFObjectFile.cpp | 67 + lib/Object/MachOObjectFile.cpp | 6 +- lib/Object/WasmObjectFile.cpp | 104 +- lib/ObjectYAML/CodeViewYAMLDebugSections.cpp | 2 +- lib/ObjectYAML/ELFYAML.cpp | 1 + lib/ObjectYAML/WasmYAML.cpp | 17 +- lib/OptRemarks/CMakeLists.txt | 3 + lib/OptRemarks/LLVMBuild.txt | 22 + lib/OptRemarks/OptRemarksParser.cpp | 368 + lib/Option/OptTable.cpp | 12 +- lib/Passes/CMakeLists.txt | 5 + lib/Passes/PassBuilder.cpp | 24 +- lib/Passes/PassRegistry.def | 6 + lib/Passes/StandardInstrumentations.cpp | 116 + lib/ProfileData/Coverage/CoverageMapping.cpp | 31 +- lib/ProfileData/GCOV.cpp | 154 +- lib/ProfileData/InstrProfReader.cpp | 164 +- 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lib/Support/TargetParser.cpp | 192 +- lib/Support/TargetRegistry.cpp | 2 +- lib/Support/Timer.cpp | 17 +- lib/Support/Triple.cpp | 35 +- lib/Support/Unix/Path.inc | 121 +- lib/Support/Unix/Process.inc | 5 +- lib/Support/VirtualFileSystem.cpp | 2121 +++++ lib/Support/Windows/Path.inc | 92 +- lib/Support/Windows/Process.inc | 109 +- lib/Support/Windows/Program.inc | 2 +- lib/Support/YAMLTraits.cpp | 56 +- lib/Support/raw_ostream.cpp | 84 +- lib/TableGen/Record.cpp | 11 +- lib/Target/AArch64/AArch64.h | 4 + lib/Target/AArch64/AArch64.td | 72 +- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 29 +- lib/Target/AArch64/AArch64AsmPrinter.cpp | 6 +- lib/Target/AArch64/AArch64BranchTargets.cpp | 130 + lib/Target/AArch64/AArch64CallLowering.cpp | 14 +- lib/Target/AArch64/AArch64CallingConvention.td | 8 + lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 69 +- lib/Target/AArch64/AArch64FastISel.cpp | 10 + lib/Target/AArch64/AArch64FrameLowering.cpp | 301 +- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 39 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 237 +- lib/Target/AArch64/AArch64ISelLowering.h | 9 +- lib/Target/AArch64/AArch64InstrFormats.td | 264 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 156 +- lib/Target/AArch64/AArch64InstrInfo.td | 189 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 3 + lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 8 +- lib/Target/AArch64/AArch64MCInstLower.cpp | 22 +- lib/Target/AArch64/AArch64MacroFusion.cpp | 251 +- lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp | 108 + lib/Target/AArch64/AArch64RegisterInfo.cpp | 99 +- lib/Target/AArch64/AArch64RegisterInfo.h | 10 +- lib/Target/AArch64/AArch64RegisterInfo.td | 6 + lib/Target/AArch64/AArch64Subtarget.cpp | 29 +- lib/Target/AArch64/AArch64Subtarget.h | 48 +- lib/Target/AArch64/AArch64SystemOperands.td | 116 + lib/Target/AArch64/AArch64TargetMachine.cpp | 29 +- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 250 +- lib/Target/AArch64/CMakeLists.txt | 2 + .../AArch64/Disassembler/AArch64Disassembler.cpp | 53 +- .../Disassembler/AArch64ExternalSymbolizer.cpp | 4 +- .../AArch64/InstPrinter/AArch64InstPrinter.cpp | 40 +- .../AArch64/InstPrinter/AArch64InstPrinter.h | 3 + .../AArch64/MCTargetDesc/AArch64AddressingModes.h | 56 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 11 +- .../MCTargetDesc/AArch64ELFObjectWriter.cpp | 4 +- lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.cpp | 4 +- .../AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp | 26 + lib/Target/AArch64/SVEInstrFormats.td | 2 +- lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 14 + lib/Target/AArch64/Utils/AArch64BaseInfo.h | 23 +- lib/Target/AMDGPU/AMDGPU.h | 27 +- lib/Target/AMDGPU/AMDGPU.td | 27 +- lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 81 +- lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 18 +- lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 4 +- lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 30 +- lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 14 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 32 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 1 - lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 421 + lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 6 +- lib/Target/AMDGPU/AMDGPUCallLowering.h | 2 - lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 24 +- lib/Target/AMDGPU/AMDGPUGISel.td | 5 +- lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 25 +- lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 1 - lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 217 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 103 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 15 +- lib/Target/AMDGPU/AMDGPUInline.cpp | 4 +- lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 6 +- lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 3 - lib/Target/AMDGPU/AMDGPUInstructions.td | 39 +- lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 10 +- lib/Target/AMDGPU/AMDGPULibCalls.cpp | 5 +- lib/Target/AMDGPU/AMDGPULibFunc.cpp | 1 - lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 5 +- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 20 + lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 10 +- lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 25 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 69 + lib/Target/AMDGPU/AMDGPURegisterInfo.h | 2 - lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 19 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 161 +- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 48 +- lib/Target/AMDGPU/AMDGPUTargetMachine.h | 10 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 58 +- lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 2 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 12 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 138 +- lib/Target/AMDGPU/BUFInstructions.td | 244 +- lib/Target/AMDGPU/CMakeLists.txt | 1 + lib/Target/AMDGPU/FLATInstructions.td | 2 +- lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 11 +- lib/Target/AMDGPU/GCNILPSched.cpp | 2 +- lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 3 +- lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 2 +- .../AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 31 +- lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 359 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 9 +- lib/Target/AMDGPU/MIMGInstructions.td | 8 +- lib/Target/AMDGPU/R600ISelLowering.cpp | 36 +- lib/Target/AMDGPU/R600InstrInfo.cpp | 8 +- lib/Target/AMDGPU/R600InstrInfo.h | 2 +- lib/Target/AMDGPU/R600Instructions.td | 8 +- lib/Target/AMDGPU/R600MachineScheduler.cpp | 8 +- lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 13 +- lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 10 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 141 +- lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 19 +- lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- lib/Target/AMDGPU/SIISelLowering.cpp | 1135 ++- lib/Target/AMDGPU/SIISelLowering.h | 21 +- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 12 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 684 +- lib/Target/AMDGPU/SIInstrInfo.h | 55 +- lib/Target/AMDGPU/SIInstrInfo.td | 124 +- lib/Target/AMDGPU/SIInstructions.td | 53 +- lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 50 +- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 6 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 14 +- lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 17 +- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 9 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 19 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 106 +- lib/Target/AMDGPU/SMInstructions.td | 171 +- lib/Target/AMDGPU/SOPInstructions.td | 51 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 284 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 157 +- lib/Target/AMDGPU/Utils/AMDKernelCodeTInfo.h | 1 + lib/Target/AMDGPU/VOP1Instructions.td | 9 +- lib/Target/AMDGPU/VOP2Instructions.td | 191 +- lib/Target/AMDGPU/VOP3Instructions.td | 87 +- lib/Target/AMDGPU/VOP3PInstructions.td | 95 + lib/Target/AMDGPU/VOPCInstructions.td | 26 + lib/Target/AMDGPU/VOPInstructions.td | 71 +- lib/Target/ARC/InstPrinter/ARCInstPrinter.cpp | 11 +- lib/Target/ARM/ARM.td | 89 +- lib/Target/ARM/ARMAsmPrinter.cpp | 48 +- lib/Target/ARM/ARMBaseInstrInfo.cpp | 113 +- lib/Target/ARM/ARMBaseInstrInfo.h | 16 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 5 + lib/Target/ARM/ARMBaseRegisterInfo.h | 3 +- lib/Target/ARM/ARMCodeGenPrepare.cpp | 651 +- lib/Target/ARM/ARMConstantIslandPass.cpp | 16 + lib/Target/ARM/ARMExpandPseudoInsts.cpp | 24 +- lib/Target/ARM/ARMFrameLowering.cpp | 17 +- lib/Target/ARM/ARMISelDAGToDAG.cpp | 60 +- lib/Target/ARM/ARMISelLowering.cpp | 274 +- lib/Target/ARM/ARMISelLowering.h | 13 +- lib/Target/ARM/ARMInstrFormats.td | 32 + lib/Target/ARM/ARMInstrInfo.cpp | 30 +- lib/Target/ARM/ARMInstrInfo.h | 7 - lib/Target/ARM/ARMInstrInfo.td | 32 +- lib/Target/ARM/ARMInstrNEON.td | 95 +- lib/Target/ARM/ARMInstrThumb2.td | 26 +- lib/Target/ARM/ARMInstrVFP.td | 12 +- lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 37 +- lib/Target/ARM/ARMMacroFusion.h | 5 + lib/Target/ARM/ARMParallelDSP.cpp | 263 +- lib/Target/ARM/ARMSubtarget.cpp | 17 +- lib/Target/ARM/ARMSubtarget.h | 24 +- lib/Target/ARM/ARMTargetObjectFile.cpp | 14 +- lib/Target/ARM/ARMTargetTransformInfo.cpp | 4 +- lib/Target/ARM/ARMTargetTransformInfo.h | 2 +- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 44 +- lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 15 + lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h | 22 +- lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h | 9 +- lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp | 18 + lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp | 8 +- lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 13 +- lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp | 2 +- .../ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp | 2 +- lib/Target/ARM/Thumb2InstrInfo.cpp | 5 + lib/Target/ARM/Thumb2SizeReduction.cpp | 4 +- lib/Target/AVR/AVRExpandPseudoInsts.cpp | 65 +- lib/Target/AVR/AVRISelDAGToDAG.cpp | 8 +- lib/Target/AVR/AVRISelLowering.cpp | 13 +- lib/Target/AVR/AVRInstrInfo.td | 57 +- lib/Target/BPF/BPF.h | 2 + lib/Target/BPF/BPFMIChecking.cpp | 96 + lib/Target/BPF/BPFRegisterInfo.h | 2 - lib/Target/BPF/BPFTargetMachine.cpp | 4 +- lib/Target/BPF/CMakeLists.txt | 1 + lib/Target/BPF/Disassembler/BPFDisassembler.cpp | 2 - lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp | 9 +- lib/Target/BPF/MCTargetDesc/BPFMCAsmInfo.h | 4 +- lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 1 + lib/Target/Hexagon/CMakeLists.txt | 1 - .../Hexagon/Disassembler/HexagonDisassembler.cpp | 1 - lib/Target/Hexagon/Hexagon.h | 27 - lib/Target/Hexagon/HexagonAsmPrinter.cpp | 1 - lib/Target/Hexagon/HexagonBitSimplify.cpp | 8 + lib/Target/Hexagon/HexagonConstExtenders.cpp | 50 +- lib/Target/Hexagon/HexagonDepInstrInfo.td | 3 + lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 4 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 9 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 58 +- lib/Target/Hexagon/HexagonGatherPacketize.cpp | 104 - lib/Target/Hexagon/HexagonGenInsert.cpp | 2 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 14 +- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 19 +- lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 135 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 144 +- lib/Target/Hexagon/HexagonISelLowering.h | 14 +- lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 70 + lib/Target/Hexagon/HexagonInstrInfo.cpp | 203 +- lib/Target/Hexagon/HexagonInstrInfo.h | 14 +- lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 2 +- lib/Target/Hexagon/HexagonMachineScheduler.cpp | 7 +- lib/Target/Hexagon/HexagonPatterns.td | 215 +- lib/Target/Hexagon/HexagonRegisterInfo.h | 2 - lib/Target/Hexagon/HexagonStoreWidening.cpp | 2 +- lib/Target/Hexagon/HexagonTargetMachine.cpp | 12 +- lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 6 +- lib/Target/Hexagon/HexagonTargetTransformInfo.h | 3 + lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 54 +- lib/Target/Hexagon/HexagonVLIWPacketizer.h | 4 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.cpp | 88 +- .../Hexagon/MCTargetDesc/HexagonInstPrinter.h | 44 +- lib/Target/Hexagon/MCTargetDesc/HexagonMCExpr.cpp | 2 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.h | 27 + lib/Target/Hexagon/RDFDeadCode.cpp | 2 +- lib/Target/Hexagon/RDFGraph.cpp | 2 +- lib/Target/Hexagon/RDFLiveness.cpp | 6 +- lib/Target/Lanai/LanaiInstrInfo.cpp | 9 +- lib/Target/Lanai/LanaiMemAluCombiner.cpp | 3 +- lib/Target/MSP430/MSP430ISelDAGToDAG.cpp | 5 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 161 +- lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 29 + lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp | 2 + lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 5 +- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 2 +- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 6 + lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 15 +- lib/Target/Mips/MicroMips32r6InstrInfo.td | 6 +- lib/Target/Mips/MicroMipsInstrFPU.td | 5 + lib/Target/Mips/MicroMipsInstrInfo.td | 49 +- lib/Target/Mips/MicroMipsSizeReduction.cpp | 115 +- lib/Target/Mips/Mips16InstrInfo.cpp | 6 +- lib/Target/Mips/Mips16InstrInfo.h | 11 +- lib/Target/Mips/Mips64InstrInfo.td | 5 +- lib/Target/Mips/Mips64r6InstrInfo.td | 3 + lib/Target/Mips/MipsBranchExpansion.cpp | 251 +- lib/Target/Mips/MipsCallLowering.cpp | 315 +- lib/Target/Mips/MipsCallLowering.h | 38 +- lib/Target/Mips/MipsDelaySlotFiller.cpp | 5 +- lib/Target/Mips/MipsFastISel.cpp | 5 + lib/Target/Mips/MipsISelLowering.cpp | 11 +- lib/Target/Mips/MipsInstrFPU.td | 40 +- lib/Target/Mips/MipsInstrInfo.cpp | 5 +- lib/Target/Mips/MipsInstructionSelector.cpp | 79 + lib/Target/Mips/MipsLegalizerInfo.cpp | 57 +- lib/Target/Mips/MipsLegalizerInfo.h | 3 + lib/Target/Mips/MipsMSAInstrInfo.td | 29 + lib/Target/Mips/MipsRegisterBankInfo.cpp | 15 + lib/Target/Mips/MipsRegisterInfo.h | 2 - lib/Target/Mips/MipsRegisterInfo.td | 28 + lib/Target/Mips/MipsSEFrameLowering.cpp | 17 +- lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 12 + lib/Target/Mips/MipsSEInstrInfo.cpp | 29 +- lib/Target/Mips/MipsSEInstrInfo.h | 10 +- lib/Target/Mips/MipsSubtarget.h | 10 +- lib/Target/Mips/MipsTargetMachine.cpp | 4 - lib/Target/Mips/TargetInfo/MipsTargetInfo.cpp | 9 +- lib/Target/NVPTX/NVPTX.td | 5 + lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 151 +- lib/Target/NVPTX/NVPTXInstrInfo.td | 42 +- lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 13 + .../PowerPC/Disassembler/PPCDisassembler.cpp | 2 +- lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp | 37 +- .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 39 +- lib/Target/PowerPC/P9InstrResources.td | 1 + lib/Target/PowerPC/PPCAsmPrinter.cpp | 54 +- lib/Target/PowerPC/PPCCallingConv.td | 2 +- lib/Target/PowerPC/PPCHazardRecognizers.cpp | 5 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 12 +- lib/Target/PowerPC/PPCISelLowering.cpp | 281 +- lib/Target/PowerPC/PPCISelLowering.h | 6 + lib/Target/PowerPC/PPCInstr64Bit.td | 5 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 404 +- lib/Target/PowerPC/PPCInstrInfo.h | 75 +- lib/Target/PowerPC/PPCInstrInfo.td | 6 + lib/Target/PowerPC/PPCInstrVSX.td | 110 +- lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 95 + lib/Target/PowerPC/PPCRegisterInfo.h | 19 +- lib/Target/PowerPC/PPCRegisterInfo.td | 8 +- lib/Target/PowerPC/PPCScheduleP7.td | 8 + lib/Target/PowerPC/PPCScheduleP8.td | 8 + lib/Target/PowerPC/PPCTargetMachine.cpp | 3 + lib/Target/RISCV/AsmParser/LLVMBuild.txt | 2 +- lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 487 +- lib/Target/RISCV/CMakeLists.txt | 3 + .../RISCV/Disassembler/RISCVDisassembler.cpp | 38 + lib/Target/RISCV/InstPrinter/LLVMBuild.txt | 2 +- lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp | 29 +- lib/Target/RISCV/InstPrinter/RISCVInstPrinter.h | 4 +- lib/Target/RISCV/LLVMBuild.txt | 4 +- lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h | 110 - .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 4 +- lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 1 - lib/Target/RISCV/RISCV.h | 6 +- lib/Target/RISCV/RISCV.td | 6 + lib/Target/RISCV/RISCVExpandPseudoInsts.cpp | 452 + lib/Target/RISCV/RISCVFrameLowering.cpp | 3 +- lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 63 +- lib/Target/RISCV/RISCVISelLowering.cpp | 229 +- lib/Target/RISCV/RISCVISelLowering.h | 16 +- lib/Target/RISCV/RISCVInstrInfo.cpp | 3 +- lib/Target/RISCV/RISCVInstrInfo.td | 134 +- lib/Target/RISCV/RISCVInstrInfoA.td | 144 +- lib/Target/RISCV/RISCVInstrInfoC.td | 8 +- lib/Target/RISCV/RISCVInstrInfoD.td | 19 +- lib/Target/RISCV/RISCVInstrInfoF.td | 21 +- lib/Target/RISCV/RISCVSystemOperands.td | 352 + lib/Target/RISCV/RISCVTargetMachine.cpp | 10 + lib/Target/RISCV/Utils/CMakeLists.txt | 3 + lib/Target/RISCV/Utils/LLVMBuild.txt | 24 + lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 9 + lib/Target/RISCV/Utils/RISCVBaseInfo.h | 157 + .../Sparc/Disassembler/SparcDisassembler.cpp | 4 +- lib/Target/Sparc/LeonFeatures.td | 4 + lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | 20 +- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp | 2 +- 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lib/Target/SystemZ/SystemZRegisterInfo.h | 2 - lib/Target/SystemZ/SystemZRegisterInfo.td | 7 +- lib/Target/SystemZ/SystemZSubtarget.cpp | 10 + lib/Target/SystemZ/SystemZSubtarget.h | 3 + lib/Target/SystemZ/SystemZTargetTransformInfo.cpp | 68 +- lib/Target/SystemZ/SystemZTargetTransformInfo.h | 2 + lib/Target/TargetLoweringObjectFile.cpp | 3 + lib/Target/TargetMachine.cpp | 16 +- .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 357 +- lib/Target/WebAssembly/CMakeLists.txt | 2 + .../Disassembler/WebAssemblyDisassembler.cpp | 47 +- .../InstPrinter/WebAssemblyInstPrinter.cpp | 101 +- .../InstPrinter/WebAssemblyInstPrinter.h | 3 +- .../MCTargetDesc/WebAssemblyAsmBackend.cpp | 14 +- .../MCTargetDesc/WebAssemblyFixupKinds.h | 6 +- .../MCTargetDesc/WebAssemblyMCCodeEmitter.cpp | 46 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.cpp | 25 +- .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 37 +- .../MCTargetDesc/WebAssemblyTargetStreamer.cpp | 47 +- .../MCTargetDesc/WebAssemblyTargetStreamer.h | 12 +- .../MCTargetDesc/WebAssemblyWasmObjectWriter.cpp | 5 +- lib/Target/WebAssembly/WebAssembly.h | 2 + .../WebAssemblyAddMissingPrototypes.cpp | 16 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 88 +- lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 9 +- lib/Target/WebAssembly/WebAssemblyCFGSort.cpp | 238 +- lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp | 688 +- .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 41 +- .../WebAssemblyEHRestoreStackPointer.cpp | 83 + .../WebAssembly/WebAssemblyExceptionInfo.cpp | 2 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 53 +- lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 184 +- .../WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | 66 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 86 +- lib/Target/WebAssembly/WebAssemblyFrameLowering.h | 29 +- lib/Target/WebAssembly/WebAssemblyISD.def | 1 + lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 306 +- lib/Target/WebAssembly/WebAssemblyISelLowering.h | 17 +- lib/Target/WebAssembly/WebAssemblyInstrAtomics.td | 60 +- lib/Target/WebAssembly/WebAssemblyInstrCall.td | 71 +- lib/Target/WebAssembly/WebAssemblyInstrControl.td | 38 +- lib/Target/WebAssembly/WebAssemblyInstrConv.td | 26 +- .../WebAssembly/WebAssemblyInstrExceptRef.td | 4 - lib/Target/WebAssembly/WebAssemblyInstrFloat.td | 43 +- lib/Target/WebAssembly/WebAssemblyInstrFormats.td | 110 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp | 15 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 30 +- lib/Target/WebAssembly/WebAssemblyInstrInteger.td | 39 +- lib/Target/WebAssembly/WebAssemblyInstrMemory.td | 34 +- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 780 +- .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 31 +- .../WebAssembly/WebAssemblyLowerBrUnless.cpp | 123 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 102 +- .../WebAssembly/WebAssemblyLowerGlobalDtors.cpp | 82 +- lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp | 123 +- lib/Target/WebAssembly/WebAssemblyMCInstLower.h | 4 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.cpp | 26 +- .../WebAssembly/WebAssemblyMachineFunctionInfo.h | 23 +- .../WebAssemblyOptimizeLiveIntervals.cpp | 10 +- lib/Target/WebAssembly/WebAssemblyPeephole.cpp | 10 + .../WebAssemblyPrepareForLiveIntervals.cpp | 5 +- lib/Target/WebAssembly/WebAssemblyRegColoring.cpp | 19 +- lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 149 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp | 2 +- lib/Target/WebAssembly/WebAssemblyRegisterInfo.td | 4 +- .../WebAssembly/WebAssemblyReplacePhysRegs.cpp | 6 +- .../WebAssemblyRuntimeLibcallSignatures.cpp | 23 +- .../WebAssemblyRuntimeLibcallSignatures.h | 17 +- .../WebAssembly/WebAssemblySetP2AlignOperands.cpp | 7 +- lib/Target/WebAssembly/WebAssemblyStoreResults.cpp | 12 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 6 +- lib/Target/WebAssembly/WebAssemblyUtilities.cpp | 111 +- lib/Target/X86/AsmParser/X86AsmParser.cpp | 31 +- lib/Target/X86/CMakeLists.txt | 1 + .../X86/Disassembler/X86DisassemblerDecoder.cpp | 51 +- lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 5 + lib/Target/X86/MCTargetDesc/X86MCExpr.h | 7 +- lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp | 441 +- lib/Target/X86/MCTargetDesc/X86TargetStreamer.h | 1 + .../X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp | 6 +- .../X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp | 55 +- lib/Target/X86/X86.h | 3 + lib/Target/X86/X86.td | 127 +- lib/Target/X86/X86AsmPrinter.cpp | 27 +- lib/Target/X86/X86CallingConv.td | 4 +- lib/Target/X86/X86CondBrFolding.cpp | 580 ++ lib/Target/X86/X86DomainReassignment.cpp | 21 + lib/Target/X86/X86FastISel.cpp | 16 +- lib/Target/X86/X86FixupBWInsts.cpp | 2 +- lib/Target/X86/X86FlagsCopyLowering.cpp | 19 +- lib/Target/X86/X86FrameLowering.cpp | 12 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 391 +- lib/Target/X86/X86ISelLowering.cpp | 3079 ++++--- lib/Target/X86/X86ISelLowering.h | 21 +- lib/Target/X86/X86Instr3DNow.td | 4 +- lib/Target/X86/X86InstrAVX512.td | 399 +- lib/Target/X86/X86InstrArithmetic.td | 156 +- lib/Target/X86/X86InstrCMovSetCC.td | 2 +- lib/Target/X86/X86InstrCompiler.td | 255 +- lib/Target/X86/X86InstrControl.td | 14 +- lib/Target/X86/X86InstrExtension.td | 20 + lib/Target/X86/X86InstrFMA.td | 38 +- lib/Target/X86/X86InstrFPStack.td | 3 + lib/Target/X86/X86InstrFragmentsSIMD.td | 63 +- lib/Target/X86/X86InstrInfo.cpp | 159 +- lib/Target/X86/X86InstrInfo.h | 15 +- lib/Target/X86/X86InstrInfo.td | 60 +- lib/Target/X86/X86InstrMMX.td | 10 +- lib/Target/X86/X86InstrSSE.td | 267 +- lib/Target/X86/X86InstrShiftRotate.td | 58 +- lib/Target/X86/X86InstrXOP.td | 38 +- lib/Target/X86/X86InstructionSelector.cpp | 333 +- lib/Target/X86/X86IntrinsicsInfo.h | 94 +- lib/Target/X86/X86LegalizerInfo.cpp | 26 +- lib/Target/X86/X86MCInstLower.cpp | 72 +- lib/Target/X86/X86MacroFusion.cpp | 24 +- lib/Target/X86/X86MacroFusion.h | 5 + lib/Target/X86/X86OptimizeLEAs.cpp | 8 +- lib/Target/X86/X86PfmCounters.td | 6 + lib/Target/X86/X86RegisterBankInfo.cpp | 27 +- lib/Target/X86/X86RegisterInfo.td | 10 + lib/Target/X86/X86RetpolineThunks.cpp | 4 +- lib/Target/X86/X86SchedBroadwell.td | 425 +- lib/Target/X86/X86SchedHaswell.td | 449 +- lib/Target/X86/X86SchedPredicates.td | 24 +- lib/Target/X86/X86SchedSandyBridge.td | 317 +- lib/Target/X86/X86SchedSkylakeClient.td | 458 +- lib/Target/X86/X86SchedSkylakeServer.td | 486 +- lib/Target/X86/X86Schedule.td | 421 +- lib/Target/X86/X86ScheduleAtom.td | 85 +- lib/Target/X86/X86ScheduleBtVer2.td | 212 +- lib/Target/X86/X86ScheduleSLM.td | 36 +- lib/Target/X86/X86ScheduleZnver1.td | 142 +- lib/Target/X86/X86SelectionDAGInfo.cpp | 12 +- lib/Target/X86/X86SpeculativeLoadHardening.cpp | 473 +- lib/Target/X86/X86Subtarget.cpp | 30 +- lib/Target/X86/X86Subtarget.h | 31 +- lib/Target/X86/X86TargetMachine.cpp | 15 +- lib/Target/X86/X86TargetTransformInfo.cpp | 1 + lib/Target/XCore/XCoreFrameLowering.cpp | 4 +- lib/Target/XCore/XCoreISelDAGToDAG.cpp | 5 +- lib/Target/XCore/XCoreLowerThreadLocal.cpp | 2 +- lib/Target/XCore/XCoreRegisterInfo.h | 2 - lib/Testing/Support/CMakeLists.txt | 1 + lib/Testing/Support/SupportHelpers.cpp | 53 + lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp | 3 +- lib/ToolDrivers/llvm-lib/LibDriver.cpp | 2 +- .../AggressiveInstCombine.cpp | 2 +- .../AggressiveInstCombineInternal.h | 5 + lib/Transforms/Coroutines/CoroElide.cpp | 2 +- lib/Transforms/Coroutines/CoroFrame.cpp | 5 +- lib/Transforms/Coroutines/CoroSplit.cpp | 2 +- lib/Transforms/Coroutines/Coroutines.cpp | 17 + lib/Transforms/IPO/CMakeLists.txt | 1 + lib/Transforms/IPO/CalledValuePropagation.cpp | 3 + lib/Transforms/IPO/ConstantMerge.cpp | 108 +- lib/Transforms/IPO/DeadArgumentElimination.cpp | 11 +- lib/Transforms/IPO/ForceFunctionAttrs.cpp | 1 + lib/Transforms/IPO/FunctionAttrs.cpp | 57 +- lib/Transforms/IPO/FunctionImport.cpp | 142 +- lib/Transforms/IPO/GlobalDCE.cpp | 2 +- lib/Transforms/IPO/GlobalOpt.cpp | 7 + lib/Transforms/IPO/HotColdSplitting.cpp | 468 ++ lib/Transforms/IPO/IPO.cpp | 1 + lib/Transforms/IPO/Inliner.cpp | 64 +- lib/Transforms/IPO/LowerTypeTests.cpp | 6 +- lib/Transforms/IPO/PassManagerBuilder.cpp | 21 +- lib/Transforms/IPO/PruneEH.cpp | 2 +- lib/Transforms/IPO/SCCP.cpp | 24 +- lib/Transforms/IPO/SampleProfile.cpp | 90 +- lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp | 2 +- lib/Transforms/IPO/WholeProgramDevirt.cpp | 86 +- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 314 +- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 436 +- lib/Transforms/InstCombine/InstCombineCalls.cpp | 248 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 31 +- lib/Transforms/InstCombine/InstCombineCompares.cpp | 269 +- lib/Transforms/InstCombine/InstCombineInternal.h | 44 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 52 +- .../InstCombine/InstCombineMulDivRem.cpp | 94 +- lib/Transforms/InstCombine/InstCombinePHI.cpp | 9 +- lib/Transforms/InstCombine/InstCombineSelect.cpp | 169 +- lib/Transforms/InstCombine/InstCombineShifts.cpp | 6 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 179 +- .../InstCombine/InstCombineVectorOps.cpp | 205 +- .../InstCombine/InstructionCombining.cpp | 142 +- .../Instrumentation/AddressSanitizer.cpp | 40 +- lib/Transforms/Instrumentation/CMakeLists.txt | 1 + .../Instrumentation/ControlHeightReduction.cpp | 2073 +++++ .../Instrumentation/DataFlowSanitizer.cpp | 15 +- lib/Transforms/Instrumentation/GCOVProfiling.cpp | 254 +- .../Instrumentation/HWAddressSanitizer.cpp | 210 +- .../Instrumentation/IndirectCallPromotion.cpp | 3 +- lib/Transforms/Instrumentation/InstrProfiling.cpp | 22 +- lib/Transforms/Instrumentation/Instrumentation.cpp | 1 + lib/Transforms/Instrumentation/MemorySanitizer.cpp | 538 +- .../Instrumentation/PGOInstrumentation.cpp | 23 +- .../Instrumentation/SanitizerCoverage.cpp | 75 +- lib/Transforms/Scalar/ADCE.cpp | 2 +- lib/Transforms/Scalar/CallSiteSplitting.cpp | 5 +- lib/Transforms/Scalar/ConstantHoisting.cpp | 246 +- lib/Transforms/Scalar/DCE.cpp | 8 + lib/Transforms/Scalar/DeadStoreElimination.cpp | 58 +- lib/Transforms/Scalar/EarlyCSE.cpp | 6 +- lib/Transforms/Scalar/GVN.cpp | 85 +- lib/Transforms/Scalar/GVNHoist.cpp | 21 +- lib/Transforms/Scalar/GVNSink.cpp | 6 +- lib/Transforms/Scalar/GuardWidening.cpp | 89 +- lib/Transforms/Scalar/IndVarSimplify.cpp | 334 +- lib/Transforms/Scalar/JumpThreading.cpp | 14 +- lib/Transforms/Scalar/LICM.cpp | 256 +- lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 29 +- lib/Transforms/Scalar/LoopInstSimplify.cpp | 44 +- lib/Transforms/Scalar/LoopInterchange.cpp | 187 +- lib/Transforms/Scalar/LoopPassManager.cpp | 10 + lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 30 +- lib/Transforms/Scalar/LoopSink.cpp | 16 +- lib/Transforms/Scalar/LoopStrengthReduce.cpp | 6 +- lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 119 +- lib/Transforms/Scalar/LoopUnrollPass.cpp | 2 +- lib/Transforms/Scalar/LoopUnswitch.cpp | 78 +- lib/Transforms/Scalar/LowerGuardIntrinsic.cpp | 57 +- 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lib/Transforms/Utils/CloneFunction.cpp | 29 +- lib/Transforms/Utils/CloneModule.cpp | 9 +- lib/Transforms/Utils/CodeExtractor.cpp | 18 +- lib/Transforms/Utils/DemoteRegToStack.cpp | 2 +- lib/Transforms/Utils/Evaluator.cpp | 2 +- lib/Transforms/Utils/GuardUtils.cpp | 64 + .../Utils/ImplicitControlFlowTracking.cpp | 91 - .../Utils/ImportedFunctionsInliningStatistics.cpp | 23 +- lib/Transforms/Utils/Local.cpp | 96 +- lib/Transforms/Utils/LoopRotationUtils.cpp | 5 +- lib/Transforms/Utils/LoopSimplify.cpp | 4 +- lib/Transforms/Utils/LoopUnroll.cpp | 3 +- lib/Transforms/Utils/LoopUnrollAndJam.cpp | 19 +- lib/Transforms/Utils/LoopUnrollPeel.cpp | 6 +- lib/Transforms/Utils/LoopUnrollRuntime.cpp | 36 +- lib/Transforms/Utils/LoopUtils.cpp | 1176 +-- lib/Transforms/Utils/LowerSwitch.cpp | 2 +- lib/Transforms/Utils/OrderedInstructions.cpp | 51 - lib/Transforms/Utils/PredicateInfo.cpp | 3 +- lib/Transforms/Utils/PromoteMemoryToRegister.cpp | 13 +- lib/Transforms/Utils/SimplifyCFG.cpp | 176 +- lib/Transforms/Utils/SimplifyIndVar.cpp | 11 +- lib/Transforms/Utils/SimplifyLibCalls.cpp | 425 +- lib/Transforms/Utils/SplitModule.cpp | 14 +- lib/Transforms/Vectorize/LoadStoreVectorizer.cpp | 60 +- .../Vectorize/LoopVectorizationLegality.cpp | 88 +- lib/Transforms/Vectorize/LoopVectorize.cpp | 1218 +-- lib/Transforms/Vectorize/SLPVectorizer.cpp | 10 +- lib/Transforms/Vectorize/VPlan.cpp | 87 +- lib/Transforms/Vectorize/VPlan.h | 14 + lib/Transforms/Vectorize/VPlanHCFGTransforms.cpp | 12 + lib/Transforms/Vectorize/VPlanValue.h | 3 + lib/XRay/BlockIndexer.cpp | 88 + lib/XRay/BlockPrinter.cpp | 96 + lib/XRay/BlockVerifier.cpp | 187 + lib/XRay/CMakeLists.txt | 12 + lib/XRay/FDRRecordProducer.cpp | 114 + lib/XRay/FDRRecords.cpp | 31 + lib/XRay/FDRTraceExpander.cpp | 92 + lib/XRay/FDRTraceWriter.cpp | 133 + lib/XRay/FileHeaderReader.cpp | 75 + lib/XRay/InstrumentationMap.cpp | 8 +- lib/XRay/LLVMBuild.txt | 23 + lib/XRay/LogBuilderConsumer.cpp | 38 + lib/XRay/Profile.cpp | 397 + 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test/CodeGen/SystemZ/subregliveness-07.mir | 78 + test/CodeGen/Thumb/bic_imm.ll | 67 +- test/CodeGen/Thumb/consthoist-few-dependents.ll | 191 + test/CodeGen/Thumb/consthoist-imm8-costs-1.ll | 39 + test/CodeGen/Thumb/frame-access.ll | 7 +- test/CodeGen/Thumb/shift-and.ll | 24 +- .../Thumb/umulo-128-legalisation-lowering.ll | 183 + .../Thumb2/2010-01-06-TailDuplicateLabels.ll | 2 +- test/CodeGen/Thumb2/float-intrinsics-float.ll | 5 +- .../Thumb2/umulo-128-legalisation-lowering.ll | 122 + .../Thumb2/umulo-64-legalisation-lowering.ll | 49 + test/CodeGen/WebAssembly/address-offsets.ll | 2 +- test/CodeGen/WebAssembly/atomic-mem-consistency.ll | 2 +- test/CodeGen/WebAssembly/atomic-rmw.ll | 4 +- test/CodeGen/WebAssembly/byval.ll | 4 +- test/CodeGen/WebAssembly/call.ll | 58 +- test/CodeGen/WebAssembly/cfg-stackify-dbg-skip.ll | 48 + test/CodeGen/WebAssembly/cfg-stackify-eh.ll | 263 + test/CodeGen/WebAssembly/cfg-stackify-eh.mir | 322 + test/CodeGen/WebAssembly/cfg-stackify.ll | 4 +- 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| 2 +- test/CodeGen/WebAssembly/fast-isel-noreg.ll | 4 +- test/CodeGen/WebAssembly/fast-isel.ll | 2 +- test/CodeGen/WebAssembly/frem.ll | 2 +- test/CodeGen/WebAssembly/func.ll | 2 +- .../WebAssembly/function-bitcasts-varargs.ll | 2 +- test/CodeGen/WebAssembly/function-bitcasts.ll | 45 +- test/CodeGen/WebAssembly/global.ll | 2 +- test/CodeGen/WebAssembly/i128.ll | 2 +- .../WebAssembly/i32-load-store-alignment.ll | 2 +- test/CodeGen/WebAssembly/i32.ll | 2 +- .../WebAssembly/i64-load-store-alignment.ll | 2 +- test/CodeGen/WebAssembly/i64.ll | 2 +- test/CodeGen/WebAssembly/ident.ll | 2 +- test/CodeGen/WebAssembly/immediates.ll | 2 +- test/CodeGen/WebAssembly/implicit-def.ll | 2 +- test/CodeGen/WebAssembly/import-module.ll | 2 +- test/CodeGen/WebAssembly/indirect-import.ll | 4 +- test/CodeGen/WebAssembly/inline-asm-m.ll | 2 +- test/CodeGen/WebAssembly/inline-asm.ll | 11 +- test/CodeGen/WebAssembly/irreducible-cfg.ll | 2 +- test/CodeGen/WebAssembly/legalize.ll | 2 +- test/CodeGen/WebAssembly/libcalls.ll | 2 +- test/CodeGen/WebAssembly/load-ext-atomic.ll | 2 +- test/CodeGen/WebAssembly/load-ext.ll | 2 +- test/CodeGen/WebAssembly/load-store-i1.ll | 2 +- test/CodeGen/WebAssembly/load.ll | 4 +- .../CodeGen/WebAssembly/lower-em-ehsjlj-options.ll | 6 +- test/CodeGen/WebAssembly/lower-em-exceptions.ll | 27 +- test/CodeGen/WebAssembly/lower-em-sjlj.ll | 6 +- test/CodeGen/WebAssembly/lower-global-dtors.ll | 2 +- .../WebAssembly/{main.ll => main-no-args.ll} | 0 test/CodeGen/WebAssembly/main-with-args.ll | 16 + test/CodeGen/WebAssembly/mem-intrinsics.ll | 2 +- test/CodeGen/WebAssembly/memory-addr32.ll | 2 +- test/CodeGen/WebAssembly/muloti4.ll | 2 +- test/CodeGen/WebAssembly/negative-base-reg.ll | 2 +- test/CodeGen/WebAssembly/offset-atomics.ll | 52 +- test/CodeGen/WebAssembly/offset-fastisel.ll | 2 +- test/CodeGen/WebAssembly/offset-folding.ll | 2 +- test/CodeGen/WebAssembly/offset.ll | 2 +- test/CodeGen/WebAssembly/phi.ll | 2 +- test/CodeGen/WebAssembly/reg-stackify.ll | 198 +- test/CodeGen/WebAssembly/return-int32.ll | 6 +- test/CodeGen/WebAssembly/returned.ll | 2 +- test/CodeGen/WebAssembly/select.ll | 4 +- test/CodeGen/WebAssembly/signext-arg.ll | 2 +- test/CodeGen/WebAssembly/signext-inreg.ll | 4 +- test/CodeGen/WebAssembly/signext-zeroext.ll | 2 +- test/CodeGen/WebAssembly/simd-arith.ll | 887 +- test/CodeGen/WebAssembly/simd-bitcasts.ll | 324 + test/CodeGen/WebAssembly/simd-comparisons.ll | 644 ++ test/CodeGen/WebAssembly/simd-conversions.ll | 100 + test/CodeGen/WebAssembly/simd-intrinsics.ll | 345 + test/CodeGen/WebAssembly/simd-offset.ll | 1216 +++ test/CodeGen/WebAssembly/simd.ll | 596 ++ test/CodeGen/WebAssembly/stack-alignment.ll | 2 +- test/CodeGen/WebAssembly/store-trunc-atomic.ll | 2 +- test/CodeGen/WebAssembly/store-trunc.ll | 2 +- test/CodeGen/WebAssembly/store.ll | 4 +- test/CodeGen/WebAssembly/switch.ll | 2 +- test/CodeGen/WebAssembly/tls.ll | 2 +- .../WebAssembly/umulo-128-legalisation-lowering.ll | 94 + test/CodeGen/WebAssembly/umulo-i64.ll | 2 +- .../WebAssembly/unsupported-function-bitcasts.ll | 42 +- test/CodeGen/WebAssembly/unused-argument.ll | 2 +- test/CodeGen/WebAssembly/userstack.ll | 2 +- test/CodeGen/WebAssembly/varargs.ll | 2 +- test/CodeGen/WebAssembly/vtable.ll | 6 +- test/CodeGen/WinCFGuard/cfguard.ll | 4 +- test/CodeGen/X86/2006-11-17-IllegalMove.ll | 6 +- test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll | 3 +- test/CodeGen/X86/2011-20-21-zext-ui2fp.ll | 2 +- test/CodeGen/X86/2012-01-12-extract-sv.ll | 3 +- test/CodeGen/X86/GlobalISel/add-ext.ll | 228 + test/CodeGen/X86/GlobalISel/add-scalar.ll | 3 +- test/CodeGen/X86/GlobalISel/and-scalar.ll | 10 +- test/CodeGen/X86/GlobalISel/ashr-scalar.ll | 73 +- test/CodeGen/X86/GlobalISel/binop.ll | 4 +- test/CodeGen/X86/GlobalISel/callingconv.ll | 6 +- .../X86/GlobalISel/calllowering-nocrashret.ll | 13 + test/CodeGen/X86/GlobalISel/ext-x86-64.ll | 19 +- test/CodeGen/X86/GlobalISel/ext.ll | 20 +- test/CodeGen/X86/GlobalISel/legalize-ext.mir | 24 +- .../X86/GlobalISel/legalize-fptrunc-scalar.mir | 39 + test/CodeGen/X86/GlobalISel/legalize-undef.mir | 36 +- test/CodeGen/X86/GlobalISel/lshr-scalar.ll | 69 +- test/CodeGen/X86/GlobalISel/memop-scalar.ll | 18 +- test/CodeGen/X86/GlobalISel/mul-scalar.ll | 31 +- test/CodeGen/X86/GlobalISel/or-scalar.ll | 10 +- test/CodeGen/X86/GlobalISel/phi.ll | 62 +- test/CodeGen/X86/GlobalISel/ptrtoint.ll | 12 +- .../X86/GlobalISel/regbankselect-X86_64.mir | 1836 ++++ .../X86/GlobalISel/select-fptrunc-scalar.mir | 41 + test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll | 37 +- test/CodeGen/X86/GlobalISel/shl-scalar.ll | 65 +- test/CodeGen/X86/GlobalISel/sub-scalar.ll | 10 +- test/CodeGen/X86/GlobalISel/trunc.ll | 12 +- test/CodeGen/X86/GlobalISel/undef.ll | 3 +- test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir | 211 + test/CodeGen/X86/GlobalISel/x86-legalize-udiv.mir | 195 + test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir | 211 + test/CodeGen/X86/GlobalISel/x86-select-srem.mir | 213 + test/CodeGen/X86/GlobalISel/x86-select-trap.mir | 28 + test/CodeGen/X86/GlobalISel/x86-select-udiv.mir | 215 + test/CodeGen/X86/GlobalISel/x86-select-urem.mir | 215 + test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll | 181 + .../X86/GlobalISel/x86_64-legalize-fcmp.mir | 1126 +++ .../X86/GlobalISel/x86_64-legalize-fptosi.mir | 266 + .../X86/GlobalISel/x86_64-legalize-srem.mir | 253 + .../X86/GlobalISel/x86_64-legalize-udiv.mir | 253 + .../X86/GlobalISel/x86_64-legalize-urem.mir | 253 + test/CodeGen/X86/GlobalISel/x86_64-select-fcmp.mir | 1218 +++ .../X86/GlobalISel/x86_64-select-fptosi.mir | 290 + test/CodeGen/X86/GlobalISel/x86_64-select-srem.mir | 264 + test/CodeGen/X86/GlobalISel/x86_64-select-udiv.mir | 267 + test/CodeGen/X86/GlobalISel/x86_64-select-urem.mir | 267 + test/CodeGen/X86/GlobalISel/xor-scalar.ll | 10 +- test/CodeGen/X86/MergeConsecutiveStores.ll | 72 + test/CodeGen/X86/O0-pipeline.ll | 1 + test/CodeGen/X86/O3-pipeline.ll | 4 + test/CodeGen/X86/abi-isel.ll | 10 +- test/CodeGen/X86/add.ll | 87 +- test/CodeGen/X86/addcarry.ll | 96 +- test/CodeGen/X86/addrsig.ll | 18 + test/CodeGen/X86/adx-commute.mir | 234 + test/CodeGen/X86/adx-intrinsics-upgrade.ll | 122 + test/CodeGen/X86/adx-intrinsics.ll | 230 +- test/CodeGen/X86/aes-schedule.ll | 36 +- test/CodeGen/X86/and-encoding.ll | 18 +- test/CodeGen/X86/andimm8.ll | 11 +- test/CodeGen/X86/anyext.ll | 3 +- test/CodeGen/X86/apm.ll | 4 +- test/CodeGen/X86/atomic-eflags-reuse.ll | 48 +- test/CodeGen/X86/atomic-minmax-i6432.ll | 4 +- test/CodeGen/X86/atomic128.ll | 3 +- test/CodeGen/X86/atomic32.ll | 2 +- test/CodeGen/X86/atomic_mi.ll | 6 +- test/CodeGen/X86/avg.ll | 152 +- test/CodeGen/X86/avoid-sfb.ll | 76 +- test/CodeGen/X86/avx-basic.ll | 5 +- test/CodeGen/X86/avx-intel-ocl.ll | 2 +- test/CodeGen/X86/avx-logic.ll | 108 + test/CodeGen/X86/avx-schedule.ll | 158 +- test/CodeGen/X86/avx-vbroadcast.ll | 4 +- test/CodeGen/X86/avx-vbroadcastf128.ll | 25 + test/CodeGen/X86/avx-vinsertf128.ll | 9 +- test/CodeGen/X86/avx2-intrinsics-canonical.ll | 167 + test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 46 +- test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll | 104 + test/CodeGen/X86/avx2-intrinsics-x86.ll | 158 +- test/CodeGen/X86/avx2-masked-gather.ll | 358 +- test/CodeGen/X86/avx512-arith.ll | 4 +- test/CodeGen/X86/avx512-calling-conv.ll | 4 +- test/CodeGen/X86/avx512-cvt.ll | 1181 +++ test/CodeGen/X86/avx512-ext.ll | 649 +- test/CodeGen/X86/avx512-insert-extract.ll | 32 +- test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 52 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 76 +- test/CodeGen/X86/avx512-mask-op.ll | 15 +- test/CodeGen/X86/avx512-regcall-Mask.ll | 160 +- test/CodeGen/X86/avx512-regcall-NoMask.ll | 63 +- test/CodeGen/X86/avx512-schedule.ll | 90 +- test/CodeGen/X86/avx512-select.ll | 6 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 22 +- test/CodeGen/X86/avx512-skx-insert-subvec.ll | 5 +- test/CodeGen/X86/avx512bw-intrinsics-canonical.ll | 308 + test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll | 792 ++ test/CodeGen/X86/avx512bw-intrinsics.ll | 401 +- test/CodeGen/X86/avx512bw-mask-op.ll | 20 +- .../CodeGen/X86/avx512bwvl-intrinsics-canonical.ll | 669 ++ test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll | 1601 ++++ test/CodeGen/X86/avx512bwvl-intrinsics.ll | 1412 +--- test/CodeGen/X86/avx512dq-intrinsics.ll | 112 + test/CodeGen/X86/avx512dq-mask-op.ll | 12 +- test/CodeGen/X86/avx512vl-arith.ll | 8 +- test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 36 +- test/CodeGen/X86/bigstructret.ll | 14 +- test/CodeGen/X86/bitcast-and-setcc-128.ll | 48 +- test/CodeGen/X86/bitcast-and-setcc-256.ll | 2 +- test/CodeGen/X86/bitcast-i256.ll | 4 +- test/CodeGen/X86/bitcast-int-to-vector-bool.ll | 6 +- test/CodeGen/X86/bitcast-setcc-128.ll | 28 +- test/CodeGen/X86/bitcast-setcc-256.ll | 2 +- test/CodeGen/X86/bitreverse.ll | 57 +- .../CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll | 22 +- test/CodeGen/X86/bmi-intrinsics-fast-isel.ll | 86 +- test/CodeGen/X86/bmi-schedule.ll | 24 +- test/CodeGen/X86/bmi-x86_64.ll | 64 +- test/CodeGen/X86/bmi.ll | 89 +- test/CodeGen/X86/bmi2-schedule.ll | 8 +- test/CodeGen/X86/bmi2.ll | 28 +- test/CodeGen/X86/bool-math.ll | 33 +- test/CodeGen/X86/bool-simplify.ll | 4 +- test/CodeGen/X86/bool-vector.ll | 4 - test/CodeGen/X86/br-fold.ll | 3 +- test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll | 64 +- test/CodeGen/X86/bswap-rotate.ll | 3 +- test/CodeGen/X86/bswap-wide-int.ll | 16 +- test/CodeGen/X86/bswap.ll | 15 +- test/CodeGen/X86/bswap_tree.ll | 8 +- test/CodeGen/X86/bswap_tree2.ll | 18 +- test/CodeGen/X86/bt.ll | 12 +- test/CodeGen/X86/btc_bts_btr.ll | 79 +- test/CodeGen/X86/buildvec-insertvec.ll | 2 +- test/CodeGen/X86/bypass-slow-division-64.ll | 27 +- test/CodeGen/X86/cfi-inserter-noreturnblock.mir | 30 + test/CodeGen/X86/clear-highbits.ll | 56 +- test/CodeGen/X86/clear-lowbits.ll | 242 +- test/CodeGen/X86/cmov-into-branch.ll | 31 +- test/CodeGen/X86/cmov.ll | 11 +- test/CodeGen/X86/cmovcmov.ll | 18 +- test/CodeGen/X86/cmp.ll | 8 +- test/CodeGen/X86/cmpxchg-clobber-flags.ll | 4 +- test/CodeGen/X86/cmpxchg-i128-i1.ll | 22 +- .../X86/coalesce-dbg-value-subreg-rewrite.mir | 51 + test/CodeGen/X86/coalesce-dead-lanes.mir | 19 + test/CodeGen/X86/code-model-kernel.ll | 79 + test/CodeGen/X86/combine-add.ll | 12 +- test/CodeGen/X86/combine-fabs.ll | 4 +- test/CodeGen/X86/combine-fcopysign.ll | 28 +- test/CodeGen/X86/combine-pmuldq.ll | 48 +- test/CodeGen/X86/combine-rotates.ll | 15 +- test/CodeGen/X86/combine-sdiv.ll | 3119 +++++-- test/CodeGen/X86/combine-shl.ll | 112 +- test/CodeGen/X86/combine-sra.ll | 13 +- test/CodeGen/X86/combine-srem.ll | 200 +- test/CodeGen/X86/combine-udiv.ll | 1196 ++- test/CodeGen/X86/combine-urem.ll | 186 +- test/CodeGen/X86/complex-fastmath.ll | 16 +- test/CodeGen/X86/condbr_if.ll | 178 + test/CodeGen/X86/condbr_switch.ll | 167 + test/CodeGen/X86/conditional-indecrement.ll | 36 +- test/CodeGen/X86/conditional-tailcall-samedest.mir | 2 +- test/CodeGen/X86/cpus-amd.ll | 32 + test/CodeGen/X86/cpus-intel.ll | 52 + test/CodeGen/X86/cpus-no-x86_64.ll | 37 + test/CodeGen/X86/cpus-other.ll | 21 + test/CodeGen/X86/cpus.ll | 100 - test/CodeGen/X86/ctor-priority-coff.ll | 59 + test/CodeGen/X86/cvtv2f32.ll | 8 +- test/CodeGen/X86/dagcombine-cse.ll | 8 +- test/CodeGen/X86/dagcombine-select.ll | 21 +- test/CodeGen/X86/dbg-value-superreg-copy.mir | 67 + test/CodeGen/X86/debuginfo-locations-dce.ll | 71 + test/CodeGen/X86/divide-by-constant.ll | 173 +- test/CodeGen/X86/divrem.ll | 33 +- test/CodeGen/X86/divrem8_ext.ll | 6 +- test/CodeGen/X86/early-ifcvt-crash.ll | 2 +- test/CodeGen/X86/eip-addressing-i386.ll | 4 +- test/CodeGen/X86/expand-post-ra-pseudo.mir | 11 + test/CodeGen/X86/extract-bits.ll | 6164 ++++++++++++++ test/CodeGen/X86/extract-lowbits.ll | 1218 ++- test/CodeGen/X86/extractelement-load.ll | 32 +- test/CodeGen/X86/fadd-combines.ll | 8 + test/CodeGen/X86/fast-isel-fold-mem.ll | 2 +- test/CodeGen/X86/fast-isel-select-cmov.ll | 16 +- test/CodeGen/X86/fast-isel-select-cmov2.ll | 188 +- test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll | 11 +- test/CodeGen/X86/fast-isel-sext-zext.ll | 8 +- test/CodeGen/X86/fast-isel-shift.ll | 112 +- test/CodeGen/X86/fast-isel-store.ll | 5 +- test/CodeGen/X86/fixup-bw-copy.ll | 28 +- test/CodeGen/X86/flags-copy-lowering.mir | 22 +- test/CodeGen/X86/fma-intrinsics-fast-isel.ll | 8 +- test/CodeGen/X86/fma.ll | 19 +- test/CodeGen/X86/fma_patterns.ll | 290 +- test/CodeGen/X86/fma_patterns_wide.ll | 270 +- test/CodeGen/X86/fmul-combines.ll | 57 +- test/CodeGen/X86/fmul-zero.ll | 9 - test/CodeGen/X86/fold-vector-sext-crash2.ll | 8 +- test/CodeGen/X86/fold-vector-trunc-sitofp.ll | 8 +- test/CodeGen/X86/fp-fold.ll | 72 +- test/CodeGen/X86/fp-intrinsics.ll | 17 +- test/CodeGen/X86/fp-logic.ll | 141 + test/CodeGen/X86/fp128-cast.ll | 956 ++- test/CodeGen/X86/fp128-i128.ll | 28 +- test/CodeGen/X86/ftrunc.ll | 53 +- test/CodeGen/X86/funnel-shift-rot.ll | 26 +- test/CodeGen/X86/funnel-shift.ll | 24 +- test/CodeGen/X86/getelementptr.ll | 11 + test/CodeGen/X86/ghc-cc64.ll | 4 +- test/CodeGen/X86/haddsub-2.ll | 12 +- test/CodeGen/X86/haddsub-3.ll | 4 +- test/CodeGen/X86/haddsub-undef.ll | 159 +- test/CodeGen/X86/hipe-cc64.ll | 3 +- test/CodeGen/X86/horizontal-reduce-smax.ll | 18 +- test/CodeGen/X86/horizontal-reduce-smin.ll | 18 +- test/CodeGen/X86/horizontal-reduce-umax.ll | 38 +- test/CodeGen/X86/horizontal-reduce-umin.ll | 38 +- test/CodeGen/X86/i128-mul.ll | 12 +- test/CodeGen/X86/i386-shrink-wrapping.ll | 2 +- test/CodeGen/X86/i64-to-float.ll | 2 +- test/CodeGen/X86/iabs.ll | 9 +- test/CodeGen/X86/imul.ll | 34 +- test/CodeGen/X86/insert-into-constant-vector.ll | 24 +- test/CodeGen/X86/insert-loaded-scalar.ll | 443 + test/CodeGen/X86/insertelement-ones.ll | 48 +- test/CodeGen/X86/insertelement-var-index.ll | 615 ++ test/CodeGen/X86/insertps-combine.ll | 17 + test/CodeGen/X86/instr-symbols.mir | 74 + test/CodeGen/X86/intersect-fma-fmf.ll | 13 + test/CodeGen/X86/known-bits.ll | 81 +- test/CodeGen/X86/known-signbits-vector.ll | 27 +- test/CodeGen/X86/kshift.ll | 725 ++ .../CodeGen/X86/lack-of-signed-truncation-check.ll | 126 +- test/CodeGen/X86/lea-opt.ll | 33 +- test/CodeGen/X86/legalize-shift-64.ll | 7 +- test/CodeGen/X86/legalize-shl-vec.ll | 60 +- test/CodeGen/X86/licm-nested.ll | 2 +- test/CodeGen/X86/load-scalar-as-vector.ll | 871 ++ test/CodeGen/X86/lower-vec-shift-2.ll | 12 +- test/CodeGen/X86/lsr-loop-exit-cond.ll | 246 +- test/CodeGen/X86/lwp-intrinsics.ll | 20 +- test/CodeGen/X86/machine-combiner-int.ll | 57 +- test/CodeGen/X86/machine-cp.ll | 64 +- test/CodeGen/X86/machine-cse.ll | 10 +- test/CodeGen/X86/madd.ll | 104 +- test/CodeGen/X86/mask-negated-bool.ll | 4 +- test/CodeGen/X86/masked_gather_scatter.ll | 189 +- test/CodeGen/X86/masked_gather_scatter_widen.ll | 476 ++ test/CodeGen/X86/masked_memop.ll | 145 +- .../X86/merge-vector-stores-scale-idx-crash.ll | 49 + test/CodeGen/X86/mingw-refptr.ll | 94 + test/CodeGen/X86/misched-matmul.ll | 2 +- test/CodeGen/X86/mmx-arith.ll | 36 +- test/CodeGen/X86/mmx-coalescing.ll | 38 +- test/CodeGen/X86/mmx-schedule.ll | 4 +- test/CodeGen/X86/movmsk-cmp.ll | 3976 +++++++++ .../CodeGen/X86/ms-inline-asm-redundant-clobber.ll | 24 + test/CodeGen/X86/mul-constant-i16.ll | 7 +- test/CodeGen/X86/mul-constant-i32.ll | 38 +- test/CodeGen/X86/mul-constant-i64.ll | 28 +- test/CodeGen/X86/mul-i1024.ll | 1443 ++-- test/CodeGen/X86/mul-i256.ll | 226 +- test/CodeGen/X86/mul-i512.ll | 1481 ++-- test/CodeGen/X86/mul128.ll | 6 +- test/CodeGen/X86/mul64.ll | 2 +- test/CodeGen/X86/muloti.ll | 44 - test/CodeGen/X86/mulvi32.ll | 36 +- test/CodeGen/X86/musttail-varargs.ll | 4 +- test/CodeGen/X86/mwaitx-schedule.ll | 18 +- test/CodeGen/X86/mwaitx.ll | 17 +- test/CodeGen/X86/negate-i1.ll | 29 +- test/CodeGen/X86/negate-shift.ll | 4 +- test/CodeGen/X86/negate.ll | 3 +- test/CodeGen/X86/no-sse2-avg.ll | 2 +- test/CodeGen/X86/not-and-simplify.ll | 11 +- test/CodeGen/X86/oddshuffles.ll | 320 +- test/CodeGen/X86/packss.ll | 179 + test/CodeGen/X86/paddus.ll | 1773 ++++ test/CodeGen/X86/palignr.ll | 9 +- test/CodeGen/X86/peep-setb.ll | 39 +- test/CodeGen/X86/phaddsub.ll | 190 + test/CodeGen/X86/physreg-pairs-error.ll | 12 + test/CodeGen/X86/physreg-pairs.ll | 165 + test/CodeGen/X86/pku.ll | 2 +- test/CodeGen/X86/pmaddubsw.ll | 70 +- test/CodeGen/X86/pmul.ll | 149 +- test/CodeGen/X86/pmulh.ll | 4 +- test/CodeGen/X86/pow.ll | 230 + test/CodeGen/X86/pr11334.ll | 2 +- test/CodeGen/X86/pr11985.ll | 2 +- test/CodeGen/X86/pr12360.ll | 3 +- test/CodeGen/X86/pr13577.ll | 1 - test/CodeGen/X86/pr15705.ll | 6 +- test/CodeGen/X86/pr15981.ll | 4 +- test/CodeGen/X86/pr23664.ll | 7 +- test/CodeGen/X86/pr2656.ll | 2 +- test/CodeGen/X86/pr28173.ll | 3 +- test/CodeGen/X86/pr29112.ll | 86 +- test/CodeGen/X86/pr32108.ll | 1 - test/CodeGen/X86/pr32282.ll | 3 +- test/CodeGen/X86/pr32284.ll | 21 +- test/CodeGen/X86/pr34080.ll | 2 +- test/CodeGen/X86/pr34592.ll | 66 +- test/CodeGen/X86/pr34653.ll | 204 +- test/CodeGen/X86/pr34657.ll | 6 +- test/CodeGen/X86/pr35443.ll | 3 +- test/CodeGen/X86/pr35918.ll | 26 +- test/CodeGen/X86/pr38533.ll | 59 + test/CodeGen/X86/pr38539.ll | 315 + test/CodeGen/X86/pr38639.ll | 17 + test/CodeGen/X86/pr38738.ll | 254 + test/CodeGen/X86/pr38763.ll | 103 + test/CodeGen/X86/pr38771.ll | 24 + test/CodeGen/X86/pr38795.ll | 265 + test/CodeGen/X86/pr38803.ll | 48 + test/CodeGen/X86/pr38819.ll | 26 + test/CodeGen/X86/pr38865-2.ll | 23 + test/CodeGen/X86/pr38865-3.ll | 18 + test/CodeGen/X86/pr38865.ll | 47 + test/CodeGen/X86/prefer-avx256-mask-shuffle.ll | 9 +- test/CodeGen/X86/prefer-avx256-wide-mul.ll | 5 +- test/CodeGen/X86/promote-i16.ll | 6 +- test/CodeGen/X86/psubus.ll | 362 +- test/CodeGen/X86/ptest.ll | 56 +- test/CodeGen/X86/rdtsc-upgrade.ll | 31 + test/CodeGen/X86/rdtsc.ll | 12 +- test/CodeGen/X86/recip-fastmath.ll | 86 +- test/CodeGen/X86/recip-fastmath2.ll | 96 +- test/CodeGen/X86/reduce-trunc-shl.ll | 4 +- test/CodeGen/X86/retpoline-external.ll | 2 +- test/CodeGen/X86/retpoline-regparm.ll | 4 +- test/CodeGen/X86/retpoline.ll | 162 +- test/CodeGen/X86/rot16.ll | 28 +- test/CodeGen/X86/rot64.ll | 32 +- test/CodeGen/X86/rotate.ll | 69 +- test/CodeGen/X86/rotate2.ll | 7 +- test/CodeGen/X86/rotate4.ll | 61 +- test/CodeGen/X86/rtm-schedule.ll | 12 +- test/CodeGen/X86/sad.ll | 205 + test/CodeGen/X86/sar_fold64.ll | 5 +- test/CodeGen/X86/sat-add.ll | 939 +++ test/CodeGen/X86/scalar-int-to-fp.ll | 6 +- test/CodeGen/X86/scalar_widen_div.ll | 36 +- test/CodeGen/X86/schedule-x86-64-shld.ll | 134 +- test/CodeGen/X86/schedule-x86_32.ll | 18 +- test/CodeGen/X86/schedule-x86_64.ll | 346 +- test/CodeGen/X86/sdiv-exact.ll | 121 +- test/CodeGen/X86/select-mmx.ll | 4 +- test/CodeGen/X86/select.ll | 611 +- test/CodeGen/X86/select_const.ll | 27 +- test/CodeGen/X86/selectcc-to-shiftand.ll | 36 +- test/CodeGen/X86/setcc-logic.ll | 10 +- test/CodeGen/X86/setcc-wide-types.ll | 464 +- test/CodeGen/X86/setcc.ll | 4 +- test/CodeGen/X86/sext-i1.ll | 2 +- test/CodeGen/X86/shift-and.ll | 28 +- test/CodeGen/X86/shift-bmi2.ll | 177 +- test/CodeGen/X86/shift-double-x86_64.ll | 39 +- test/CodeGen/X86/shift-double.ll | 63 +- test/CodeGen/X86/shift-pair.ll | 4 +- test/CodeGen/X86/shrink_vmul.ll | 594 +- test/CodeGen/X86/shuffle-of-insert.ll | 48 +- test/CodeGen/X86/sibcall.ll | 634 +- test/CodeGen/X86/signbit-shift.ll | 12 +- test/CodeGen/X86/signed-truncation-check.ll | 124 +- test/CodeGen/X86/sjlj-shadow-stack-liveness.mir | 35 + .../X86/speculative-load-hardening-call-and-ret.ll | 485 ++ .../X86/speculative-load-hardening-gather.ll | 8 +- .../X86/speculative-load-hardening-indirect.ll | 489 +- test/CodeGen/X86/speculative-load-hardening.ll | 211 +- test/CodeGen/X86/sqrt-fastmath.ll | 30 +- test/CodeGen/X86/sret-implicit.ll | 4 +- test/CodeGen/X86/sse-schedule.ll | 150 +- test/CodeGen/X86/sse1.ll | 36 +- test/CodeGen/X86/sse2-intrinsics-canonical.ll | 296 + test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 349 +- test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 84 + test/CodeGen/X86/sse2-intrinsics-x86.ll | 84 - test/CodeGen/X86/sse2-schedule.ll | 256 +- test/CodeGen/X86/sse2.ll | 2 +- test/CodeGen/X86/sse3-avx-addsub-2.ll | 26 +- test/CodeGen/X86/sse3-intrinsics-x86.ll | 4 +- test/CodeGen/X86/sse3-schedule.ll | 68 +- test/CodeGen/X86/sse41-intrinsics-fast-isel.ll | 25 +- test/CodeGen/X86/sse41-schedule.ll | 72 +- test/CodeGen/X86/sse41.ll | 10 +- .../X86/sse42-intrinsics-fast-isel-x86_64.ll | 2 +- test/CodeGen/X86/sse42-intrinsics-fast-isel.ll | 94 +- test/CodeGen/X86/sse42-intrinsics-x86.ll | 6 +- test/CodeGen/X86/sse42-intrinsics-x86_64.ll | 4 +- test/CodeGen/X86/sse42-schedule.ll | 320 +- test/CodeGen/X86/sse_partial_update.ll | 61 +- test/CodeGen/X86/stack-folding-adx-x86_64.ll | 15 +- test/CodeGen/X86/stack-folding-adx.mir | 269 + test/CodeGen/X86/stack-protector.ll | 36 +- test/CodeGen/X86/sttni.ll | 50 +- test/CodeGen/X86/subcarry.ll | 62 +- test/CodeGen/X86/subvector-broadcast.ll | 8 +- test/CodeGen/X86/swift-return.ll | 24 +- test/CodeGen/X86/swifterror.ll | 22 +- test/CodeGen/X86/system-intrinsics-xsetbv.ll | 4 +- test/CodeGen/X86/tail-call-conditional.mir | 2 +- .../CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll | 32 +- test/CodeGen/X86/tbm-intrinsics-fast-isel.ll | 32 +- test/CodeGen/X86/tbm_patterns.ll | 164 +- test/CodeGen/X86/test-shrink.ll | 354 + test/CodeGen/X86/trunc-subvector.ll | 9 +- test/CodeGen/X86/twoaddr-lea.ll | 4 +- test/CodeGen/X86/umul-with-overflow.ll | 2 +- .../CodeGen/X86/umulo-128-legalisation-lowering.ll | 196 + test/CodeGen/X86/umulo-64-legalisation-lowering.ll | 66 + test/CodeGen/X86/undef-label.ll | 19 +- ...old-masked-merge-scalar-constmask-innerouter.ll | 142 +- ...asked-merge-scalar-constmask-interleavedbits.ll | 142 +- ...merge-scalar-constmask-interleavedbytehalves.ll | 142 +- ...unfold-masked-merge-scalar-constmask-lowhigh.ll | 24 +- .../X86/unfold-masked-merge-scalar-variablemask.ll | 293 +- ...nfold-masked-merge-vector-variablemask-const.ll | 42 +- .../X86/unfold-masked-merge-vector-variablemask.ll | 2058 ++--- test/CodeGen/X86/update-terminator-debugloc.ll | 2 +- test/CodeGen/X86/urem-power-of-two.ll | 8 +- test/CodeGen/X86/urem-seteq-optsize.ll | 80 + test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 911 ++ test/CodeGen/X86/urem-seteq-vec-splat.ll | 475 ++ test/CodeGen/X86/urem-seteq.ll | 247 + test/CodeGen/X86/use-add-flags.ll | 8 +- test/CodeGen/X86/uwtables.ll | 43 + test/CodeGen/X86/v4f32-immediate.ll | 4 +- test/CodeGen/X86/vec-libcalls.ll | 421 + test/CodeGen/X86/vec_cast.ll | 24 +- test/CodeGen/X86/vec_cast3.ll | 4 +- test/CodeGen/X86/vec_cmp_sint-128.ll | 16 +- test/CodeGen/X86/vec_cmp_uint-128.ll | 16 +- test/CodeGen/X86/vec_compare.ll | 265 +- test/CodeGen/X86/vec_extract-sse4.ll | 4 +- test/CodeGen/X86/vec_fabs.ll | 11 +- test/CodeGen/X86/vec_floor.ll | 36 +- test/CodeGen/X86/vec_fneg.ll | 29 + test/CodeGen/X86/vec_fp_to_int.ll | 490 +- test/CodeGen/X86/vec_fpext.ll | 12 +- test/CodeGen/X86/vec_insert-3.ll | 6 +- test/CodeGen/X86/vec_int_to_fp.ll | 3533 +++++--- test/CodeGen/X86/vec_minmax_sint.ll | 32 +- test/CodeGen/X86/vec_minmax_uint.ll | 32 +- test/CodeGen/X86/vec_ss_load_fold.ll | 8 +- test/CodeGen/X86/vec_uint_to_fp-fastmath.ll | 4 +- test/CodeGen/X86/vec_uint_to_fp.ll | 4 +- test/CodeGen/X86/vector-bitreverse.ll | 54 +- test/CodeGen/X86/vector-blend.ll | 36 +- test/CodeGen/X86/vector-compare-results.ll | 8776 ++++++++++---------- .../X86/vector-constrained-fp-intrinsics.ll | 993 ++- test/CodeGen/X86/vector-idiv-sdiv-128.ll | 156 +- test/CodeGen/X86/vector-idiv-sdiv-256.ll | 254 +- test/CodeGen/X86/vector-idiv-sdiv-512.ll | 122 +- test/CodeGen/X86/vector-idiv-udiv-128.ll | 128 +- test/CodeGen/X86/vector-idiv-udiv-256.ll | 194 +- test/CodeGen/X86/vector-idiv-udiv-512.ll | 114 +- test/CodeGen/X86/vector-idiv-v2i32.ll | 1214 +++ test/CodeGen/X86/vector-idiv.ll | 40 +- test/CodeGen/X86/vector-interleave.ll | 2 +- test/CodeGen/X86/vector-mul.ll | 406 +- test/CodeGen/X86/vector-pcmp.ll | 8 +- test/CodeGen/X86/vector-reduce-fadd-fast.ll | 92 +- test/CodeGen/X86/vector-reduce-fadd.ll | 84 +- test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 22 +- test/CodeGen/X86/vector-reduce-fmax.ll | 22 +- test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 22 +- test/CodeGen/X86/vector-reduce-fmin.ll | 22 +- test/CodeGen/X86/vector-reduce-fmul-fast.ll | 66 +- test/CodeGen/X86/vector-reduce-fmul.ll | 96 +- test/CodeGen/X86/vector-reduce-mul.ll | 244 +- test/CodeGen/X86/vector-reduce-smax.ll | 25 +- test/CodeGen/X86/vector-reduce-smin.ll | 25 +- test/CodeGen/X86/vector-reduce-umax.ll | 36 +- test/CodeGen/X86/vector-reduce-umin.ll | 36 +- test/CodeGen/X86/vector-rotate-128.ll | 34 +- test/CodeGen/X86/vector-rotate-512.ll | 140 +- test/CodeGen/X86/vector-sext.ll | 138 +- test/CodeGen/X86/vector-shift-ashr-128.ll | 543 +- test/CodeGen/X86/vector-shift-ashr-256.ll | 604 +- test/CodeGen/X86/vector-shift-ashr-512.ll | 181 +- test/CodeGen/X86/vector-shift-lshr-128.ll | 358 +- test/CodeGen/X86/vector-shift-lshr-256.ll | 366 +- test/CodeGen/X86/vector-shift-lshr-512.ll | 136 +- test/CodeGen/X86/vector-shift-shl-128.ll | 141 +- test/CodeGen/X86/vector-shift-shl-256.ll | 144 +- test/CodeGen/X86/vector-shift-shl-512.ll | 48 +- test/CodeGen/X86/vector-shuffle-128-v16.ll | 29 +- test/CodeGen/X86/vector-shuffle-128-v2.ll | 48 +- test/CodeGen/X86/vector-shuffle-128-v4.ll | 27 +- test/CodeGen/X86/vector-shuffle-128-v8.ll | 9 +- test/CodeGen/X86/vector-shuffle-256-v16.ll | 523 +- test/CodeGen/X86/vector-shuffle-256-v32.ll | 670 +- test/CodeGen/X86/vector-shuffle-256-v4.ll | 137 +- test/CodeGen/X86/vector-shuffle-256-v8.ll | 461 +- test/CodeGen/X86/vector-shuffle-512-v16.ll | 17 + test/CodeGen/X86/vector-shuffle-512-v32.ll | 20 +- test/CodeGen/X86/vector-shuffle-512-v64.ll | 61 +- test/CodeGen/X86/vector-shuffle-avx512.ll | 58 +- test/CodeGen/X86/vector-shuffle-combining-avx.ll | 16 +- test/CodeGen/X86/vector-shuffle-combining-avx2.ll | 840 +- test/CodeGen/X86/vector-shuffle-combining-sse4a.ll | 4 +- test/CodeGen/X86/vector-shuffle-combining-ssse3.ll | 67 +- test/CodeGen/X86/vector-shuffle-combining-xop.ll | 16 +- test/CodeGen/X86/vector-shuffle-combining.ll | 111 +- test/CodeGen/X86/vector-shuffle-v1.ll | 14 +- test/CodeGen/X86/vector-shuffle-v48.ll | 4 +- test/CodeGen/X86/vector-trunc-math.ll | 174 +- test/CodeGen/X86/vector-trunc-packus.ll | 36 +- test/CodeGen/X86/vector-trunc-ssat.ll | 36 +- test/CodeGen/X86/vector-trunc-usat.ll | 36 +- test/CodeGen/X86/vector-trunc.ll | 2 - test/CodeGen/X86/vector-unsigned-cmp.ll | 8 +- test/CodeGen/X86/vector-zext.ll | 34 +- test/CodeGen/X86/vectorcall.ll | 9 +- test/CodeGen/X86/vselect-avx.ll | 16 +- test/CodeGen/X86/vselect-minmax.ll | 546 +- test/CodeGen/X86/vselect.ll | 4 +- test/CodeGen/X86/vshift-4.ll | 10 +- test/CodeGen/X86/widen_bitops-0.ll | 12 +- test/CodeGen/X86/widen_bitops-1.ll | 12 +- test/CodeGen/X86/widen_conv-3.ll | 2 +- test/CodeGen/X86/widen_conv-4.ll | 4 +- test/CodeGen/X86/widen_load-2.ll | 22 +- test/CodeGen/X86/widen_load-3.ll | 20 +- test/CodeGen/X86/win32-ssp.ll | 5 +- test/CodeGen/X86/win64-byval.ll | 34 + test/CodeGen/X86/win64_vararg.ll | 7 +- test/CodeGen/X86/x64-cet-intrinsics.ll | 4 +- test/CodeGen/X86/x86-64-bittest-logic.ll | 24 +- test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll | 4 +- test/CodeGen/X86/x86-64-double-shifts-var.ll | 5 - test/CodeGen/X86/x86-cmov-converter.ll | 32 +- test/CodeGen/X86/x86-interleaved-access.ll | 260 +- test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll | 4 +- test/CodeGen/X86/x86-shrink-wrap-unwind.ll | 1 + test/CodeGen/X86/x86-shrink-wrapping.ll | 70 +- test/CodeGen/X86/x87.ll | 24 +- test/CodeGen/X86/xaluo.ll | 132 +- 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tools/llvm-mca/include/Stages/FetchStage.h create mode 100644 tools/llvm-mca/include/Stages/InstructionTables.h create mode 100644 tools/llvm-mca/include/Stages/RetireStage.h create mode 100644 tools/llvm-mca/include/Stages/Stage.h create mode 100644 tools/llvm-mca/include/Support.h create mode 100644 tools/llvm-mca/lib/CMakeLists.txt create mode 100644 tools/llvm-mca/lib/Context.cpp rename tools/llvm-mca/{ => lib}/HWEventListener.cpp (100%) create mode 100644 tools/llvm-mca/lib/HardwareUnits/HardwareUnit.cpp create mode 100644 tools/llvm-mca/lib/HardwareUnits/LSUnit.cpp create mode 100644 tools/llvm-mca/lib/HardwareUnits/RegisterFile.cpp create mode 100644 tools/llvm-mca/lib/HardwareUnits/ResourceManager.cpp create mode 100644 tools/llvm-mca/lib/HardwareUnits/RetireControlUnit.cpp create mode 100644 tools/llvm-mca/lib/HardwareUnits/Scheduler.cpp create mode 100644 tools/llvm-mca/lib/InstrBuilder.cpp create mode 100644 tools/llvm-mca/lib/Instruction.cpp create mode 100644 tools/llvm-mca/lib/LLVMBuild.txt create mode 100644 tools/llvm-mca/lib/Pipeline.cpp create mode 100644 tools/llvm-mca/lib/Stages/DispatchStage.cpp create mode 100644 tools/llvm-mca/lib/Stages/ExecuteStage.cpp create mode 100644 tools/llvm-mca/lib/Stages/FetchStage.cpp create mode 100644 tools/llvm-mca/lib/Stages/InstructionTables.cpp create mode 100644 tools/llvm-mca/lib/Stages/RetireStage.cpp create mode 100644 tools/llvm-mca/lib/Stages/Stage.cpp rename tools/llvm-mca/{ => lib}/Support.cpp (100%) create mode 100644 tools/llvm-shlib/gen-msvc-exports.py create mode 100644 tools/llvm-xray/xray-fdr-dump.cpp create mode 100644 tools/llvm-yaml-numeric-parser-fuzzer/CMakeLists.txt create mode 100644 tools/llvm-yaml-numeric-parser-fuzzer/DummyYAMLNumericParserFuzzer.cpp create mode 100644 tools/llvm-yaml-numeric-parser-fuzzer/yaml-numeric-parser-fuzzer.cpp create mode 100644 unittests/ADT/ImmutableListTest.cpp create mode 100644 unittests/Analysis/BasicAliasAnalysisTest.cpp delete mode 100644 unittests/Analysis/MemorySSA.cpp create mode 100644 unittests/Analysis/MemorySSATest.cpp create mode 100644 unittests/Analysis/OrderedInstructionsTest.cpp rename unittests/Analysis/{UnrollAnalyzer.cpp => UnrollAnalyzerTest.cpp} (100%) create mode 100644 unittests/BinaryFormat/MsgPackReaderTest.cpp create mode 100644 unittests/BinaryFormat/MsgPackWriterTest.cpp create mode 100644 unittests/CodeGen/AArch64SelectionDAGTest.cpp create mode 100644 unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp create mode 100644 unittests/CodeGen/GlobalISel/LegalizerHelperTest.h copy {test => unittests}/DebugInfo/PDB/Inputs/empty.pdb (100%) create mode 100644 unittests/DebugInfo/PDB/NativeSymbolReuseTest.cpp create mode 100644 unittests/Demangle/FindTypesInMangledNameTest.cpp create mode 100644 unittests/ExecutionEngine/Orc/JITTargetMachineBuilderTest.cpp create mode 100644 unittests/ExecutionEngine/Orc/LazyCallThroughAndReexportsTest.cpp create mode 100644 unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayer2Test.cpp create mode 100644 unittests/ExecutionEngine/Orc/ThreadSafeModuleTest.cpp delete mode 100644 unittests/IR/DeferredDominanceTest.cpp create mode 100644 unittests/OptRemarks/CMakeLists.txt create mode 100644 unittests/OptRemarks/OptRemarksParsingTest.cpp create mode 100644 unittests/Support/ItaniumManglingCanonicalizerTest.cpp create mode 100644 unittests/Support/SymbolRemappingReaderTest.cpp create mode 100644 unittests/Support/VirtualFileSystemTest.cpp rename unittests/Transforms/Utils/{BasicBlockUtils.cpp => BasicBlockUtilsTest.cpp} (100%) rename unittests/Transforms/Utils/{Cloning.cpp => CloningTest.cpp} (100%) rename unittests/Transforms/Utils/{CodeExtractor.cpp => CodeExtractorTest.cpp} (100%) rename unittests/Transforms/Utils/{FunctionComparator.cpp => FunctionComparatorTes [...] rename unittests/Transforms/Utils/{IntegerDivision.cpp => IntegerDivisionTest.cpp} (100%) delete mode 100644 unittests/Transforms/Utils/Local.cpp create mode 100644 unittests/Transforms/Utils/LocalTest.cpp delete mode 100644 unittests/Transforms/Utils/OrderedInstructions.cpp rename unittests/Transforms/Utils/{SSAUpdaterBulk.cpp => SSAUpdaterBulkTest.cpp} (100%) create mode 100644 unittests/Transforms/Utils/UnrollLoopTest.cpp create mode 100644 unittests/XRay/FDRBlockIndexerTest.cpp create mode 100644 unittests/XRay/FDRBlockVerifierTest.cpp create mode 100644 unittests/XRay/FDRProducerConsumerTest.cpp create mode 100644 unittests/XRay/FDRRecordPrinterTest.cpp create mode 100644 unittests/XRay/FDRRecordsTest.cpp create mode 100644 unittests/XRay/FDRTraceWriterTest.cpp create mode 100644 unittests/XRay/ProfileTest.cpp delete mode 100644 unittests/tools/llvm-exegesis/BenchmarkResultTest.cpp create mode 100644 unittests/tools/llvm-exegesis/RegisterValueTest.cpp create mode 100644 unittests/tools/llvm-exegesis/X86/BenchmarkResultTest.cpp create mode 100644 unittests/unittest.cfg.in create mode 100644 utils/TableGen/WebAssemblyStackifierEmitter.cpp create mode 100644 utils/benchmark/AUTHORS create mode 100644 utils/benchmark/CMakeLists.txt create mode 100644 utils/benchmark/CONTRIBUTING.md create mode 100644 utils/benchmark/CONTRIBUTORS create mode 100644 utils/benchmark/LICENSE create mode 100644 utils/benchmark/README.LLVM create mode 100644 utils/benchmark/README.md create mode 100644 utils/benchmark/WORKSPACE create mode 100644 utils/benchmark/appveyor.yml create mode 100644 utils/benchmark/cmake/AddCXXCompilerFlag.cmake create mode 100644 utils/benchmark/cmake/CXXFeatureCheck.cmake create mode 100644 utils/benchmark/cmake/Config.cmake.in create mode 100644 utils/benchmark/cmake/GetGitVersion.cmake create mode 100644 utils/benchmark/cmake/HandleGTest.cmake create mode 100644 utils/benchmark/cmake/Modules/FindLLVMAr.cmake create mode 100644 utils/benchmark/cmake/Modules/FindLLVMNm.cmake create mode 100644 utils/benchmark/cmake/Modules/FindLLVMRanLib.cmake create mode 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[llvm] branch master updated (14c745c241f -> 1f4ef788a3b)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository llvm. from 14c745c241f Generalize an IR verifier check to work with non-zero progr [...] new 1f4ef788a3b [AARCH64][FIX] Emit data symbol for constant pool data The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp | 5 +++++ test/MC/{ARM => AArch64}/CheckDataSymbol.s | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) copy test/MC/{ARM => AArch64}/CheckDataSymbol.s (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[gcc] branch master updated (df5680b76c7 -> c488a0b5554)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from df5680b76c7 PR c++/87582 * typeck.c (maybe_warn_about_returning_addre [...] new c488a0b5554 Elide repeated RTL elements. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 13 +++++++++ gcc/print-rtl.c | 15 ++++++++++- gcc/read-rtl-function.c | 15 +++++++++++ gcc/read-rtl.c | 31 ++++++++++++++++++++-- gcc/rtl-tests.c | 24 +++++++++++++++++ gcc/testsuite/ChangeLog | 4 +++ .../{note_insn_basic_block.rtl => repeat.rtl} | 6 +++-- 7 files changed, 103 insertions(+), 5 deletions(-) copy gcc/testsuite/selftests/{note_insn_basic_block.rtl => repeat.rtl} (57%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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