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from 6d4cb407f1 [CUDA] Added rudimentary support for CUDA-9 and sm_70.
new 640d10c8b0 [CUDA] When compilation fails, print the compilation mode.
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Summary of changes:
lib/Frontend/CompilerInstance.cpp | 13 +++++++++++--
test/SemaCUDA/error-includes-mode.cu | 7 +++++++
2 files changed, 18 insertions(+), 2 deletions(-)
create mode 100644 test/SemaCUDA/error-includes-mode.cu
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from 013a4d7319b [XRay][tools] Function call stack based analysis tooling fo [...]
new 4059d374ce9 [CUDA] Added rudimentary support for CUDA-9 and sm_70.
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lib/Target/NVPTX/NVPTX.td | 5 +++++
test/CodeGen/NVPTX/sm-version-70.ll | 5 +++++
2 files changed, 10 insertions(+)
create mode 100644 test/CodeGen/NVPTX/sm-version-70.ll
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from 82bebd8899 [OpenCL] Handle taking an address of block captures.
new 6d4cb407f1 [CUDA] Added rudimentary support for CUDA-9 and sm_70.
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include/clang/Basic/Cuda.h | 3 +
lib/Basic/Cuda.cpp | 12 ++++
lib/Basic/Targets/NVPTX.cpp | 2 +
lib/Driver/ToolChains/Cuda.cpp | 88 +++++++++++++++++-------------
lib/Headers/__clang_cuda_runtime_wrapper.h | 9 ++-
test/Driver/cuda-arch-translation.cu | 36 ++++++++----
6 files changed, 101 insertions(+), 49 deletions(-)
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from e46354d6fad DAG: Allow creating extract_vector_elt post-legalize
new 0bb6355f635 AMDGPU: Start selecting v_mad_mix_f32
new 013a4d7319b [XRay][tools] Function call stack based analysis tooling fo [...]
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lib/Target/AMDGPU/AMDGPU.td | 3 +
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 101 +++-
lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 +
lib/Target/AMDGPU/SIInstrInfo.td | 2 +
test/CodeGen/AMDGPU/mad-mix.ll | 409 +++++++++++++++
test/tools/llvm-xray/X86/stack-empty-case.yaml | 13 +
test/tools/llvm-xray/X86/stack-keep-going.yaml | 28 ++
test/tools/llvm-xray/X86/stack-multithread.yaml | 83 ++++
test/tools/llvm-xray/X86/stack-simple-case.yaml | 13 +
tools/llvm-xray/CMakeLists.txt | 1 +
tools/llvm-xray/xray-record-yaml.h | 2 +-
tools/llvm-xray/xray-stacks.cc | 634 ++++++++++++++++++++++++
12 files changed, 1287 insertions(+), 6 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/mad-mix.ll
create mode 100644 test/tools/llvm-xray/X86/stack-empty-case.yaml
create mode 100644 test/tools/llvm-xray/X86/stack-keep-going.yaml
create mode 100644 test/tools/llvm-xray/X86/stack-multithread.yaml
create mode 100644 test/tools/llvm-xray/X86/stack-simple-case.yaml
create mode 100644 tools/llvm-xray/xray-stacks.cc
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from 3964b8bfc86 AMDGPU: Handle non-temporal loads and stores
new e46354d6fad DAG: Allow creating extract_vector_elt post-legalize
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lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
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from b6f64be453d AMDGPU: Handle more than one memory operand in SIMemoryLegalizer
new 3964b8bfc86 AMDGPU: Handle non-temporal loads and stores
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lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 82 +++++++++++++-----
.../AMDGPU/memory-legalizer-nontemporal-load.ll | 97 ++++++++++++++++++++++
.../AMDGPU/memory-legalizer-nontemporal-store.ll | 97 ++++++++++++++++++++++
...alizer-multiple-mem-operands-nontemporal-1.mir} | 12 ++-
...alizer-multiple-mem-operands-nontemporal-2.mir} | 12 ++-
test/CodeGen/MIR/AMDGPU/syncscopes.mir | 20 +++--
6 files changed, 274 insertions(+), 46 deletions(-)
create mode 100644 test/CodeGen/AMDGPU/memory-legalizer-nontemporal-load.ll
create mode 100644 test/CodeGen/AMDGPU/memory-legalizer-nontemporal-store.ll
copy test/CodeGen/MIR/AMDGPU/{memory-legalizer-multiple-mem-operands-atomics.mir = [...]
copy test/CodeGen/MIR/AMDGPU/{memory-legalizer-multiple-mem-operands-atomics.mir = [...]
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from 824f38dfa3 [clang-format] Add support for C++17 structured bindings.
new 82bebd8899 [OpenCL] Handle taking an address of block captures.
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include/clang/Basic/DiagnosticSemaKinds.td | 4 ++--
lib/Sema/SemaExpr.cpp | 23 +++++++++++------------
test/SemaOpenCL/invalid-block.cl | 11 +++++++++++
3 files changed, 24 insertions(+), 14 deletions(-)
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from e50142270b Document the GDB 8.0.1 release in gdb/ChangeLog
new b1308d2c37 RISC-V: Support PCREL_* relocations agaist weak undefined symbols
new 9eb7b0acb5 RISC-V: Print an error when unable to align a section
new ed0816bd93 RISC-V: Avoid emitting invalid instructions in mixed RVC/no- [...]
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bfd/ChangeLog | 13 ++++++++
bfd/elfnn-riscv.c | 84 ++++++++++++++++++++++++++++++++++++++++++++++-----
gas/ChangeLog | 5 +++
gas/config/tc-riscv.c | 25 +++++----------
4 files changed, 103 insertions(+), 24 deletions(-)
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from bc5ace67fe mutex: Fix robust mutex lock acquire (Bug 21778)
new c71ddec7b3 Place $(elf-objpfx)sofini.os last [BZ #22051]
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ChangeLog | 8 ++++++++
Makerules | 5 ++++-
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from d5443518d [ELF] - Rename PhdrEntry::First/Last to FirstSec/LastSec. NFC.
new 342a1ef0d [ELF] Always write non-immediate bits for AArch64 branch inst [...]
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ELF/Arch/AArch64.cpp | 11 ++++++++-
test/ELF/relocation-b-aarch64.test | 48 ++++++++++++++++++++++++++++++++++++++
2 files changed, 58 insertions(+), 1 deletion(-)
create mode 100644 test/ELF/relocation-b-aarch64.test
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